Add x86-64 ILP32 support.
[binutils.git] / gas / testsuite / gas / i386 / ilp32 / x86-64-aes-intel.d
blob8318e133bb6c81fa6201e33526bf620f6179cc4a
1 #source: ../x86-64-aes.s
2 #as: -J
3 #objdump: -dw -Mintel
4 #name: x86-64 (ILP32) AES (Intel mode)
6 .*: +file format .*
8 Disassembly of section .text:
10 0+ <foo>:
11 [ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc xmm0,XMMWORD PTR \[rcx\]
12 [ ]*[a-f0-9]+: 66 0f 38 dc c1 aesenc xmm0,xmm1
13 [ ]*[a-f0-9]+: 66 0f 38 dd 01 aesenclast xmm0,XMMWORD PTR \[rcx\]
14 [ ]*[a-f0-9]+: 66 0f 38 dd c1 aesenclast xmm0,xmm1
15 [ ]*[a-f0-9]+: 66 0f 38 de 01 aesdec xmm0,XMMWORD PTR \[rcx\]
16 [ ]*[a-f0-9]+: 66 0f 38 de c1 aesdec xmm0,xmm1
17 [ ]*[a-f0-9]+: 66 0f 38 df 01 aesdeclast xmm0,XMMWORD PTR \[rcx\]
18 [ ]*[a-f0-9]+: 66 0f 38 df c1 aesdeclast xmm0,xmm1
19 [ ]*[a-f0-9]+: 66 0f 38 db 01 aesimc xmm0,XMMWORD PTR \[rcx\]
20 [ ]*[a-f0-9]+: 66 0f 38 db c1 aesimc xmm0,xmm1
21 [ ]*[a-f0-9]+: 66 0f 3a df 01 08 aeskeygenassist xmm0,XMMWORD PTR \[rcx\],0x8
22 [ ]*[a-f0-9]+: 66 0f 3a df c1 08 aeskeygenassist xmm0,xmm1,0x8
23 [ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc xmm0,XMMWORD PTR \[rcx\]
24 [ ]*[a-f0-9]+: 66 0f 38 dc c1 aesenc xmm0,xmm1
25 [ ]*[a-f0-9]+: 66 0f 38 dd 01 aesenclast xmm0,XMMWORD PTR \[rcx\]
26 [ ]*[a-f0-9]+: 66 0f 38 dd c1 aesenclast xmm0,xmm1
27 [ ]*[a-f0-9]+: 66 0f 38 de 01 aesdec xmm0,XMMWORD PTR \[rcx\]
28 [ ]*[a-f0-9]+: 66 0f 38 de c1 aesdec xmm0,xmm1
29 [ ]*[a-f0-9]+: 66 0f 38 df 01 aesdeclast xmm0,XMMWORD PTR \[rcx\]
30 [ ]*[a-f0-9]+: 66 0f 38 df c1 aesdeclast xmm0,xmm1
31 [ ]*[a-f0-9]+: 66 0f 38 db 01 aesimc xmm0,XMMWORD PTR \[rcx\]
32 [ ]*[a-f0-9]+: 66 0f 38 db c1 aesimc xmm0,xmm1
33 [ ]*[a-f0-9]+: 66 0f 3a df 01 08 aeskeygenassist xmm0,XMMWORD PTR \[rcx\],0x8
34 [ ]*[a-f0-9]+: 66 0f 3a df c1 08 aeskeygenassist xmm0,xmm1,0x8
35 #pass