gas/
[binutils.git] / opcodes / mep-opc.c
blob330e286d450733c9e6a57eb5ede29dd17858385f
1 /* Instruction opcode table for mep.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2007 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #include "sysdep.h"
26 #include "ansidecl.h"
27 #include "bfd.h"
28 #include "symcat.h"
29 #include "mep-desc.h"
30 #include "mep-opc.h"
31 #include "libiberty.h"
33 /* -- opc.c */
34 #include "elf/mep.h"
36 /* A mask for all ISAs executed by the core. */
37 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask = {0, 0};
39 void
40 init_mep_all_core_isas_mask (void)
42 if (mep_all_core_isas_mask.length != 0)
43 return;
44 cgen_bitset_init (& mep_all_core_isas_mask, ISA_MAX);
45 cgen_bitset_set (& mep_all_core_isas_mask, ISA_MEP);
46 /* begin-all-core-isas */
47 cgen_bitset_add (& mep_all_core_isas_mask, ISA_EXT_CORE1);
48 cgen_bitset_add (& mep_all_core_isas_mask, ISA_EXT_CORE2);
49 /* end-all-core-isas */
52 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask = {0, 0};
54 void
55 init_mep_all_cop_isas_mask (void)
57 if (mep_all_cop_isas_mask.length != 0)
58 return;
59 cgen_bitset_init (& mep_all_cop_isas_mask, ISA_MAX);
60 /* begin-all-cop-isas */
61 cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_16);
62 cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_32);
63 cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_48);
64 cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_64);
65 /* end-all-cop-isas */
68 int
69 mep_insn_supported_by_isa (const CGEN_INSN *insn, CGEN_ATTR_VALUE_BITSET_TYPE *isa_mask)
71 CGEN_BITSET insn_isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
72 return cgen_bitset_intersect_p (& insn_isas, isa_mask);
75 #define OPTION_MASK \
76 ( (1 << CGEN_INSN_OPTIONAL_BIT_INSN) \
77 | (1 << CGEN_INSN_OPTIONAL_MUL_INSN) \
78 | (1 << CGEN_INSN_OPTIONAL_DIV_INSN) \
79 | (1 << CGEN_INSN_OPTIONAL_DEBUG_INSN) \
80 | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN) \
81 | (1 << CGEN_INSN_OPTIONAL_ABS_INSN) \
82 | (1 << CGEN_INSN_OPTIONAL_AVE_INSN) \
83 | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN) \
84 | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN) \
85 | (1 << CGEN_INSN_OPTIONAL_SAT_INSN) \
86 | (1 << CGEN_INSN_OPTIONAL_UCI_INSN) \
87 | (1 << CGEN_INSN_OPTIONAL_DSP_INSN) \
88 | (1 << CGEN_INSN_OPTIONAL_CP_INSN) \
89 | (1 << CGEN_INSN_OPTIONAL_CP64_INSN) )
92 mep_config_map_struct mep_config_map[] =
94 /* config-map-start */
95 /* Default entry: mep core only, all options enabled. */
96 { "", 0, EF_MEP_CPU_C2, 1, 0, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x80"}, OPTION_MASK },
97 { "simple", CONFIG_SIMPLE, EF_MEP_CPU_C2, 1, 0, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\xc0" },
98 0 },
99 { "fmax", CONFIG_FMAX, EF_MEP_CPU_C2, 1, 0, { 1, "\x10" }, { 1, "\x8" }, { 1, "\x4" }, { 1, "\x2" }, { 1, "\x1e" }, { 1, "\xa0" },
101 | (1 << CGEN_INSN_OPTIONAL_CP_INSN)
102 | (1 << CGEN_INSN_OPTIONAL_MUL_INSN)
103 | (1 << CGEN_INSN_OPTIONAL_DIV_INSN)
104 | (1 << CGEN_INSN_OPTIONAL_BIT_INSN)
105 | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN)
106 | (1 << CGEN_INSN_OPTIONAL_ABS_INSN)
107 | (1 << CGEN_INSN_OPTIONAL_AVE_INSN)
108 | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN)
109 | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN)
110 | (1 << CGEN_INSN_OPTIONAL_SAT_INSN) },
111 /* config-map-end */
112 { 0, 0, 0, 0, 0, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, 0 }
115 int mep_config_index = 0;
117 static int
118 check_configured_mach (int machs)
120 /* All base insns are supported. */
121 int mach = 1 << MACH_BASE;
122 switch (MEP_CPU)
124 case EF_MEP_CPU_C2:
125 case EF_MEP_CPU_C3:
126 mach |= (1 << MACH_MEP);
127 break;
128 case EF_MEP_CPU_H1:
129 mach |= (1 << MACH_H1);
130 break;
131 default:
132 break;
134 return machs & mach;
138 mep_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
140 int iconfig = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_CONFIG);
141 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
142 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
143 int ok1;
144 int ok2;
145 int ok3;
147 /* If the insn has an option bit set that we don't want,
148 reject it. */
149 if (CGEN_INSN_ATTRS (insn)->bool & OPTION_MASK & ~MEP_OMASK)
150 return 0;
152 /* If attributes are absent, assume no restriction. */
153 if (machs == 0)
154 machs = ~0;
156 ok1 = ((machs & cd->machs) && cgen_bitset_intersect_p (& isas, cd->isas));
157 /* If the insn is config-specific, make sure it matches. */
158 ok2 = (iconfig == 0 || iconfig == MEP_CONFIG);
159 /* Make sure the insn is supported by the configured mach */
160 ok3 = check_configured_mach (machs);
162 return (ok1 && ok2 && ok3);
164 /* The hash functions are recorded here to help keep assembler code out of
165 the disassembler and vice versa. */
167 static int asm_hash_insn_p (const CGEN_INSN *);
168 static unsigned int asm_hash_insn (const char *);
169 static int dis_hash_insn_p (const CGEN_INSN *);
170 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
172 /* Instruction formats. */
174 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
175 #define F(f) & mep_cgen_ifld_table[MEP_##f]
176 #else
177 #define F(f) & mep_cgen_ifld_table[MEP_/**/f]
178 #endif
179 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
180 0, 0, 0x0, { { 0 } }
183 static const CGEN_IFMT ifmt_sb ATTRIBUTE_UNUSED = {
184 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
187 static const CGEN_IFMT ifmt_sh ATTRIBUTE_UNUSED = {
188 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
191 static const CGEN_IFMT ifmt_sw ATTRIBUTE_UNUSED = {
192 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
195 static const CGEN_IFMT ifmt_lbu ATTRIBUTE_UNUSED = {
196 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
199 static const CGEN_IFMT ifmt_lhu ATTRIBUTE_UNUSED = {
200 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
203 static const CGEN_IFMT ifmt_sw_sp ATTRIBUTE_UNUSED = {
204 16, 16, 0xf083, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
207 static const CGEN_IFMT ifmt_sb_tp ATTRIBUTE_UNUSED = {
208 16, 16, 0xf880, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9) }, { 0 } }
211 static const CGEN_IFMT ifmt_sh_tp ATTRIBUTE_UNUSED = {
212 16, 16, 0xf881, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A2) }, { F (F_15) }, { 0 } }
215 static const CGEN_IFMT ifmt_sw_tp ATTRIBUTE_UNUSED = {
216 16, 16, 0xf883, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
219 static const CGEN_IFMT ifmt_lbu_tp ATTRIBUTE_UNUSED = {
220 16, 16, 0xf880, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9) }, { 0 } }
223 static const CGEN_IFMT ifmt_lhu_tp ATTRIBUTE_UNUSED = {
224 16, 16, 0xf881, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A2) }, { F (F_15) }, { 0 } }
227 static const CGEN_IFMT ifmt_sb16 ATTRIBUTE_UNUSED = {
228 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
231 static const CGEN_IFMT ifmt_sh16 ATTRIBUTE_UNUSED = {
232 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
235 static const CGEN_IFMT ifmt_sw16 ATTRIBUTE_UNUSED = {
236 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
239 static const CGEN_IFMT ifmt_lbu16 ATTRIBUTE_UNUSED = {
240 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
243 static const CGEN_IFMT ifmt_lhu16 ATTRIBUTE_UNUSED = {
244 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
247 static const CGEN_IFMT ifmt_sw24 ATTRIBUTE_UNUSED = {
248 32, 32, 0xf0030000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_24U8A4N) }, { F (F_SUB2) }, { 0 } }
251 static const CGEN_IFMT ifmt_extb ATTRIBUTE_UNUSED = {
252 16, 16, 0xf0ff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
255 static const CGEN_IFMT ifmt_ssarb ATTRIBUTE_UNUSED = {
256 16, 16, 0xfc0f, { { F (F_MAJOR) }, { F (F_4) }, { F (F_5) }, { F (F_2U6) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
259 static const CGEN_IFMT ifmt_mov ATTRIBUTE_UNUSED = {
260 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
263 static const CGEN_IFMT ifmt_movi8 ATTRIBUTE_UNUSED = {
264 16, 16, 0xf000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8S8) }, { 0 } }
267 static const CGEN_IFMT ifmt_movi16 ATTRIBUTE_UNUSED = {
268 32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
271 static const CGEN_IFMT ifmt_movu24 ATTRIBUTE_UNUSED = {
272 32, 32, 0xf8000000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_24U8N) }, { 0 } }
275 static const CGEN_IFMT ifmt_movu16 ATTRIBUTE_UNUSED = {
276 32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
279 static const CGEN_IFMT ifmt_add3 ATTRIBUTE_UNUSED = {
280 16, 16, 0xf000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_RL) }, { 0 } }
283 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
284 16, 16, 0xf003, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_6S8) }, { F (F_SUB2) }, { 0 } }
287 static const CGEN_IFMT ifmt_add3i ATTRIBUTE_UNUSED = {
288 16, 16, 0xf083, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
291 static const CGEN_IFMT ifmt_slt3i ATTRIBUTE_UNUSED = {
292 16, 16, 0xf007, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_5U8) }, { F (F_SUB3) }, { 0 } }
295 static const CGEN_IFMT ifmt_add3x ATTRIBUTE_UNUSED = {
296 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
299 static const CGEN_IFMT ifmt_sltu3x ATTRIBUTE_UNUSED = {
300 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
303 static const CGEN_IFMT ifmt_bra ATTRIBUTE_UNUSED = {
304 16, 16, 0xf001, { { F (F_MAJOR) }, { F (F_12S4A2) }, { F (F_15) }, { 0 } }
307 static const CGEN_IFMT ifmt_beqz ATTRIBUTE_UNUSED = {
308 16, 16, 0xf001, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8S8A2) }, { F (F_15) }, { 0 } }
311 static const CGEN_IFMT ifmt_beqi ATTRIBUTE_UNUSED = {
312 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_4U8) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
315 static const CGEN_IFMT ifmt_beq ATTRIBUTE_UNUSED = {
316 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
319 static const CGEN_IFMT ifmt_bsr24 ATTRIBUTE_UNUSED = {
320 32, 32, 0xf80f0000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_24S5A2N) }, { F (F_SUB4) }, { 0 } }
323 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
324 16, 16, 0xff0f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
327 static const CGEN_IFMT ifmt_jmp24 ATTRIBUTE_UNUSED = {
328 32, 32, 0xf80f0000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_24U5A2N) }, { F (F_SUB4) }, { 0 } }
331 static const CGEN_IFMT ifmt_ret ATTRIBUTE_UNUSED = {
332 16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
335 static const CGEN_IFMT ifmt_repeat ATTRIBUTE_UNUSED = {
336 32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
339 static const CGEN_IFMT ifmt_erepeat ATTRIBUTE_UNUSED = {
340 32, 32, 0xffff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
343 static const CGEN_IFMT ifmt_stc_lp ATTRIBUTE_UNUSED = {
344 16, 16, 0xf0ff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_CSRN_LO) }, { F (F_12) }, { F (F_13) }, { F (F_14) }, { F (F_CSRN_HI) }, { 0 } }
347 static const CGEN_IFMT ifmt_stc ATTRIBUTE_UNUSED = {
348 16, 16, 0xf00e, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_CSRN) }, { F (F_12) }, { F (F_13) }, { F (F_14) }, { 0 } }
351 static const CGEN_IFMT ifmt_swi ATTRIBUTE_UNUSED = {
352 16, 16, 0xffcf, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_9) }, { F (F_2U10) }, { F (F_SUB4) }, { 0 } }
355 static const CGEN_IFMT ifmt_bsetm ATTRIBUTE_UNUSED = {
356 16, 16, 0xf80f, { { F (F_MAJOR) }, { F (F_4) }, { F (F_3U5) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
359 static const CGEN_IFMT ifmt_tas ATTRIBUTE_UNUSED = {
360 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
363 static const CGEN_IFMT ifmt_cache ATTRIBUTE_UNUSED = {
364 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
367 static const CGEN_IFMT ifmt_madd ATTRIBUTE_UNUSED = {
368 32, 32, 0xf00fffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
371 static const CGEN_IFMT ifmt_clip ATTRIBUTE_UNUSED = {
372 32, 32, 0xf0ffff07, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_5U24) }, { F (F_29) }, { F (F_30) }, { F (F_31) }, { 0 } }
375 static const CGEN_IFMT ifmt_swcp ATTRIBUTE_UNUSED = {
376 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
379 static const CGEN_IFMT ifmt_smcp ATTRIBUTE_UNUSED = {
380 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
383 static const CGEN_IFMT ifmt_swcp16 ATTRIBUTE_UNUSED = {
384 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
387 static const CGEN_IFMT ifmt_smcp16 ATTRIBUTE_UNUSED = {
388 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
391 static const CGEN_IFMT ifmt_sbcpa ATTRIBUTE_UNUSED = {
392 32, 32, 0xf00fff00, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24) }, { 0 } }
395 static const CGEN_IFMT ifmt_shcpa ATTRIBUTE_UNUSED = {
396 32, 32, 0xf00fff01, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A2) }, { F (F_31) }, { 0 } }
399 static const CGEN_IFMT ifmt_swcpa ATTRIBUTE_UNUSED = {
400 32, 32, 0xf00fff03, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A4) }, { F (F_30) }, { F (F_31) }, { 0 } }
403 static const CGEN_IFMT ifmt_smcpa ATTRIBUTE_UNUSED = {
404 32, 32, 0xf00fff07, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A8) }, { F (F_29) }, { F (F_30) }, { F (F_31) }, { 0 } }
407 static const CGEN_IFMT ifmt_bcpeq ATTRIBUTE_UNUSED = {
408 32, 32, 0xff0f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
411 static const CGEN_IFMT ifmt_sim_syscall ATTRIBUTE_UNUSED = {
412 16, 16, 0xf8ef, { { F (F_MAJOR) }, { F (F_4) }, { F (F_CALLNUM) }, { F (F_8) }, { F (F_9) }, { F (F_10) }, { F (F_SUB4) }, { 0 } }
415 static const CGEN_IFMT ifmt_fadds ATTRIBUTE_UNUSED = {
416 32, 32, 0xf0fff001, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_FRM) }, { F (F_FMAX_31_1) }, { 0 } }
419 static const CGEN_IFMT ifmt_fsqrts ATTRIBUTE_UNUSED = {
420 32, 32, 0xf0fff0f3, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_24_4) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
423 static const CGEN_IFMT ifmt_froundws ATTRIBUTE_UNUSED = {
424 32, 32, 0xf0fff0f3, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_24_4) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
427 static const CGEN_IFMT ifmt_fcvtsw ATTRIBUTE_UNUSED = {
428 32, 32, 0xf0fff0f3, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_24_4) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
431 static const CGEN_IFMT ifmt_fcmpfs ATTRIBUTE_UNUSED = {
432 32, 32, 0xfffff009, { { F (F_FMAX_0_4) }, { F (F_FMAX_4_4) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_FRM) }, { F (F_FMAX_28_1) }, { F (F_FMAX_31_1) }, { 0 } }
435 static const CGEN_IFMT ifmt_cmov_frn_rm ATTRIBUTE_UNUSED = {
436 32, 32, 0xf00ffff7, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_RM) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_20_4) }, { F (F_FMAX_24_4) }, { F (F_FMAX_29_1) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
439 static const CGEN_IFMT ifmt_cmovc_ccrn_rm ATTRIBUTE_UNUSED = {
440 32, 32, 0xf00fffff, { { F (F_FMAX_0_4) }, { F (F_FMAX_4_4) }, { F (F_FMAX_RM) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_20_4) }, { F (F_FMAX_24_4) }, { F (F_FMAX_28_1) }, { F (F_FMAX_29_1) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
443 #undef F
445 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
446 #define A(a) (1 << CGEN_INSN_##a)
447 #else
448 #define A(a) (1 << CGEN_INSN_/**/a)
449 #endif
450 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
451 #define OPERAND(op) MEP_OPERAND_##op
452 #else
453 #define OPERAND(op) MEP_OPERAND_/**/op
454 #endif
455 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
456 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
458 /* The instruction table. */
460 static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] =
462 /* Special null first entry.
463 A `num' value of zero is thus invalid.
464 Also, the special `invalid' insn resides here. */
465 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
466 /* sb $rnc,($rma) */
468 { 0, 0, 0, 0 },
469 { { MNEM, ' ', OP (RNC), ',', '(', OP (RMA), ')', 0 } },
470 & ifmt_sb, { 0x8 }
472 /* sh $rns,($rma) */
474 { 0, 0, 0, 0 },
475 { { MNEM, ' ', OP (RNS), ',', '(', OP (RMA), ')', 0 } },
476 & ifmt_sh, { 0x9 }
478 /* sw $rnl,($rma) */
480 { 0, 0, 0, 0 },
481 { { MNEM, ' ', OP (RNL), ',', '(', OP (RMA), ')', 0 } },
482 & ifmt_sw, { 0xa }
484 /* lb $rnc,($rma) */
486 { 0, 0, 0, 0 },
487 { { MNEM, ' ', OP (RNC), ',', '(', OP (RMA), ')', 0 } },
488 & ifmt_sb, { 0xc }
490 /* lh $rns,($rma) */
492 { 0, 0, 0, 0 },
493 { { MNEM, ' ', OP (RNS), ',', '(', OP (RMA), ')', 0 } },
494 & ifmt_sh, { 0xd }
496 /* lw $rnl,($rma) */
498 { 0, 0, 0, 0 },
499 { { MNEM, ' ', OP (RNL), ',', '(', OP (RMA), ')', 0 } },
500 & ifmt_sw, { 0xe }
502 /* lbu $rnuc,($rma) */
504 { 0, 0, 0, 0 },
505 { { MNEM, ' ', OP (RNUC), ',', '(', OP (RMA), ')', 0 } },
506 & ifmt_lbu, { 0xb }
508 /* lhu $rnus,($rma) */
510 { 0, 0, 0, 0 },
511 { { MNEM, ' ', OP (RNUS), ',', '(', OP (RMA), ')', 0 } },
512 & ifmt_lhu, { 0xf }
514 /* sw $rnl,$udisp7a4($spr) */
516 { 0, 0, 0, 0 },
517 { { MNEM, ' ', OP (RNL), ',', OP (UDISP7A4), '(', OP (SPR), ')', 0 } },
518 & ifmt_sw_sp, { 0x4002 }
520 /* lw $rnl,$udisp7a4($spr) */
522 { 0, 0, 0, 0 },
523 { { MNEM, ' ', OP (RNL), ',', OP (UDISP7A4), '(', OP (SPR), ')', 0 } },
524 & ifmt_sw_sp, { 0x4003 }
526 /* sb $rn3c,$udisp7($tpr) */
528 { 0, 0, 0, 0 },
529 { { MNEM, ' ', OP (RN3C), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
530 & ifmt_sb_tp, { 0x8000 }
532 /* sh $rn3s,$udisp7a2($tpr) */
534 { 0, 0, 0, 0 },
535 { { MNEM, ' ', OP (RN3S), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
536 & ifmt_sh_tp, { 0x8080 }
538 /* sw $rn3l,$udisp7a4($tpr) */
540 { 0, 0, 0, 0 },
541 { { MNEM, ' ', OP (RN3L), ',', OP (UDISP7A4), '(', OP (TPR), ')', 0 } },
542 & ifmt_sw_tp, { 0x4082 }
544 /* lb $rn3c,$udisp7($tpr) */
546 { 0, 0, 0, 0 },
547 { { MNEM, ' ', OP (RN3C), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
548 & ifmt_sb_tp, { 0x8800 }
550 /* lh $rn3s,$udisp7a2($tpr) */
552 { 0, 0, 0, 0 },
553 { { MNEM, ' ', OP (RN3S), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
554 & ifmt_sh_tp, { 0x8880 }
556 /* lw $rn3l,$udisp7a4($tpr) */
558 { 0, 0, 0, 0 },
559 { { MNEM, ' ', OP (RN3L), ',', OP (UDISP7A4), '(', OP (TPR), ')', 0 } },
560 & ifmt_sw_tp, { 0x4083 }
562 /* lbu $rn3uc,$udisp7($tpr) */
564 { 0, 0, 0, 0 },
565 { { MNEM, ' ', OP (RN3UC), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
566 & ifmt_lbu_tp, { 0x4880 }
568 /* lhu $rn3us,$udisp7a2($tpr) */
570 { 0, 0, 0, 0 },
571 { { MNEM, ' ', OP (RN3US), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
572 & ifmt_lhu_tp, { 0x8881 }
574 /* sb $rnc,$sdisp16($rma) */
576 { 0, 0, 0, 0 },
577 { { MNEM, ' ', OP (RNC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
578 & ifmt_sb16, { 0xc0080000 }
580 /* sh $rns,$sdisp16($rma) */
582 { 0, 0, 0, 0 },
583 { { MNEM, ' ', OP (RNS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
584 & ifmt_sh16, { 0xc0090000 }
586 /* sw $rnl,$sdisp16($rma) */
588 { 0, 0, 0, 0 },
589 { { MNEM, ' ', OP (RNL), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
590 & ifmt_sw16, { 0xc00a0000 }
592 /* lb $rnc,$sdisp16($rma) */
594 { 0, 0, 0, 0 },
595 { { MNEM, ' ', OP (RNC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
596 & ifmt_sb16, { 0xc00c0000 }
598 /* lh $rns,$sdisp16($rma) */
600 { 0, 0, 0, 0 },
601 { { MNEM, ' ', OP (RNS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
602 & ifmt_sh16, { 0xc00d0000 }
604 /* lw $rnl,$sdisp16($rma) */
606 { 0, 0, 0, 0 },
607 { { MNEM, ' ', OP (RNL), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
608 & ifmt_sw16, { 0xc00e0000 }
610 /* lbu $rnuc,$sdisp16($rma) */
612 { 0, 0, 0, 0 },
613 { { MNEM, ' ', OP (RNUC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
614 & ifmt_lbu16, { 0xc00b0000 }
616 /* lhu $rnus,$sdisp16($rma) */
618 { 0, 0, 0, 0 },
619 { { MNEM, ' ', OP (RNUS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
620 & ifmt_lhu16, { 0xc00f0000 }
622 /* sw $rnl,($addr24a4) */
624 { 0, 0, 0, 0 },
625 { { MNEM, ' ', OP (RNL), ',', '(', OP (ADDR24A4), ')', 0 } },
626 & ifmt_sw24, { 0xe0020000 }
628 /* lw $rnl,($addr24a4) */
630 { 0, 0, 0, 0 },
631 { { MNEM, ' ', OP (RNL), ',', '(', OP (ADDR24A4), ')', 0 } },
632 & ifmt_sw24, { 0xe0030000 }
634 /* extb $rn */
636 { 0, 0, 0, 0 },
637 { { MNEM, ' ', OP (RN), 0 } },
638 & ifmt_extb, { 0x100d }
640 /* exth $rn */
642 { 0, 0, 0, 0 },
643 { { MNEM, ' ', OP (RN), 0 } },
644 & ifmt_extb, { 0x102d }
646 /* extub $rn */
648 { 0, 0, 0, 0 },
649 { { MNEM, ' ', OP (RN), 0 } },
650 & ifmt_extb, { 0x108d }
652 /* extuh $rn */
654 { 0, 0, 0, 0 },
655 { { MNEM, ' ', OP (RN), 0 } },
656 & ifmt_extb, { 0x10ad }
658 /* ssarb $udisp2($rm) */
660 { 0, 0, 0, 0 },
661 { { MNEM, ' ', OP (UDISP2), '(', OP (RM), ')', 0 } },
662 & ifmt_ssarb, { 0x100c }
664 /* mov $rn,$rm */
666 { 0, 0, 0, 0 },
667 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
668 & ifmt_mov, { 0x0 }
670 /* mov $rn,$simm8 */
672 { 0, 0, 0, 0 },
673 { { MNEM, ' ', OP (RN), ',', OP (SIMM8), 0 } },
674 & ifmt_movi8, { 0x5000 }
676 /* mov $rn,$simm16 */
678 { 0, 0, 0, 0 },
679 { { MNEM, ' ', OP (RN), ',', OP (SIMM16), 0 } },
680 & ifmt_movi16, { 0xc0010000 }
682 /* movu $rn3,$uimm24 */
684 { 0, 0, 0, 0 },
685 { { MNEM, ' ', OP (RN3), ',', OP (UIMM24), 0 } },
686 & ifmt_movu24, { 0xd0000000 }
688 /* movu $rn,$uimm16 */
690 { 0, 0, 0, 0 },
691 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
692 & ifmt_movu16, { 0xc0110000 }
694 /* movh $rn,$uimm16 */
696 { 0, 0, 0, 0 },
697 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
698 & ifmt_movu16, { 0xc0210000 }
700 /* add3 $rl,$rn,$rm */
702 { 0, 0, 0, 0 },
703 { { MNEM, ' ', OP (RL), ',', OP (RN), ',', OP (RM), 0 } },
704 & ifmt_add3, { 0x9000 }
706 /* add $rn,$simm6 */
708 { 0, 0, 0, 0 },
709 { { MNEM, ' ', OP (RN), ',', OP (SIMM6), 0 } },
710 & ifmt_add, { 0x6000 }
712 /* add3 $rn,$spr,$uimm7a4 */
714 { 0, 0, 0, 0 },
715 { { MNEM, ' ', OP (RN), ',', OP (SPR), ',', OP (UIMM7A4), 0 } },
716 & ifmt_add3i, { 0x4000 }
718 /* advck3 \$0,$rn,$rm */
720 { 0, 0, 0, 0 },
721 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
722 & ifmt_mov, { 0x7 }
724 /* sub $rn,$rm */
726 { 0, 0, 0, 0 },
727 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
728 & ifmt_mov, { 0x4 }
730 /* sbvck3 \$0,$rn,$rm */
732 { 0, 0, 0, 0 },
733 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
734 & ifmt_mov, { 0x5 }
736 /* neg $rn,$rm */
738 { 0, 0, 0, 0 },
739 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
740 & ifmt_mov, { 0x1 }
742 /* slt3 \$0,$rn,$rm */
744 { 0, 0, 0, 0 },
745 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
746 & ifmt_mov, { 0x2 }
748 /* sltu3 \$0,$rn,$rm */
750 { 0, 0, 0, 0 },
751 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
752 & ifmt_mov, { 0x3 }
754 /* slt3 \$0,$rn,$uimm5 */
756 { 0, 0, 0, 0 },
757 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
758 & ifmt_slt3i, { 0x6001 }
760 /* sltu3 \$0,$rn,$uimm5 */
762 { 0, 0, 0, 0 },
763 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
764 & ifmt_slt3i, { 0x6005 }
766 /* sl1ad3 \$0,$rn,$rm */
768 { 0, 0, 0, 0 },
769 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
770 & ifmt_mov, { 0x2006 }
772 /* sl2ad3 \$0,$rn,$rm */
774 { 0, 0, 0, 0 },
775 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
776 & ifmt_mov, { 0x2007 }
778 /* add3 $rn,$rm,$simm16 */
780 { 0, 0, 0, 0 },
781 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (SIMM16), 0 } },
782 & ifmt_add3x, { 0xc0000000 }
784 /* slt3 $rn,$rm,$simm16 */
786 { 0, 0, 0, 0 },
787 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (SIMM16), 0 } },
788 & ifmt_add3x, { 0xc0020000 }
790 /* sltu3 $rn,$rm,$uimm16 */
792 { 0, 0, 0, 0 },
793 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
794 & ifmt_sltu3x, { 0xc0030000 }
796 /* or $rn,$rm */
798 { 0, 0, 0, 0 },
799 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
800 & ifmt_mov, { 0x1000 }
802 /* and $rn,$rm */
804 { 0, 0, 0, 0 },
805 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
806 & ifmt_mov, { 0x1001 }
808 /* xor $rn,$rm */
810 { 0, 0, 0, 0 },
811 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
812 & ifmt_mov, { 0x1002 }
814 /* nor $rn,$rm */
816 { 0, 0, 0, 0 },
817 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
818 & ifmt_mov, { 0x1003 }
820 /* or3 $rn,$rm,$uimm16 */
822 { 0, 0, 0, 0 },
823 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
824 & ifmt_sltu3x, { 0xc0040000 }
826 /* and3 $rn,$rm,$uimm16 */
828 { 0, 0, 0, 0 },
829 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
830 & ifmt_sltu3x, { 0xc0050000 }
832 /* xor3 $rn,$rm,$uimm16 */
834 { 0, 0, 0, 0 },
835 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
836 & ifmt_sltu3x, { 0xc0060000 }
838 /* sra $rn,$rm */
840 { 0, 0, 0, 0 },
841 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
842 & ifmt_mov, { 0x200d }
844 /* srl $rn,$rm */
846 { 0, 0, 0, 0 },
847 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
848 & ifmt_mov, { 0x200c }
850 /* sll $rn,$rm */
852 { 0, 0, 0, 0 },
853 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
854 & ifmt_mov, { 0x200e }
856 /* sra $rn,$uimm5 */
858 { 0, 0, 0, 0 },
859 { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
860 & ifmt_slt3i, { 0x6003 }
862 /* srl $rn,$uimm5 */
864 { 0, 0, 0, 0 },
865 { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
866 & ifmt_slt3i, { 0x6002 }
868 /* sll $rn,$uimm5 */
870 { 0, 0, 0, 0 },
871 { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
872 & ifmt_slt3i, { 0x6006 }
874 /* sll3 \$0,$rn,$uimm5 */
876 { 0, 0, 0, 0 },
877 { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
878 & ifmt_slt3i, { 0x6007 }
880 /* fsft $rn,$rm */
882 { 0, 0, 0, 0 },
883 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
884 & ifmt_mov, { 0x200f }
886 /* bra $pcrel12a2 */
888 { 0, 0, 0, 0 },
889 { { MNEM, ' ', OP (PCREL12A2), 0 } },
890 & ifmt_bra, { 0xb000 }
892 /* beqz $rn,$pcrel8a2 */
894 { 0, 0, 0, 0 },
895 { { MNEM, ' ', OP (RN), ',', OP (PCREL8A2), 0 } },
896 & ifmt_beqz, { 0xa000 }
898 /* bnez $rn,$pcrel8a2 */
900 { 0, 0, 0, 0 },
901 { { MNEM, ' ', OP (RN), ',', OP (PCREL8A2), 0 } },
902 & ifmt_beqz, { 0xa001 }
904 /* beqi $rn,$uimm4,$pcrel17a2 */
906 { 0, 0, 0, 0 },
907 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
908 & ifmt_beqi, { 0xe0000000 }
910 /* bnei $rn,$uimm4,$pcrel17a2 */
912 { 0, 0, 0, 0 },
913 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
914 & ifmt_beqi, { 0xe0040000 }
916 /* blti $rn,$uimm4,$pcrel17a2 */
918 { 0, 0, 0, 0 },
919 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
920 & ifmt_beqi, { 0xe00c0000 }
922 /* bgei $rn,$uimm4,$pcrel17a2 */
924 { 0, 0, 0, 0 },
925 { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
926 & ifmt_beqi, { 0xe0080000 }
928 /* beq $rn,$rm,$pcrel17a2 */
930 { 0, 0, 0, 0 },
931 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (PCREL17A2), 0 } },
932 & ifmt_beq, { 0xe0010000 }
934 /* bne $rn,$rm,$pcrel17a2 */
936 { 0, 0, 0, 0 },
937 { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (PCREL17A2), 0 } },
938 & ifmt_beq, { 0xe0050000 }
940 /* bsr $pcrel12a2 */
942 { 0, 0, 0, 0 },
943 { { MNEM, ' ', OP (PCREL12A2), 0 } },
944 & ifmt_bra, { 0xb001 }
946 /* bsr $pcrel24a2 */
948 { 0, 0, 0, 0 },
949 { { MNEM, ' ', OP (PCREL24A2), 0 } },
950 & ifmt_bsr24, { 0xd8090000 }
952 /* jmp $rm */
954 { 0, 0, 0, 0 },
955 { { MNEM, ' ', OP (RM), 0 } },
956 & ifmt_jmp, { 0x100e }
958 /* jmp $pcabs24a2 */
960 { 0, 0, 0, 0 },
961 { { MNEM, ' ', OP (PCABS24A2), 0 } },
962 & ifmt_jmp24, { 0xd8080000 }
964 /* jsr $rm */
966 { 0, 0, 0, 0 },
967 { { MNEM, ' ', OP (RM), 0 } },
968 & ifmt_jmp, { 0x100f }
970 /* ret */
972 { 0, 0, 0, 0 },
973 { { MNEM, 0 } },
974 & ifmt_ret, { 0x7002 }
976 /* repeat $rn,$pcrel17a2 */
978 { 0, 0, 0, 0 },
979 { { MNEM, ' ', OP (RN), ',', OP (PCREL17A2), 0 } },
980 & ifmt_repeat, { 0xe0090000 }
982 /* erepeat $pcrel17a2 */
984 { 0, 0, 0, 0 },
985 { { MNEM, ' ', OP (PCREL17A2), 0 } },
986 & ifmt_erepeat, { 0xe0190000 }
988 /* stc $rn,\$lp */
990 { 0, 0, 0, 0 },
991 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'p', 0 } },
992 & ifmt_stc_lp, { 0x7018 }
994 /* stc $rn,\$hi */
996 { 0, 0, 0, 0 },
997 { { MNEM, ' ', OP (RN), ',', '$', 'h', 'i', 0 } },
998 & ifmt_stc_lp, { 0x7078 }
1000 /* stc $rn,\$lo */
1002 { 0, 0, 0, 0 },
1003 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'o', 0 } },
1004 & ifmt_stc_lp, { 0x7088 }
1006 /* stc $rn,$csrn */
1008 { 0, 0, 0, 0 },
1009 { { MNEM, ' ', OP (RN), ',', OP (CSRN), 0 } },
1010 & ifmt_stc, { 0x7008 }
1012 /* ldc $rn,\$lp */
1014 { 0, 0, 0, 0 },
1015 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'p', 0 } },
1016 & ifmt_stc_lp, { 0x701a }
1018 /* ldc $rn,\$hi */
1020 { 0, 0, 0, 0 },
1021 { { MNEM, ' ', OP (RN), ',', '$', 'h', 'i', 0 } },
1022 & ifmt_stc_lp, { 0x707a }
1024 /* ldc $rn,\$lo */
1026 { 0, 0, 0, 0 },
1027 { { MNEM, ' ', OP (RN), ',', '$', 'l', 'o', 0 } },
1028 & ifmt_stc_lp, { 0x708a }
1030 /* ldc $rn,$csrn */
1032 { 0, 0, 0, 0 },
1033 { { MNEM, ' ', OP (RN), ',', OP (CSRN), 0 } },
1034 & ifmt_stc, { 0x700a }
1036 /* di */
1038 { 0, 0, 0, 0 },
1039 { { MNEM, 0 } },
1040 & ifmt_ret, { 0x7000 }
1042 /* ei */
1044 { 0, 0, 0, 0 },
1045 { { MNEM, 0 } },
1046 & ifmt_ret, { 0x7010 }
1048 /* reti */
1050 { 0, 0, 0, 0 },
1051 { { MNEM, 0 } },
1052 & ifmt_ret, { 0x7012 }
1054 /* halt */
1056 { 0, 0, 0, 0 },
1057 { { MNEM, 0 } },
1058 & ifmt_ret, { 0x7022 }
1060 /* sleep */
1062 { 0, 0, 0, 0 },
1063 { { MNEM, 0 } },
1064 & ifmt_ret, { 0x7062 }
1066 /* swi $uimm2 */
1068 { 0, 0, 0, 0 },
1069 { { MNEM, ' ', OP (UIMM2), 0 } },
1070 & ifmt_swi, { 0x7006 }
1072 /* break */
1074 { 0, 0, 0, 0 },
1075 { { MNEM, 0 } },
1076 & ifmt_ret, { 0x7032 }
1078 /* syncm */
1080 { 0, 0, 0, 0 },
1081 { { MNEM, 0 } },
1082 & ifmt_ret, { 0x7011 }
1084 /* stcb $rn,$uimm16 */
1086 { 0, 0, 0, 0 },
1087 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
1088 & ifmt_movu16, { 0xf0040000 }
1090 /* ldcb $rn,$uimm16 */
1092 { 0, 0, 0, 0 },
1093 { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
1094 & ifmt_movu16, { 0xf0140000 }
1096 /* bsetm ($rma),$uimm3 */
1098 { 0, 0, 0, 0 },
1099 { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1100 & ifmt_bsetm, { 0x2000 }
1102 /* bclrm ($rma),$uimm3 */
1104 { 0, 0, 0, 0 },
1105 { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1106 & ifmt_bsetm, { 0x2001 }
1108 /* bnotm ($rma),$uimm3 */
1110 { 0, 0, 0, 0 },
1111 { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1112 & ifmt_bsetm, { 0x2002 }
1114 /* btstm \$0,($rma),$uimm3 */
1116 { 0, 0, 0, 0 },
1117 { { MNEM, ' ', '$', '0', ',', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
1118 & ifmt_bsetm, { 0x2003 }
1120 /* tas $rn,($rma) */
1122 { 0, 0, 0, 0 },
1123 { { MNEM, ' ', OP (RN), ',', '(', OP (RMA), ')', 0 } },
1124 & ifmt_tas, { 0x2004 }
1126 /* cache $cimm4,($rma) */
1128 { 0, 0, 0, 0 },
1129 { { MNEM, ' ', OP (CIMM4), ',', '(', OP (RMA), ')', 0 } },
1130 & ifmt_cache, { 0x7004 }
1132 /* mul $rn,$rm */
1134 { 0, 0, 0, 0 },
1135 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1136 & ifmt_mov, { 0x1004 }
1138 /* mulu $rn,$rm */
1140 { 0, 0, 0, 0 },
1141 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1142 & ifmt_mov, { 0x1005 }
1144 /* mulr $rn,$rm */
1146 { 0, 0, 0, 0 },
1147 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1148 & ifmt_mov, { 0x1006 }
1150 /* mulru $rn,$rm */
1152 { 0, 0, 0, 0 },
1153 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1154 & ifmt_mov, { 0x1007 }
1156 /* madd $rn,$rm */
1158 { 0, 0, 0, 0 },
1159 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1160 & ifmt_madd, { 0xf0013004 }
1162 /* maddu $rn,$rm */
1164 { 0, 0, 0, 0 },
1165 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1166 & ifmt_madd, { 0xf0013005 }
1168 /* maddr $rn,$rm */
1170 { 0, 0, 0, 0 },
1171 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1172 & ifmt_madd, { 0xf0013006 }
1174 /* maddru $rn,$rm */
1176 { 0, 0, 0, 0 },
1177 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1178 & ifmt_madd, { 0xf0013007 }
1180 /* div $rn,$rm */
1182 { 0, 0, 0, 0 },
1183 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1184 & ifmt_mov, { 0x1008 }
1186 /* divu $rn,$rm */
1188 { 0, 0, 0, 0 },
1189 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1190 & ifmt_mov, { 0x1009 }
1192 /* dret */
1194 { 0, 0, 0, 0 },
1195 { { MNEM, 0 } },
1196 & ifmt_ret, { 0x7013 }
1198 /* dbreak */
1200 { 0, 0, 0, 0 },
1201 { { MNEM, 0 } },
1202 & ifmt_ret, { 0x7033 }
1204 /* ldz $rn,$rm */
1206 { 0, 0, 0, 0 },
1207 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1208 & ifmt_madd, { 0xf0010000 }
1210 /* abs $rn,$rm */
1212 { 0, 0, 0, 0 },
1213 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1214 & ifmt_madd, { 0xf0010003 }
1216 /* ave $rn,$rm */
1218 { 0, 0, 0, 0 },
1219 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1220 & ifmt_madd, { 0xf0010002 }
1222 /* min $rn,$rm */
1224 { 0, 0, 0, 0 },
1225 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1226 & ifmt_madd, { 0xf0010004 }
1228 /* max $rn,$rm */
1230 { 0, 0, 0, 0 },
1231 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1232 & ifmt_madd, { 0xf0010005 }
1234 /* minu $rn,$rm */
1236 { 0, 0, 0, 0 },
1237 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1238 & ifmt_madd, { 0xf0010006 }
1240 /* maxu $rn,$rm */
1242 { 0, 0, 0, 0 },
1243 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1244 & ifmt_madd, { 0xf0010007 }
1246 /* clip $rn,$cimm5 */
1248 { 0, 0, 0, 0 },
1249 { { MNEM, ' ', OP (RN), ',', OP (CIMM5), 0 } },
1250 & ifmt_clip, { 0xf0011000 }
1252 /* clipu $rn,$cimm5 */
1254 { 0, 0, 0, 0 },
1255 { { MNEM, ' ', OP (RN), ',', OP (CIMM5), 0 } },
1256 & ifmt_clip, { 0xf0011001 }
1258 /* sadd $rn,$rm */
1260 { 0, 0, 0, 0 },
1261 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1262 & ifmt_madd, { 0xf0010008 }
1264 /* ssub $rn,$rm */
1266 { 0, 0, 0, 0 },
1267 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1268 & ifmt_madd, { 0xf001000a }
1270 /* saddu $rn,$rm */
1272 { 0, 0, 0, 0 },
1273 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1274 & ifmt_madd, { 0xf0010009 }
1276 /* ssubu $rn,$rm */
1278 { 0, 0, 0, 0 },
1279 { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
1280 & ifmt_madd, { 0xf001000b }
1282 /* swcp $crn,($rma) */
1284 { 0, 0, 0, 0 },
1285 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), ')', 0 } },
1286 & ifmt_swcp, { 0x3008 }
1288 /* lwcp $crn,($rma) */
1290 { 0, 0, 0, 0 },
1291 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), ')', 0 } },
1292 & ifmt_swcp, { 0x3009 }
1294 /* smcp $crn64,($rma) */
1296 { 0, 0, 0, 0 },
1297 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), ')', 0 } },
1298 & ifmt_smcp, { 0x300a }
1300 /* lmcp $crn64,($rma) */
1302 { 0, 0, 0, 0 },
1303 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), ')', 0 } },
1304 & ifmt_smcp, { 0x300b }
1306 /* swcpi $crn,($rma+) */
1308 { 0, 0, 0, 0 },
1309 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', 0 } },
1310 & ifmt_swcp, { 0x3000 }
1312 /* lwcpi $crn,($rma+) */
1314 { 0, 0, 0, 0 },
1315 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', 0 } },
1316 & ifmt_swcp, { 0x3001 }
1318 /* smcpi $crn64,($rma+) */
1320 { 0, 0, 0, 0 },
1321 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', 0 } },
1322 & ifmt_smcp, { 0x3002 }
1324 /* lmcpi $crn64,($rma+) */
1326 { 0, 0, 0, 0 },
1327 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', 0 } },
1328 & ifmt_smcp, { 0x3003 }
1330 /* swcp $crn,$sdisp16($rma) */
1332 { 0, 0, 0, 0 },
1333 { { MNEM, ' ', OP (CRN), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1334 & ifmt_swcp16, { 0xf00c0000 }
1336 /* lwcp $crn,$sdisp16($rma) */
1338 { 0, 0, 0, 0 },
1339 { { MNEM, ' ', OP (CRN), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1340 & ifmt_swcp16, { 0xf00d0000 }
1342 /* smcp $crn64,$sdisp16($rma) */
1344 { 0, 0, 0, 0 },
1345 { { MNEM, ' ', OP (CRN64), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1346 & ifmt_smcp16, { 0xf00e0000 }
1348 /* lmcp $crn64,$sdisp16($rma) */
1350 { 0, 0, 0, 0 },
1351 { { MNEM, ' ', OP (CRN64), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
1352 & ifmt_smcp16, { 0xf00f0000 }
1354 /* sbcpa $crn,($rma+),$cdisp8 */
1356 { 0, 0, 0, 0 },
1357 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1358 & ifmt_sbcpa, { 0xf0050000 }
1360 /* lbcpa $crn,($rma+),$cdisp8 */
1362 { 0, 0, 0, 0 },
1363 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1364 & ifmt_sbcpa, { 0xf0054000 }
1366 /* shcpa $crn,($rma+),$cdisp8a2 */
1368 { 0, 0, 0, 0 },
1369 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1370 & ifmt_shcpa, { 0xf0051000 }
1372 /* lhcpa $crn,($rma+),$cdisp8a2 */
1374 { 0, 0, 0, 0 },
1375 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1376 & ifmt_shcpa, { 0xf0055000 }
1378 /* swcpa $crn,($rma+),$cdisp8a4 */
1380 { 0, 0, 0, 0 },
1381 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1382 & ifmt_swcpa, { 0xf0052000 }
1384 /* lwcpa $crn,($rma+),$cdisp8a4 */
1386 { 0, 0, 0, 0 },
1387 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1388 & ifmt_swcpa, { 0xf0056000 }
1390 /* smcpa $crn64,($rma+),$cdisp8a8 */
1392 { 0, 0, 0, 0 },
1393 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1394 & ifmt_smcpa, { 0xf0053000 }
1396 /* lmcpa $crn64,($rma+),$cdisp8a8 */
1398 { 0, 0, 0, 0 },
1399 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1400 & ifmt_smcpa, { 0xf0057000 }
1402 /* sbcpm0 $crn,($rma+),$cdisp8 */
1404 { 0, 0, 0, 0 },
1405 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1406 & ifmt_sbcpa, { 0xf0050800 }
1408 /* lbcpm0 $crn,($rma+),$cdisp8 */
1410 { 0, 0, 0, 0 },
1411 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1412 & ifmt_sbcpa, { 0xf0054800 }
1414 /* shcpm0 $crn,($rma+),$cdisp8a2 */
1416 { 0, 0, 0, 0 },
1417 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1418 & ifmt_shcpa, { 0xf0051800 }
1420 /* lhcpm0 $crn,($rma+),$cdisp8a2 */
1422 { 0, 0, 0, 0 },
1423 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1424 & ifmt_shcpa, { 0xf0055800 }
1426 /* swcpm0 $crn,($rma+),$cdisp8a4 */
1428 { 0, 0, 0, 0 },
1429 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1430 & ifmt_swcpa, { 0xf0052800 }
1432 /* lwcpm0 $crn,($rma+),$cdisp8a4 */
1434 { 0, 0, 0, 0 },
1435 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1436 & ifmt_swcpa, { 0xf0056800 }
1438 /* smcpm0 $crn64,($rma+),$cdisp8a8 */
1440 { 0, 0, 0, 0 },
1441 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1442 & ifmt_smcpa, { 0xf0053800 }
1444 /* lmcpm0 $crn64,($rma+),$cdisp8a8 */
1446 { 0, 0, 0, 0 },
1447 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1448 & ifmt_smcpa, { 0xf0057800 }
1450 /* sbcpm1 $crn,($rma+),$cdisp8 */
1452 { 0, 0, 0, 0 },
1453 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1454 & ifmt_sbcpa, { 0xf0050c00 }
1456 /* lbcpm1 $crn,($rma+),$cdisp8 */
1458 { 0, 0, 0, 0 },
1459 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
1460 & ifmt_sbcpa, { 0xf0054c00 }
1462 /* shcpm1 $crn,($rma+),$cdisp8a2 */
1464 { 0, 0, 0, 0 },
1465 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1466 & ifmt_shcpa, { 0xf0051c00 }
1468 /* lhcpm1 $crn,($rma+),$cdisp8a2 */
1470 { 0, 0, 0, 0 },
1471 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
1472 & ifmt_shcpa, { 0xf0055c00 }
1474 /* swcpm1 $crn,($rma+),$cdisp8a4 */
1476 { 0, 0, 0, 0 },
1477 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1478 & ifmt_swcpa, { 0xf0052c00 }
1480 /* lwcpm1 $crn,($rma+),$cdisp8a4 */
1482 { 0, 0, 0, 0 },
1483 { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
1484 & ifmt_swcpa, { 0xf0056c00 }
1486 /* smcpm1 $crn64,($rma+),$cdisp8a8 */
1488 { 0, 0, 0, 0 },
1489 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1490 & ifmt_smcpa, { 0xf0053c00 }
1492 /* lmcpm1 $crn64,($rma+),$cdisp8a8 */
1494 { 0, 0, 0, 0 },
1495 { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
1496 & ifmt_smcpa, { 0xf0057c00 }
1498 /* bcpeq $cccc,$pcrel17a2 */
1500 { 0, 0, 0, 0 },
1501 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1502 & ifmt_bcpeq, { 0xd8040000 }
1504 /* bcpne $cccc,$pcrel17a2 */
1506 { 0, 0, 0, 0 },
1507 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1508 & ifmt_bcpeq, { 0xd8050000 }
1510 /* bcpat $cccc,$pcrel17a2 */
1512 { 0, 0, 0, 0 },
1513 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1514 & ifmt_bcpeq, { 0xd8060000 }
1516 /* bcpaf $cccc,$pcrel17a2 */
1518 { 0, 0, 0, 0 },
1519 { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
1520 & ifmt_bcpeq, { 0xd8070000 }
1522 /* synccp */
1524 { 0, 0, 0, 0 },
1525 { { MNEM, 0 } },
1526 & ifmt_ret, { 0x7021 }
1528 /* jsrv $rm */
1530 { 0, 0, 0, 0 },
1531 { { MNEM, ' ', OP (RM), 0 } },
1532 & ifmt_jmp, { 0x180f }
1534 /* bsrv $pcrel24a2 */
1536 { 0, 0, 0, 0 },
1537 { { MNEM, ' ', OP (PCREL24A2), 0 } },
1538 & ifmt_bsr24, { 0xd80b0000 }
1540 /* --unused-- */
1542 { 0, 0, 0, 0 },
1543 { { MNEM, 0 } },
1544 & ifmt_sim_syscall, { 0x7800 }
1546 /* --reserved-- */
1548 { 0, 0, 0, 0 },
1549 { { MNEM, 0 } },
1550 & ifmt_mov, { 0x6 }
1552 /* --reserved-- */
1554 { 0, 0, 0, 0 },
1555 { { MNEM, 0 } },
1556 & ifmt_mov, { 0x100a }
1558 /* --reserved-- */
1560 { 0, 0, 0, 0 },
1561 { { MNEM, 0 } },
1562 & ifmt_mov, { 0x100b }
1564 /* --reserved-- */
1566 { 0, 0, 0, 0 },
1567 { { MNEM, 0 } },
1568 & ifmt_mov, { 0x2005 }
1570 /* --reserved-- */
1572 { 0, 0, 0, 0 },
1573 { { MNEM, 0 } },
1574 & ifmt_mov, { 0x2008 }
1576 /* --reserved-- */
1578 { 0, 0, 0, 0 },
1579 { { MNEM, 0 } },
1580 & ifmt_mov, { 0x2009 }
1582 /* --reserved-- */
1584 { 0, 0, 0, 0 },
1585 { { MNEM, 0 } },
1586 & ifmt_mov, { 0x200a }
1588 /* --reserved-- */
1590 { 0, 0, 0, 0 },
1591 { { MNEM, 0 } },
1592 & ifmt_mov, { 0x200b }
1594 /* --reserved-- */
1596 { 0, 0, 0, 0 },
1597 { { MNEM, 0 } },
1598 & ifmt_mov, { 0x3004 }
1600 /* --reserved-- */
1602 { 0, 0, 0, 0 },
1603 { { MNEM, 0 } },
1604 & ifmt_mov, { 0x3005 }
1606 /* --reserved-- */
1608 { 0, 0, 0, 0 },
1609 { { MNEM, 0 } },
1610 & ifmt_mov, { 0x3006 }
1612 /* --reserved-- */
1614 { 0, 0, 0, 0 },
1615 { { MNEM, 0 } },
1616 & ifmt_mov, { 0x3007 }
1618 /* --reserved-- */
1620 { 0, 0, 0, 0 },
1621 { { MNEM, 0 } },
1622 & ifmt_mov, { 0x300c }
1624 /* --reserved-- */
1626 { 0, 0, 0, 0 },
1627 { { MNEM, 0 } },
1628 & ifmt_mov, { 0x300d }
1630 /* --reserved-- */
1632 { 0, 0, 0, 0 },
1633 { { MNEM, 0 } },
1634 & ifmt_mov, { 0x300e }
1636 /* --reserved-- */
1638 { 0, 0, 0, 0 },
1639 { { MNEM, 0 } },
1640 & ifmt_mov, { 0x300f }
1642 /* --reserved-- */
1644 { 0, 0, 0, 0 },
1645 { { MNEM, 0 } },
1646 & ifmt_mov, { 0x7007 }
1648 /* --reserved-- */
1650 { 0, 0, 0, 0 },
1651 { { MNEM, 0 } },
1652 & ifmt_mov, { 0x700e }
1654 /* --reserved-- */
1656 { 0, 0, 0, 0 },
1657 { { MNEM, 0 } },
1658 & ifmt_mov, { 0x700f }
1660 /* --reserved-- */
1662 { 0, 0, 0, 0 },
1663 { { MNEM, 0 } },
1664 & ifmt_mov, { 0xc007 }
1666 /* --reserved-- */
1668 { 0, 0, 0, 0 },
1669 { { MNEM, 0 } },
1670 & ifmt_mov, { 0xe00d }
1672 /* --reserved-- */
1674 { 0, 0, 0, 0 },
1675 { { MNEM, 0 } },
1676 & ifmt_mov, { 0xf003 }
1678 /* --reserved-- */
1680 { 0, 0, 0, 0 },
1681 { { MNEM, 0 } },
1682 & ifmt_mov, { 0xf006 }
1684 /* --reserved-- */
1686 { 0, 0, 0, 0 },
1687 { { MNEM, 0 } },
1688 & ifmt_mov, { 0xf008 }
1690 /* --reserved-- */
1692 { 0, 0, 0, 0 },
1693 { { MNEM, 0 } },
1694 & ifmt_mov, { 0x7005 }
1696 /* --reserved-- */
1698 { 0, 0, 0, 0 },
1699 { { MNEM, 0 } },
1700 & ifmt_mov, { 0x700c }
1702 /* --reserved-- */
1704 { 0, 0, 0, 0 },
1705 { { MNEM, 0 } },
1706 & ifmt_mov, { 0x700d }
1708 /* fadds ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
1710 { 0, 0, 0, 0 },
1711 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1712 & ifmt_fadds, { 0xf0070000 }
1714 /* fsubs ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
1716 { 0, 0, 0, 0 },
1717 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1718 & ifmt_fadds, { 0xf0170000 }
1720 /* fmuls ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
1722 { 0, 0, 0, 0 },
1723 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1724 & ifmt_fadds, { 0xf0270000 }
1726 /* fdivs ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
1728 { 0, 0, 0, 0 },
1729 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1730 & ifmt_fadds, { 0xf0370000 }
1732 /* fsqrts ${fmax-FRd},${fmax-FRn} */
1734 { 0, 0, 0, 0 },
1735 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
1736 & ifmt_fsqrts, { 0xf0470000 }
1738 /* fabss ${fmax-FRd},${fmax-FRn} */
1740 { 0, 0, 0, 0 },
1741 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
1742 & ifmt_fsqrts, { 0xf0570000 }
1744 /* fnegs ${fmax-FRd},${fmax-FRn} */
1746 { 0, 0, 0, 0 },
1747 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
1748 & ifmt_fsqrts, { 0xf0770000 }
1750 /* fmovs ${fmax-FRd},${fmax-FRn} */
1752 { 0, 0, 0, 0 },
1753 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
1754 & ifmt_fsqrts, { 0xf0670000 }
1756 /* froundws ${fmax-FRd-int},${fmax-FRn} */
1758 { 0, 0, 0, 0 },
1759 { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
1760 & ifmt_froundws, { 0xf0c70000 }
1762 /* ftruncws ${fmax-FRd-int},${fmax-FRn} */
1764 { 0, 0, 0, 0 },
1765 { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
1766 & ifmt_froundws, { 0xf0d70000 }
1768 /* fceilws ${fmax-FRd-int},${fmax-FRn} */
1770 { 0, 0, 0, 0 },
1771 { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
1772 & ifmt_froundws, { 0xf0e70000 }
1774 /* ffloorws ${fmax-FRd-int},${fmax-FRn} */
1776 { 0, 0, 0, 0 },
1777 { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
1778 & ifmt_froundws, { 0xf0f70000 }
1780 /* fcvtws ${fmax-FRd-int},${fmax-FRn} */
1782 { 0, 0, 0, 0 },
1783 { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
1784 & ifmt_froundws, { 0xf0471000 }
1786 /* fcvtsw ${fmax-FRd},${fmax-FRn-int} */
1788 { 0, 0, 0, 0 },
1789 { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN_INT), 0 } },
1790 & ifmt_fcvtsw, { 0xf0079000 }
1792 /* fcmpfs ${fmax-FRn},${fmax-FRm} */
1794 { 0, 0, 0, 0 },
1795 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1796 & ifmt_fcmpfs, { 0xf0072000 }
1798 /* fcmpus ${fmax-FRn},${fmax-FRm} */
1800 { 0, 0, 0, 0 },
1801 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1802 & ifmt_fcmpfs, { 0xf0172000 }
1804 /* fcmpes ${fmax-FRn},${fmax-FRm} */
1806 { 0, 0, 0, 0 },
1807 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1808 & ifmt_fcmpfs, { 0xf0272000 }
1810 /* fcmpues ${fmax-FRn},${fmax-FRm} */
1812 { 0, 0, 0, 0 },
1813 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1814 & ifmt_fcmpfs, { 0xf0372000 }
1816 /* fcmpls ${fmax-FRn},${fmax-FRm} */
1818 { 0, 0, 0, 0 },
1819 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1820 & ifmt_fcmpfs, { 0xf0472000 }
1822 /* fcmpuls ${fmax-FRn},${fmax-FRm} */
1824 { 0, 0, 0, 0 },
1825 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1826 & ifmt_fcmpfs, { 0xf0572000 }
1828 /* fcmples ${fmax-FRn},${fmax-FRm} */
1830 { 0, 0, 0, 0 },
1831 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1832 & ifmt_fcmpfs, { 0xf0672000 }
1834 /* fcmpules ${fmax-FRn},${fmax-FRm} */
1836 { 0, 0, 0, 0 },
1837 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1838 & ifmt_fcmpfs, { 0xf0772000 }
1840 /* fcmpfis ${fmax-FRn},${fmax-FRm} */
1842 { 0, 0, 0, 0 },
1843 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1844 & ifmt_fcmpfs, { 0xf0872000 }
1846 /* fcmpuis ${fmax-FRn},${fmax-FRm} */
1848 { 0, 0, 0, 0 },
1849 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1850 & ifmt_fcmpfs, { 0xf0972000 }
1852 /* fcmpeis ${fmax-FRn},${fmax-FRm} */
1854 { 0, 0, 0, 0 },
1855 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1856 & ifmt_fcmpfs, { 0xf0a72000 }
1858 /* fcmpueis ${fmax-FRn},${fmax-FRm} */
1860 { 0, 0, 0, 0 },
1861 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1862 & ifmt_fcmpfs, { 0xf0b72000 }
1864 /* fcmplis ${fmax-FRn},${fmax-FRm} */
1866 { 0, 0, 0, 0 },
1867 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1868 & ifmt_fcmpfs, { 0xf0c72000 }
1870 /* fcmpulis ${fmax-FRn},${fmax-FRm} */
1872 { 0, 0, 0, 0 },
1873 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1874 & ifmt_fcmpfs, { 0xf0d72000 }
1876 /* fcmpleis ${fmax-FRn},${fmax-FRm} */
1878 { 0, 0, 0, 0 },
1879 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1880 & ifmt_fcmpfs, { 0xf0e72000 }
1882 /* fcmpuleis ${fmax-FRn},${fmax-FRm} */
1884 { 0, 0, 0, 0 },
1885 { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
1886 & ifmt_fcmpfs, { 0xf0f72000 }
1888 /* cmov ${fmax-FRd-int},${fmax-Rm} */
1890 { 0, 0, 0, 0 },
1891 { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_RM), 0 } },
1892 & ifmt_cmov_frn_rm, { 0xf007f000 }
1894 /* cmov ${fmax-Rm},${fmax-FRd-int} */
1896 { 0, 0, 0, 0 },
1897 { { MNEM, ' ', OP (FMAX_RM), ',', OP (FMAX_FRD_INT), 0 } },
1898 & ifmt_cmov_frn_rm, { 0xf007f001 }
1900 /* cmovc ${fmax-CCRn},${fmax-Rm} */
1902 { 0, 0, 0, 0 },
1903 { { MNEM, ' ', OP (FMAX_CCRN), ',', OP (FMAX_RM), 0 } },
1904 & ifmt_cmovc_ccrn_rm, { 0xf007f002 }
1906 /* cmovc ${fmax-Rm},${fmax-CCRn} */
1908 { 0, 0, 0, 0 },
1909 { { MNEM, ' ', OP (FMAX_RM), ',', OP (FMAX_CCRN), 0 } },
1910 & ifmt_cmovc_ccrn_rm, { 0xf007f003 }
1914 #undef A
1915 #undef OPERAND
1916 #undef MNEM
1917 #undef OP
1919 /* Formats for ALIAS macro-insns. */
1921 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1922 #define F(f) & mep_cgen_ifld_table[MEP_##f]
1923 #else
1924 #define F(f) & mep_cgen_ifld_table[MEP_/**/f]
1925 #endif
1926 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
1927 16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1930 static const CGEN_IFMT ifmt_sb16_0 ATTRIBUTE_UNUSED = {
1931 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1934 static const CGEN_IFMT ifmt_sh16_0 ATTRIBUTE_UNUSED = {
1935 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1938 static const CGEN_IFMT ifmt_sw16_0 ATTRIBUTE_UNUSED = {
1939 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1942 static const CGEN_IFMT ifmt_lb16_0 ATTRIBUTE_UNUSED = {
1943 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1946 static const CGEN_IFMT ifmt_lh16_0 ATTRIBUTE_UNUSED = {
1947 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1950 static const CGEN_IFMT ifmt_lw16_0 ATTRIBUTE_UNUSED = {
1951 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1954 static const CGEN_IFMT ifmt_lbu16_0 ATTRIBUTE_UNUSED = {
1955 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1958 static const CGEN_IFMT ifmt_lhu16_0 ATTRIBUTE_UNUSED = {
1959 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1962 static const CGEN_IFMT ifmt_swcp16_0 ATTRIBUTE_UNUSED = {
1963 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1966 static const CGEN_IFMT ifmt_lwcp16_0 ATTRIBUTE_UNUSED = {
1967 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1970 static const CGEN_IFMT ifmt_smcp16_0 ATTRIBUTE_UNUSED = {
1971 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1974 static const CGEN_IFMT ifmt_lmcp16_0 ATTRIBUTE_UNUSED = {
1975 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
1978 #undef F
1980 /* Each non-simple macro entry points to an array of expansion possibilities. */
1982 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1983 #define A(a) (1 << CGEN_INSN_##a)
1984 #else
1985 #define A(a) (1 << CGEN_INSN_/**/a)
1986 #endif
1987 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1988 #define OPERAND(op) MEP_OPERAND_##op
1989 #else
1990 #define OPERAND(op) MEP_OPERAND_/**/op
1991 #endif
1992 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1993 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1995 /* The macro instruction table. */
1997 static const CGEN_IBASE mep_cgen_macro_insn_table[] =
1999 /* nop */
2001 -1, "nop", "nop", 16,
2002 { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2004 /* sb $rnc,$zero($rma) */
2006 -1, "sb16-0", "sb", 16,
2007 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2009 /* sh $rns,$zero($rma) */
2011 -1, "sh16-0", "sh", 16,
2012 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2014 /* sw $rnl,$zero($rma) */
2016 -1, "sw16-0", "sw", 16,
2017 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2019 /* lb $rnc,$zero($rma) */
2021 -1, "lb16-0", "lb", 16,
2022 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2024 /* lh $rns,$zero($rma) */
2026 -1, "lh16-0", "lh", 16,
2027 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2029 /* lw $rnl,$zero($rma) */
2031 -1, "lw16-0", "lw", 16,
2032 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2034 /* lbu $rnuc,$zero($rma) */
2036 -1, "lbu16-0", "lbu", 16,
2037 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2039 /* lhu $rnus,$zero($rma) */
2041 -1, "lhu16-0", "lhu", 16,
2042 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2044 /* swcp $crn,$zero($rma) */
2046 -1, "swcp16-0", "swcp", 16,
2047 { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2049 /* lwcp $crn,$zero($rma) */
2051 -1, "lwcp16-0", "lwcp", 16,
2052 { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2054 /* smcp $crn64,$zero($rma) */
2056 -1, "smcp16-0", "smcp", 16,
2057 { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2059 /* lmcp $crn64,$zero($rma) */
2061 -1, "lmcp16-0", "lmcp", 16,
2062 { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
2066 /* The macro instruction opcode table. */
2068 static const CGEN_OPCODE mep_cgen_macro_insn_opcode_table[] =
2070 /* nop */
2072 { 0, 0, 0, 0 },
2073 { { MNEM, 0 } },
2074 & ifmt_nop, { 0x0 }
2076 /* sb $rnc,$zero($rma) */
2078 { 0, 0, 0, 0 },
2079 { { MNEM, ' ', OP (RNC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2080 & ifmt_sb16_0, { 0x8 }
2082 /* sh $rns,$zero($rma) */
2084 { 0, 0, 0, 0 },
2085 { { MNEM, ' ', OP (RNS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2086 & ifmt_sh16_0, { 0x9 }
2088 /* sw $rnl,$zero($rma) */
2090 { 0, 0, 0, 0 },
2091 { { MNEM, ' ', OP (RNL), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2092 & ifmt_sw16_0, { 0xa }
2094 /* lb $rnc,$zero($rma) */
2096 { 0, 0, 0, 0 },
2097 { { MNEM, ' ', OP (RNC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2098 & ifmt_lb16_0, { 0xc }
2100 /* lh $rns,$zero($rma) */
2102 { 0, 0, 0, 0 },
2103 { { MNEM, ' ', OP (RNS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2104 & ifmt_lh16_0, { 0xd }
2106 /* lw $rnl,$zero($rma) */
2108 { 0, 0, 0, 0 },
2109 { { MNEM, ' ', OP (RNL), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2110 & ifmt_lw16_0, { 0xe }
2112 /* lbu $rnuc,$zero($rma) */
2114 { 0, 0, 0, 0 },
2115 { { MNEM, ' ', OP (RNUC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2116 & ifmt_lbu16_0, { 0xb }
2118 /* lhu $rnus,$zero($rma) */
2120 { 0, 0, 0, 0 },
2121 { { MNEM, ' ', OP (RNUS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2122 & ifmt_lhu16_0, { 0xf }
2124 /* swcp $crn,$zero($rma) */
2126 { 0, 0, 0, 0 },
2127 { { MNEM, ' ', OP (CRN), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2128 & ifmt_swcp16_0, { 0x3008 }
2130 /* lwcp $crn,$zero($rma) */
2132 { 0, 0, 0, 0 },
2133 { { MNEM, ' ', OP (CRN), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2134 & ifmt_lwcp16_0, { 0x3009 }
2136 /* smcp $crn64,$zero($rma) */
2138 { 0, 0, 0, 0 },
2139 { { MNEM, ' ', OP (CRN64), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2140 & ifmt_smcp16_0, { 0x300a }
2142 /* lmcp $crn64,$zero($rma) */
2144 { 0, 0, 0, 0 },
2145 { { MNEM, ' ', OP (CRN64), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
2146 & ifmt_lmcp16_0, { 0x300b }
2150 #undef A
2151 #undef OPERAND
2152 #undef MNEM
2153 #undef OP
2155 #ifndef CGEN_ASM_HASH_P
2156 #define CGEN_ASM_HASH_P(insn) 1
2157 #endif
2159 #ifndef CGEN_DIS_HASH_P
2160 #define CGEN_DIS_HASH_P(insn) 1
2161 #endif
2163 /* Return non-zero if INSN is to be added to the hash table.
2164 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
2166 static int
2167 asm_hash_insn_p (insn)
2168 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
2170 return CGEN_ASM_HASH_P (insn);
2173 static int
2174 dis_hash_insn_p (insn)
2175 const CGEN_INSN *insn;
2177 /* If building the hash table and the NO-DIS attribute is present,
2178 ignore. */
2179 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
2180 return 0;
2181 return CGEN_DIS_HASH_P (insn);
2184 #ifndef CGEN_ASM_HASH
2185 #define CGEN_ASM_HASH_SIZE 127
2186 #ifdef CGEN_MNEMONIC_OPERANDS
2187 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
2188 #else
2189 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
2190 #endif
2191 #endif
2193 /* It doesn't make much sense to provide a default here,
2194 but while this is under development we do.
2195 BUFFER is a pointer to the bytes of the insn, target order.
2196 VALUE is the first base_insn_bitsize bits as an int in host order. */
2198 #ifndef CGEN_DIS_HASH
2199 #define CGEN_DIS_HASH_SIZE 256
2200 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
2201 #endif
2203 /* The result is the hash value of the insn.
2204 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
2206 static unsigned int
2207 asm_hash_insn (mnem)
2208 const char * mnem;
2210 return CGEN_ASM_HASH (mnem);
2213 /* BUF is a pointer to the bytes of the insn, target order.
2214 VALUE is the first base_insn_bitsize bits as an int in host order. */
2216 static unsigned int
2217 dis_hash_insn (buf, value)
2218 const char * buf ATTRIBUTE_UNUSED;
2219 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
2221 return CGEN_DIS_HASH (buf, value);
2224 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
2226 static void
2227 set_fields_bitsize (CGEN_FIELDS *fields, int size)
2229 CGEN_FIELDS_BITSIZE (fields) = size;
2232 /* Function to call before using the operand instance table.
2233 This plugs the opcode entries and macro instructions into the cpu table. */
2235 void
2236 mep_cgen_init_opcode_table (CGEN_CPU_DESC cd)
2238 int i;
2239 int num_macros = (sizeof (mep_cgen_macro_insn_table) /
2240 sizeof (mep_cgen_macro_insn_table[0]));
2241 const CGEN_IBASE *ib = & mep_cgen_macro_insn_table[0];
2242 const CGEN_OPCODE *oc = & mep_cgen_macro_insn_opcode_table[0];
2243 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
2245 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
2246 for (i = 0; i < num_macros; ++i)
2248 insns[i].base = &ib[i];
2249 insns[i].opcode = &oc[i];
2250 mep_cgen_build_insn_regex (& insns[i]);
2252 cd->macro_insn_table.init_entries = insns;
2253 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
2254 cd->macro_insn_table.num_init_entries = num_macros;
2256 oc = & mep_cgen_insn_opcode_table[0];
2257 insns = (CGEN_INSN *) cd->insn_table.init_entries;
2258 for (i = 0; i < MAX_INSNS; ++i)
2260 insns[i].opcode = &oc[i];
2261 mep_cgen_build_insn_regex (& insns[i]);
2264 cd->sizeof_fields = sizeof (CGEN_FIELDS);
2265 cd->set_fields_bitsize = set_fields_bitsize;
2267 cd->asm_hash_p = asm_hash_insn_p;
2268 cd->asm_hash = asm_hash_insn;
2269 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
2271 cd->dis_hash_p = dis_hash_insn_p;
2272 cd->dis_hash = dis_hash_insn;
2273 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;