opcodes/mcore-dis.c

   1 /* Disassemble Motorolla M*Core instructions.
   2    Copyright (C) 1993, 1999 Free Software Foundation, Inc.
   3
   4 This program is free software; you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation; either version 2 of the License, or
   7 (at your option) any later version.
   8
   9 This program is distributed in the hope that it will be useful,
  10 but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 GNU General Public License for more details.
  13
  14 You should have received a copy of the GNU General Public License
  15 along with this program; if not, write to the Free Software
  16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  17
  18 #include <stdio.h>
  19 #define STATIC_TABLE
  20 #define DEFINE_TABLE
  21
  22 #include "mcore-opc.h"
  23 #include "dis-asm.h"
  24
  25 /* Mask for each mcore_opclass: */
  26 static const unsigned short imsk[] =
  27 {
  28     /* O0  */ 0xFFFF,
  29     /* OT  */ 0xFFFC,
  30     /* O1  */ 0xFFF0,
  31     /* OC  */ 0xFFE0,
  32     /* O2  */ 0xFF00,
  33     /* X1  */ 0xFFF0,
  34     /* OI  */ 0xFE00,
  35     /* OB  */ 0xFE00,
  36
  37     /* OMa */ 0xFFF0,
  38     /* SI  */ 0xFE00,
  39     /* I7  */ 0xF800,
  40     /* LS  */ 0xF000,
  41     /* BR  */ 0xF800,
  42     /* BL  */ 0xFF00,
  43     /* LR  */ 0xF000,
  44     /* LJ  */ 0xFF00,
  45
  46     /* RM  */ 0xFFF0,
  47     /* RQ  */ 0xFFF0,
  48     /* JSR */ 0xFFF0,
  49     /* JMP */ 0xFFF0,
  50     /* OBRa*/ 0xFFF0,
  51     /* OBRb*/ 0xFF80,
  52     /* OBRc*/ 0xFF00,
  53     /* OBR2*/ 0xFE00,
  54
  55     /* O1R1*/ 0xFFF0,
  56     /* OMb */ 0xFF80,
  57     /* OMc */ 0xFF00,
  58     /* SIa */ 0xFE00,
  59
  60
  61     /* JC  */ 0,                /* JC,JU,JL don't appear in object */
  62     /* JU  */ 0,
  63     /* JL  */ 0,
  64     /* RSI */ 0,
  65     /* DO21*/ 0,
  66     /* OB2 */ 0                 /* OB2 won't appear in object. */
  67 };
  68
  69 static const char * grname[] =
  70 {
  71  "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
  72  "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15"
  73 };
  74
  75 static const char X[] = "??";
  76
  77 static const char * crname[] =
  78 {
  79   "psr",  "vbr", "epsr", "fpsr", "epc",  "fpc",  "ss0",  "ss1",
  80   "ss2",  "ss3", "ss4",  "gcr",  "gsr",     X,      X,      X,
  81      X,      X,      X,      X,      X,     X,      X,      X,
  82      X,      X,      X,      X,      X,     X,      X,      X
  83 };
  84
  85 static const unsigned isiz[] = { 2, 0, 1, 0 };
  86
  87 int
  88 print_insn_mcore (memaddr, info)
  89      bfd_vma memaddr;
  90      struct disassemble_info * info;
  91 {
  92   unsigned char       ibytes[4];
  93   fprintf_ftype       fprintf = info->fprintf_func;
  94   void *              stream = info->stream;
  95   unsigned short      inst;
  96   mcore_opcode_info * op;
  97   int                 status;
  98
  99   status = info->read_memory_func (memaddr, ibytes, 2, info);
 100
 101   if (status != 0)
 102     {
 103       info->memory_error_func (status, memaddr, info);
 104       return -1;
 105     }
 106
 107   inst = (ibytes[0] << 8) | ibytes[1];
 108
 109   /* Just a linear search of the table.  */
 110   for (op = mcore_table; op->name != 0; op ++)
 111     {
 112       if (op->inst == (inst & imsk[op->opclass]))
 113         break;
 114     }
 115
 116   if (op->name == 0)
 117     fprintf (stream, ".word 0x%04x", inst);
 118   else
 119     {
 120       const char * name = grname[inst & 0x0F];
 121
 122       fprintf (stream, "%s", op->name);
 123
 124       switch (op->opclass)
 125         {
 126         case O0: break;
 127         case OT: fprintf (stream, "\t%d", inst & 0x3); break;
 128         case O1:
 129         case JMP:
 130         case JSR: fprintf (stream, "\t%s", name); break;
 131         case OC:  fprintf (stream, "\t%s, %s", name, crname[(inst >> 4) & 0x1F]); break;
 132         case O1R1: fprintf (stream, "\t%s, r1", name); break;
 133         case O2: fprintf (stream, "\t%s, %s", name, grname[(inst >> 4) & 0xF]); break;
 134         case X1: fprintf (stream, "\tr1, %s", name); break;
 135         case OI: fprintf (stream, "\t%s, %d", name, ((inst >> 4) & 0x1F) + 1); break;
 136         case RM: fprintf (stream, "\t%s-r15, (r0)", name); break;
 137         case RQ: fprintf (stream, "\tr4-r7, (%s)", name); break;
 138         case OB:
 139         case OBRa:
 140         case OBRb:
 141         case OBRc:
 142         case SI:
 143         case SIa:
 144         case OMa:
 145         case OMb:
 146         case OMc: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x1F); break;
 147         case I7: fprintf (stream, "\t%s, %d", name, (inst >> 4) & 0x7F); break;
 148         case LS: fprintf (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF],
 149                           name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]);
 150           break;
 151
 152         case BR:
 153           {
 154             long val = inst & 0x3FF;
 155
 156             if (inst & 0x400)
 157               val |= 0xFFFFFC00;
 158
 159             fprintf (stream, "\t0x%x", memaddr + 2 + (val<<1));
 160
 161             if (strcmp (op->name, "bsr") == 0)
 162               {
 163                 /* for bsr, we'll try to get a symbol for the target */
 164                 val = memaddr + 2 + (val << 1);
 165
 166                 if (info->print_address_func && val != 0)
 167                   {
 168                     fprintf (stream, "\t// ");
 169                     info->print_address_func (val, info);
 170                   }
 171               }
 172           }
 173           break;
 174
 175         case BL:
 176           {
 177             long val;
 178             val = (inst & 0x000F);
 179             fprintf (stream, "\t%s, 0x%x",
 180                     grname[(inst >> 4) & 0xF], memaddr - (val << 1));
 181           }
 182           break;
 183
 184         case LR:
 185           {
 186             unsigned long val;
 187
 188             val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
 189
 190             status = info->read_memory_func (val, ibytes, 4, info);
 191             if (status != 0)
 192               {
 193                 info->memory_error_func (status, memaddr, info);
 194                 return -1;
 195               }
 196
 197             val = (ibytes[0] << 24) | (ibytes[1] << 16)
 198               | (ibytes[2] << 8) | (ibytes[3]);
 199
 200             /* Removed [] around literal value to match ABI syntax 12/95.  */
 201             fprintf (stream, "\t%s, 0x%X", grname[(inst >> 8) & 0xF], val);
 202
 203             if (val == 0)
 204               fprintf (stream, "\t// from address pool at 0x%x",
 205                        (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
 206           }
 207           break;
 208
 209         case LJ:
 210           {
 211             unsigned long val;
 212
 213             val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC;
 214
 215             status = info->read_memory_func (val, ibytes, 4, info);
 216             if (status != 0)
 217               {
 218                 info->memory_error_func (status, memaddr, info);
 219                 return -1;
 220               }
 221
 222             val = (ibytes[0] << 24) | (ibytes[1] << 16)
 223               | (ibytes[2] << 8) | (ibytes[3]);
 224
 225             /* Removed [] around literal value to match ABI syntax 12/95.  */
 226             fprintf (stream, "\t0x%X", val);
 227             /* For jmpi/jsri, we'll try to get a symbol for the target.  */
 228             if (info->print_address_func && val != 0)
 229               {
 230                 fprintf (stream, "\t// ");
 231                 info->print_address_func (val, info);
 232               }
 233             else
 234               {
 235                 fprintf (stream, "\t// from address pool at 0x%x",
 236                          (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
 237               }
 238           }
 239           break;
 240
 241         default:
 242           /* if the disassembler lags the instruction set */
 243           fprintf (stream, "\tundecoded operands, inst is 0x%04x", inst);
 244           break;
 245         }
 246     }
 247
 248   /* Say how many bytes we consumed? */
 249   return 2;
 250 }