opcodes/fr30-ibld.c

   1 /* Instruction building/extraction support for fr30. -*- C -*-
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
   4 - the resultant file is machine generated, cgen-ibld.in isn't
   5
   6 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
   7
   8 This file is part of the GNU Binutils and GDB, the GNU debugger.
   9
  10 This program is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 2, or (at your option)
  13 any later version.
  14
  15 This program is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with this program; if not, write to the Free Software Foundation, Inc.,
  22 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  23
  24 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  25    Keep that in mind.  */
  26
  27 #include "sysdep.h"
  28 #include <ctype.h>
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "fr30-desc.h"
  35 #include "fr30-opc.h"
  36 #include "opintl.h"
  37
  38 #undef min
  39 #define min(a,b) ((a) < (b) ? (a) : (b))
  40 #undef max
  41 #define max(a,b) ((a) > (b) ? (a) : (b))
  42
  43 /* Used by the ifield rtx function.  */
  44 #define FLD(f) (fields->f)
  45
  46 static const char * insert_normal
  47      PARAMS ((CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
  48               unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR));
  49 static const char * insert_insn_normal
  50      PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *,
  51               CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
  52
  53 static int extract_normal
  54      PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
  55               unsigned int, unsigned int, unsigned int, unsigned int,
  56               unsigned int, unsigned int, bfd_vma, long *));
  57 static int extract_insn_normal
  58      PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
  59               CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma));
  60 \f
  61 /* Operand insertion.  */
  62
  63 #if ! CGEN_INT_INSN_P
  64
  65 /* Subroutine of insert_normal.  */
  66
  67 static CGEN_INLINE void
  68 insert_1 (cd, value, start, length, word_length, bufp)
  69      CGEN_CPU_DESC cd;
  70      unsigned long value;
  71      int start,length,word_length;
  72      unsigned char *bufp;
  73 {
  74   unsigned long x,mask;
  75   int shift;
  76   int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
  77
  78   switch (word_length)
  79     {
  80     case 8:
  81       x = *bufp;
  82       break;
  83     case 16:
  84       if (big_p)
  85         x = bfd_getb16 (bufp);
  86       else
  87         x = bfd_getl16 (bufp);
  88       break;
  89     case 24:
  90       /* ??? This may need reworking as these cases don't necessarily
  91          want the first byte and the last two bytes handled like this.  */
  92       if (big_p)
  93         x = (bufp[0] << 16) | bfd_getb16 (bufp + 1);
  94       else
  95         x = bfd_getl16 (bufp) | (bufp[2] << 16);
  96       break;
  97     case 32:
  98       if (big_p)
  99         x = bfd_getb32 (bufp);
 100       else
 101         x = bfd_getl32 (bufp);
 102       break;
 103     default :
 104       abort ();
 105     }
 106
 107   /* Written this way to avoid undefined behaviour.  */
 108   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 109   if (CGEN_INSN_LSB0_P)
 110     shift = (start + 1) - length;
 111   else
 112     shift = (word_length - (start + length));
 113   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 114
 115   switch (word_length)
 116     {
 117     case 8:
 118       *bufp = x;
 119       break;
 120     case 16:
 121       if (big_p)
 122         bfd_putb16 (x, bufp);
 123       else
 124         bfd_putl16 (x, bufp);
 125       break;
 126     case 24:
 127       /* ??? This may need reworking as these cases don't necessarily
 128          want the first byte and the last two bytes handled like this.  */
 129       if (big_p)
 130         {
 131           bufp[0] = x >> 16;
 132           bfd_putb16 (x, bufp + 1);
 133         }
 134       else
 135         {
 136           bfd_putl16 (x, bufp);
 137           bufp[2] = x >> 16;
 138         }
 139       break;
 140     case 32:
 141       if (big_p)
 142         bfd_putb32 (x, bufp);
 143       else
 144         bfd_putl32 (x, bufp);
 145       break;
 146     default :
 147       abort ();
 148     }
 149 }
 150
 151 #endif /* ! CGEN_INT_INSN_P */
 152
 153 /* Default insertion routine.
 154
 155    ATTRS is a mask of the boolean attributes.
 156    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 157    WORD_LENGTH is the length of the word in bits in which the value resides.
 158    START is the starting bit number in the word, architecture origin.
 159    LENGTH is the length of VALUE in bits.
 160    TOTAL_LENGTH is the total length of the insn in bits.
 161
 162    The result is an error message or NULL if success.  */
 163
 164 /* ??? This duplicates functionality with bfd's howto table and
 165    bfd_install_relocation.  */
 166 /* ??? This doesn't handle bfd_vma's.  Create another function when
 167    necessary.  */
 168
 169 static const char *
 170 insert_normal (cd, value, attrs, word_offset, start, length, word_length,
 171                total_length, buffer)
 172      CGEN_CPU_DESC cd;
 173      long value;
 174      unsigned int attrs;
 175      unsigned int word_offset, start, length, word_length, total_length;
 176      CGEN_INSN_BYTES_PTR buffer;
 177 {
 178   static char errbuf[100];
 179   /* Written this way to avoid undefined behaviour.  */
 180   unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
 181
 182   /* If LENGTH is zero, this operand doesn't contribute to the value.  */
 183   if (length == 0)
 184     return NULL;
 185
 186   if (CGEN_INT_INSN_P
 187       && word_offset != 0)
 188     abort ();
 189
 190   if (word_length > 32)
 191     abort ();
 192
 193   /* For architectures with insns smaller than the base-insn-bitsize,
 194      word_length may be too big.  */
 195   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 196     {
 197       if (word_offset == 0
 198           && word_length > total_length)
 199         word_length = total_length;
 200     }
 201
 202   /* Ensure VALUE will fit.  */
 203   if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
 204     {
 205       unsigned long maxval = mask;
 206       if ((unsigned long) value > maxval)
 207         {
 208           /* xgettext:c-format */
 209           sprintf (errbuf,
 210                    _("operand out of range (%lu not between 0 and %lu)"),
 211                    value, maxval);
 212           return errbuf;
 213         }
 214     }
 215   else
 216     {
 217       long minval = - (1L << (length - 1));
 218       long maxval = (1L << (length - 1)) - 1;
 219       if (value < minval || value > maxval)
 220         {
 221           sprintf
 222             /* xgettext:c-format */
 223             (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
 224              value, minval, maxval);
 225           return errbuf;
 226         }
 227     }
 228
 229 #if CGEN_INT_INSN_P
 230
 231   {
 232     int shift;
 233
 234     if (CGEN_INSN_LSB0_P)
 235       shift = (start + 1) - length;
 236     else
 237       shift = word_length - (start + length);
 238     *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
 239   }
 240
 241 #else /* ! CGEN_INT_INSN_P */
 242
 243   {
 244     unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
 245
 246     insert_1 (cd, value, start, length, word_length, bufp);
 247   }
 248
 249 #endif /* ! CGEN_INT_INSN_P */
 250
 251   return NULL;
 252 }
 253
 254 /* Default insn builder (insert handler).
 255    The instruction is recorded in CGEN_INT_INSN_P byte order
 256    (meaning that if CGEN_INT_INSN_P BUFFER is an int * and thus the value is
 257    recorded in host byte order, otherwise BUFFER is an array of bytes and the
 258    value is recorded in target byte order).
 259    The result is an error message or NULL if success.  */
 260
 261 static const char *
 262 insert_insn_normal (cd, insn, fields, buffer, pc)
 263      CGEN_CPU_DESC cd;
 264      const CGEN_INSN * insn;
 265      CGEN_FIELDS * fields;
 266      CGEN_INSN_BYTES_PTR buffer;
 267      bfd_vma pc;
 268 {
 269   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 270   unsigned long value;
 271   const unsigned char * syn;
 272
 273   CGEN_INIT_INSERT (cd);
 274   value = CGEN_INSN_BASE_VALUE (insn);
 275
 276   /* If we're recording insns as numbers (rather than a string of bytes),
 277      target byte order handling is deferred until later.  */
 278
 279 #if CGEN_INT_INSN_P
 280
 281   *buffer = value;
 282
 283 #else
 284
 285   cgen_put_insn_value (cd, buffer, min (cd->base_insn_bitsize,
 286                                         CGEN_FIELDS_BITSIZE (fields)),
 287                        value);
 288
 289 #endif /* ! CGEN_INT_INSN_P */
 290
 291   /* ??? It would be better to scan the format's fields.
 292      Still need to be able to insert a value based on the operand though;
 293      e.g. storing a branch displacement that got resolved later.
 294      Needs more thought first.  */
 295
 296   for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn)
 297     {
 298       const char *errmsg;
 299
 300       if (CGEN_SYNTAX_CHAR_P (* syn))
 301         continue;
 302
 303       errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 304                                        fields, buffer, pc);
 305       if (errmsg)
 306         return errmsg;
 307     }
 308
 309   return NULL;
 310 }
 311 \f
 312 /* Operand extraction.  */
 313
 314 #if ! CGEN_INT_INSN_P
 315
 316 /* Subroutine of extract_normal.
 317    Ensure sufficient bytes are cached in EX_INFO.
 318    OFFSET is the offset in bytes from the start of the insn of the value.
 319    BYTES is the length of the needed value.
 320    Returns 1 for success, 0 for failure.  */
 321
 322 static CGEN_INLINE int
 323 fill_cache (cd, ex_info, offset, bytes, pc)
 324      CGEN_CPU_DESC cd;
 325      CGEN_EXTRACT_INFO *ex_info;
 326      int offset, bytes;
 327      bfd_vma pc;
 328 {
 329   /* It's doubtful that the middle part has already been fetched so
 330      we don't optimize that case.  kiss.  */
 331   int mask;
 332   disassemble_info *info = (disassemble_info *) ex_info->dis_info;
 333
 334   /* First do a quick check.  */
 335   mask = (1 << bytes) - 1;
 336   if (((ex_info->valid >> offset) & mask) == mask)
 337     return 1;
 338
 339   /* Search for the first byte we need to read.  */
 340   for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
 341     if (! (mask & ex_info->valid))
 342       break;
 343
 344   if (bytes)
 345     {
 346       int status;
 347
 348       pc += offset;
 349       status = (*info->read_memory_func)
 350         (pc, ex_info->insn_bytes + offset, bytes, info);
 351
 352       if (status != 0)
 353         {
 354           (*info->memory_error_func) (status, pc, info);
 355           return 0;
 356         }
 357
 358       ex_info->valid |= ((1 << bytes) - 1) << offset;
 359     }
 360
 361   return 1;
 362 }
 363
 364 /* Subroutine of extract_normal.  */
 365
 366 static CGEN_INLINE long
 367 extract_1 (cd, ex_info, start, length, word_length, bufp, pc)
 368      CGEN_CPU_DESC cd;
 369      CGEN_EXTRACT_INFO *ex_info;
 370      int start,length,word_length;
 371      unsigned char *bufp;
 372      bfd_vma pc;
 373 {
 374   unsigned long x,mask;
 375   int shift;
 376   int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
 377
 378   switch (word_length)
 379     {
 380     case 8:
 381       x = *bufp;
 382       break;
 383     case 16:
 384       if (big_p)
 385         x = bfd_getb16 (bufp);
 386       else
 387         x = bfd_getl16 (bufp);
 388       break;
 389     case 24:
 390       /* ??? This may need reworking as these cases don't necessarily
 391          want the first byte and the last two bytes handled like this.  */
 392       if (big_p)
 393         x = (bufp[0] << 16) | bfd_getb16 (bufp + 1);
 394       else
 395         x = bfd_getl16 (bufp) | (bufp[2] << 16);
 396       break;
 397     case 32:
 398       if (big_p)
 399         x = bfd_getb32 (bufp);
 400       else
 401         x = bfd_getl32 (bufp);
 402       break;
 403     default :
 404       abort ();
 405     }
 406
 407   /* Written this way to avoid undefined behaviour.  */
 408   mask = (((1L << (length - 1)) - 1) << 1) | 1;
 409   if (CGEN_INSN_LSB0_P)
 410     shift = (start + 1) - length;
 411   else
 412     shift = (word_length - (start + length));
 413   return (x >> shift) & mask;
 414 }
 415
 416 #endif /* ! CGEN_INT_INSN_P */
 417
 418 /* Default extraction routine.
 419
 420    INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
 421    or sometimes less for cases like the m32r where the base insn size is 32
 422    but some insns are 16 bits.
 423    ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
 424    but for generality we take a bitmask of all of them.
 425    WORD_OFFSET is the offset in bits from the start of the insn of the value.
 426    WORD_LENGTH is the length of the word in bits in which the value resides.
 427    START is the starting bit number in the word, architecture origin.
 428    LENGTH is the length of VALUE in bits.
 429    TOTAL_LENGTH is the total length of the insn in bits.
 430
 431    Returns 1 for success, 0 for failure.  */
 432
 433 /* ??? The return code isn't properly used.  wip.  */
 434
 435 /* ??? This doesn't handle bfd_vma's.  Create another function when
 436    necessary.  */
 437
 438 static int
 439 extract_normal (cd, ex_info, insn_value, attrs, word_offset, start, length,
 440                 word_length, total_length, pc, valuep)
 441      CGEN_CPU_DESC cd;
 442      CGEN_EXTRACT_INFO *ex_info;
 443      CGEN_INSN_INT insn_value;
 444      unsigned int attrs;
 445      unsigned int word_offset, start, length, word_length, total_length;
 446      bfd_vma pc;
 447      long *valuep;
 448 {
 449   CGEN_INSN_INT value;
 450
 451   /* If LENGTH is zero, this operand doesn't contribute to the value
 452      so give it a standard value of zero.  */
 453   if (length == 0)
 454     {
 455       *valuep = 0;
 456       return 1;
 457     }
 458
 459   if (CGEN_INT_INSN_P
 460       && word_offset != 0)
 461     abort ();
 462
 463   if (word_length > 32)
 464     abort ();
 465
 466   /* For architectures with insns smaller than the insn-base-bitsize,
 467      word_length may be too big.  */
 468   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
 469     {
 470       if (word_offset == 0
 471           && word_length > total_length)
 472         word_length = total_length;
 473     }
 474
 475   /* Does the value reside in INSN_VALUE?  */
 476
 477   if (word_offset == 0)
 478     {
 479       /* Written this way to avoid undefined behaviour.  */
 480       CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
 481
 482       if (CGEN_INSN_LSB0_P)
 483         value = insn_value >> ((start + 1) - length);
 484       else
 485         value = insn_value >> (word_length - (start + length));
 486       value &= mask;
 487       /* sign extend? */
 488       if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
 489           && (value & (1L << (length - 1))))
 490         value |= ~mask;
 491     }
 492
 493 #if ! CGEN_INT_INSN_P
 494
 495   else
 496     {
 497       unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
 498
 499       if (word_length > 32)
 500         abort ();
 501
 502       if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
 503         return 0;
 504
 505       value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
 506     }
 507
 508 #endif /* ! CGEN_INT_INSN_P */
 509
 510   *valuep = value;
 511
 512   return 1;
 513 }
 514
 515 /* Default insn extractor.
 516
 517    INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
 518    The extracted fields are stored in FIELDS.
 519    EX_INFO is used to handle reading variable length insns.
 520    Return the length of the insn in bits, or 0 if no match,
 521    or -1 if an error occurs fetching data (memory_error_func will have
 522    been called).  */
 523
 524 static int
 525 extract_insn_normal (cd, insn, ex_info, insn_value, fields, pc)
 526      CGEN_CPU_DESC cd;
 527      const CGEN_INSN *insn;
 528      CGEN_EXTRACT_INFO *ex_info;
 529      CGEN_INSN_INT insn_value;
 530      CGEN_FIELDS *fields;
 531      bfd_vma pc;
 532 {
 533   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 534   const unsigned char *syn;
 535
 536   CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 537
 538   CGEN_INIT_EXTRACT (cd);
 539
 540   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 541     {
 542       int length;
 543
 544       if (CGEN_SYNTAX_CHAR_P (*syn))
 545         continue;
 546
 547       length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
 548                                         ex_info, insn_value, fields, pc);
 549       if (length <= 0)
 550         return length;
 551     }
 552
 553   /* We recognized and successfully extracted this insn.  */
 554   return CGEN_INSN_BITSIZE (insn);
 555 }
 556 \f
 557 /* machine generated code added here */
 558
 559 /* Main entry point for operand insertion.
 560
 561    This function is basically just a big switch statement.  Earlier versions
 562    used tables to look up the function to use, but
 563    - if the table contains both assembler and disassembler functions then
 564      the disassembler contains much of the assembler and vice-versa,
 565    - there's a lot of inlining possibilities as things grow,
 566    - using a switch statement avoids the function call overhead.
 567
 568    This function could be moved into `parse_insn_normal', but keeping it
 569    separate makes clear the interface between `parse_insn_normal' and each of
 570    the handlers.  It's also needed by GAS to insert operands that couldn't be
 571    resolved during parsing.
 572 */
 573
 574 const char *
 575 fr30_cgen_insert_operand (cd, opindex, fields, buffer, pc)
 576      CGEN_CPU_DESC cd;
 577      int opindex;
 578      CGEN_FIELDS * fields;
 579      CGEN_INSN_BYTES_PTR buffer;
 580      bfd_vma pc;
 581 {
 582   const char * errmsg;
 583   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 584
 585   switch (opindex)
 586     {
 587     case FR30_OPERAND_CRI :
 588       errmsg = insert_normal (cd, fields->f_CRi, 0, 16, 12, 4, 16, total_length, buffer);
 589       break;
 590     case FR30_OPERAND_CRJ :
 591       errmsg = insert_normal (cd, fields->f_CRj, 0, 16, 8, 4, 16, total_length, buffer);
 592       break;
 593     case FR30_OPERAND_R13 :
 594       errmsg = insert_normal (cd, fields->f_nil, 0, 0, 0, 0, 0, total_length, buffer);
 595       break;
 596     case FR30_OPERAND_R14 :
 597       errmsg = insert_normal (cd, fields->f_nil, 0, 0, 0, 0, 0, total_length, buffer);
 598       break;
 599     case FR30_OPERAND_R15 :
 600       errmsg = insert_normal (cd, fields->f_nil, 0, 0, 0, 0, 0, total_length, buffer);
 601       break;
 602     case FR30_OPERAND_RI :
 603       errmsg = insert_normal (cd, fields->f_Ri, 0, 0, 12, 4, 16, total_length, buffer);
 604       break;
 605     case FR30_OPERAND_RIC :
 606       errmsg = insert_normal (cd, fields->f_Ric, 0, 16, 12, 4, 16, total_length, buffer);
 607       break;
 608     case FR30_OPERAND_RJ :
 609       errmsg = insert_normal (cd, fields->f_Rj, 0, 0, 8, 4, 16, total_length, buffer);
 610       break;
 611     case FR30_OPERAND_RJC :
 612       errmsg = insert_normal (cd, fields->f_Rjc, 0, 16, 8, 4, 16, total_length, buffer);
 613       break;
 614     case FR30_OPERAND_RS1 :
 615       errmsg = insert_normal (cd, fields->f_Rs1, 0, 0, 8, 4, 16, total_length, buffer);
 616       break;
 617     case FR30_OPERAND_RS2 :
 618       errmsg = insert_normal (cd, fields->f_Rs2, 0, 0, 12, 4, 16, total_length, buffer);
 619       break;
 620     case FR30_OPERAND_CC :
 621       errmsg = insert_normal (cd, fields->f_cc, 0, 0, 4, 4, 16, total_length, buffer);
 622       break;
 623     case FR30_OPERAND_CCC :
 624       errmsg = insert_normal (cd, fields->f_ccc, 0, 16, 0, 8, 16, total_length, buffer);
 625       break;
 626     case FR30_OPERAND_DIR10 :
 627       {
 628         long value = fields->f_dir10;
 629         value = ((unsigned int) (value) >> (2));
 630         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 631       }
 632       break;
 633     case FR30_OPERAND_DIR8 :
 634       errmsg = insert_normal (cd, fields->f_dir8, 0, 0, 8, 8, 16, total_length, buffer);
 635       break;
 636     case FR30_OPERAND_DIR9 :
 637       {
 638         long value = fields->f_dir9;
 639         value = ((unsigned int) (value) >> (1));
 640         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 641       }
 642       break;
 643     case FR30_OPERAND_DISP10 :
 644       {
 645         long value = fields->f_disp10;
 646         value = ((int) (value) >> (2));
 647         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 648       }
 649       break;
 650     case FR30_OPERAND_DISP8 :
 651       errmsg = insert_normal (cd, fields->f_disp8, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 652       break;
 653     case FR30_OPERAND_DISP9 :
 654       {
 655         long value = fields->f_disp9;
 656         value = ((int) (value) >> (1));
 657         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
 658       }
 659       break;
 660     case FR30_OPERAND_I20 :
 661       {
 662 {
 663   FLD (f_i20_4) = ((unsigned int) (FLD (f_i20)) >> (16));
 664   FLD (f_i20_16) = ((FLD (f_i20)) & (65535));
 665 }
 666         errmsg = insert_normal (cd, fields->f_i20_4, 0, 0, 8, 4, 16, total_length, buffer);
 667         if (errmsg)
 668           break;
 669         errmsg = insert_normal (cd, fields->f_i20_16, 0, 16, 0, 16, 16, total_length, buffer);
 670         if (errmsg)
 671           break;
 672       }
 673       break;
 674     case FR30_OPERAND_I32 :
 675       errmsg = insert_normal (cd, fields->f_i32, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, buffer);
 676       break;
 677     case FR30_OPERAND_I8 :
 678       errmsg = insert_normal (cd, fields->f_i8, 0, 0, 4, 8, 16, total_length, buffer);
 679       break;
 680     case FR30_OPERAND_LABEL12 :
 681       {
 682         long value = fields->f_rel12;
 683         value = ((int) (((value) - (((pc) + (2))))) >> (1));
 684         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, buffer);
 685       }
 686       break;
 687     case FR30_OPERAND_LABEL9 :
 688       {
 689         long value = fields->f_rel9;
 690         value = ((int) (((value) - (((pc) + (2))))) >> (1));
 691         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, buffer);
 692       }
 693       break;
 694     case FR30_OPERAND_M4 :
 695       {
 696         long value = fields->f_m4;
 697         value = ((value) & (15));
 698         errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer);
 699       }
 700       break;
 701     case FR30_OPERAND_PS :
 702       errmsg = insert_normal (cd, fields->f_nil, 0, 0, 0, 0, 0, total_length, buffer);
 703       break;
 704     case FR30_OPERAND_REGLIST_HI_LD :
 705       errmsg = insert_normal (cd, fields->f_reglist_hi_ld, 0, 0, 8, 8, 16, total_length, buffer);
 706       break;
 707     case FR30_OPERAND_REGLIST_HI_ST :
 708       errmsg = insert_normal (cd, fields->f_reglist_hi_st, 0, 0, 8, 8, 16, total_length, buffer);
 709       break;
 710     case FR30_OPERAND_REGLIST_LOW_LD :
 711       errmsg = insert_normal (cd, fields->f_reglist_low_ld, 0, 0, 8, 8, 16, total_length, buffer);
 712       break;
 713     case FR30_OPERAND_REGLIST_LOW_ST :
 714       errmsg = insert_normal (cd, fields->f_reglist_low_st, 0, 0, 8, 8, 16, total_length, buffer);
 715       break;
 716     case FR30_OPERAND_S10 :
 717       {
 718         long value = fields->f_s10;
 719         value = ((int) (value) >> (2));
 720         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, buffer);
 721       }
 722       break;
 723     case FR30_OPERAND_U10 :
 724       {
 725         long value = fields->f_u10;
 726         value = ((unsigned int) (value) >> (2));
 727         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
 728       }
 729       break;
 730     case FR30_OPERAND_U4 :
 731       errmsg = insert_normal (cd, fields->f_u4, 0, 0, 8, 4, 16, total_length, buffer);
 732       break;
 733     case FR30_OPERAND_U4C :
 734       errmsg = insert_normal (cd, fields->f_u4c, 0, 0, 12, 4, 16, total_length, buffer);
 735       break;
 736     case FR30_OPERAND_U8 :
 737       errmsg = insert_normal (cd, fields->f_u8, 0, 0, 8, 8, 16, total_length, buffer);
 738       break;
 739     case FR30_OPERAND_UDISP6 :
 740       {
 741         long value = fields->f_udisp6;
 742         value = ((unsigned int) (value) >> (2));
 743         errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer);
 744       }
 745       break;
 746
 747     default :
 748       /* xgettext:c-format */
 749       fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
 750                opindex);
 751       abort ();
 752   }
 753
 754   return errmsg;
 755 }
 756
 757 /* Main entry point for operand extraction.
 758
 759    This function is basically just a big switch statement.  Earlier versions
 760    used tables to look up the function to use, but
 761    - if the table contains both assembler and disassembler functions then
 762      the disassembler contains much of the assembler and vice-versa,
 763    - there's a lot of inlining possibilities as things grow,
 764    - using a switch statement avoids the function call overhead.
 765
 766    This function could be moved into `print_insn_normal', but keeping it
 767    separate makes clear the interface between `print_insn_normal' and each of
 768    the handlers.
 769 */
 770
 771 int
 772 fr30_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc)
 773      CGEN_CPU_DESC cd;
 774      int opindex;
 775      CGEN_EXTRACT_INFO *ex_info;
 776      CGEN_INSN_INT insn_value;
 777      CGEN_FIELDS * fields;
 778      bfd_vma pc;
 779 {
 780   int length;
 781   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
 782
 783   switch (opindex)
 784     {
 785     case FR30_OPERAND_CRI :
 786       length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_CRi);
 787       break;
 788     case FR30_OPERAND_CRJ :
 789       length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_CRj);
 790       break;
 791     case FR30_OPERAND_R13 :
 792       length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 0, 0, total_length, pc, & fields->f_nil);
 793       break;
 794     case FR30_OPERAND_R14 :
 795       length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 0, 0, total_length, pc, & fields->f_nil);
 796       break;
 797     case FR30_OPERAND_R15 :
 798       length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 0, 0, total_length, pc, & fields->f_nil);
 799       break;
 800     case FR30_OPERAND_RI :
 801       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Ri);
 802       break;
 803     case FR30_OPERAND_RIC :
 804       length = extract_normal (cd, ex_info, insn_value, 0, 16, 12, 4, 16, total_length, pc, & fields->f_Ric);
 805       break;
 806     case FR30_OPERAND_RJ :
 807       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rj);
 808       break;
 809     case FR30_OPERAND_RJC :
 810       length = extract_normal (cd, ex_info, insn_value, 0, 16, 8, 4, 16, total_length, pc, & fields->f_Rjc);
 811       break;
 812     case FR30_OPERAND_RS1 :
 813       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_Rs1);
 814       break;
 815     case FR30_OPERAND_RS2 :
 816       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_Rs2);
 817       break;
 818     case FR30_OPERAND_CC :
 819       length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 16, total_length, pc, & fields->f_cc);
 820       break;
 821     case FR30_OPERAND_CCC :
 822       length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 8, 16, total_length, pc, & fields->f_ccc);
 823       break;
 824     case FR30_OPERAND_DIR10 :
 825       {
 826         long value;
 827         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 828         value = ((value) << (2));
 829         fields->f_dir10 = value;
 830       }
 831       break;
 832     case FR30_OPERAND_DIR8 :
 833       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_dir8);
 834       break;
 835     case FR30_OPERAND_DIR9 :
 836       {
 837         long value;
 838         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 839         value = ((value) << (1));
 840         fields->f_dir9 = value;
 841       }
 842       break;
 843     case FR30_OPERAND_DISP10 :
 844       {
 845         long value;
 846         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
 847         value = ((value) << (2));
 848         fields->f_disp10 = value;
 849       }
 850       break;
 851     case FR30_OPERAND_DISP8 :
 852       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & fields->f_disp8);
 853       break;
 854     case FR30_OPERAND_DISP9 :
 855       {
 856         long value;
 857         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
 858         value = ((value) << (1));
 859         fields->f_disp9 = value;
 860       }
 861       break;
 862     case FR30_OPERAND_I20 :
 863       {
 864         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_i20_4);
 865         length = extract_normal (cd, ex_info, insn_value, 0, 16, 0, 16, 16, total_length, pc, & fields->f_i20_16);
 866 {
 867   FLD (f_i20) = ((((FLD (f_i20_4)) << (16))) | (FLD (f_i20_16)));
 868 }
 869       }
 870       break;
 871     case FR30_OPERAND_I32 :
 872       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT), 16, 0, 32, 32, total_length, pc, & fields->f_i32);
 873       break;
 874     case FR30_OPERAND_I8 :
 875       length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 16, total_length, pc, & fields->f_i8);
 876       break;
 877     case FR30_OPERAND_LABEL12 :
 878       {
 879         long value;
 880         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value);
 881         value = ((((value) << (1))) + (((pc) + (2))));
 882         fields->f_rel12 = value;
 883       }
 884       break;
 885     case FR30_OPERAND_LABEL9 :
 886       {
 887         long value;
 888         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value);
 889         value = ((((value) << (1))) + (((pc) + (2))));
 890         fields->f_rel9 = value;
 891       }
 892       break;
 893     case FR30_OPERAND_M4 :
 894       {
 895         long value;
 896         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
 897         value = ((value) | (((-1) << (4))));
 898         fields->f_m4 = value;
 899       }
 900       break;
 901     case FR30_OPERAND_PS :
 902       length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 0, 0, total_length, pc, & fields->f_nil);
 903       break;
 904     case FR30_OPERAND_REGLIST_HI_LD :
 905       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_ld);
 906       break;
 907     case FR30_OPERAND_REGLIST_HI_ST :
 908       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_hi_st);
 909       break;
 910     case FR30_OPERAND_REGLIST_LOW_LD :
 911       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_ld);
 912       break;
 913     case FR30_OPERAND_REGLIST_LOW_ST :
 914       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_reglist_low_st);
 915       break;
 916     case FR30_OPERAND_S10 :
 917       {
 918         long value;
 919         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value);
 920         value = ((value) << (2));
 921         fields->f_s10 = value;
 922       }
 923       break;
 924     case FR30_OPERAND_U10 :
 925       {
 926         long value;
 927         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
 928         value = ((value) << (2));
 929         fields->f_u10 = value;
 930       }
 931       break;
 932     case FR30_OPERAND_U4 :
 933       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & fields->f_u4);
 934       break;
 935     case FR30_OPERAND_U4C :
 936       length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 16, total_length, pc, & fields->f_u4c);
 937       break;
 938     case FR30_OPERAND_U8 :
 939       length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & fields->f_u8);
 940       break;
 941     case FR30_OPERAND_UDISP6 :
 942       {
 943         long value;
 944         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
 945         value = ((value) << (2));
 946         fields->f_udisp6 = value;
 947       }
 948       break;
 949
 950     default :
 951       /* xgettext:c-format */
 952       fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
 953                opindex);
 954       abort ();
 955     }
 956
 957   return length;
 958 }
 959
 960 cgen_insert_fn * const fr30_cgen_insert_handlers[] =
 961 {
 962   insert_insn_normal,
 963 };
 964
 965 cgen_extract_fn * const fr30_cgen_extract_handlers[] =
 966 {
 967   extract_insn_normal,
 968 };
 969
 970 /* Getting values from cgen_fields is handled by a collection of functions.
 971    They are distinguished by the type of the VALUE argument they return.
 972    TODO: floating point, inlining support, remove cases where result type
 973    not appropriate.  */
 974
 975 int
 976 fr30_cgen_get_int_operand (cd, opindex, fields)
 977      CGEN_CPU_DESC cd;
 978      int opindex;
 979      const CGEN_FIELDS * fields;
 980 {
 981   int value;
 982
 983   switch (opindex)
 984     {
 985     case FR30_OPERAND_CRI :
 986       value = fields->f_CRi;
 987       break;
 988     case FR30_OPERAND_CRJ :
 989       value = fields->f_CRj;
 990       break;
 991     case FR30_OPERAND_R13 :
 992       value = fields->f_nil;
 993       break;
 994     case FR30_OPERAND_R14 :
 995       value = fields->f_nil;
 996       break;
 997     case FR30_OPERAND_R15 :
 998       value = fields->f_nil;
 999       break;
1000     case FR30_OPERAND_RI :
1001       value = fields->f_Ri;
1002       break;
1003     case FR30_OPERAND_RIC :
1004       value = fields->f_Ric;
1005       break;
1006     case FR30_OPERAND_RJ :
1007       value = fields->f_Rj;
1008       break;
1009     case FR30_OPERAND_RJC :
1010       value = fields->f_Rjc;
1011       break;
1012     case FR30_OPERAND_RS1 :
1013       value = fields->f_Rs1;
1014       break;
1015     case FR30_OPERAND_RS2 :
1016       value = fields->f_Rs2;
1017       break;
1018     case FR30_OPERAND_CC :
1019       value = fields->f_cc;
1020       break;
1021     case FR30_OPERAND_CCC :
1022       value = fields->f_ccc;
1023       break;
1024     case FR30_OPERAND_DIR10 :
1025       value = fields->f_dir10;
1026       break;
1027     case FR30_OPERAND_DIR8 :
1028       value = fields->f_dir8;
1029       break;
1030     case FR30_OPERAND_DIR9 :
1031       value = fields->f_dir9;
1032       break;
1033     case FR30_OPERAND_DISP10 :
1034       value = fields->f_disp10;
1035       break;
1036     case FR30_OPERAND_DISP8 :
1037       value = fields->f_disp8;
1038       break;
1039     case FR30_OPERAND_DISP9 :
1040       value = fields->f_disp9;
1041       break;
1042     case FR30_OPERAND_I20 :
1043       value = fields->f_i20;
1044       break;
1045     case FR30_OPERAND_I32 :
1046       value = fields->f_i32;
1047       break;
1048     case FR30_OPERAND_I8 :
1049       value = fields->f_i8;
1050       break;
1051     case FR30_OPERAND_LABEL12 :
1052       value = fields->f_rel12;
1053       break;
1054     case FR30_OPERAND_LABEL9 :
1055       value = fields->f_rel9;
1056       break;
1057     case FR30_OPERAND_M4 :
1058       value = fields->f_m4;
1059       break;
1060     case FR30_OPERAND_PS :
1061       value = fields->f_nil;
1062       break;
1063     case FR30_OPERAND_REGLIST_HI_LD :
1064       value = fields->f_reglist_hi_ld;
1065       break;
1066     case FR30_OPERAND_REGLIST_HI_ST :
1067       value = fields->f_reglist_hi_st;
1068       break;
1069     case FR30_OPERAND_REGLIST_LOW_LD :
1070       value = fields->f_reglist_low_ld;
1071       break;
1072     case FR30_OPERAND_REGLIST_LOW_ST :
1073       value = fields->f_reglist_low_st;
1074       break;
1075     case FR30_OPERAND_S10 :
1076       value = fields->f_s10;
1077       break;
1078     case FR30_OPERAND_U10 :
1079       value = fields->f_u10;
1080       break;
1081     case FR30_OPERAND_U4 :
1082       value = fields->f_u4;
1083       break;
1084     case FR30_OPERAND_U4C :
1085       value = fields->f_u4c;
1086       break;
1087     case FR30_OPERAND_U8 :
1088       value = fields->f_u8;
1089       break;
1090     case FR30_OPERAND_UDISP6 :
1091       value = fields->f_udisp6;
1092       break;
1093
1094     default :
1095       /* xgettext:c-format */
1096       fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1097                        opindex);
1098       abort ();
1099   }
1100
1101   return value;
1102 }
1103
1104 bfd_vma
1105 fr30_cgen_get_vma_operand (cd, opindex, fields)
1106      CGEN_CPU_DESC cd;
1107      int opindex;
1108      const CGEN_FIELDS * fields;
1109 {
1110   bfd_vma value;
1111
1112   switch (opindex)
1113     {
1114     case FR30_OPERAND_CRI :
1115       value = fields->f_CRi;
1116       break;
1117     case FR30_OPERAND_CRJ :
1118       value = fields->f_CRj;
1119       break;
1120     case FR30_OPERAND_R13 :
1121       value = fields->f_nil;
1122       break;
1123     case FR30_OPERAND_R14 :
1124       value = fields->f_nil;
1125       break;
1126     case FR30_OPERAND_R15 :
1127       value = fields->f_nil;
1128       break;
1129     case FR30_OPERAND_RI :
1130       value = fields->f_Ri;
1131       break;
1132     case FR30_OPERAND_RIC :
1133       value = fields->f_Ric;
1134       break;
1135     case FR30_OPERAND_RJ :
1136       value = fields->f_Rj;
1137       break;
1138     case FR30_OPERAND_RJC :
1139       value = fields->f_Rjc;
1140       break;
1141     case FR30_OPERAND_RS1 :
1142       value = fields->f_Rs1;
1143       break;
1144     case FR30_OPERAND_RS2 :
1145       value = fields->f_Rs2;
1146       break;
1147     case FR30_OPERAND_CC :
1148       value = fields->f_cc;
1149       break;
1150     case FR30_OPERAND_CCC :
1151       value = fields->f_ccc;
1152       break;
1153     case FR30_OPERAND_DIR10 :
1154       value = fields->f_dir10;
1155       break;
1156     case FR30_OPERAND_DIR8 :
1157       value = fields->f_dir8;
1158       break;
1159     case FR30_OPERAND_DIR9 :
1160       value = fields->f_dir9;
1161       break;
1162     case FR30_OPERAND_DISP10 :
1163       value = fields->f_disp10;
1164       break;
1165     case FR30_OPERAND_DISP8 :
1166       value = fields->f_disp8;
1167       break;
1168     case FR30_OPERAND_DISP9 :
1169       value = fields->f_disp9;
1170       break;
1171     case FR30_OPERAND_I20 :
1172       value = fields->f_i20;
1173       break;
1174     case FR30_OPERAND_I32 :
1175       value = fields->f_i32;
1176       break;
1177     case FR30_OPERAND_I8 :
1178       value = fields->f_i8;
1179       break;
1180     case FR30_OPERAND_LABEL12 :
1181       value = fields->f_rel12;
1182       break;
1183     case FR30_OPERAND_LABEL9 :
1184       value = fields->f_rel9;
1185       break;
1186     case FR30_OPERAND_M4 :
1187       value = fields->f_m4;
1188       break;
1189     case FR30_OPERAND_PS :
1190       value = fields->f_nil;
1191       break;
1192     case FR30_OPERAND_REGLIST_HI_LD :
1193       value = fields->f_reglist_hi_ld;
1194       break;
1195     case FR30_OPERAND_REGLIST_HI_ST :
1196       value = fields->f_reglist_hi_st;
1197       break;
1198     case FR30_OPERAND_REGLIST_LOW_LD :
1199       value = fields->f_reglist_low_ld;
1200       break;
1201     case FR30_OPERAND_REGLIST_LOW_ST :
1202       value = fields->f_reglist_low_st;
1203       break;
1204     case FR30_OPERAND_S10 :
1205       value = fields->f_s10;
1206       break;
1207     case FR30_OPERAND_U10 :
1208       value = fields->f_u10;
1209       break;
1210     case FR30_OPERAND_U4 :
1211       value = fields->f_u4;
1212       break;
1213     case FR30_OPERAND_U4C :
1214       value = fields->f_u4c;
1215       break;
1216     case FR30_OPERAND_U8 :
1217       value = fields->f_u8;
1218       break;
1219     case FR30_OPERAND_UDISP6 :
1220       value = fields->f_udisp6;
1221       break;
1222
1223     default :
1224       /* xgettext:c-format */
1225       fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1226                        opindex);
1227       abort ();
1228   }
1229
1230   return value;
1231 }
1232
1233 /* Stuffing values in cgen_fields is handled by a collection of functions.
1234    They are distinguished by the type of the VALUE argument they accept.
1235    TODO: floating point, inlining support, remove cases where argument type
1236    not appropriate.  */
1237
1238 void
1239 fr30_cgen_set_int_operand (cd, opindex, fields, value)
1240      CGEN_CPU_DESC cd;
1241      int opindex;
1242      CGEN_FIELDS * fields;
1243      int value;
1244 {
1245   switch (opindex)
1246     {
1247     case FR30_OPERAND_CRI :
1248       fields->f_CRi = value;
1249       break;
1250     case FR30_OPERAND_CRJ :
1251       fields->f_CRj = value;
1252       break;
1253     case FR30_OPERAND_R13 :
1254       fields->f_nil = value;
1255       break;
1256     case FR30_OPERAND_R14 :
1257       fields->f_nil = value;
1258       break;
1259     case FR30_OPERAND_R15 :
1260       fields->f_nil = value;
1261       break;
1262     case FR30_OPERAND_RI :
1263       fields->f_Ri = value;
1264       break;
1265     case FR30_OPERAND_RIC :
1266       fields->f_Ric = value;
1267       break;
1268     case FR30_OPERAND_RJ :
1269       fields->f_Rj = value;
1270       break;
1271     case FR30_OPERAND_RJC :
1272       fields->f_Rjc = value;
1273       break;
1274     case FR30_OPERAND_RS1 :
1275       fields->f_Rs1 = value;
1276       break;
1277     case FR30_OPERAND_RS2 :
1278       fields->f_Rs2 = value;
1279       break;
1280     case FR30_OPERAND_CC :
1281       fields->f_cc = value;
1282       break;
1283     case FR30_OPERAND_CCC :
1284       fields->f_ccc = value;
1285       break;
1286     case FR30_OPERAND_DIR10 :
1287       fields->f_dir10 = value;
1288       break;
1289     case FR30_OPERAND_DIR8 :
1290       fields->f_dir8 = value;
1291       break;
1292     case FR30_OPERAND_DIR9 :
1293       fields->f_dir9 = value;
1294       break;
1295     case FR30_OPERAND_DISP10 :
1296       fields->f_disp10 = value;
1297       break;
1298     case FR30_OPERAND_DISP8 :
1299       fields->f_disp8 = value;
1300       break;
1301     case FR30_OPERAND_DISP9 :
1302       fields->f_disp9 = value;
1303       break;
1304     case FR30_OPERAND_I20 :
1305       fields->f_i20 = value;
1306       break;
1307     case FR30_OPERAND_I32 :
1308       fields->f_i32 = value;
1309       break;
1310     case FR30_OPERAND_I8 :
1311       fields->f_i8 = value;
1312       break;
1313     case FR30_OPERAND_LABEL12 :
1314       fields->f_rel12 = value;
1315       break;
1316     case FR30_OPERAND_LABEL9 :
1317       fields->f_rel9 = value;
1318       break;
1319     case FR30_OPERAND_M4 :
1320       fields->f_m4 = value;
1321       break;
1322     case FR30_OPERAND_PS :
1323       fields->f_nil = value;
1324       break;
1325     case FR30_OPERAND_REGLIST_HI_LD :
1326       fields->f_reglist_hi_ld = value;
1327       break;
1328     case FR30_OPERAND_REGLIST_HI_ST :
1329       fields->f_reglist_hi_st = value;
1330       break;
1331     case FR30_OPERAND_REGLIST_LOW_LD :
1332       fields->f_reglist_low_ld = value;
1333       break;
1334     case FR30_OPERAND_REGLIST_LOW_ST :
1335       fields->f_reglist_low_st = value;
1336       break;
1337     case FR30_OPERAND_S10 :
1338       fields->f_s10 = value;
1339       break;
1340     case FR30_OPERAND_U10 :
1341       fields->f_u10 = value;
1342       break;
1343     case FR30_OPERAND_U4 :
1344       fields->f_u4 = value;
1345       break;
1346     case FR30_OPERAND_U4C :
1347       fields->f_u4c = value;
1348       break;
1349     case FR30_OPERAND_U8 :
1350       fields->f_u8 = value;
1351       break;
1352     case FR30_OPERAND_UDISP6 :
1353       fields->f_udisp6 = value;
1354       break;
1355
1356     default :
1357       /* xgettext:c-format */
1358       fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1359                        opindex);
1360       abort ();
1361   }
1362 }
1363
1364 void
1365 fr30_cgen_set_vma_operand (cd, opindex, fields, value)
1366      CGEN_CPU_DESC cd;
1367      int opindex;
1368      CGEN_FIELDS * fields;
1369      bfd_vma value;
1370 {
1371   switch (opindex)
1372     {
1373     case FR30_OPERAND_CRI :
1374       fields->f_CRi = value;
1375       break;
1376     case FR30_OPERAND_CRJ :
1377       fields->f_CRj = value;
1378       break;
1379     case FR30_OPERAND_R13 :
1380       fields->f_nil = value;
1381       break;
1382     case FR30_OPERAND_R14 :
1383       fields->f_nil = value;
1384       break;
1385     case FR30_OPERAND_R15 :
1386       fields->f_nil = value;
1387       break;
1388     case FR30_OPERAND_RI :
1389       fields->f_Ri = value;
1390       break;
1391     case FR30_OPERAND_RIC :
1392       fields->f_Ric = value;
1393       break;
1394     case FR30_OPERAND_RJ :
1395       fields->f_Rj = value;
1396       break;
1397     case FR30_OPERAND_RJC :
1398       fields->f_Rjc = value;
1399       break;
1400     case FR30_OPERAND_RS1 :
1401       fields->f_Rs1 = value;
1402       break;
1403     case FR30_OPERAND_RS2 :
1404       fields->f_Rs2 = value;
1405       break;
1406     case FR30_OPERAND_CC :
1407       fields->f_cc = value;
1408       break;
1409     case FR30_OPERAND_CCC :
1410       fields->f_ccc = value;
1411       break;
1412     case FR30_OPERAND_DIR10 :
1413       fields->f_dir10 = value;
1414       break;
1415     case FR30_OPERAND_DIR8 :
1416       fields->f_dir8 = value;
1417       break;
1418     case FR30_OPERAND_DIR9 :
1419       fields->f_dir9 = value;
1420       break;
1421     case FR30_OPERAND_DISP10 :
1422       fields->f_disp10 = value;
1423       break;
1424     case FR30_OPERAND_DISP8 :
1425       fields->f_disp8 = value;
1426       break;
1427     case FR30_OPERAND_DISP9 :
1428       fields->f_disp9 = value;
1429       break;
1430     case FR30_OPERAND_I20 :
1431       fields->f_i20 = value;
1432       break;
1433     case FR30_OPERAND_I32 :
1434       fields->f_i32 = value;
1435       break;
1436     case FR30_OPERAND_I8 :
1437       fields->f_i8 = value;
1438       break;
1439     case FR30_OPERAND_LABEL12 :
1440       fields->f_rel12 = value;
1441       break;
1442     case FR30_OPERAND_LABEL9 :
1443       fields->f_rel9 = value;
1444       break;
1445     case FR30_OPERAND_M4 :
1446       fields->f_m4 = value;
1447       break;
1448     case FR30_OPERAND_PS :
1449       fields->f_nil = value;
1450       break;
1451     case FR30_OPERAND_REGLIST_HI_LD :
1452       fields->f_reglist_hi_ld = value;
1453       break;
1454     case FR30_OPERAND_REGLIST_HI_ST :
1455       fields->f_reglist_hi_st = value;
1456       break;
1457     case FR30_OPERAND_REGLIST_LOW_LD :
1458       fields->f_reglist_low_ld = value;
1459       break;
1460     case FR30_OPERAND_REGLIST_LOW_ST :
1461       fields->f_reglist_low_st = value;
1462       break;
1463     case FR30_OPERAND_S10 :
1464       fields->f_s10 = value;
1465       break;
1466     case FR30_OPERAND_U10 :
1467       fields->f_u10 = value;
1468       break;
1469     case FR30_OPERAND_U4 :
1470       fields->f_u4 = value;
1471       break;
1472     case FR30_OPERAND_U4C :
1473       fields->f_u4c = value;
1474       break;
1475     case FR30_OPERAND_U8 :
1476       fields->f_u8 = value;
1477       break;
1478     case FR30_OPERAND_UDISP6 :
1479       fields->f_udisp6 = value;
1480       break;
1481
1482     default :
1483       /* xgettext:c-format */
1484       fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1485                        opindex);
1486       abort ();
1487   }
1488 }
1489
1490 /* Function to call before using the instruction builder tables.  */
1491
1492 void
1493 fr30_cgen_init_ibld_table (cd)
1494      CGEN_CPU_DESC cd;
1495 {
1496   cd->insert_handlers = & fr30_cgen_insert_handlers[0];
1497   cd->extract_handlers = & fr30_cgen_extract_handlers[0];
1498
1499   cd->insert_operand = fr30_cgen_insert_operand;
1500   cd->extract_operand = fr30_cgen_extract_operand;
1501
1502   cd->get_int_operand = fr30_cgen_get_int_operand;
1503   cd->set_int_operand = fr30_cgen_set_int_operand;
1504   cd->get_vma_operand = fr30_cgen_get_vma_operand;
1505   cd->set_vma_operand = fr30_cgen_set_vma_operand;
1506 }