include/opcode/d10v.h

   1 /* d10v.h -- Header file for D10V opcode table
   2    Copyright 1996, 1997, 1998 Free Software Foundation, Inc.
   3    Written by Martin Hunt (hunt@cygnus.com), Cygnus Support
   4
   5 This file is part of GDB, GAS, and the GNU binutils.
   6
   7 GDB, GAS, and the GNU binutils are free software; you can redistribute
   8 them and/or modify them under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either version
  10 1, or (at your option) any later version.
  11
  12 GDB, GAS, and the GNU binutils are distributed in the hope that they
  13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  15 the GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this file; see the file COPYING.  If not, write to the Free
  19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef D10V_H
  22 #define D10V_H
  23
  24 /* Format Specifier */
  25 #define FM00    0
  26 #define FM01    0x40000000
  27 #define FM10    0x80000000
  28 #define FM11    0xC0000000
  29
  30 #define NOP 0x5e00
  31 #define OPCODE_DIVS     0x14002800
  32
  33 /* The opcode table is an array of struct d10v_opcode.  */
  34
  35 struct d10v_opcode
  36 {
  37   /* The opcode name.  */
  38   const char *name;
  39
  40   /* the opcode format */
  41   int format;
  42
  43   /* These numbers were picked so we can do if( i & SHORT_OPCODE) */
  44 #define SHORT_OPCODE 1
  45 #define LONG_OPCODE  8
  46 #define SHORT_2      1          /* short with 2 operands */
  47 #define SHORT_B      3          /* short with 8-bit branch */
  48 #define LONG_B       8          /* long with 16-bit branch */
  49 #define LONG_L       10         /* long with 3 operands */
  50 #define LONG_R       12         /* reserved */
  51
  52   /* just a placeholder for variable-length instructions */
  53   /* for example, "bra" will be a fake for "bra.s" and bra.l" */
  54   /* which will immediately follow in the opcode table.  */
  55 #define OPCODE_FAKE  32
  56
  57   /* the number of cycles */
  58   int cycles;
  59
  60   /* the execution unit(s) used */
  61   int unit;
  62 #define EITHER  0
  63 #define IU      1
  64 #define MU      2
  65 #define BOTH    3
  66
  67   /* execution type; parallel or sequential */
  68   /* this field is used to decide if two instructions */
  69   /* can be executed in parallel */
  70   int exec_type;
  71 #define PARONLY 1       /* parallel only */
  72 #define SEQ     2       /* must be sequential */
  73 #define PAR     4       /* may be parallel */
  74 #define BRANCH_LINK 8   /* subroutine call.  must be aligned */
  75 #define RMEM     16     /* reads memory */
  76 #define WMEM     32     /* writes memory */
  77 #define RF0      64     /* reads f0 */
  78 #define WF0     128     /* modifies f0 */
  79 #define WCAR    256     /* write Carry */
  80 #define BRANCH  512     /* branch, no link */
  81
  82   /* the opcode */
  83   long opcode;
  84
  85   /* mask.  if( (i & mask) == opcode ) then match */
  86   long mask;
  87
  88   /* An array of operand codes.  Each code is an index into the
  89      operand table.  They appear in the order which the operands must
  90      appear in assembly code, and are terminated by a zero.  */
  91   unsigned char operands[6];
  92 };
  93
  94 /* The table itself is sorted by major opcode number, and is otherwise
  95    in the order in which the disassembler should consider
  96    instructions.  */
  97 extern const struct d10v_opcode d10v_opcodes[];
  98 extern const int d10v_num_opcodes;
  99
 100 /* The operands table is an array of struct d10v_operand.  */
 101 struct d10v_operand
 102 {
 103   /* The number of bits in the operand.  */
 104   int bits;
 105
 106   /* How far the operand is left shifted in the instruction.  */
 107   int shift;
 108
 109   /* One bit syntax flags.  */
 110   int flags;
 111 };
 112
 113 /* Elements in the table are retrieved by indexing with values from
 114    the operands field of the d10v_opcodes table.  */
 115
 116 extern const struct d10v_operand d10v_operands[];
 117
 118 /* Values defined for the flags field of a struct d10v_operand.  */
 119
 120 /* the operand must be an even number */
 121 #define OPERAND_EVEN    (1)
 122
 123 /* the operand must be an odd number */
 124 #define OPERAND_ODD     (2)
 125
 126 /* this is the destination register; it will be modified */
 127 /* this is used by the optimizer */
 128 #define OPERAND_DEST    (4)
 129
 130 /* number or symbol */
 131 #define OPERAND_NUM     (8)
 132
 133 /* address or label */
 134 #define OPERAND_ADDR    (0x10)
 135
 136 /* register */
 137 #define OPERAND_REG     (0x20)
 138
 139 /* postincrement +  */
 140 #define OPERAND_PLUS    (0x40)
 141
 142 /* postdecrement -  */
 143 #define OPERAND_MINUS   (0x80)
 144
 145 /* @  */
 146 #define OPERAND_ATSIGN  (0x100)
 147
 148 /* @(  */
 149 #define OPERAND_ATPAR   (0x200)
 150
 151 /* accumulator 0 */
 152 #define OPERAND_ACC0    (0x400)
 153
 154 /* accumulator 1 */
 155 #define OPERAND_ACC1    (0x800)
 156
 157 /* f0 / f1 flag register */
 158 #define OPERAND_FFLAG   (0x1000)
 159
 160 /* c flag register */
 161 #define OPERAND_CFLAG   (0x2000)
 162
 163 /* control register  */
 164 #define OPERAND_CONTROL (0x4000)
 165
 166 /* predecrement mode '@-sp'  */
 167 #define OPERAND_ATMINUS (0x8000)
 168
 169 /* signed number */
 170 #define OPERAND_SIGNED  (0x10000)
 171
 172 /* special accumulator shifts need a 4-bit number */
 173 /* 1 <= x <= 16 */
 174 #define OPERAND_SHIFT   (0x20000)
 175
 176 /* general purpose register */
 177 #define OPERAND_GPR     (0x40000)
 178
 179 /* Structure to hold information about predefined registers.  */
 180 struct pd_reg
 181 {
 182   char *name;           /* name to recognize */
 183   char *pname;          /* name to print for this register */
 184   int value;
 185 };
 186
 187 extern const struct pd_reg d10v_predefined_registers[];
 188 int d10v_reg_name_cnt();
 189
 190 /* an expressionS only has one register type, so we fake it */
 191 /* by setting high bits to indicate type */
 192 #define REGISTER_MASK   0xFF
 193
 194 #endif /* D10V_H */