Initial revision
[binutils.git] / gas / testsuite / gas / sparc / splet.s
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1 .text
2 .global start
4 ! Starting point
5 start:
7 ! test all ASRs
9 rd %asr0, %l0
10 rd %asr1, %l0
11 rd %asr15, %l0
12 rd %asr17, %l0
13 rd %asr18, %l0
14 rd %asr19, %l0 ! should stop the processor
15 rd %asr20, %l0
16 rd %asr21, %l0
17 rd %asr22, %l0
19 wr %l0, 0, %asr0
20 wr %l0, 0, %asr1
21 wr %l0, 0, %asr15
22 wr %l0, 0, %asr17
23 wr %l0, 0, %asr18
24 wr %l0, 0, %asr19
25 wr %l0, 0, %asr20
26 wr %l0, 0, %asr21
27 wr %l0, 0, %asr22
29 ! test UMUL with no overflow inside Y
30 test_umul:
31 umul %g1, %g2, %g3
33 ! test UMUL with an overflow inside Y
35 umul %g1, %g2, %g3 ! %g3 must be equal to 0
37 ! test SMUL with negative result
38 test_smul:
39 smul %g1, %g2, %g3
41 ! test SMUL with positive result
43 smul %g1, %g2, %g3
45 ! test STBAR: there are two possible syntaxes
46 test_stbar:
47 stbar ! is a valid V8 syntax, at least a synthetic
48 ! instruction
49 rd %asr15, %g0 ! other solution
51 ! test UNIMP
52 unimp 1
54 ! test FLUSH
55 flush %l1 ! is the official V8 syntax
57 ! test SCAN: find first 0
58 test_scan:
59 scan %l1, 0xffffffff, %l3
61 ! test scan: find first 1
63 scan %l1, 0, %l3
65 ! test scan: find first bit != bit-0
67 scan %l1, %l1, %l3
69 ! test SHUFFLE
70 test_shuffle:
71 shuffle %l0, 0x1, %l1
72 shuffle %l0, 0x2, %l1
73 shuffle %l0, 0x4, %l1
74 shuffle %l0, 0x8, %l1
75 shuffle %l0, 0x10, %l1
76 shuffle %l0, 0x18, %l1
78 ! test UMAC
79 test_umac:
80 umac %l1, %l2, %l0
81 umac %l1, 2, %l0
82 umac 2, %l1, %l0
84 ! test UMACD
85 test_umacd:
86 umacd %l2, %l4, %l0
87 umacd %l2, 3, %l0
88 umacd 3, %l2, %l0
90 ! test SMAC
91 test_smac:
92 smac %l1, %l2, %l0
93 smac %l1, -42, %l0
94 smac -42, %l1, %l0
96 ! test SMACD
97 test_smacd:
98 smacd %l2, %l4, %l0
99 smacd %l2, 123, %l0
100 smacd 123, %l2, %l0
102 ! test UMULD
103 test_umuld:
104 umuld %o2, %o4, %o0
105 umuld %o2, 0x234, %o0
106 umuld 0x567, %o2, %o0
108 ! test SMULD
109 test_smuld:
110 smuld %i2, %i4, %i0
111 smuld %i2, -4096, %i0
112 smuld 4095, %i4, %i0
114 ! Coprocessor instructions
115 test_coprocessor:
116 ! %ccsr is register # 0
117 ! %ccfr is register # 1
118 ! %ccpr is register # 3
119 ! %cccrcr is register # 2
121 ! test CPUSH: just syntax
123 cpush %l0, %l1
124 cpush %l0, 1
125 cpusha %l0, %l1
126 cpusha %l0, 1
128 ! test CPULL: just syntax
130 cpull %l0
132 ! test CPRDCXT: just syntax
134 crdcxt %ccsr, %l0
135 crdcxt %ccfr, %l0
136 crdcxt %ccpr, %l0
137 crdcxt %cccrcr, %l0
139 ! test CPWRCXT: just syntax
141 cwrcxt %l0, %ccsr
142 cwrcxt %l0, %ccfr
143 cwrcxt %l0, %ccpr
144 cwrcxt %l0, %cccrcr
146 ! test CBccc: just syntax
148 cbn stop
150 cbn,a stop
152 cbe stop
154 cbe,a stop
156 cbf stop
158 cbf,a stop
160 cbef stop
162 cbef,a stop
164 cbr stop
166 cbr,a stop
168 cber stop
170 cber,a stop
172 cbfr stop
174 cbfr,a stop
176 cbefr stop
178 cbefr,a stop
180 cba stop
182 cba,a stop
184 cbne stop
186 cbne,a stop
188 cbnf stop
190 cbnf,a stop
192 cbnef stop
194 cbnef,a stop
196 cbnr stop
198 cbnr,a stop
200 cbner stop
202 cbner,a stop
204 cbnfr stop
206 cbnfr,a stop
208 cbnefr stop
210 cbnefr,a stop