4 .*: +file format elf32
-powerpc
6 Disassembly of section
.text
:
12 c
: 48 00 00 04 b
10 <foo\
+0x10>
13 10: 48 00 00 08 b
18 <foo\
+0x18>
14 14: 48 00 00 00 b
14 <foo\
+0x14>
16 18: 48 00 00 04 b
1c
<foo\
+0x1c>
17 18: R_PPC_REL24
.data\
+0x4
18 1c
: 48 00 00 00 b
1c
<foo\
+0x1c>
20 20: 48 00 00 14 b
34 <foo\
+0x34>
21 20: R_PPC_REL24 z\
+0x14
22 24: 48 00 00 04 b
28 <foo\
+0x28>
23 28: 48 00 00 00 b
28 <foo\
+0x28>
25 2c
: 48 00 00 50 b
7c
<apfour
>
26 30: 48 00 00 04 b
34 <foo\
+0x34>
27 30: R_PPC_REL24 a\
+0x4
28 34: 48 00 00 4c b
80 <apfour\
+0x4>
29 38: 48 00 00 00 b
38 <foo\
+0x38>
31 3c
: 48 00 00 40 b
7c
<apfour
>
33 40: 00 00 00 40 .long 0x40
34 40: R_PPC_ADDR32
.text\
+0x40
36 44: 00 00 00 4c
.long 0x4c
37 44: R_PPC_ADDR32
.text\
+0x4c
38 48: 00 00 00 00 .long 0x0
40 4c
: 00 00 00 04 .long 0x4
41 4c
: R_PPC_REL32 x\
+0x4
48 64: ff ff ff fc fnmsub f31
,f31
,f31
,f31
49 64: R_PPC_ADDR32 x\
+0xf+ffffffc
50 68: ff ff ff fc fnmsub f31
,f31
,f31
,f31
51 68: R_PPC_ADDR32 y\
+0xf+ffffffc
52 6c
: ff ff ff fc fnmsub f31
,f31
,f31
,f31
53 6c
: R_PPC_ADDR32 z\
+0xf+ffffffc
54 70: 00 00 00 08 .long 0x8
55 74: 00 00 00 08 .long 0x8
58 78: 00 00 00 00 .long 0x0
64 80: R_PPC_ADDR32 apfour
65 84: ff ff ff fc fnmsub f31
,f31
,f31
,f31
66 88: 00 00 00 02 .long 0x2
67 88: R_PPC_ADDR32 apfour\
+0x2
68 8c
: 00 00 00 00 .long 0x0
69 Disassembly of section
.data
:
72 0: 00 00 00 00 .long 0x0
75 4: 00 00 00 00 .long 0x0