1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright (C) 1989, 93-98, 1999 Free Software Foundation, Inc.
3 Contributed by Carnegie Mellon University, 1993.
4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
5 Modified by Ken Raeburn for gas-2.x and ECOFF support.
6 Modified by Richard Henderson for ELF support.
7 Modified by Klaus K"ampf for EVAX (openVMS/Alpha) support.
9 This file is part of GAS, the GNU Assembler.
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the Free
23 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 * Mach Operating System
28 * Copyright (c) 1993 Carnegie Mellon University
29 * All Rights Reserved.
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
41 * Carnegie Mellon requests users of this software to return to
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
48 * any improvements or extensions that they make and grant Carnegie the
49 * rights to redistribute these changes.
56 #include "opcode/alpha.h"
59 #include "elf/alpha.h"
67 #define MAX_INSN_FIXUPS 2
68 #define MAX_INSN_ARGS 5
73 bfd_reloc_code_real_type reloc
;
80 struct alpha_fixup fixups
[MAX_INSN_FIXUPS
];
85 MACRO_EOA
= 1, MACRO_IR
, MACRO_PIR
, MACRO_CPIR
, MACRO_FPR
, MACRO_EXP
91 void (*emit
) PARAMS ((const expressionS
*, int, const PTR
));
93 enum alpha_macro_arg argsets
[16];
96 /* Two extra symbols we want to see in our input. This is a blatent
97 misuse of the expressionS.X_op field. */
99 #define O_pregister (O_max+1) /* O_register, but in parentheses */
100 #define O_cpregister (O_pregister+1) /* + a leading comma */
102 /* Macros for extracting the type and number of encoded register tokens */
104 #define is_ir_num(x) (((x) & 32) == 0)
105 #define is_fpr_num(x) (((x) & 32) != 0)
106 #define regno(x) ((x) & 31)
108 /* Something odd inherited from the old assembler */
110 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
111 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
113 /* Predicates for 16- and 32-bit ranges */
114 /* XXX: The non-shift version appears to trigger a compiler bug when
115 cross-assembling from x86 w/ gcc 2.7.2. */
118 #define range_signed_16(x) \
119 (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
120 #define range_signed_32(x) \
121 (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
123 #define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
124 (offsetT)(x) <= (offsetT)0x7FFF)
125 #define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
126 (offsetT)(x) <= (offsetT)0x7FFFFFFF)
129 /* Macros for sign extending from 16- and 32-bits. */
130 /* XXX: The cast macros will work on all the systems that I care about,
131 but really a predicate should be found to use the non-cast forms. */
134 #define sign_extend_16(x) ((short)(x))
135 #define sign_extend_32(x) ((int)(x))
137 #define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
138 #define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
139 ^ 0x80000000) - 0x80000000)
142 /* Macros to build tokens */
144 #define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
145 (t).X_op = O_register, \
146 (t).X_add_number = (r))
147 #define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
148 (t).X_op = O_pregister, \
149 (t).X_add_number = (r))
150 #define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
151 (t).X_op = O_cpregister, \
152 (t).X_add_number = (r))
153 #define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
154 (t).X_op = O_register, \
155 (t).X_add_number = (r)+32)
156 #define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
157 (t).X_op = O_symbol, \
158 (t).X_add_symbol = (s), \
159 (t).X_add_number = (a))
160 #define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
161 (t).X_op = O_constant, \
162 (t).X_add_number = (n))
165 /* Prototypes for all local functions */
167 static int tokenize_arguments
PARAMS ((char *, expressionS
*, int));
168 static const struct alpha_opcode
*find_opcode_match
169 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int *, int *));
170 static const struct alpha_macro
*find_macro_match
171 PARAMS ((const struct alpha_macro
*, const expressionS
*, int *));
172 static unsigned insert_operand
173 PARAMS ((unsigned, const struct alpha_operand
*, offsetT
, char *, unsigned));
174 static void assemble_insn
175 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int,
176 struct alpha_insn
*));
177 static void emit_insn
PARAMS ((struct alpha_insn
*));
178 static void assemble_tokens_to_insn
179 PARAMS ((const char *, const expressionS
*, int, struct alpha_insn
*));
180 static void assemble_tokens
181 PARAMS ((const char *, const expressionS
*, int, int));
183 static int load_expression
184 PARAMS ((int, const expressionS
*, int *, expressionS
*));
186 static void emit_ldgp
PARAMS ((const expressionS
*, int, const PTR
));
187 static void emit_division
PARAMS ((const expressionS
*, int, const PTR
));
188 static void emit_lda
PARAMS ((const expressionS
*, int, const PTR
));
189 static void emit_ldah
PARAMS ((const expressionS
*, int, const PTR
));
190 static void emit_ir_load
PARAMS ((const expressionS
*, int, const PTR
));
191 static void emit_loadstore
PARAMS ((const expressionS
*, int, const PTR
));
192 static void emit_jsrjmp
PARAMS ((const expressionS
*, int, const PTR
));
193 static void emit_ldX
PARAMS ((const expressionS
*, int, const PTR
));
194 static void emit_ldXu
PARAMS ((const expressionS
*, int, const PTR
));
195 static void emit_uldX
PARAMS ((const expressionS
*, int, const PTR
));
196 static void emit_uldXu
PARAMS ((const expressionS
*, int, const PTR
));
197 static void emit_ldil
PARAMS ((const expressionS
*, int, const PTR
));
198 static void emit_stX
PARAMS ((const expressionS
*, int, const PTR
));
199 static void emit_ustX
PARAMS ((const expressionS
*, int, const PTR
));
200 static void emit_sextX
PARAMS ((const expressionS
*, int, const PTR
));
201 static void emit_retjcr
PARAMS ((const expressionS
*, int, const PTR
));
203 static void s_alpha_text
PARAMS ((int));
204 static void s_alpha_data
PARAMS ((int));
206 static void s_alpha_comm
PARAMS ((int));
207 static void s_alpha_rdata
PARAMS ((int));
210 static void s_alpha_sdata
PARAMS ((int));
213 static void s_alpha_section
PARAMS ((int));
214 static void s_alpha_ent
PARAMS ((int));
215 static void s_alpha_end
PARAMS ((int));
216 static void s_alpha_mask
PARAMS ((int));
217 static void s_alpha_frame
PARAMS ((int));
218 static void s_alpha_prologue
PARAMS ((int));
219 static void s_alpha_coff_wrapper
PARAMS ((int));
222 static void s_alpha_section
PARAMS ((int));
224 static void s_alpha_gprel32
PARAMS ((int));
225 static void s_alpha_float_cons
PARAMS ((int));
226 static void s_alpha_proc
PARAMS ((int));
227 static void s_alpha_set
PARAMS ((int));
228 static void s_alpha_base
PARAMS ((int));
229 static void s_alpha_align
PARAMS ((int));
230 static void s_alpha_stringer
PARAMS ((int));
231 static void s_alpha_space
PARAMS ((int));
233 static void create_literal_section
PARAMS ((const char *, segT
*, symbolS
**));
235 static void select_gp_value
PARAMS ((void));
237 static void alpha_align
PARAMS ((int, char *, symbolS
*, int));
240 /* Generic assembler global variables which must be defined by all
243 /* Characters which always start a comment. */
244 const char comment_chars
[] = "#";
246 /* Characters which start a comment at the beginning of a line. */
247 const char line_comment_chars
[] = "#";
249 /* Characters which may be used to separate multiple commands on a
251 const char line_separator_chars
[] = ";";
253 /* Characters which are used to indicate an exponent in a floating
255 const char EXP_CHARS
[] = "eE";
257 /* Characters which mean that a number is a floating point constant,
260 const char FLT_CHARS
[] = "dD";
262 /* XXX: Do all of these really get used on the alpha?? */
263 char FLT_CHARS
[] = "rRsSfFdDxXpP";
267 const char *md_shortopts
= "Fm:g+1h:HG:";
269 const char *md_shortopts
= "Fm:gG:";
272 struct option md_longopts
[] = {
273 #define OPTION_32ADDR (OPTION_MD_BASE)
274 { "32addr", no_argument
, NULL
, OPTION_32ADDR
},
275 #define OPTION_RELAX (OPTION_32ADDR+1)
276 { "relax", no_argument
, NULL
, OPTION_RELAX
},
278 #define OPTION_MDEBUG (OPTION_RELAX+1)
279 #define OPTION_NO_MDEBUG (OPTION_MDEBUG+1)
280 { "mdebug", no_argument
, NULL
, OPTION_MDEBUG
},
281 { "no-mdebug", no_argument
, NULL
, OPTION_NO_MDEBUG
},
283 { NULL
, no_argument
, NULL
, 0 }
286 size_t md_longopts_size
= sizeof(md_longopts
);
291 #define AXP_REG_R16 16
292 #define AXP_REG_R17 17
294 #define AXP_REG_T9 22
296 #define AXP_REG_T10 23
298 #define AXP_REG_T11 24
300 #define AXP_REG_T12 25
301 #define AXP_REG_AI 25
303 #define AXP_REG_FP 29
306 #define AXP_REG_GP AXP_REG_PV
307 #endif /* OBJ_EVAX */
309 /* The cpu for which we are generating code */
310 static unsigned alpha_target
= AXP_OPCODE_BASE
;
311 static const char *alpha_target_name
= "<all>";
313 /* The hash table of instruction opcodes */
314 static struct hash_control
*alpha_opcode_hash
;
316 /* The hash table of macro opcodes */
317 static struct hash_control
*alpha_macro_hash
;
320 /* The $gp relocation symbol */
321 static symbolS
*alpha_gp_symbol
;
323 /* XXX: what is this, and why is it exported? */
324 valueT alpha_gp_value
;
327 /* The current $gp register */
328 static int alpha_gp_register
= AXP_REG_GP
;
330 /* A table of the register symbols */
331 static symbolS
*alpha_register_table
[64];
333 /* Constant sections, or sections of constants */
335 static segT alpha_lita_section
;
336 static segT alpha_lit4_section
;
339 static segT alpha_link_section
;
340 static segT alpha_ctors_section
;
341 static segT alpha_dtors_section
;
343 static segT alpha_lit8_section
;
345 /* Symbols referring to said sections. */
347 static symbolS
*alpha_lita_symbol
;
348 static symbolS
*alpha_lit4_symbol
;
351 static symbolS
*alpha_link_symbol
;
352 static symbolS
*alpha_ctors_symbol
;
353 static symbolS
*alpha_dtors_symbol
;
355 static symbolS
*alpha_lit8_symbol
;
357 /* Literal for .litX+0x8000 within .lita */
359 static offsetT alpha_lit4_literal
;
360 static offsetT alpha_lit8_literal
;
363 /* The active .ent symbol. */
365 static symbolS
*alpha_cur_ent_sym
;
368 /* Is the assembler not allowed to use $at? */
369 static int alpha_noat_on
= 0;
371 /* Are macros enabled? */
372 static int alpha_macros_on
= 1;
374 /* Are floats disabled? */
375 static int alpha_nofloats_on
= 0;
377 /* Are addresses 32 bit? */
378 static int alpha_addr32_on
= 0;
380 /* Symbol labelling the current insn. When the Alpha gas sees
383 and the section happens to not be on an eight byte boundary, it
384 will align both the symbol and the .quad to an eight byte boundary. */
385 static symbolS
*alpha_insn_label
;
387 /* Whether we should automatically align data generation pseudo-ops.
388 .align 0 will turn this off. */
389 static int alpha_auto_align_on
= 1;
391 /* The known current alignment of the current section. */
392 static int alpha_current_align
;
394 /* These are exported to ECOFF code. */
395 unsigned long alpha_gprmask
, alpha_fprmask
;
397 /* Whether the debugging option was seen. */
398 static int alpha_debug
;
401 /* Whether we are emitting an mdebug section. */
402 int alpha_flag_mdebug
= 1;
405 /* Don't fully resolve relocations, allowing code movement in the linker. */
406 static int alpha_flag_relax
;
408 /* What value to give to bfd_set_gp_size. */
409 static int g_switch_value
= 8;
412 /* Collect information about current procedure here. */
414 symbolS
*symbol
; /* proc pdesc symbol */
416 int framereg
; /* register for frame pointer */
417 int framesize
; /* size of frame */
427 static int alpha_flag_hash_long_names
= 0; /* -+ */
428 static int alpha_flag_show_after_trunc
= 0; /* -H */
430 /* If the -+ switch is given, then a hash is appended to any name that is
431 * longer than 64 characters, else longer symbol names are truncated.
436 /* A table of CPU names and opcode sets. */
438 static const struct cpu_type
444 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
445 This supports usage under DU 4.0b that does ".arch ev4", and
446 usage in MILO that does -m21064. Probably something more
447 specific like -m21064-pal should be used, but oh well. */
449 { "21064", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
450 { "21064a", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
451 { "21066", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
452 { "21068", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
453 { "21164", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
},
454 { "21164a", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
},
455 { "21164pc", (AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
457 { "21264", (AXP_OPCODE_BASE
|AXP_OPCODE_EV6
|AXP_OPCODE_BWX
458 |AXP_OPCODE_MAX
|AXP_OPCODE_CIX
) },
460 { "ev4", AXP_OPCODE_BASE
},
461 { "ev45", AXP_OPCODE_BASE
},
462 { "lca45", AXP_OPCODE_BASE
},
463 { "ev5", AXP_OPCODE_BASE
},
464 { "ev56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
},
465 { "pca56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
},
466 { "ev6", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
|AXP_OPCODE_CIX
},
468 { "all", AXP_OPCODE_BASE
},
472 /* The macro table */
474 static const struct alpha_macro alpha_macros
[] = {
475 /* Load/Store macros */
476 { "lda", emit_lda
, NULL
,
477 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
478 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
479 { "ldah", emit_ldah
, NULL
,
480 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
482 { "ldl", emit_ir_load
, "ldl",
483 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
484 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
485 { "ldl_l", emit_ir_load
, "ldl_l",
486 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
487 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
488 { "ldq", emit_ir_load
, "ldq",
489 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
490 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
491 { "ldq_l", emit_ir_load
, "ldq_l",
492 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
493 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
494 { "ldq_u", emit_ir_load
, "ldq_u",
495 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
496 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
497 { "ldf", emit_loadstore
, "ldf",
498 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
499 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
500 { "ldg", emit_loadstore
, "ldg",
501 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
502 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
503 { "lds", emit_loadstore
, "lds",
504 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
505 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
506 { "ldt", emit_loadstore
, "ldt",
507 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
508 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
510 { "ldb", emit_ldX
, (PTR
)0,
511 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
512 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
513 { "ldbu", emit_ldXu
, (PTR
)0,
514 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
515 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
516 { "ldw", emit_ldX
, (PTR
)1,
517 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
518 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
519 { "ldwu", emit_ldXu
, (PTR
)1,
520 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
521 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
523 { "uldw", emit_uldX
, (PTR
)1,
524 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
525 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
526 { "uldwu", emit_uldXu
, (PTR
)1,
527 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
528 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
529 { "uldl", emit_uldX
, (PTR
)2,
530 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
531 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
532 { "uldlu", emit_uldXu
, (PTR
)2,
533 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
534 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
535 { "uldq", emit_uldXu
, (PTR
)3,
536 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
537 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
539 { "ldgp", emit_ldgp
, NULL
,
540 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
} },
542 { "ldi", emit_lda
, NULL
,
543 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
544 { "ldil", emit_ldil
, NULL
,
545 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
546 { "ldiq", emit_lda
, NULL
,
547 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
549 { "ldif" emit_ldiq
, NULL
,
550 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
551 { "ldid" emit_ldiq
, NULL
,
552 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
553 { "ldig" emit_ldiq
, NULL
,
554 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
555 { "ldis" emit_ldiq
, NULL
,
556 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
557 { "ldit" emit_ldiq
, NULL
,
558 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
561 { "stl", emit_loadstore
, "stl",
562 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
563 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
564 { "stl_c", emit_loadstore
, "stl_c",
565 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
566 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
567 { "stq", emit_loadstore
, "stq",
568 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
569 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
570 { "stq_c", emit_loadstore
, "stq_c",
571 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
572 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
573 { "stq_u", emit_loadstore
, "stq_u",
574 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
575 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
576 { "stf", emit_loadstore
, "stf",
577 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
578 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
579 { "stg", emit_loadstore
, "stg",
580 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
581 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
582 { "sts", emit_loadstore
, "sts",
583 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
584 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
585 { "stt", emit_loadstore
, "stt",
586 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
587 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
589 { "stb", emit_stX
, (PTR
)0,
590 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
591 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
592 { "stw", emit_stX
, (PTR
)1,
593 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
594 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
595 { "ustw", emit_ustX
, (PTR
)1,
596 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
597 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
598 { "ustl", emit_ustX
, (PTR
)2,
599 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
600 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
601 { "ustq", emit_ustX
, (PTR
)3,
602 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
603 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
605 /* Arithmetic macros */
607 { "absl" emit_absl
, 1, { IR
} },
608 { "absl" emit_absl
, 2, { IR
, IR
} },
609 { "absl" emit_absl
, 2, { EXP
, IR
} },
610 { "absq" emit_absq
, 1, { IR
} },
611 { "absq" emit_absq
, 2, { IR
, IR
} },
612 { "absq" emit_absq
, 2, { EXP
, IR
} },
615 { "sextb", emit_sextX
, (PTR
)0,
616 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
618 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
619 { "sextw", emit_sextX
, (PTR
)1,
620 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
622 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
624 { "divl", emit_division
, "__divl",
625 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
626 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
627 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
628 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
629 { "divlu", emit_division
, "__divlu",
630 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
631 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
632 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
633 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
634 { "divq", emit_division
, "__divq",
635 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
636 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
637 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
638 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
639 { "divqu", emit_division
, "__divqu",
640 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
641 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
642 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
643 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
644 { "reml", emit_division
, "__reml",
645 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
646 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
647 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
648 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
649 { "remlu", emit_division
, "__remlu",
650 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
651 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
652 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
653 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
654 { "remq", emit_division
, "__remq",
655 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
656 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
657 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
658 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
659 { "remqu", emit_division
, "__remqu",
660 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
661 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
662 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
663 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
665 { "jsr", emit_jsrjmp
, "jsr",
666 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
667 MACRO_PIR
, MACRO_EOA
,
668 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
669 MACRO_EXP
, MACRO_EOA
} },
670 { "jmp", emit_jsrjmp
, "jmp",
671 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
672 MACRO_PIR
, MACRO_EOA
,
673 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
674 MACRO_EXP
, MACRO_EOA
} },
675 { "ret", emit_retjcr
, "ret",
676 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
678 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
679 MACRO_PIR
, MACRO_EOA
,
680 MACRO_EXP
, MACRO_EOA
,
682 { "jcr", emit_retjcr
, "jcr",
683 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
685 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
686 MACRO_PIR
, MACRO_EOA
,
687 MACRO_EXP
, MACRO_EOA
,
689 { "jsr_coroutine", emit_retjcr
, "jcr",
690 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
692 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
693 MACRO_PIR
, MACRO_EOA
,
694 MACRO_EXP
, MACRO_EOA
,
698 static const int alpha_num_macros
699 = sizeof(alpha_macros
) / sizeof(*alpha_macros
);
701 /* Public interface functions */
703 /* This function is called once, at assembler startup time. It sets
704 up all the tables, etc. that the MD part of the assembler will
705 need, that can be determined before arguments are parsed. */
712 /* Create the opcode hash table */
714 alpha_opcode_hash
= hash_new ();
715 for (i
= 0; i
< alpha_num_opcodes
; )
717 const char *name
, *retval
, *slash
;
719 name
= alpha_opcodes
[i
].name
;
720 retval
= hash_insert (alpha_opcode_hash
, name
, (PTR
)&alpha_opcodes
[i
]);
722 as_fatal (_("internal error: can't hash opcode `%s': %s"), name
, retval
);
724 /* Some opcodes include modifiers of various sorts with a "/mod"
725 syntax, like the architecture manual suggests. However, for
726 use with gcc at least, we also need access to those same opcodes
729 if ((slash
= strchr (name
, '/')) != NULL
)
731 char *p
= xmalloc (strlen (name
));
732 memcpy (p
, name
, slash
- name
);
733 strcpy (p
+ (slash
- name
), slash
+ 1);
735 (void)hash_insert(alpha_opcode_hash
, p
, (PTR
)&alpha_opcodes
[i
]);
736 /* Ignore failures -- the opcode table does duplicate some
737 variants in different forms, like "hw_stq" and "hw_st/q". */
740 while (++i
< alpha_num_opcodes
741 && (alpha_opcodes
[i
].name
== name
742 || !strcmp (alpha_opcodes
[i
].name
, name
)))
746 /* Create the macro hash table */
748 alpha_macro_hash
= hash_new ();
749 for (i
= 0; i
< alpha_num_macros
; )
751 const char *name
, *retval
;
753 name
= alpha_macros
[i
].name
;
754 retval
= hash_insert (alpha_macro_hash
, name
, (PTR
)&alpha_macros
[i
]);
756 as_fatal (_("internal error: can't hash macro `%s': %s"), name
, retval
);
758 while (++i
< alpha_num_macros
759 && (alpha_macros
[i
].name
== name
760 || !strcmp (alpha_macros
[i
].name
, name
)))
764 /* Construct symbols for each of the registers */
766 for (i
= 0; i
< 32; ++i
)
769 sprintf(name
, "$%d", i
);
770 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
776 sprintf(name
, "$f%d", i
-32);
777 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
781 /* Create the special symbols and sections we'll be using */
783 /* So .sbss will get used for tiny objects. */
784 bfd_set_gp_size (stdoutput
, g_switch_value
);
787 create_literal_section (".lita", &alpha_lita_section
, &alpha_lita_symbol
);
789 /* For handling the GP, create a symbol that won't be output in the
790 symbol table. We'll edit it out of relocs later. */
791 alpha_gp_symbol
= symbol_create ("<GP value>", alpha_lita_section
, 0x8000,
796 create_literal_section (".link", &alpha_link_section
, &alpha_link_symbol
);
802 segT sec
= subseg_new(".mdebug", (subsegT
)0);
803 bfd_set_section_flags(stdoutput
, sec
, SEC_HAS_CONTENTS
|SEC_READONLY
);
804 bfd_set_section_alignment(stdoutput
, sec
, 3);
808 subseg_set(text_section
, 0);
811 /* The public interface to the instruction assembler. */
817 char opname
[32]; /* current maximum is 13 */
818 expressionS tok
[MAX_INSN_ARGS
];
819 int ntok
, opnamelen
, trunclen
;
821 /* split off the opcode */
822 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/468");
823 trunclen
= (opnamelen
< sizeof (opname
) - 1
825 : sizeof (opname
) - 1);
826 memcpy (opname
, str
, trunclen
);
827 opname
[trunclen
] = '\0';
829 /* tokenize the rest of the line */
830 if ((ntok
= tokenize_arguments (str
+ opnamelen
, tok
, MAX_INSN_ARGS
)) < 0)
832 as_bad (_("syntax error"));
837 assemble_tokens (opname
, tok
, ntok
, alpha_macros_on
);
840 /* Round up a section's size to the appropriate boundary. */
843 md_section_align (seg
, size
)
847 int align
= bfd_get_section_alignment(stdoutput
, seg
);
848 valueT mask
= ((valueT
)1 << align
) - 1;
850 return (size
+ mask
) & ~mask
;
853 /* Turn a string in input_line_pointer into a floating point constant
854 of type type, and store the appropriate bytes in *litP. The number
855 of LITTLENUMS emitted is stored in *sizeP. An error message is
856 returned, or NULL on OK. */
858 /* Equal to MAX_PRECISION in atof-ieee.c */
859 #define MAX_LITTLENUMS 6
861 extern char *vax_md_atof
PARAMS ((int, char *, int *));
864 md_atof (type
, litP
, sizeP
)
870 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
871 LITTLENUM_TYPE
*wordP
;
878 /* VAX md_atof doesn't like "G" for some reason. */
882 return vax_md_atof (type
, litP
, sizeP
);
905 return _("Bad call to MD_ATOF()");
907 t
= atof_ieee (input_line_pointer
, type
, words
);
909 input_line_pointer
= t
;
910 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
912 for (wordP
= words
+ prec
- 1; prec
--;)
914 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
915 litP
+= sizeof (LITTLENUM_TYPE
);
921 /* Take care of the target-specific command-line options. */
924 md_parse_option (c
, arg
)
931 alpha_nofloats_on
= 1;
943 g_switch_value
= atoi(arg
);
948 const struct cpu_type
*p
;
949 for (p
= cpu_types
; p
->name
; ++p
)
950 if (strcmp(arg
, p
->name
) == 0)
952 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
955 as_warn(_("Unknown CPU identifier `%s'"), arg
);
961 case '+': /* For g++. Hash any name > 63 chars long. */
962 alpha_flag_hash_long_names
= 1;
965 case 'H': /* Show new symbol after hash truncation */
966 alpha_flag_show_after_trunc
= 1;
969 case 'h': /* for gnu-c/vax compatibility. */
974 alpha_flag_relax
= 1;
979 alpha_flag_mdebug
= 1;
981 case OPTION_NO_MDEBUG
:
982 alpha_flag_mdebug
= 0;
993 /* Print a description of the command-line options that we accept. */
996 md_show_usage (stream
)
1001 -32addr treat addresses as 32-bit values\n\
1002 -F lack floating point instructions support\n\
1003 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\
1004 specify variant of Alpha architecture\n\
1005 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\
1006 these variants include PALcode opcodes\n"),
1011 -+ hash encode (don't truncate) names longer than 64 characters\n\
1012 -H show new symbol after hash truncation\n"),
1017 /* Decide from what point a pc-relative relocation is relative to,
1018 relative to the pc-relative fixup. Er, relatively speaking. */
1021 md_pcrel_from (fixP
)
1024 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1025 switch (fixP
->fx_r_type
)
1027 case BFD_RELOC_ALPHA_GPDISP
:
1028 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1029 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1032 return fixP
->fx_size
+ addr
;
1036 /* Attempt to simplify or even eliminate a fixup. The return value is
1037 ignored; perhaps it was once meaningful, but now it is historical.
1038 To indicate that a fixup has been eliminated, set fixP->fx_done.
1040 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1041 internally into the GPDISP reloc used externally. We had to do
1042 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1043 the distance to the "lda" instruction for setting the addend to
1047 md_apply_fix (fixP
, valueP
)
1051 char * const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1052 valueT value
= *valueP
;
1053 unsigned image
, size
;
1055 switch (fixP
->fx_r_type
)
1057 /* The GPDISP relocations are processed internally with a symbol
1058 referring to the current function; we need to drop in a value
1059 which, when added to the address of the start of the function,
1060 gives the desired GP. */
1061 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1063 fixS
*next
= fixP
->fx_next
;
1064 assert (next
->fx_r_type
== BFD_RELOC_ALPHA_GPDISP_LO16
);
1066 fixP
->fx_offset
= (next
->fx_frag
->fr_address
+ next
->fx_where
1067 - fixP
->fx_frag
->fr_address
- fixP
->fx_where
);
1069 value
= (value
- sign_extend_16 (value
)) >> 16;
1072 fixP
->fx_r_type
= BFD_RELOC_ALPHA_GPDISP
;
1076 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1077 value
= sign_extend_16 (value
);
1078 fixP
->fx_offset
= 0;
1084 fixP
->fx_addsy
= section_symbol (absolute_section
);
1085 md_number_to_chars (fixpos
, value
, 2);
1090 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
1095 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
1100 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
1103 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1105 md_number_to_chars (fixpos
, value
, size
);
1111 case BFD_RELOC_GPREL32
:
1112 assert (fixP
->fx_subsy
== alpha_gp_symbol
);
1114 /* FIXME: inherited this obliviousness of `value' -- why? */
1115 md_number_to_chars (fixpos
, -alpha_gp_value
, 4);
1119 case BFD_RELOC_GPREL32
:
1123 case BFD_RELOC_23_PCREL_S2
:
1124 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1126 image
= bfd_getl32(fixpos
);
1127 image
= (image
& ~0x1FFFFF) | ((value
>> 2) & 0x1FFFFF);
1132 case BFD_RELOC_ALPHA_HINT
:
1133 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1135 image
= bfd_getl32(fixpos
);
1136 image
= (image
& ~0x3FFF) | ((value
>> 2) & 0x3FFF);
1142 case BFD_RELOC_ALPHA_LITERAL
:
1143 md_number_to_chars (fixpos
, value
, 2);
1146 case BFD_RELOC_ALPHA_LITUSE
:
1150 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1151 case BFD_RELOC_ALPHA_LITUSE
:
1155 case BFD_RELOC_ALPHA_LINKAGE
:
1156 case BFD_RELOC_ALPHA_CODEADDR
:
1162 const struct alpha_operand
*operand
;
1164 if ((int)fixP
->fx_r_type
>= 0)
1165 as_fatal (_("unhandled relocation type %s"),
1166 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1168 assert (-(int)fixP
->fx_r_type
< alpha_num_operands
);
1169 operand
= &alpha_operands
[-(int)fixP
->fx_r_type
];
1171 /* The rest of these fixups only exist internally during symbol
1172 resolution and have no representation in the object file.
1173 Therefore they must be completely resolved as constants. */
1175 if (fixP
->fx_addsy
!= 0
1176 && fixP
->fx_addsy
->bsym
->section
!= absolute_section
)
1177 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1178 _("non-absolute expression in constant field"));
1180 image
= bfd_getl32(fixpos
);
1181 image
= insert_operand(image
, operand
, (offsetT
)value
,
1182 fixP
->fx_file
, fixP
->fx_line
);
1187 if (fixP
->fx_addsy
!= 0 || fixP
->fx_pcrel
!= 0)
1191 as_warn_where(fixP
->fx_file
, fixP
->fx_line
,
1192 _("type %d reloc done?\n"), (int)fixP
->fx_r_type
);
1197 md_number_to_chars(fixpos
, image
, 4);
1205 * Look for a register name in the given symbol.
1209 md_undefined_symbol(name
)
1214 int is_float
= 0, num
;
1219 if (name
[1] == 'p' && name
[2] == '\0')
1220 return alpha_register_table
[AXP_REG_FP
];
1225 if (!isdigit(*++name
))
1229 case '0': case '1': case '2': case '3': case '4':
1230 case '5': case '6': case '7': case '8': case '9':
1231 if (name
[1] == '\0')
1232 num
= name
[0] - '0';
1233 else if (name
[0] != '0' && isdigit(name
[1]) && name
[2] == '\0')
1235 num
= (name
[0] - '0') * 10 + name
[1] - '0';
1242 if (!alpha_noat_on
&& num
== AXP_REG_AT
)
1243 as_warn(_("Used $at without \".set noat\""));
1244 return alpha_register_table
[num
+ is_float
];
1247 if (name
[1] == 't' && name
[2] == '\0')
1250 as_warn(_("Used $at without \".set noat\""));
1251 return alpha_register_table
[AXP_REG_AT
];
1256 if (name
[1] == 'p' && name
[2] == '\0')
1257 return alpha_register_table
[alpha_gp_register
];
1261 if (name
[1] == 'p' && name
[2] == '\0')
1262 return alpha_register_table
[AXP_REG_SP
];
1270 /* @@@ Magic ECOFF bits. */
1273 alpha_frob_ecoff_data ()
1276 /* $zero and $f31 are read-only */
1277 alpha_gprmask
&= ~1;
1278 alpha_fprmask
&= ~1;
1282 /* Hook to remember a recently defined label so that the auto-align
1283 code can adjust the symbol after we know what alignment will be
1287 alpha_define_label (sym
)
1290 alpha_insn_label
= sym
;
1293 /* Return true if we must always emit a reloc for a type and false if
1294 there is some hope of resolving it a assembly time. */
1297 alpha_force_relocation (f
)
1300 if (alpha_flag_relax
)
1303 switch (f
->fx_r_type
)
1305 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1306 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1307 case BFD_RELOC_ALPHA_GPDISP
:
1309 case BFD_RELOC_ALPHA_LITERAL
:
1312 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1314 case BFD_RELOC_ALPHA_LITUSE
:
1315 case BFD_RELOC_GPREL32
:
1317 case BFD_RELOC_ALPHA_LINKAGE
:
1318 case BFD_RELOC_ALPHA_CODEADDR
:
1322 case BFD_RELOC_23_PCREL_S2
:
1325 case BFD_RELOC_ALPHA_HINT
:
1329 assert((int)f
->fx_r_type
< 0 && -(int)f
->fx_r_type
< alpha_num_operands
);
1334 /* Return true if we can partially resolve a relocation now. */
1337 alpha_fix_adjustable (f
)
1341 /* Prevent all adjustments to global symbols */
1342 if (S_IS_EXTERN (f
->fx_addsy
) || S_IS_WEAK (f
->fx_addsy
))
1346 /* Are there any relocation types for which we must generate a reloc
1347 but we can adjust the values contained within it? */
1348 switch (f
->fx_r_type
)
1350 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1351 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1352 case BFD_RELOC_ALPHA_GPDISP
:
1356 case BFD_RELOC_ALPHA_LITERAL
:
1359 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1362 case BFD_RELOC_ALPHA_LINKAGE
:
1363 case BFD_RELOC_ALPHA_CODEADDR
:
1367 case BFD_RELOC_ALPHA_LITUSE
:
1370 case BFD_RELOC_GPREL32
:
1371 case BFD_RELOC_23_PCREL_S2
:
1374 case BFD_RELOC_ALPHA_HINT
:
1378 assert ((int)f
->fx_r_type
< 0
1379 && - (int)f
->fx_r_type
< alpha_num_operands
);
1385 /* Generate the BFD reloc to be stuck in the object file from the
1386 fixup used internally in the assembler. */
1389 tc_gen_reloc (sec
, fixp
)
1395 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1396 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
1397 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1399 /* Make sure none of our internal relocations make it this far.
1400 They'd better have been fully resolved by this point. */
1401 assert ((int)fixp
->fx_r_type
> 0);
1403 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1404 if (reloc
->howto
== NULL
)
1406 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1407 _("cannot represent `%s' relocation in object file"),
1408 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1412 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
1414 as_fatal (_("internal error? cannot generate `%s' relocation"),
1415 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1417 assert (!fixp
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1420 if (fixp
->fx_r_type
== BFD_RELOC_ALPHA_LITERAL
)
1422 /* fake out bfd_perform_relocation. sigh */
1423 reloc
->addend
= -alpha_gp_value
;
1428 reloc
->addend
= fixp
->fx_offset
;
1431 * Ohhh, this is ugly. The problem is that if this is a local global
1432 * symbol, the relocation will entirely be performed at link time, not
1433 * at assembly time. bfd_perform_reloc doesn't know about this sort
1434 * of thing, and as a result we need to fake it out here.
1436 if ((S_IS_EXTERN (fixp
->fx_addsy
) || S_IS_WEAK (fixp
->fx_addsy
))
1437 && !S_IS_COMMON(fixp
->fx_addsy
))
1438 reloc
->addend
-= fixp
->fx_addsy
->bsym
->value
;
1445 /* Parse a register name off of the input_line and return a register
1446 number. Gets md_undefined_symbol above to do the register name
1449 Only called as a part of processing the ECOFF .frame directive. */
1452 tc_get_register (frame
)
1455 int framereg
= AXP_REG_SP
;
1458 if (*input_line_pointer
== '$')
1460 char *s
= input_line_pointer
;
1461 char c
= get_symbol_end ();
1462 symbolS
*sym
= md_undefined_symbol (s
);
1464 *strchr(s
, '\0') = c
;
1465 if (sym
&& (framereg
= S_GET_VALUE (sym
)) <= 31)
1468 as_warn (_("frame reg expected, using $%d."), framereg
);
1471 note_gpreg (framereg
);
1475 /* This is called before the symbol table is processed. In order to
1476 work with gcc when using mips-tfile, we must keep all local labels.
1477 However, in other cases, we want to discard them. If we were
1478 called with -g, but we didn't see any debugging information, it may
1479 mean that gcc is smuggling debugging information through to
1480 mips-tfile, in which case we must generate all local labels. */
1485 alpha_frob_file_before_adjust ()
1487 if (alpha_debug
!= 0
1488 && ! ecoff_debugging_seen
)
1489 flag_keep_locals
= 1;
1492 #endif /* OBJ_ECOFF */
1494 /* Parse the arguments to an opcode. */
1497 tokenize_arguments (str
, tok
, ntok
)
1502 expressionS
*end_tok
= tok
+ ntok
;
1503 char *old_input_line_pointer
;
1504 int saw_comma
= 0, saw_arg
= 0;
1506 memset (tok
, 0, sizeof (*tok
) * ntok
);
1508 /* Save and restore input_line_pointer around this function */
1509 old_input_line_pointer
= input_line_pointer
;
1510 input_line_pointer
= str
;
1512 while (tok
< end_tok
&& *input_line_pointer
)
1515 switch (*input_line_pointer
)
1521 ++input_line_pointer
;
1522 if (saw_comma
|| !saw_arg
)
1529 char *hold
= input_line_pointer
++;
1531 /* First try for parenthesized register ... */
1533 if (*input_line_pointer
== ')' && tok
->X_op
== O_register
)
1535 tok
->X_op
= (saw_comma
? O_cpregister
: O_pregister
);
1538 ++input_line_pointer
;
1543 /* ... then fall through to plain expression */
1544 input_line_pointer
= hold
;
1548 if (saw_arg
&& !saw_comma
)
1551 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
1564 input_line_pointer
= old_input_line_pointer
;
1565 return ntok
- (end_tok
- tok
);
1568 input_line_pointer
= old_input_line_pointer
;
1572 /* Search forward through all variants of an opcode looking for a
1575 static const struct alpha_opcode
*
1576 find_opcode_match(first_opcode
, tok
, pntok
, pcpumatch
)
1577 const struct alpha_opcode
*first_opcode
;
1578 const expressionS
*tok
;
1582 const struct alpha_opcode
*opcode
= first_opcode
;
1584 int got_cpu_match
= 0;
1588 const unsigned char *opidx
;
1591 /* Don't match opcodes that don't exist on this architecture */
1592 if (!(opcode
->flags
& alpha_target
))
1597 for (opidx
= opcode
->operands
; *opidx
; ++opidx
)
1599 const struct alpha_operand
*operand
= &alpha_operands
[*opidx
];
1601 /* only take input from real operands */
1602 if (operand
->flags
& AXP_OPERAND_FAKE
)
1605 /* when we expect input, make sure we have it */
1608 if ((operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
) == 0)
1613 /* match operand type with expression type */
1614 switch (operand
->flags
& AXP_OPERAND_TYPECHECK_MASK
)
1616 case AXP_OPERAND_IR
:
1617 if (tok
[tokidx
].X_op
!= O_register
1618 || !is_ir_num(tok
[tokidx
].X_add_number
))
1621 case AXP_OPERAND_FPR
:
1622 if (tok
[tokidx
].X_op
!= O_register
1623 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1626 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
:
1627 if (tok
[tokidx
].X_op
!= O_pregister
1628 || !is_ir_num(tok
[tokidx
].X_add_number
))
1631 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
|AXP_OPERAND_COMMA
:
1632 if (tok
[tokidx
].X_op
!= O_cpregister
1633 || !is_ir_num(tok
[tokidx
].X_add_number
))
1637 case AXP_OPERAND_RELATIVE
:
1638 case AXP_OPERAND_SIGNED
:
1639 case AXP_OPERAND_UNSIGNED
:
1640 switch (tok
[tokidx
].X_op
)
1655 /* everything else should have been fake */
1661 /* possible match -- did we use all of our input? */
1670 while (++opcode
-alpha_opcodes
< alpha_num_opcodes
1671 && !strcmp(opcode
->name
, first_opcode
->name
));
1674 *pcpumatch
= got_cpu_match
;
1679 /* Search forward through all variants of a macro looking for a syntax
1682 static const struct alpha_macro
*
1683 find_macro_match(first_macro
, tok
, pntok
)
1684 const struct alpha_macro
*first_macro
;
1685 const expressionS
*tok
;
1688 const struct alpha_macro
*macro
= first_macro
;
1693 const enum alpha_macro_arg
*arg
= macro
->argsets
;
1708 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1709 || !is_ir_num(tok
[tokidx
].X_add_number
))
1714 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_pregister
1715 || !is_ir_num(tok
[tokidx
].X_add_number
))
1720 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_cpregister
1721 || !is_ir_num(tok
[tokidx
].X_add_number
))
1726 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1727 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1735 switch (tok
[tokidx
].X_op
)
1751 while (*arg
!= MACRO_EOA
)
1759 while (++macro
-alpha_macros
< alpha_num_macros
1760 && !strcmp(macro
->name
, first_macro
->name
));
1765 /* Insert an operand value into an instruction. */
1768 insert_operand(insn
, operand
, val
, file
, line
)
1770 const struct alpha_operand
*operand
;
1775 if (operand
->bits
!= 32 && !(operand
->flags
& AXP_OPERAND_NOOVERFLOW
))
1779 if (operand
->flags
& AXP_OPERAND_SIGNED
)
1781 max
= (1 << (operand
->bits
- 1)) - 1;
1782 min
= -(1 << (operand
->bits
- 1));
1786 max
= (1 << operand
->bits
) - 1;
1790 if (val
< min
|| val
> max
)
1793 _("operand out of range (%s not between %d and %d)");
1794 char buf
[sizeof (val
) * 3 + 2];
1796 sprint_value(buf
, val
);
1798 as_warn_where(file
, line
, err
, buf
, min
, max
);
1800 as_warn(err
, buf
, min
, max
);
1804 if (operand
->insert
)
1806 const char *errmsg
= NULL
;
1808 insn
= (*operand
->insert
) (insn
, val
, &errmsg
);
1813 insn
|= ((val
& ((1 << operand
->bits
) - 1)) << operand
->shift
);
1819 * Turn an opcode description and a set of arguments into
1820 * an instruction and a fixup.
1824 assemble_insn(opcode
, tok
, ntok
, insn
)
1825 const struct alpha_opcode
*opcode
;
1826 const expressionS
*tok
;
1828 struct alpha_insn
*insn
;
1830 const unsigned char *argidx
;
1834 memset (insn
, 0, sizeof (*insn
));
1835 image
= opcode
->opcode
;
1837 for (argidx
= opcode
->operands
; *argidx
; ++argidx
)
1839 const struct alpha_operand
*operand
= &alpha_operands
[*argidx
];
1840 const expressionS
*t
;
1842 if (operand
->flags
& AXP_OPERAND_FAKE
)
1844 /* fake operands take no value and generate no fixup */
1845 image
= insert_operand(image
, operand
, 0, NULL
, 0);
1851 switch (operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
)
1853 case AXP_OPERAND_DEFAULT_FIRST
:
1856 case AXP_OPERAND_DEFAULT_SECOND
:
1859 case AXP_OPERAND_DEFAULT_ZERO
:
1861 static const expressionS zero_exp
= { 0, 0, 0, O_constant
, 1 };
1877 image
= insert_operand(image
, operand
, regno(t
->X_add_number
),
1882 image
= insert_operand(image
, operand
, t
->X_add_number
, NULL
, 0);
1887 struct alpha_fixup
*fixup
;
1889 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
1890 as_fatal(_("too many fixups"));
1892 fixup
= &insn
->fixups
[insn
->nfixups
++];
1895 fixup
->reloc
= operand
->default_reloc
;
1905 * Actually output an instruction with its fixup.
1910 struct alpha_insn
*insn
;
1915 /* Take care of alignment duties */
1916 if (alpha_auto_align_on
&& alpha_current_align
< 2)
1917 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
1918 if (alpha_current_align
> 2)
1919 alpha_current_align
= 2;
1920 alpha_insn_label
= NULL
;
1922 /* Write out the instruction. */
1924 md_number_to_chars (f
, insn
->insn
, 4);
1926 /* Apply the fixups in order */
1927 for (i
= 0; i
< insn
->nfixups
; ++i
)
1929 const struct alpha_operand
*operand
;
1930 struct alpha_fixup
*fixup
= &insn
->fixups
[i
];
1934 /* Some fixups are only used internally and so have no howto */
1935 if ((int)fixup
->reloc
< 0)
1937 operand
= &alpha_operands
[-(int)fixup
->reloc
];
1939 pcrel
= ((operand
->flags
& AXP_OPERAND_RELATIVE
) != 0);
1942 /* These relocation types are only used internally. */
1943 else if (fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_HI16
1944 || fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_LO16
)
1946 size
= 2, pcrel
= 0;
1951 reloc_howto_type
*reloc_howto
1952 = bfd_reloc_type_lookup (stdoutput
, fixup
->reloc
);
1953 assert (reloc_howto
);
1955 size
= bfd_get_reloc_size (reloc_howto
);
1956 pcrel
= reloc_howto
->pc_relative
;
1958 assert (size
>= 1 && size
<= 4);
1960 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
, size
,
1961 &fixup
->exp
, pcrel
, fixup
->reloc
);
1963 /* Turn off complaints that the addend is too large for some fixups */
1964 switch (fixup
->reloc
)
1966 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1968 case BFD_RELOC_ALPHA_LITERAL
:
1971 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1973 case BFD_RELOC_GPREL32
:
1974 fixP
->fx_no_overflow
= 1;
1978 if ((int)fixup
->reloc
< 0)
1980 if (operand
->flags
& AXP_OPERAND_NOOVERFLOW
)
1981 fixP
->fx_no_overflow
= 1;
1988 /* Given an opcode name and a pre-tokenized set of arguments, assemble
1989 the insn, but do not emit it.
1991 Note that this implies no macros allowed, since we can't store more
1992 than one insn in an insn structure. */
1995 assemble_tokens_to_insn(opname
, tok
, ntok
, insn
)
1997 const expressionS
*tok
;
1999 struct alpha_insn
*insn
;
2001 const struct alpha_opcode
*opcode
;
2003 /* search opcodes */
2004 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2008 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2011 assemble_insn (opcode
, tok
, ntok
, insn
);
2015 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2017 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2021 as_bad (_("unknown opcode `%s'"), opname
);
2024 /* Given an opcode name and a pre-tokenized set of arguments, take the
2025 opcode all the way through emission. */
2028 assemble_tokens (opname
, tok
, ntok
, local_macros_on
)
2030 const expressionS
*tok
;
2032 int local_macros_on
;
2034 int found_something
= 0;
2035 const struct alpha_opcode
*opcode
;
2036 const struct alpha_macro
*macro
;
2040 if (local_macros_on
)
2042 macro
= ((const struct alpha_macro
*)
2043 hash_find (alpha_macro_hash
, opname
));
2046 found_something
= 1;
2047 macro
= find_macro_match (macro
, tok
, &ntok
);
2050 (*macro
->emit
) (tok
, ntok
, macro
->arg
);
2056 /* search opcodes */
2057 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2060 found_something
= 1;
2061 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2064 struct alpha_insn insn
;
2065 assemble_insn (opcode
, tok
, ntok
, &insn
);
2071 if (found_something
)
2073 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2075 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2078 as_bad (_("unknown opcode `%s'"), opname
);
2082 /* Some instruction sets indexed by lg(size) */
2083 static const char * const sextX_op
[] = { "sextb", "sextw", "sextl", NULL
};
2084 static const char * const insXl_op
[] = { "insbl", "inswl", "insll", "insql" };
2085 static const char * const insXh_op
[] = { NULL
, "inswh", "inslh", "insqh" };
2086 static const char * const extXl_op
[] = { "extbl", "extwl", "extll", "extql" };
2087 static const char * const extXh_op
[] = { NULL
, "extwh", "extlh", "extqh" };
2088 static const char * const mskXl_op
[] = { "mskbl", "mskwl", "mskll", "mskql" };
2089 static const char * const mskXh_op
[] = { NULL
, "mskwh", "msklh", "mskqh" };
2090 static const char * const stX_op
[] = { "stb", "stw", "stl", "stq" };
2091 static const char * const ldX_op
[] = { "ldb", "ldw", "ldll", "ldq" };
2092 static const char * const ldXu_op
[] = { "ldbu", "ldwu", NULL
, NULL
};
2094 /* Implement the ldgp macro. */
2097 emit_ldgp (tok
, ntok
, unused
)
2098 const expressionS
*tok
;
2105 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2106 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2107 with appropriate constants and relocations. */
2108 struct alpha_insn insn
;
2109 expressionS newtok
[3];
2112 /* We're going to need this symbol in md_apply_fix(). */
2113 (void) section_symbol (absolute_section
);
2116 if (regno (tok
[2].X_add_number
) == AXP_REG_PV
)
2117 ecoff_set_gp_prolog_size (0);
2121 set_tok_const (newtok
[1], 0);
2124 assemble_tokens_to_insn ("ldah", newtok
, 3, &insn
);
2129 if (addend
.X_op
!= O_constant
)
2130 as_bad (_("can not resolve expression"));
2131 addend
.X_op
= O_symbol
;
2132 addend
.X_add_symbol
= alpha_gp_symbol
;
2136 insn
.fixups
[0].exp
= addend
;
2137 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_HI16
;
2141 set_tok_preg (newtok
[2], tok
[0].X_add_number
);
2143 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2146 addend
.X_add_number
+= 4;
2150 insn
.fixups
[0].exp
= addend
;
2151 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_LO16
;
2154 #endif /* OBJ_ECOFF || OBJ_ELF */
2159 /* Add symbol+addend to link pool.
2160 Return offset from basesym to entry in link pool.
2162 Add new fixup only if offset isn't 16bit. */
2165 add_to_link_pool (basesym
, sym
, addend
)
2170 segT current_section
= now_seg
;
2171 int current_subsec
= now_subseg
;
2173 bfd_reloc_code_real_type reloc_type
;
2175 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
2178 offset
= -basesym
->sy_obj
;
2180 /* @@ This assumes all entries in a given section will be of the same
2181 size... Probably correct, but unwise to rely on. */
2182 /* This must always be called with the same subsegment. */
2184 if (seginfo
->frchainP
)
2185 for (fixp
= seginfo
->frchainP
->fix_root
;
2186 fixp
!= (fixS
*) NULL
;
2187 fixp
= fixp
->fx_next
, offset
+= 8)
2189 if (fixp
->fx_addsy
== sym
&& fixp
->fx_offset
== addend
)
2191 if (range_signed_16 (offset
))
2198 /* Not found in 16bit signed range. */
2200 subseg_set (alpha_link_section
, 0);
2204 fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, sym
, addend
, 0,
2207 subseg_set (current_section
, current_subsec
);
2208 seginfo
->literal_pool_size
+= 8;
2212 #endif /* OBJ_EVAX */
2214 /* Load a (partial) expression into a target register.
2216 If poffset is not null, after the call it will either contain
2217 O_constant 0, or a 16-bit offset appropriate for any MEM format
2218 instruction. In addition, pbasereg will be modified to point to
2219 the base register to use in that MEM format instruction.
2221 In any case, *pbasereg should contain a base register to add to the
2222 expression. This will normally be either AXP_REG_ZERO or
2223 alpha_gp_register. Symbol addresses will always be loaded via $gp,
2224 so "foo($0)" is interpreted as adding the address of foo to $0;
2225 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
2226 but this is what OSF/1 does.
2228 Finally, the return value is true if the calling macro may emit a
2229 LITUSE reloc if otherwise appropriate. */
2232 load_expression (targreg
, exp
, pbasereg
, poffset
)
2234 const expressionS
*exp
;
2236 expressionS
*poffset
;
2238 int emit_lituse
= 0;
2239 offsetT addend
= exp
->X_add_number
;
2240 int basereg
= *pbasereg
;
2241 struct alpha_insn insn
;
2242 expressionS newtok
[3];
2251 /* attempt to reduce .lit load by splitting the offset from
2252 its symbol when possible, but don't create a situation in
2254 if (!range_signed_32 (addend
) &&
2255 (alpha_noat_on
|| targreg
== AXP_REG_AT
))
2257 lit
= add_to_literal_pool (exp
->X_add_symbol
, addend
,
2258 alpha_lita_section
, 8);
2263 lit
= add_to_literal_pool (exp
->X_add_symbol
, 0,
2264 alpha_lita_section
, 8);
2268 as_fatal (_("overflow in literal (.lita) table"));
2270 /* emit "ldq r, lit(gp)" */
2272 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2275 as_bad (_("macro requires $at register while noat in effect"));
2276 if (targreg
== AXP_REG_AT
)
2277 as_bad (_("macro requires $at while $at in use"));
2279 set_tok_reg (newtok
[0], AXP_REG_AT
);
2282 set_tok_reg (newtok
[0], targreg
);
2283 set_tok_sym (newtok
[1], alpha_lita_symbol
, lit
);
2284 set_tok_preg (newtok
[2], alpha_gp_register
);
2286 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2288 assert (insn
.nfixups
== 1);
2289 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2290 #endif /* OBJ_ECOFF */
2292 /* emit "ldq r, gotoff(gp)" */
2294 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2297 as_bad (_("macro requires $at register while noat in effect"));
2298 if (targreg
== AXP_REG_AT
)
2299 as_bad (_("macro requires $at while $at in use"));
2301 set_tok_reg (newtok
[0], AXP_REG_AT
);
2304 set_tok_reg (newtok
[0], targreg
);
2306 /* XXX: Disable this .got minimizing optimization so that we can get
2307 better instruction offset knowledge in the compiler. This happens
2308 very infrequently anyway. */
2309 if (1 || (!range_signed_32 (addend
)
2310 && (alpha_noat_on
|| targreg
== AXP_REG_AT
)))
2317 set_tok_sym (newtok
[1], exp
->X_add_symbol
, 0);
2320 set_tok_preg (newtok
[2], alpha_gp_register
);
2322 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2324 assert (insn
.nfixups
== 1);
2325 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2326 #endif /* OBJ_ELF */
2330 /* Find symbol or symbol pointer in link section. */
2332 if (exp
->X_add_symbol
== alpha_evax_proc
.symbol
)
2334 if (range_signed_16 (addend
))
2336 set_tok_reg (newtok
[0], targreg
);
2337 set_tok_const (newtok
[1], addend
);
2338 set_tok_preg (newtok
[2], basereg
);
2339 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2344 set_tok_reg (newtok
[0], targreg
);
2345 set_tok_const (newtok
[1], 0);
2346 set_tok_preg (newtok
[2], basereg
);
2347 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2352 if (!range_signed_32 (addend
))
2354 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2355 exp
->X_add_symbol
, addend
);
2360 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2361 exp
->X_add_symbol
, 0);
2363 set_tok_reg (newtok
[0], targreg
);
2364 set_tok_const (newtok
[1], link
);
2365 set_tok_preg (newtok
[2], basereg
);
2366 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2368 #endif /* OBJ_EVAX */
2375 if (basereg
!= alpha_gp_register
&& basereg
!= AXP_REG_ZERO
)
2377 /* emit "addq r, base, r" */
2379 set_tok_reg (newtok
[1], basereg
);
2380 set_tok_reg (newtok
[2], targreg
);
2381 assemble_tokens ("addq", newtok
, 3, 0);
2393 /* Assume that this difference expression will be resolved to an
2394 absolute value and that that value will fit in 16 bits. */
2396 set_tok_reg (newtok
[0], targreg
);
2398 set_tok_preg (newtok
[2], basereg
);
2399 assemble_tokens ("lda", newtok
, 3, 0);
2402 set_tok_const (*poffset
, 0);
2406 if (exp
->X_add_number
> 0)
2407 as_bad (_("bignum invalid; zero assumed"));
2409 as_bad (_("floating point number invalid; zero assumed"));
2414 as_bad (_("can't handle expression"));
2419 if (!range_signed_32 (addend
))
2423 /* for 64-bit addends, just put it in the literal pool */
2426 /* emit "ldq targreg, lit(basereg)" */
2427 lit
= add_to_link_pool (alpha_evax_proc
.symbol
,
2428 section_symbol (absolute_section
), addend
);
2429 set_tok_reg (newtok
[0], targreg
);
2430 set_tok_const (newtok
[1], lit
);
2431 set_tok_preg (newtok
[2], alpha_gp_register
);
2432 assemble_tokens ("ldq", newtok
, 3, 0);
2435 if (alpha_lit8_section
== NULL
)
2437 create_literal_section (".lit8",
2438 &alpha_lit8_section
,
2439 &alpha_lit8_symbol
);
2442 alpha_lit8_literal
= add_to_literal_pool (alpha_lit8_symbol
, 0x8000,
2443 alpha_lita_section
, 8);
2444 if (alpha_lit8_literal
>= 0x8000)
2445 as_fatal (_("overflow in literal (.lita) table"));
2449 lit
= add_to_literal_pool (NULL
, addend
, alpha_lit8_section
, 8) - 0x8000;
2451 as_fatal (_("overflow in literal (.lit8) table"));
2453 /* emit "lda litreg, .lit8+0x8000" */
2455 if (targreg
== basereg
)
2458 as_bad (_("macro requires $at register while noat in effect"));
2459 if (targreg
== AXP_REG_AT
)
2460 as_bad (_("macro requires $at while $at in use"));
2462 set_tok_reg (newtok
[0], AXP_REG_AT
);
2465 set_tok_reg (newtok
[0], targreg
);
2467 set_tok_sym (newtok
[1], alpha_lita_symbol
, alpha_lit8_literal
);
2470 set_tok_sym (newtok
[1], alpha_lit8_symbol
, 0x8000);
2472 set_tok_preg (newtok
[2], alpha_gp_register
);
2474 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2476 assert (insn
.nfixups
== 1);
2478 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2481 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2486 /* emit "ldq litreg, lit(litreg)" */
2488 set_tok_const (newtok
[1], lit
);
2489 set_tok_preg (newtok
[2], newtok
[0].X_add_number
);
2491 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2493 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2494 if (insn
.nfixups
> 0)
2496 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2497 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2500 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2501 insn
.fixups
[0].exp
.X_op
= O_constant
;
2502 insn
.fixups
[0].exp
.X_add_number
= 1;
2507 /* emit "addq litreg, base, target" */
2509 if (basereg
!= AXP_REG_ZERO
)
2511 set_tok_reg (newtok
[1], basereg
);
2512 set_tok_reg (newtok
[2], targreg
);
2513 assemble_tokens ("addq", newtok
, 3, 0);
2515 #endif /* !OBJ_EVAX */
2518 set_tok_const (*poffset
, 0);
2519 *pbasereg
= targreg
;
2523 offsetT low
, high
, extra
, tmp
;
2525 /* for 32-bit operands, break up the addend */
2527 low
= sign_extend_16 (addend
);
2529 high
= sign_extend_16 (tmp
>> 16);
2531 if (tmp
- (high
<< 16))
2535 high
= sign_extend_16 (tmp
>> 16);
2540 set_tok_reg (newtok
[0], targreg
);
2541 set_tok_preg (newtok
[2], basereg
);
2545 /* emit "ldah r, extra(r) */
2546 set_tok_const (newtok
[1], extra
);
2547 assemble_tokens ("ldah", newtok
, 3, 0);
2548 set_tok_preg (newtok
[2], basereg
= targreg
);
2553 /* emit "ldah r, high(r) */
2554 set_tok_const (newtok
[1], high
);
2555 assemble_tokens ("ldah", newtok
, 3, 0);
2557 set_tok_preg (newtok
[2], basereg
);
2560 if ((low
&& !poffset
) || (!poffset
&& basereg
!= targreg
))
2562 /* emit "lda r, low(base)" */
2563 set_tok_const (newtok
[1], low
);
2564 assemble_tokens ("lda", newtok
, 3, 0);
2570 set_tok_const (*poffset
, low
);
2571 *pbasereg
= basereg
;
2577 /* The lda macro differs from the lda instruction in that it handles
2578 most simple expressions, particualrly symbol address loads and
2582 emit_lda (tok
, ntok
, unused
)
2583 const expressionS
*tok
;
2590 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2592 basereg
= tok
[2].X_add_number
;
2594 (void) load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
, NULL
);
2597 /* The ldah macro differs from the ldah instruction in that it has $31
2598 as an implied base register. */
2601 emit_ldah (tok
, ntok
, unused
)
2602 const expressionS
*tok
;
2606 expressionS newtok
[3];
2610 set_tok_preg (newtok
[2], AXP_REG_ZERO
);
2612 assemble_tokens ("ldah", newtok
, 3, 0);
2615 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2616 etc. They differ from the real instructions in that they do simple
2617 expressions like the lda macro. */
2620 emit_ir_load (tok
, ntok
, opname
)
2621 const expressionS
*tok
;
2625 int basereg
, lituse
;
2626 expressionS newtok
[3];
2627 struct alpha_insn insn
;
2630 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2632 basereg
= tok
[2].X_add_number
;
2634 lituse
= load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
,
2638 set_tok_preg (newtok
[2], basereg
);
2640 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2644 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2645 if (insn
.nfixups
> 0)
2647 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2648 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2651 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2652 insn
.fixups
[0].exp
.X_op
= O_constant
;
2653 insn
.fixups
[0].exp
.X_add_number
= 1;
2659 /* Handle fp register loads, and both integer and fp register stores.
2660 Again, we handle simple expressions. */
2663 emit_loadstore (tok
, ntok
, opname
)
2664 const expressionS
*tok
;
2668 int basereg
, lituse
;
2669 expressionS newtok
[3];
2670 struct alpha_insn insn
;
2673 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2675 basereg
= tok
[2].X_add_number
;
2677 if (tok
[1].X_op
!= O_constant
|| !range_signed_16(tok
[1].X_add_number
))
2680 as_bad (_("macro requires $at register while noat in effect"));
2682 lituse
= load_expression (AXP_REG_AT
, &tok
[1], &basereg
, &newtok
[1]);
2691 set_tok_preg (newtok
[2], basereg
);
2693 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2697 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2698 if (insn
.nfixups
> 0)
2700 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2701 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2704 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2705 insn
.fixups
[0].exp
.X_op
= O_constant
;
2706 insn
.fixups
[0].exp
.X_add_number
= 1;
2712 /* Load a half-word or byte as an unsigned value. */
2715 emit_ldXu (tok
, ntok
, vlgsize
)
2716 const expressionS
*tok
;
2720 if (alpha_target
& AXP_OPCODE_BWX
)
2721 emit_ir_load (tok
, ntok
, ldXu_op
[(long)vlgsize
]);
2724 expressionS newtok
[3];
2727 as_bad (_("macro requires $at register while noat in effect"));
2729 /* emit "lda $at, exp" */
2731 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2732 newtok
[0].X_add_number
= AXP_REG_AT
;
2733 assemble_tokens ("lda", newtok
, ntok
, 1);
2735 /* emit "ldq_u targ, 0($at)" */
2738 set_tok_const (newtok
[1], 0);
2739 set_tok_preg (newtok
[2], AXP_REG_AT
);
2740 assemble_tokens ("ldq_u", newtok
, 3, 1);
2742 /* emit "extXl targ, $at, targ" */
2744 set_tok_reg (newtok
[1], AXP_REG_AT
);
2745 newtok
[2] = newtok
[0];
2746 assemble_tokens (extXl_op
[(long)vlgsize
], newtok
, 3, 1);
2750 /* Load a half-word or byte as a signed value. */
2753 emit_ldX (tok
, ntok
, vlgsize
)
2754 const expressionS
*tok
;
2758 emit_ldXu (tok
, ntok
, vlgsize
);
2759 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2762 /* Load an integral value from an unaligned address as an unsigned
2766 emit_uldXu (tok
, ntok
, vlgsize
)
2767 const expressionS
*tok
;
2771 long lgsize
= (long)vlgsize
;
2772 expressionS newtok
[3];
2775 as_bad (_("macro requires $at register while noat in effect"));
2777 /* emit "lda $at, exp" */
2779 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2780 newtok
[0].X_add_number
= AXP_REG_AT
;
2781 assemble_tokens ("lda", newtok
, ntok
, 1);
2783 /* emit "ldq_u $t9, 0($at)" */
2785 set_tok_reg (newtok
[0], AXP_REG_T9
);
2786 set_tok_const (newtok
[1], 0);
2787 set_tok_preg (newtok
[2], AXP_REG_AT
);
2788 assemble_tokens ("ldq_u", newtok
, 3, 1);
2790 /* emit "ldq_u $t10, size-1($at)" */
2792 set_tok_reg (newtok
[0], AXP_REG_T10
);
2793 set_tok_const (newtok
[1], (1<<lgsize
)-1);
2794 assemble_tokens ("ldq_u", newtok
, 3, 1);
2796 /* emit "extXl $t9, $at, $t9" */
2798 set_tok_reg (newtok
[0], AXP_REG_T9
);
2799 set_tok_reg (newtok
[1], AXP_REG_AT
);
2800 set_tok_reg (newtok
[2], AXP_REG_T9
);
2801 assemble_tokens (extXl_op
[lgsize
], newtok
, 3, 1);
2803 /* emit "extXh $t10, $at, $t10" */
2805 set_tok_reg (newtok
[0], AXP_REG_T10
);
2806 set_tok_reg (newtok
[2], AXP_REG_T10
);
2807 assemble_tokens (extXh_op
[lgsize
], newtok
, 3, 1);
2809 /* emit "or $t9, $t10, targ" */
2811 set_tok_reg (newtok
[0], AXP_REG_T9
);
2812 set_tok_reg (newtok
[1], AXP_REG_T10
);
2814 assemble_tokens ("or", newtok
, 3, 1);
2817 /* Load an integral value from an unaligned address as a signed value.
2818 Note that quads should get funneled to the unsigned load since we
2819 don't have to do the sign extension. */
2822 emit_uldX (tok
, ntok
, vlgsize
)
2823 const expressionS
*tok
;
2827 emit_uldXu (tok
, ntok
, vlgsize
);
2828 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2831 /* Implement the ldil macro. */
2834 emit_ldil (tok
, ntok
, unused
)
2835 const expressionS
*tok
;
2839 expressionS newtok
[2];
2841 memcpy (newtok
, tok
, sizeof(newtok
));
2842 newtok
[1].X_add_number
= sign_extend_32 (tok
[1].X_add_number
);
2844 assemble_tokens ("lda", newtok
, ntok
, 1);
2847 /* Store a half-word or byte. */
2850 emit_stX (tok
, ntok
, vlgsize
)
2851 const expressionS
*tok
;
2855 int lgsize
= (int)(long)vlgsize
;
2857 if (alpha_target
& AXP_OPCODE_BWX
)
2858 emit_loadstore (tok
, ntok
, stX_op
[lgsize
]);
2861 expressionS newtok
[3];
2864 as_bad(_("macro requires $at register while noat in effect"));
2866 /* emit "lda $at, exp" */
2868 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2869 newtok
[0].X_add_number
= AXP_REG_AT
;
2870 assemble_tokens ("lda", newtok
, ntok
, 1);
2872 /* emit "ldq_u $t9, 0($at)" */
2874 set_tok_reg (newtok
[0], AXP_REG_T9
);
2875 set_tok_const (newtok
[1], 0);
2876 set_tok_preg (newtok
[2], AXP_REG_AT
);
2877 assemble_tokens ("ldq_u", newtok
, 3, 1);
2879 /* emit "insXl src, $at, $t10" */
2882 set_tok_reg (newtok
[1], AXP_REG_AT
);
2883 set_tok_reg (newtok
[2], AXP_REG_T10
);
2884 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2886 /* emit "mskXl $t9, $at, $t9" */
2888 set_tok_reg (newtok
[0], AXP_REG_T9
);
2889 newtok
[2] = newtok
[0];
2890 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2892 /* emit "or $t9, $t10, $t9" */
2894 set_tok_reg (newtok
[1], AXP_REG_T10
);
2895 assemble_tokens ("or", newtok
, 3, 1);
2897 /* emit "stq_u $t9, 0($at) */
2899 set_tok_const (newtok
[1], 0);
2900 set_tok_preg (newtok
[2], AXP_REG_AT
);
2901 assemble_tokens ("stq_u", newtok
, 3, 1);
2905 /* Store an integer to an unaligned address. */
2908 emit_ustX (tok
, ntok
, vlgsize
)
2909 const expressionS
*tok
;
2913 int lgsize
= (int)(long)vlgsize
;
2914 expressionS newtok
[3];
2916 /* emit "lda $at, exp" */
2918 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2919 newtok
[0].X_add_number
= AXP_REG_AT
;
2920 assemble_tokens ("lda", newtok
, ntok
, 1);
2922 /* emit "ldq_u $9, 0($at)" */
2924 set_tok_reg (newtok
[0], AXP_REG_T9
);
2925 set_tok_const (newtok
[1], 0);
2926 set_tok_preg (newtok
[2], AXP_REG_AT
);
2927 assemble_tokens ("ldq_u", newtok
, 3, 1);
2929 /* emit "ldq_u $10, size-1($at)" */
2931 set_tok_reg (newtok
[0], AXP_REG_T10
);
2932 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2933 assemble_tokens ("ldq_u", newtok
, 3, 1);
2935 /* emit "insXl src, $at, $t11" */
2938 set_tok_reg (newtok
[1], AXP_REG_AT
);
2939 set_tok_reg (newtok
[2], AXP_REG_T11
);
2940 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2942 /* emit "insXh src, $at, $t12" */
2944 set_tok_reg (newtok
[2], AXP_REG_T12
);
2945 assemble_tokens (insXh_op
[lgsize
], newtok
, 3, 1);
2947 /* emit "mskXl $t9, $at, $t9" */
2949 set_tok_reg (newtok
[0], AXP_REG_T9
);
2950 newtok
[2] = newtok
[0];
2951 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2953 /* emit "mskXh $t10, $at, $t10" */
2955 set_tok_reg (newtok
[0], AXP_REG_T10
);
2956 newtok
[2] = newtok
[0];
2957 assemble_tokens (mskXh_op
[lgsize
], newtok
, 3, 1);
2959 /* emit "or $t9, $t11, $t9" */
2961 set_tok_reg (newtok
[0], AXP_REG_T9
);
2962 set_tok_reg (newtok
[1], AXP_REG_T11
);
2963 newtok
[2] = newtok
[0];
2964 assemble_tokens ("or", newtok
, 3, 1);
2966 /* emit "or $t10, $t12, $t10" */
2968 set_tok_reg (newtok
[0], AXP_REG_T10
);
2969 set_tok_reg (newtok
[1], AXP_REG_T12
);
2970 newtok
[2] = newtok
[0];
2971 assemble_tokens ("or", newtok
, 3, 1);
2973 /* emit "stq_u $t9, 0($at)" */
2975 set_tok_reg (newtok
[0], AXP_REG_T9
);
2976 set_tok_const (newtok
[1], 0);
2977 set_tok_preg (newtok
[2], AXP_REG_AT
);
2978 assemble_tokens ("stq_u", newtok
, 3, 1);
2980 /* emit "stq_u $t10, size-1($at)" */
2982 set_tok_reg (newtok
[0], AXP_REG_T10
);
2983 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2984 assemble_tokens ("stq_u", newtok
, 3, 1);
2987 /* Sign extend a half-word or byte. The 32-bit sign extend is
2988 implemented as "addl $31, $r, $t" in the opcode table. */
2991 emit_sextX (tok
, ntok
, vlgsize
)
2992 const expressionS
*tok
;
2996 long lgsize
= (long)vlgsize
;
2998 if (alpha_target
& AXP_OPCODE_BWX
)
2999 assemble_tokens (sextX_op
[lgsize
], tok
, ntok
, 0);
3002 int bitshift
= 64 - 8 * (1 << lgsize
);
3003 expressionS newtok
[3];
3005 /* emit "sll src,bits,dst" */
3008 set_tok_const (newtok
[1], bitshift
);
3009 newtok
[2] = tok
[ntok
- 1];
3010 assemble_tokens ("sll", newtok
, 3, 1);
3012 /* emit "sra dst,bits,dst" */
3014 newtok
[0] = newtok
[2];
3015 assemble_tokens ("sra", newtok
, 3, 1);
3019 /* Implement the division and modulus macros. */
3023 /* Make register usage like in normal procedure call.
3024 Don't clobber PV and RA. */
3027 emit_division (tok
, ntok
, symname
)
3028 const expressionS
*tok
;
3032 /* DIVISION and MODULUS. Yech.
3037 * mov x,R16 # if x != R16
3038 * mov y,R17 # if y != R17
3043 * with appropriate optimizations if R0,R16,R17 are the registers
3044 * specified by the compiler.
3049 expressionS newtok
[3];
3051 xr
= regno (tok
[0].X_add_number
);
3052 yr
= regno (tok
[1].X_add_number
);
3057 rr
= regno (tok
[2].X_add_number
);
3059 /* Move the operands into the right place */
3060 if (yr
== AXP_REG_R16
&& xr
== AXP_REG_R17
)
3062 /* They are in exactly the wrong order -- swap through AT */
3065 as_bad (_("macro requires $at register while noat in effect"));
3067 set_tok_reg (newtok
[0], AXP_REG_R16
);
3068 set_tok_reg (newtok
[1], AXP_REG_AT
);
3069 assemble_tokens ("mov", newtok
, 2, 1);
3071 set_tok_reg (newtok
[0], AXP_REG_R17
);
3072 set_tok_reg (newtok
[1], AXP_REG_R16
);
3073 assemble_tokens ("mov", newtok
, 2, 1);
3075 set_tok_reg (newtok
[0], AXP_REG_AT
);
3076 set_tok_reg (newtok
[1], AXP_REG_R17
);
3077 assemble_tokens ("mov", newtok
, 2, 1);
3081 if (yr
== AXP_REG_R16
)
3083 set_tok_reg (newtok
[0], AXP_REG_R16
);
3084 set_tok_reg (newtok
[1], AXP_REG_R17
);
3085 assemble_tokens ("mov", newtok
, 2, 1);
3088 if (xr
!= AXP_REG_R16
)
3090 set_tok_reg (newtok
[0], xr
);
3091 set_tok_reg (newtok
[1], AXP_REG_R16
);
3092 assemble_tokens ("mov", newtok
, 2, 1);
3095 if (yr
!= AXP_REG_R16
&& yr
!= AXP_REG_R17
)
3097 set_tok_reg (newtok
[0], yr
);
3098 set_tok_reg (newtok
[1], AXP_REG_R17
);
3099 assemble_tokens ("mov", newtok
, 2, 1);
3103 sym
= symbol_find_or_make ((const char *)symname
);
3105 set_tok_reg (newtok
[0], AXP_REG_AT
);
3106 set_tok_sym (newtok
[1], sym
, 0);
3107 assemble_tokens ("lda", newtok
, 2, 1);
3109 /* Call the division routine */
3110 set_tok_reg (newtok
[0], AXP_REG_AT
);
3111 set_tok_cpreg (newtok
[1], AXP_REG_AT
);
3112 set_tok_const (newtok
[2], 0);
3113 assemble_tokens ("jsr", newtok
, 3, 1);
3115 /* Move the result to the right place */
3116 if (rr
!= AXP_REG_R0
)
3118 set_tok_reg (newtok
[0], AXP_REG_R0
);
3119 set_tok_reg (newtok
[1], rr
);
3120 assemble_tokens ("mov", newtok
, 2, 1);
3124 #else /* !OBJ_EVAX */
3127 emit_division (tok
, ntok
, symname
)
3128 const expressionS
*tok
;
3132 /* DIVISION and MODULUS. Yech.
3142 * with appropriate optimizations if t10,t11,t12 are the registers
3143 * specified by the compiler.
3148 expressionS newtok
[3];
3150 xr
= regno (tok
[0].X_add_number
);
3151 yr
= regno (tok
[1].X_add_number
);
3156 rr
= regno (tok
[2].X_add_number
);
3158 sym
= symbol_find_or_make ((const char *)symname
);
3160 /* Move the operands into the right place */
3161 if (yr
== AXP_REG_T10
&& xr
== AXP_REG_T11
)
3163 /* They are in exactly the wrong order -- swap through AT */
3166 as_bad (_("macro requires $at register while noat in effect"));
3168 set_tok_reg (newtok
[0], AXP_REG_T10
);
3169 set_tok_reg (newtok
[1], AXP_REG_AT
);
3170 assemble_tokens ("mov", newtok
, 2, 1);
3172 set_tok_reg (newtok
[0], AXP_REG_T11
);
3173 set_tok_reg (newtok
[1], AXP_REG_T10
);
3174 assemble_tokens ("mov", newtok
, 2, 1);
3176 set_tok_reg (newtok
[0], AXP_REG_AT
);
3177 set_tok_reg (newtok
[1], AXP_REG_T11
);
3178 assemble_tokens ("mov", newtok
, 2, 1);
3182 if (yr
== AXP_REG_T10
)
3184 set_tok_reg (newtok
[0], AXP_REG_T10
);
3185 set_tok_reg (newtok
[1], AXP_REG_T11
);
3186 assemble_tokens ("mov", newtok
, 2, 1);
3189 if (xr
!= AXP_REG_T10
)
3191 set_tok_reg (newtok
[0], xr
);
3192 set_tok_reg (newtok
[1], AXP_REG_T10
);
3193 assemble_tokens ("mov", newtok
, 2, 1);
3196 if (yr
!= AXP_REG_T10
&& yr
!= AXP_REG_T11
)
3198 set_tok_reg (newtok
[0], yr
);
3199 set_tok_reg (newtok
[1], AXP_REG_T11
);
3200 assemble_tokens ("mov", newtok
, 2, 1);
3204 /* Call the division routine */
3205 set_tok_reg (newtok
[0], AXP_REG_T9
);
3206 set_tok_sym (newtok
[1], sym
, 0);
3207 assemble_tokens ("jsr", newtok
, 2, 1);
3209 /* Reload the GP register */
3213 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
3214 set_tok_reg (newtok
[0], alpha_gp_register
);
3215 set_tok_const (newtok
[1], 0);
3216 set_tok_preg (newtok
[2], AXP_REG_T9
);
3217 assemble_tokens ("ldgp", newtok
, 3, 1);
3220 /* Move the result to the right place */
3221 if (rr
!= AXP_REG_T12
)
3223 set_tok_reg (newtok
[0], AXP_REG_T12
);
3224 set_tok_reg (newtok
[1], rr
);
3225 assemble_tokens ("mov", newtok
, 2, 1);
3229 #endif /* !OBJ_EVAX */
3231 /* The jsr and jmp macros differ from their instruction counterparts
3232 in that they can load the target address and default most
3236 emit_jsrjmp (tok
, ntok
, vopname
)
3237 const expressionS
*tok
;
3241 const char *opname
= (const char *) vopname
;
3242 struct alpha_insn insn
;
3243 expressionS newtok
[3];
3244 int r
, tokidx
= 0, lituse
= 0;
3246 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3247 r
= regno (tok
[tokidx
++].X_add_number
);
3249 r
= strcmp (opname
, "jmp") == 0 ? AXP_REG_ZERO
: AXP_REG_RA
;
3251 set_tok_reg (newtok
[0], r
);
3253 if (tokidx
< ntok
&&
3254 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3255 r
= regno (tok
[tokidx
++].X_add_number
);
3257 /* keep register if jsr $n.<sym> */
3261 int basereg
= alpha_gp_register
;
3262 lituse
= load_expression (r
= AXP_REG_PV
, &tok
[tokidx
], &basereg
, NULL
);
3266 set_tok_cpreg (newtok
[1], r
);
3269 /* FIXME: Add hint relocs to BFD for evax. */
3272 newtok
[2] = tok
[tokidx
];
3275 set_tok_const (newtok
[2], 0);
3277 assemble_tokens_to_insn (opname
, newtok
, 3, &insn
);
3279 /* add the LITUSE fixup */
3282 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3283 if (insn
.nfixups
> 0)
3285 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
3286 sizeof(struct alpha_fixup
) * insn
.nfixups
);
3289 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
3290 insn
.fixups
[0].exp
.X_op
= O_constant
;
3291 insn
.fixups
[0].exp
.X_add_number
= 3;
3297 /* The ret and jcr instructions differ from their instruction
3298 counterparts in that everything can be defaulted. */
3301 emit_retjcr (tok
, ntok
, vopname
)
3302 const expressionS
*tok
;
3306 const char *opname
= (const char *)vopname
;
3307 expressionS newtok
[3];
3310 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3311 r
= regno (tok
[tokidx
++].X_add_number
);
3315 set_tok_reg (newtok
[0], r
);
3317 if (tokidx
< ntok
&&
3318 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3319 r
= regno (tok
[tokidx
++].X_add_number
);
3323 set_tok_cpreg (newtok
[1], r
);
3326 newtok
[2] = tok
[tokidx
];
3328 set_tok_const (newtok
[2], strcmp(opname
, "ret") == 0);
3330 assemble_tokens (opname
, newtok
, 3, 0);
3333 /* Assembler directives */
3335 /* Handle the .text pseudo-op. This is like the usual one, but it
3336 clears alpha_insn_label and restores auto alignment. */
3344 alpha_insn_label
= NULL
;
3345 alpha_auto_align_on
= 1;
3346 alpha_current_align
= 0;
3349 /* Handle the .data pseudo-op. This is like the usual one, but it
3350 clears alpha_insn_label and restores auto alignment. */
3357 alpha_insn_label
= NULL
;
3358 alpha_auto_align_on
= 1;
3359 alpha_current_align
= 0;
3362 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
3364 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
3365 openVMS constructs a section for every common symbol. */
3368 s_alpha_comm (ignore
)
3371 register char *name
;
3375 register symbolS
*symbolP
;
3378 segT current_section
= now_seg
;
3379 int current_subsec
= now_subseg
;
3383 name
= input_line_pointer
;
3384 c
= get_symbol_end ();
3386 /* just after name is now '\0' */
3387 p
= input_line_pointer
;
3392 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3393 if (*input_line_pointer
== ',')
3395 input_line_pointer
++;
3398 if ((temp
= get_absolute_expression ()) < 0)
3400 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
3401 ignore_rest_of_line ();
3406 symbolP
= symbol_find_or_make (name
);
3409 /* Make a section for the common symbol. */
3410 new_seg
= subseg_new (xstrdup (name
), 0);
3416 /* alignment might follow */
3417 if (*input_line_pointer
== ',')
3421 input_line_pointer
++;
3422 align
= get_absolute_expression ();
3423 bfd_set_section_alignment (stdoutput
, new_seg
, align
);
3427 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
3429 as_bad (_("Ignoring attempt to re-define symbol"));
3430 ignore_rest_of_line ();
3435 if (bfd_section_size (stdoutput
, new_seg
) > 0)
3437 if (bfd_section_size (stdoutput
, new_seg
) != temp
)
3438 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3439 S_GET_NAME (symbolP
),
3440 (long) bfd_section_size (stdoutput
, new_seg
),
3444 if (S_GET_VALUE (symbolP
))
3446 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
3447 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3448 S_GET_NAME (symbolP
),
3449 (long) S_GET_VALUE (symbolP
),
3456 subseg_set (new_seg
, 0);
3457 p
= frag_more (temp
);
3458 new_seg
->flags
|= SEC_IS_COMMON
;
3459 if (! S_IS_DEFINED (symbolP
))
3460 symbolP
->bsym
->section
= new_seg
;
3462 S_SET_VALUE (symbolP
, (valueT
) temp
);
3464 S_SET_EXTERNAL (symbolP
);
3468 subseg_set (current_section
, current_subsec
);
3471 know (symbolP
->sy_frag
== &zero_address_frag
);
3473 demand_empty_rest_of_line ();
3476 #endif /* ! OBJ_ELF */
3480 /* Handle the .rdata pseudo-op. This is like the usual one, but it
3481 clears alpha_insn_label and restores auto alignment. */
3484 s_alpha_rdata (ignore
)
3489 temp
= get_absolute_expression ();
3490 subseg_new (".rdata", 0);
3491 demand_empty_rest_of_line ();
3492 alpha_insn_label
= NULL
;
3493 alpha_auto_align_on
= 1;
3494 alpha_current_align
= 0;
3501 /* Handle the .sdata pseudo-op. This is like the usual one, but it
3502 clears alpha_insn_label and restores auto alignment. */
3505 s_alpha_sdata (ignore
)
3510 temp
= get_absolute_expression ();
3511 subseg_new (".sdata", 0);
3512 demand_empty_rest_of_line ();
3513 alpha_insn_label
= NULL
;
3514 alpha_auto_align_on
= 1;
3515 alpha_current_align
= 0;
3521 /* Handle the .section pseudo-op. This is like the usual one, but it
3522 clears alpha_insn_label and restores auto alignment. */
3525 s_alpha_section (ignore
)
3528 obj_elf_section (ignore
);
3530 alpha_insn_label
= NULL
;
3531 alpha_auto_align_on
= 1;
3532 alpha_current_align
= 0;
3539 if (ECOFF_DEBUGGING
)
3540 ecoff_directive_ent (0);
3543 char *name
, name_end
;
3544 name
= input_line_pointer
;
3545 name_end
= get_symbol_end ();
3547 if (! is_name_beginner (*name
))
3549 as_warn (_(".ent directive has no name"));
3550 *input_line_pointer
= name_end
;
3556 if (alpha_cur_ent_sym
)
3557 as_warn (_("nested .ent directives"));
3559 sym
= symbol_find_or_make (name
);
3560 sym
->bsym
->flags
|= BSF_FUNCTION
;
3561 alpha_cur_ent_sym
= sym
;
3563 /* The .ent directive is sometimes followed by a number. Not sure
3564 what it really means, but ignore it. */
3565 *input_line_pointer
= name_end
;
3567 if (*input_line_pointer
== ',')
3569 input_line_pointer
++;
3572 if (isdigit (*input_line_pointer
) || *input_line_pointer
== '-')
3573 (void) get_absolute_expression ();
3575 demand_empty_rest_of_line ();
3583 if (ECOFF_DEBUGGING
)
3584 ecoff_directive_end (0);
3587 char *name
, name_end
;
3588 name
= input_line_pointer
;
3589 name_end
= get_symbol_end ();
3591 if (! is_name_beginner (*name
))
3593 as_warn (_(".end directive has no name"));
3594 *input_line_pointer
= name_end
;
3600 sym
= symbol_find (name
);
3601 if (sym
!= alpha_cur_ent_sym
)
3602 as_warn (_(".end directive names different symbol than .ent"));
3604 /* Create an expression to calculate the size of the function. */
3607 sym
->sy_obj
.size
= (expressionS
*) xmalloc (sizeof (expressionS
));
3608 sym
->sy_obj
.size
->X_op
= O_subtract
;
3609 sym
->sy_obj
.size
->X_add_symbol
3610 = symbol_new ("L0\001", now_seg
, frag_now_fix (), frag_now
);
3611 sym
->sy_obj
.size
->X_op_symbol
= sym
;
3612 sym
->sy_obj
.size
->X_add_number
= 0;
3615 alpha_cur_ent_sym
= NULL
;
3617 *input_line_pointer
= name_end
;
3619 demand_empty_rest_of_line ();
3627 if (ECOFF_DEBUGGING
)
3630 ecoff_directive_fmask (0);
3632 ecoff_directive_mask (0);
3635 discard_rest_of_line ();
3639 s_alpha_frame (dummy
)
3642 if (ECOFF_DEBUGGING
)
3643 ecoff_directive_frame (0);
3645 discard_rest_of_line ();
3649 s_alpha_prologue (ignore
)
3655 arg
= get_absolute_expression ();
3656 demand_empty_rest_of_line ();
3658 if (ECOFF_DEBUGGING
)
3659 sym
= ecoff_get_cur_proc_sym ();
3661 sym
= alpha_cur_ent_sym
;
3666 case 0: /* No PV required. */
3667 S_SET_OTHER (sym
, STO_ALPHA_NOPV
);
3669 case 1: /* Std GP load. */
3670 S_SET_OTHER (sym
, STO_ALPHA_STD_GPLOAD
);
3672 case 2: /* Non-std use of PV. */
3676 as_bad (_("Invalid argument %d to .prologue."), arg
);
3682 s_alpha_coff_wrapper (which
)
3685 static void (* const fns
[]) PARAMS ((int)) = {
3686 ecoff_directive_begin
,
3687 ecoff_directive_bend
,
3688 ecoff_directive_def
,
3689 ecoff_directive_dim
,
3690 ecoff_directive_endef
,
3691 ecoff_directive_file
,
3692 ecoff_directive_scl
,
3693 ecoff_directive_tag
,
3694 ecoff_directive_val
,
3695 ecoff_directive_loc
,
3698 assert (which
>= 0 && which
< sizeof(fns
)/sizeof(*fns
));
3700 if (ECOFF_DEBUGGING
)
3704 as_bad (_("ECOFF debugging is disabled."));
3705 ignore_rest_of_line ();
3708 #endif /* OBJ_ELF */
3712 /* Handle the section specific pseudo-op. */
3715 s_alpha_section (secid
)
3719 #define EVAX_SECTION_COUNT 5
3720 static char *section_name
[EVAX_SECTION_COUNT
+1] =
3721 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
3723 if ((secid
<= 0) || (secid
> EVAX_SECTION_COUNT
))
3725 as_fatal (_("Unknown section directive"));
3726 demand_empty_rest_of_line ();
3729 temp
= get_absolute_expression ();
3730 subseg_new (section_name
[secid
], 0);
3731 demand_empty_rest_of_line ();
3732 alpha_insn_label
= NULL
;
3733 alpha_auto_align_on
= 1;
3734 alpha_current_align
= 0;
3738 /* Parse .ent directives. */
3741 s_alpha_ent (ignore
)
3745 expressionS symexpr
;
3747 alpha_evax_proc
.pdsckind
= 0;
3748 alpha_evax_proc
.framereg
= -1;
3749 alpha_evax_proc
.framesize
= 0;
3750 alpha_evax_proc
.rsa_offset
= 0;
3751 alpha_evax_proc
.ra_save
= AXP_REG_RA
;
3752 alpha_evax_proc
.fp_save
= -1;
3753 alpha_evax_proc
.imask
= 0;
3754 alpha_evax_proc
.fmask
= 0;
3755 alpha_evax_proc
.prologue
= 0;
3756 alpha_evax_proc
.type
= 0;
3758 expression (&symexpr
);
3760 if (symexpr
.X_op
!= O_symbol
)
3762 as_fatal (_(".ent directive has no symbol"));
3763 demand_empty_rest_of_line ();
3767 symbol
= make_expr_symbol (&symexpr
);
3768 symbol
->bsym
->flags
|= BSF_FUNCTION
;
3769 alpha_evax_proc
.symbol
= symbol
;
3771 demand_empty_rest_of_line ();
3776 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
3779 s_alpha_frame (ignore
)
3784 alpha_evax_proc
.framereg
= tc_get_register (1);
3787 if (*input_line_pointer
++ != ','
3788 || get_absolute_expression_and_terminator (&val
) != ',')
3790 as_warn (_("Bad .frame directive 1./2. param"));
3791 --input_line_pointer
;
3792 demand_empty_rest_of_line ();
3796 alpha_evax_proc
.framesize
= val
;
3798 (void) tc_get_register (1);
3800 if (*input_line_pointer
++ != ',')
3802 as_warn (_("Bad .frame directive 3./4. param"));
3803 --input_line_pointer
;
3804 demand_empty_rest_of_line ();
3807 alpha_evax_proc
.rsa_offset
= get_absolute_expression ();
3813 s_alpha_pdesc (ignore
)
3823 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3825 if (now_seg
!= alpha_link_section
)
3827 as_bad (_(".pdesc directive not in link (.link) section"));
3828 demand_empty_rest_of_line ();
3832 if ((alpha_evax_proc
.symbol
== 0)
3833 || (!S_IS_DEFINED (alpha_evax_proc
.symbol
)))
3835 as_fatal (_(".pdesc has no matching .ent"));
3836 demand_empty_rest_of_line ();
3840 alpha_evax_proc
.symbol
->sy_obj
= (valueT
)seginfo
->literal_pool_size
;
3843 if (exp
.X_op
!= O_symbol
)
3845 as_warn (_(".pdesc directive has no entry symbol"));
3846 demand_empty_rest_of_line ();
3850 entry_sym
= make_expr_symbol (&exp
);
3851 /* Save bfd symbol of proc desc in function symbol. */
3852 alpha_evax_proc
.symbol
->bsym
->udata
.p
= (PTR
)entry_sym
->bsym
;
3855 if (*input_line_pointer
++ != ',')
3857 as_warn (_("No comma after .pdesc <entryname>"));
3858 demand_empty_rest_of_line ();
3863 name
= input_line_pointer
;
3864 name_end
= get_symbol_end ();
3866 if (strncmp(name
, "stack", 5) == 0)
3868 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_STACK
;
3870 else if (strncmp(name
, "reg", 3) == 0)
3872 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_REGISTER
;
3874 else if (strncmp(name
, "null", 4) == 0)
3876 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_NULL
;
3880 as_fatal (_("unknown procedure kind"));
3881 demand_empty_rest_of_line ();
3885 *input_line_pointer
= name_end
;
3886 demand_empty_rest_of_line ();
3888 #ifdef md_flush_pending_output
3889 md_flush_pending_output ();
3892 frag_align (3, 0, 0);
3894 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3896 seginfo
->literal_pool_size
+= 16;
3898 *p
= alpha_evax_proc
.pdsckind
3899 | ((alpha_evax_proc
.framereg
== 29) ? PDSC_S_M_BASE_REG_IS_FP
: 0);
3900 *(p
+1) = PDSC_S_M_NATIVE
3901 | PDSC_S_M_NO_JACKET
;
3903 switch (alpha_evax_proc
.pdsckind
)
3905 case PDSC_S_K_KIND_NULL
:
3909 case PDSC_S_K_KIND_FP_REGISTER
:
3910 *(p
+2) = alpha_evax_proc
.fp_save
;
3911 *(p
+3) = alpha_evax_proc
.ra_save
;
3913 case PDSC_S_K_KIND_FP_STACK
:
3914 md_number_to_chars (p
+2, (valueT
)alpha_evax_proc
.rsa_offset
, 2);
3916 default: /* impossible */
3921 *(p
+5) = alpha_evax_proc
.type
& 0x0f;
3923 /* Signature offset. */
3924 md_number_to_chars (p
+6, (valueT
)0, 2);
3926 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
+8, 8, &exp
, 0, BFD_RELOC_64
);
3928 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_NULL
)
3931 /* Add dummy fix to make add_to_link_pool work. */
3933 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3935 seginfo
->literal_pool_size
+= 8;
3937 /* pdesc+16: Size. */
3938 md_number_to_chars (p
, (valueT
)alpha_evax_proc
.framesize
, 4);
3940 md_number_to_chars (p
+4, (valueT
)0, 2);
3943 md_number_to_chars (p
+6, alpha_evax_proc
.prologue
, 2);
3945 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_FP_REGISTER
)
3948 /* Add dummy fix to make add_to_link_pool work. */
3950 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3952 seginfo
->literal_pool_size
+= 8;
3954 /* pdesc+24: register masks. */
3956 md_number_to_chars (p
, alpha_evax_proc
.imask
, 4);
3957 md_number_to_chars (p
+4, alpha_evax_proc
.fmask
, 4);
3963 /* Support for crash debug on vms. */
3966 s_alpha_name (ignore
)
3971 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3973 if (now_seg
!= alpha_link_section
)
3975 as_bad (_(".name directive not in link (.link) section"));
3976 demand_empty_rest_of_line ();
3981 if (exp
.X_op
!= O_symbol
)
3983 as_warn (_(".name directive has no symbol"));
3984 demand_empty_rest_of_line ();
3988 demand_empty_rest_of_line ();
3990 #ifdef md_flush_pending_output
3991 md_flush_pending_output ();
3994 frag_align (3, 0, 0);
3996 seginfo
->literal_pool_size
+= 8;
3998 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 8, &exp
, 0, BFD_RELOC_64
);
4005 s_alpha_linkage (ignore
)
4011 #ifdef md_flush_pending_output
4012 md_flush_pending_output ();
4016 if (exp
.X_op
!= O_symbol
)
4018 as_fatal (_("No symbol after .linkage"));
4022 p
= frag_more (LKP_S_K_SIZE
);
4023 memset (p
, 0, LKP_S_K_SIZE
);
4024 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, LKP_S_K_SIZE
, &exp
, 0,\
4025 BFD_RELOC_ALPHA_LINKAGE
);
4027 demand_empty_rest_of_line ();
4034 s_alpha_code_address (ignore
)
4040 #ifdef md_flush_pending_output
4041 md_flush_pending_output ();
4045 if (exp
.X_op
!= O_symbol
)
4047 as_fatal (_("No symbol after .code_address"));
4053 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 8, &exp
, 0,\
4054 BFD_RELOC_ALPHA_CODEADDR
);
4056 demand_empty_rest_of_line ();
4063 s_alpha_fp_save (ignore
)
4067 alpha_evax_proc
.fp_save
= tc_get_register (1);
4069 demand_empty_rest_of_line ();
4075 s_alpha_mask (ignore
)
4080 if (get_absolute_expression_and_terminator (&val
) != ',')
4082 as_warn (_("Bad .mask directive"));
4083 --input_line_pointer
;
4087 alpha_evax_proc
.imask
= val
;
4088 (void)get_absolute_expression ();
4090 demand_empty_rest_of_line ();
4097 s_alpha_fmask (ignore
)
4102 if (get_absolute_expression_and_terminator (&val
) != ',')
4104 as_warn (_("Bad .fmask directive"));
4105 --input_line_pointer
;
4109 alpha_evax_proc
.fmask
= val
;
4110 (void) get_absolute_expression ();
4112 demand_empty_rest_of_line ();
4118 s_alpha_end (ignore
)
4123 c
= get_symbol_end ();
4124 *input_line_pointer
= c
;
4125 demand_empty_rest_of_line ();
4126 alpha_evax_proc
.symbol
= 0;
4133 s_alpha_file (ignore
)
4138 static char case_hack
[32];
4140 extern char *demand_copy_string
PARAMS ((int *lenP
));
4142 sprintf (case_hack
, "<CASE:%01d%01d>",
4143 alpha_flag_hash_long_names
, alpha_flag_show_after_trunc
);
4145 s
= symbol_find_or_make (case_hack
);
4146 s
->bsym
->flags
|= BSF_FILE
;
4148 get_absolute_expression ();
4149 s
= symbol_find_or_make (demand_copy_string (&length
));
4150 s
->bsym
->flags
|= BSF_FILE
;
4151 demand_empty_rest_of_line ();
4155 #endif /* OBJ_EVAX */
4157 /* Handle the .gprel32 pseudo op. */
4160 s_alpha_gprel32 (ignore
)
4173 e
.X_add_symbol
= section_symbol(absolute_section
);
4186 e
.X_add_symbol
= section_symbol (absolute_section
);
4189 e
.X_op
= O_subtract
;
4190 e
.X_op_symbol
= alpha_gp_symbol
;
4198 if (alpha_auto_align_on
&& alpha_current_align
< 2)
4199 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
4200 if (alpha_current_align
> 2)
4201 alpha_current_align
= 2;
4202 alpha_insn_label
= NULL
;
4206 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 4,
4207 &e
, 0, BFD_RELOC_GPREL32
);
4210 /* Handle floating point allocation pseudo-ops. This is like the
4211 generic vresion, but it makes sure the current label, if any, is
4212 correctly aligned. */
4215 s_alpha_float_cons (type
)
4242 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4243 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4244 if (alpha_current_align
> log_size
)
4245 alpha_current_align
= log_size
;
4246 alpha_insn_label
= NULL
;
4251 /* Handle the .proc pseudo op. We don't really do much with it except
4255 s_alpha_proc (is_static
)
4264 /* Takes ".proc name,nargs" */
4266 name
= input_line_pointer
;
4267 c
= get_symbol_end ();
4268 p
= input_line_pointer
;
4269 symbolP
= symbol_find_or_make (name
);
4272 if (*input_line_pointer
!= ',')
4275 as_warn (_("Expected comma after name \"%s\""), name
);
4278 ignore_rest_of_line ();
4282 input_line_pointer
++;
4283 temp
= get_absolute_expression ();
4285 /* symbolP->sy_other = (signed char) temp; */
4286 as_warn (_("unhandled: .proc %s,%d"), name
, temp
);
4287 demand_empty_rest_of_line ();
4290 /* Handle the .set pseudo op. This is used to turn on and off most of
4291 the assembler features. */
4301 name
= input_line_pointer
;
4302 ch
= get_symbol_end ();
4305 if (s
[0] == 'n' && s
[1] == 'o')
4310 if (!strcmp ("reorder", s
))
4312 else if (!strcmp ("at", s
))
4313 alpha_noat_on
= !yesno
;
4314 else if (!strcmp ("macro", s
))
4315 alpha_macros_on
= yesno
;
4316 else if (!strcmp ("move", s
))
4318 else if (!strcmp ("volatile", s
))
4321 as_warn (_("Tried to .set unrecognized mode `%s'"), name
);
4323 *input_line_pointer
= ch
;
4324 demand_empty_rest_of_line ();
4327 /* Handle the .base pseudo op. This changes the assembler's notion of
4328 the $gp register. */
4331 s_alpha_base (ignore
)
4335 if (first_32bit_quadrant
)
4337 /* not fatal, but it might not work in the end */
4338 as_warn (_("File overrides no-base-register option."));
4339 first_32bit_quadrant
= 0;
4344 if (*input_line_pointer
== '$')
4346 input_line_pointer
++;
4347 if (*input_line_pointer
== 'r')
4348 input_line_pointer
++;
4351 alpha_gp_register
= get_absolute_expression ();
4352 if (alpha_gp_register
< 0 || alpha_gp_register
> 31)
4354 alpha_gp_register
= AXP_REG_GP
;
4355 as_warn (_("Bad base register, using $%d."), alpha_gp_register
);
4358 demand_empty_rest_of_line ();
4361 /* Handle the .align pseudo-op. This aligns to a power of two. It
4362 also adjusts any current instruction label. We treat this the same
4363 way the MIPS port does: .align 0 turns off auto alignment. */
4366 s_alpha_align (ignore
)
4371 long max_alignment
= 15;
4373 align
= get_absolute_expression ();
4374 if (align
> max_alignment
)
4376 align
= max_alignment
;
4377 as_bad (_("Alignment too large: %d. assumed"), align
);
4381 as_warn (_("Alignment negative: 0 assumed"));
4385 if (*input_line_pointer
== ',')
4387 input_line_pointer
++;
4388 fill
= get_absolute_expression ();
4396 alpha_auto_align_on
= 1;
4397 alpha_align (align
, pfill
, alpha_insn_label
, 1);
4401 alpha_auto_align_on
= 0;
4404 demand_empty_rest_of_line ();
4407 /* Hook the normal string processor to reset known alignment. */
4410 s_alpha_stringer (terminate
)
4413 alpha_current_align
= 0;
4414 alpha_insn_label
= NULL
;
4415 stringer (terminate
);
4418 /* Hook the normal space processing to reset known alignment. */
4421 s_alpha_space (ignore
)
4424 alpha_current_align
= 0;
4425 alpha_insn_label
= NULL
;
4429 /* Hook into cons for auto-alignment. */
4432 alpha_cons_align (size
)
4438 while ((size
>>= 1) != 0)
4441 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4442 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4443 if (alpha_current_align
> log_size
)
4444 alpha_current_align
= log_size
;
4445 alpha_insn_label
= NULL
;
4448 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
4449 pseudos. We just turn off auto-alignment and call down to cons. */
4452 s_alpha_ucons (bytes
)
4455 int hold
= alpha_auto_align_on
;
4456 alpha_auto_align_on
= 0;
4458 alpha_auto_align_on
= hold
;
4461 /* Switch the working cpu type. */
4464 s_alpha_arch (ignored
)
4468 const struct cpu_type
*p
;
4471 name
= input_line_pointer
;
4472 ch
= get_symbol_end ();
4474 for (p
= cpu_types
; p
->name
; ++p
)
4475 if (strcmp(name
, p
->name
) == 0)
4477 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
4480 as_warn("Unknown CPU identifier `%s'", name
);
4483 *input_line_pointer
= ch
;
4484 demand_empty_rest_of_line ();
4490 /* print token expression with alpha specific extension. */
4493 alpha_print_token(f
, exp
)
4495 const expressionS
*exp
;
4505 expressionS nexp
= *exp
;
4506 nexp
.X_op
= O_register
;
4507 print_expr (f
, &nexp
);
4512 print_expr (f
, exp
);
4519 /* The target specific pseudo-ops which we support. */
4521 const pseudo_typeS md_pseudo_table
[] =
4524 {"comm", s_alpha_comm
, 0}, /* osf1 compiler does this */
4525 {"rdata", s_alpha_rdata
, 0},
4527 {"text", s_alpha_text
, 0},
4528 {"data", s_alpha_data
, 0},
4530 {"sdata", s_alpha_sdata
, 0},
4533 {"section", s_alpha_section
, 0},
4534 {"section.s", s_alpha_section
, 0},
4535 {"sect", s_alpha_section
, 0},
4536 {"sect.s", s_alpha_section
, 0},
4539 { "pdesc", s_alpha_pdesc
, 0},
4540 { "name", s_alpha_name
, 0},
4541 { "linkage", s_alpha_linkage
, 0},
4542 { "code_address", s_alpha_code_address
, 0},
4543 { "ent", s_alpha_ent
, 0},
4544 { "frame", s_alpha_frame
, 0},
4545 { "fp_save", s_alpha_fp_save
, 0},
4546 { "mask", s_alpha_mask
, 0},
4547 { "fmask", s_alpha_fmask
, 0},
4548 { "end", s_alpha_end
, 0},
4549 { "file", s_alpha_file
, 0},
4550 { "rdata", s_alpha_section
, 1},
4551 { "comm", s_alpha_comm
, 0},
4552 { "link", s_alpha_section
, 3},
4553 { "ctors", s_alpha_section
, 4},
4554 { "dtors", s_alpha_section
, 5},
4557 /* Frame related pseudos. */
4558 {"ent", s_alpha_ent
, 0},
4559 {"end", s_alpha_end
, 0},
4560 {"mask", s_alpha_mask
, 0},
4561 {"fmask", s_alpha_mask
, 1},
4562 {"frame", s_alpha_frame
, 0},
4563 {"prologue", s_alpha_prologue
, 0},
4564 /* COFF debugging related pseudos. */
4565 {"begin", s_alpha_coff_wrapper
, 0},
4566 {"bend", s_alpha_coff_wrapper
, 1},
4567 {"def", s_alpha_coff_wrapper
, 2},
4568 {"dim", s_alpha_coff_wrapper
, 3},
4569 {"endef", s_alpha_coff_wrapper
, 4},
4570 {"file", s_alpha_coff_wrapper
, 5},
4571 {"scl", s_alpha_coff_wrapper
, 6},
4572 {"tag", s_alpha_coff_wrapper
, 7},
4573 {"val", s_alpha_coff_wrapper
, 8},
4574 {"loc", s_alpha_coff_wrapper
, 9},
4576 {"prologue", s_ignore
, 0},
4578 {"gprel32", s_alpha_gprel32
, 0},
4579 {"t_floating", s_alpha_float_cons
, 'd'},
4580 {"s_floating", s_alpha_float_cons
, 'f'},
4581 {"f_floating", s_alpha_float_cons
, 'F'},
4582 {"g_floating", s_alpha_float_cons
, 'G'},
4583 {"d_floating", s_alpha_float_cons
, 'D'},
4585 {"proc", s_alpha_proc
, 0},
4586 {"aproc", s_alpha_proc
, 1},
4587 {"set", s_alpha_set
, 0},
4588 {"reguse", s_ignore
, 0},
4589 {"livereg", s_ignore
, 0},
4590 {"base", s_alpha_base
, 0}, /*??*/
4591 {"option", s_ignore
, 0},
4592 {"aent", s_ignore
, 0},
4593 {"ugen", s_ignore
, 0},
4594 {"eflag", s_ignore
, 0},
4596 {"align", s_alpha_align
, 0},
4597 {"double", s_alpha_float_cons
, 'd'},
4598 {"float", s_alpha_float_cons
, 'f'},
4599 {"single", s_alpha_float_cons
, 'f'},
4600 {"ascii", s_alpha_stringer
, 0},
4601 {"asciz", s_alpha_stringer
, 1},
4602 {"string", s_alpha_stringer
, 1},
4603 {"space", s_alpha_space
, 0},
4604 {"skip", s_alpha_space
, 0},
4605 {"zero", s_alpha_space
, 0},
4607 /* Unaligned data pseudos. */
4608 {"uword", s_alpha_ucons
, 2},
4609 {"ulong", s_alpha_ucons
, 4},
4610 {"uquad", s_alpha_ucons
, 8},
4613 /* Dwarf wants these versions of unaligned. */
4614 {"2byte", s_alpha_ucons
, 2},
4615 {"4byte", s_alpha_ucons
, 4},
4616 {"8byte", s_alpha_ucons
, 8},
4619 /* We don't do any optimizing, so we can safely ignore these. */
4620 {"noalias", s_ignore
, 0},
4621 {"alias", s_ignore
, 0},
4623 {"arch", s_alpha_arch
, 0},
4629 /* Build a BFD section with its flags set appropriately for the .lita,
4630 .lit8, or .lit4 sections. */
4633 create_literal_section (name
, secp
, symp
)
4638 segT current_section
= now_seg
;
4639 int current_subsec
= now_subseg
;
4642 *secp
= new_sec
= subseg_new (name
, 0);
4643 subseg_set (current_section
, current_subsec
);
4644 bfd_set_section_alignment (stdoutput
, new_sec
, 4);
4645 bfd_set_section_flags (stdoutput
, new_sec
,
4646 SEC_RELOC
| SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
4649 S_CLEAR_EXTERNAL (*symp
= section_symbol (new_sec
));
4654 /* @@@ GP selection voodoo. All of this seems overly complicated and
4655 unnecessary; which is the primary reason it's for ECOFF only. */
4664 vma
= bfd_get_section_vma (foo
, sec
);
4665 if (vma
&& vma
< alpha_gp_value
)
4666 alpha_gp_value
= vma
;
4672 assert (alpha_gp_value
== 0);
4674 /* Get minus-one in whatever width... */
4675 alpha_gp_value
= 0; alpha_gp_value
--;
4677 /* Select the smallest VMA of these existing sections. */
4678 maybe_set_gp (alpha_lita_section
);
4680 /* These were disabled before -- should we use them? */
4681 maybe_set_gp (sdata
);
4682 maybe_set_gp (lit8_sec
);
4683 maybe_set_gp (lit4_sec
);
4686 /* @@ Will a simple 0x8000 work here? If not, why not? */
4687 #define GP_ADJUSTMENT (0x8000 - 0x10)
4689 alpha_gp_value
+= GP_ADJUSTMENT
;
4691 S_SET_VALUE (alpha_gp_symbol
, alpha_gp_value
);
4694 printf (_("Chose GP value of %lx\n"), alpha_gp_value
);
4697 #endif /* OBJ_ECOFF */
4699 /* Called internally to handle all alignment needs. This takes care
4700 of eliding calls to frag_align if'n the cached current alignment
4701 says we've already got it, as well as taking care of the auto-align
4702 feature wrt labels. */
4705 alpha_align (n
, pfill
, label
, force
)
4711 if (alpha_current_align
>= n
)
4717 && (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
) != 0)
4719 static char const unop
[4] = { 0x00, 0x00, 0xe0, 0x2f };
4720 static char const nopunop
[8] = {
4721 0x1f, 0x04, 0xff, 0x47,
4722 0x00, 0x00, 0xe0, 0x2f
4725 /* First, make sure we're on a four-byte boundary, in case
4726 someone has been putting .byte values into the text
4727 section. The DEC assembler silently fills with unaligned
4728 no-op instructions. This will zero-fill, then nop-fill
4729 with proper alignment. */
4730 if (alpha_current_align
< 2)
4731 frag_align (2, 0, 0);
4732 if (alpha_current_align
< 3)
4733 frag_align_pattern (3, unop
, sizeof unop
, 0);
4735 frag_align_pattern (n
, nopunop
, sizeof nopunop
, 0);
4738 frag_align (n
, 0, 0);
4741 frag_align (n
, *pfill
, 0);
4743 alpha_current_align
= n
;
4747 assert (S_GET_SEGMENT (label
) == now_seg
);
4748 label
->sy_frag
= frag_now
;
4749 S_SET_VALUE (label
, (valueT
) frag_now_fix ());
4752 record_alignment(now_seg
, n
);
4754 /* ??? if alpha_flag_relax && force && elf, record the requested alignment
4755 in a reloc for the linker to see. */
4758 /* The Alpha has support for some VAX floating point types, as well as for
4759 IEEE floating point. We consider IEEE to be the primary floating point
4760 format, and sneak in the VAX floating point support here. */
4761 #define md_atof vax_md_atof
4762 #include "config/atof-vax.c"