1 2006-08-03 Joseph Myers <joseph@codesourcery.com>
3 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
4 (parse_operands): Handle it.
5 (insns): Use it for tmcr and tmrc.
7 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
10 * config/tc-i386.c (md_parse_option): Treat any target starting
11 with elf64_x86_64 as a viable target for the -64 switch.
12 (i386_target_format): For 64-bit ELF flavoured output use
14 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
16 2006-08-02 Nick Clifton <nickc@redhat.com>
19 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
21 * configure.in: Run BFD_BINARY_FOPEN.
22 * configure: Regenerate.
23 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
26 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
28 * config/tc-i386.c (md_assemble): Don't update
31 2006-08-01 Thiemo Seufer <ths@mips.com>
33 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
35 2006-08-01 Thiemo Seufer <ths@mips.com>
37 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
38 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
39 BFD_RELOC_32 and BFD_RELOC_16.
40 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
41 md_convert_frag, md_obj_end): Fix comment formatting.
43 2006-07-31 Thiemo Seufer <ths@mips.com>
45 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
46 handling for BFD_RELOC_MIPS16_JMP.
48 2006-07-24 Andreas Schwab <schwab@suse.de>
51 * read.c (read_a_source_file): Ignore unknown text after line
52 comment character. Fix misleading comment.
54 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
56 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
57 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
58 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
59 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
60 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
61 doc/c-z80.texi, doc/internals.texi: Fix some typos.
63 2006-07-21 Nick Clifton <nickc@redhat.com>
65 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
68 2006-07-20 Thiemo Seufer <ths@mips.com>
69 Nigel Stephens <nigel@mips.com>
71 * config/tc-mips.c (md_parse_option): Don't infer optimisation
72 options from debug options.
74 2006-07-20 Thiemo Seufer <ths@mips.com>
76 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
77 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
79 2006-07-19 Paul Brook <paul@codesourcery.com>
81 * config/tc-arm.c (insns): Fix rbit Arm opcode.
83 2006-07-18 Paul Brook <paul@codesourcery.com>
85 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
86 (md_convert_frag): Use correct reloc for add_pc. Use
87 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
88 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
89 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
91 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
93 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
94 when file and line unknown.
96 2006-07-17 Thiemo Seufer <ths@mips.com>
98 * read.c (s_struct): Use IS_ELF.
99 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
100 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
101 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
102 s_mips_mask): Likewise.
104 2006-07-16 Thiemo Seufer <ths@mips.com>
105 David Ung <davidu@mips.com>
107 * read.c (s_struct): Handle ELF section changing.
108 * config/tc-mips.c (s_align): Leave enabling auto-align to the
110 (s_change_sec): Try section changing only if we output ELF.
112 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
114 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
116 (smallest_imm_type): Remove Cpu086.
117 (i386_target_format): Likewise.
119 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
122 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
123 Michael Meissner <michael.meissner@amd.com>
125 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
126 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
127 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
129 (i386_align_code): Ditto.
130 (md_assemble_code): Add support for insertq/extrq instructions,
131 swapping as needed for intel syntax.
132 (swap_imm_operands): New function to swap immediate operands.
133 (swap_operands): Deal with 4 operand instructions.
134 (build_modrm_byte): Add support for insertq instruction.
136 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
138 * config/tc-i386.h (Size64): Fix a typo in comment.
140 2006-07-12 Nick Clifton <nickc@redhat.com>
142 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
143 fixup_segment() to repeat a range check on a value that has
144 already been checked here.
146 2006-07-07 James E Wilson <wilson@specifix.com>
148 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
150 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
151 Nick Clifton <nickc@redhat.com>
154 * doc/as.texi: Fix spelling typo: branchs => branches.
155 * doc/c-m68hc11.texi: Likewise.
156 * config/tc-m68hc11.c: Likewise.
157 Support old spelling of command line switch for backwards
160 2006-07-04 Thiemo Seufer <ths@mips.com>
161 David Ung <davidu@mips.com>
163 * config/tc-mips.c (s_is_linkonce): New function.
164 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
165 weak, external, and linkonce symbols.
166 (pic_need_relax): Use s_is_linkonce.
168 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
170 * doc/as.texinfo (Org): Remove space.
171 (P2align): Add "@var{abs-expr},".
173 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
175 * config/tc-i386.c (cpu_arch_tune_set): New.
176 (cpu_arch_isa): Likewise.
177 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
178 nops with short or long nop sequences based on -march=/.arch
180 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
181 set cpu_arch_tune and cpu_arch_tune_flags.
182 (md_parse_option): For -march=, set cpu_arch_isa and set
183 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
184 0. Set cpu_arch_tune_set to 1 for -mtune=.
185 (i386_target_format): Don't set cpu_arch_tune.
187 2006-06-23 Nigel Stephens <nigel@mips.com>
189 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
190 generated .sbss.* and .gnu.linkonce.sb.*.
192 2006-06-23 Thiemo Seufer <ths@mips.com>
193 David Ung <davidu@mips.com>
195 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
197 * config/tc-mips.c (label_list): Define per-segment label_list.
198 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
199 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
200 mips_from_file_after_relocs, mips_define_label): Use per-segment
203 2006-06-22 Thiemo Seufer <ths@mips.com>
205 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
206 (append_insn): Use it.
207 (md_apply_fix): Whitespace formatting.
208 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
209 mips16_extended_frag): Remove register specifier.
210 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
213 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
215 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
216 a directive saving VFP registers for ARMv6 or later.
217 (s_arm_unwind_save): Add parameter arch_v6 and call
218 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
220 (md_pseudo_table): Add entry for new "vsave" directive.
221 * doc/c-arm.texi: Correct error in example for "save"
222 directive (fstmdf -> fstmdx). Also document "vsave" directive.
224 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
225 Anatoly Sokolov <aesok@post.ru>
227 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
228 and atmega644p devices. Rename atmega164/atmega324 devices to
229 atmega164p/atmega324p.
230 * doc/c-avr.texi: Document new mcu and arch options.
232 2006-06-17 Nick Clifton <nickc@redhat.com>
234 * config/tc-arm.c (enum parse_operand_result): Move outside of
235 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
237 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
239 * config/tc-i386.h (processor_type): New.
240 (arch_entry): Add type.
242 * config/tc-i386.c (cpu_arch_tune): New.
243 (cpu_arch_tune_flags): Likewise.
244 (cpu_arch_isa_flags): Likewise.
246 (set_cpu_arch): Also update cpu_arch_isa_flags.
247 (md_assemble): Update cpu_arch_isa_flags.
249 (OPTION_MTUNE): Likewise.
250 (md_longopts): Add -march= and -mtune=.
251 (md_parse_option): Support -march= and -mtune=.
252 (md_show_usage): Add -march=CPU/-mtune=CPU.
253 (i386_target_format): Also update cpu_arch_isa_flags,
254 cpu_arch_tune and cpu_arch_tune_flags.
256 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
258 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
260 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
262 * config/tc-arm.c (enum parse_operand_result): New.
263 (struct group_reloc_table_entry): New.
264 (enum group_reloc_type): New.
265 (group_reloc_table): New array.
266 (find_group_reloc_table_entry): New function.
267 (parse_shifter_operand_group_reloc): New function.
268 (parse_address_main): New function, incorporating code
269 from the old parse_address function. To be used via...
270 (parse_address): wrapper for parse_address_main; and
271 (parse_address_group_reloc): new function, likewise.
272 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
273 OP_ADDRGLDRS, OP_ADDRGLDC.
274 (parse_operands): Support for these new operand codes.
275 New macro po_misc_or_fail_no_backtrack.
276 (encode_arm_cp_address): Preserve group relocations.
277 (insns): Modify to use the above operand codes where group
278 relocations are permitted.
279 (md_apply_fix): Handle the group relocations
280 ALU_PC_G0_NC through LDC_SB_G2.
281 (tc_gen_reloc): Likewise.
282 (arm_force_relocation): Leave group relocations for the linker.
283 (arm_fix_adjustable): Likewise.
285 2006-06-15 Julian Brown <julian@codesourcery.com>
287 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
288 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
291 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
293 * config/tc-i386.c (process_suffix): Don't add rex64 for
296 2006-06-09 Thiemo Seufer <ths@mips.com>
298 * config/tc-mips.c (mips_ip): Maintain argument count.
300 2006-06-09 Alan Modra <amodra@bigpond.net.au>
302 * config/tc-iq2000.c: Include sb.h.
304 2006-06-08 Nigel Stephens <nigel@mips.com>
306 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
307 aliases for better compatibility with SGI tools.
309 2006-06-08 Alan Modra <amodra@bigpond.net.au>
311 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
312 * Makefile.am (GASLIBS): Expand @BFDLIB@.
314 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
315 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
316 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
318 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
319 * Makefile.in: Regenerate.
320 * doc/Makefile.in: Regenerate.
321 * configure: Regenerate.
323 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
325 * po/Make-in (pdf, ps): New dummy targets.
327 2006-06-07 Julian Brown <julian@codesourcery.com>
329 * config/tc-arm.c (stdarg.h): include.
330 (arm_it): Add uncond_value field. Add isvec and issingle to operand
332 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
333 REG_TYPE_NSDQ (single, double or quad vector reg).
334 (reg_expected_msgs): Update.
335 (BAD_FPU): Add macro for unsupported FPU instruction error.
336 (parse_neon_type): Support 'd' as an alias for .f64.
337 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
339 (parse_vfp_reg_list): Don't update first arg on error.
340 (parse_neon_mov): Support extra syntax for VFP moves.
341 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
342 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
343 (parse_operands): Support isvec, issingle operands fields, new parse
345 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
347 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
348 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
349 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
350 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
352 (neon_shape): Redefine in terms of above.
353 (neon_shape_class): New enumeration, table of shape classes.
354 (neon_shape_el): New enumeration. One element of a shape.
355 (neon_shape_el_size): Register widths of above, where appropriate.
356 (neon_shape_info): New struct. Info for shape table.
357 (neon_shape_tab): New array.
358 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
359 (neon_check_shape): Rewrite as...
360 (neon_select_shape): New function to classify instruction shapes,
361 driven by new table neon_shape_tab array.
362 (neon_quad): New function. Return 1 if shape should set Q flag in
363 instructions (or equivalent), 0 otherwise.
364 (type_chk_of_el_type): Support F64.
365 (el_type_of_type_chk): Likewise.
366 (neon_check_type): Add support for VFP type checking (VFP data
367 elements fill their containing registers).
368 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
369 in thumb mode for VFP instructions.
370 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
371 and encode the current instruction as if it were that opcode.
372 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
373 arguments, call function in PFN.
374 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
375 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
376 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
377 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
378 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
379 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
380 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
381 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
382 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
383 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
384 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
385 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
386 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
387 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
388 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
390 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
391 between VFP and Neon turns out to belong to Neon. Perform
392 architecture check and fill in condition field if appropriate.
393 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
394 (do_neon_cvt): Add support for VFP variants of instructions.
395 (neon_cvt_flavour): Extend to cover VFP conversions.
396 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
398 (do_neon_ldr_str): Handle single-precision VFP load/store.
399 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
400 NS_NULL not NS_IGNORE.
401 (opcode_tag): Add OT_csuffixF for operands which either take a
402 conditional suffix, or have 0xF in the condition field.
403 (md_assemble): Add support for OT_csuffixF.
404 (NCE): Replace macro with...
405 (NCE_tag, NCE, NCEF): New macros.
406 (nCE): Replace macro with...
407 (nCE_tag, nCE, nCEF): New macros.
408 (insns): Add support for VFP insns or VFP versions of insns msr,
409 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
410 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
411 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
412 VFP/Neon insns together.
414 2006-06-07 Alan Modra <amodra@bigpond.net.au>
415 Ladislav Michl <ladis@linux-mips.org>
417 * app.c: Don't include headers already included by as.h.
419 * atof-generic.c: Likewise.
421 * dwarf2dbg.c: Likewise.
423 * input-file.c: Likewise.
424 * input-scrub.c: Likewise.
426 * output-file.c: Likewise.
429 * config/bfin-lex.l: Likewise.
430 * config/obj-coff.h: Likewise.
431 * config/obj-elf.h: Likewise.
432 * config/obj-som.h: Likewise.
433 * config/tc-arc.c: Likewise.
434 * config/tc-arm.c: Likewise.
435 * config/tc-avr.c: Likewise.
436 * config/tc-bfin.c: Likewise.
437 * config/tc-cris.c: Likewise.
438 * config/tc-d10v.c: Likewise.
439 * config/tc-d30v.c: Likewise.
440 * config/tc-dlx.h: Likewise.
441 * config/tc-fr30.c: Likewise.
442 * config/tc-frv.c: Likewise.
443 * config/tc-h8300.c: Likewise.
444 * config/tc-hppa.c: Likewise.
445 * config/tc-i370.c: Likewise.
446 * config/tc-i860.c: Likewise.
447 * config/tc-i960.c: Likewise.
448 * config/tc-ip2k.c: Likewise.
449 * config/tc-iq2000.c: Likewise.
450 * config/tc-m32c.c: Likewise.
451 * config/tc-m32r.c: Likewise.
452 * config/tc-maxq.c: Likewise.
453 * config/tc-mcore.c: Likewise.
454 * config/tc-mips.c: Likewise.
455 * config/tc-mmix.c: Likewise.
456 * config/tc-mn10200.c: Likewise.
457 * config/tc-mn10300.c: Likewise.
458 * config/tc-msp430.c: Likewise.
459 * config/tc-mt.c: Likewise.
460 * config/tc-ns32k.c: Likewise.
461 * config/tc-openrisc.c: Likewise.
462 * config/tc-ppc.c: Likewise.
463 * config/tc-s390.c: Likewise.
464 * config/tc-sh.c: Likewise.
465 * config/tc-sh64.c: Likewise.
466 * config/tc-sparc.c: Likewise.
467 * config/tc-tic30.c: Likewise.
468 * config/tc-tic4x.c: Likewise.
469 * config/tc-tic54x.c: Likewise.
470 * config/tc-v850.c: Likewise.
471 * config/tc-vax.c: Likewise.
472 * config/tc-xc16x.c: Likewise.
473 * config/tc-xstormy16.c: Likewise.
474 * config/tc-xtensa.c: Likewise.
475 * config/tc-z80.c: Likewise.
476 * config/tc-z8k.c: Likewise.
477 * macro.h: Don't include sb.h or ansidecl.h.
478 * sb.h: Don't include stdio.h or ansidecl.h.
479 * cond.c: Include sb.h.
480 * itbl-lex.l: Include as.h instead of other system headers.
481 * itbl-parse.y: Likewise.
482 * itbl-ops.c: Similarly.
483 * itbl-ops.h: Don't include as.h or ansidecl.h.
484 * config/bfin-defs.h: Don't include bfd.h or as.h.
485 * config/bfin-parse.y: Include as.h instead of other system headers.
487 2006-06-06 Ben Elliston <bje@au.ibm.com>
488 Anton Blanchard <anton@samba.org>
490 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
491 (md_show_usage): Document it.
492 (ppc_setup_opcodes): Test power6 opcode flag bits.
493 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
495 2006-06-06 Thiemo Seufer <ths@mips.com>
496 Chao-ying Fu <fu@mips.com>
498 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
499 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
500 (macro_build): Update comment.
501 (mips_ip): Allow DSP64 instructions for MIPS64R2.
502 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
504 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
505 MIPS_CPU_ASE_MDMX flags for sb1.
507 2006-06-05 Thiemo Seufer <ths@mips.com>
509 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
511 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
512 (mips_ip): Make overflowed/underflowed constant arguments in DSP
513 and MT instructions a fatal error. Use INSERT_OPERAND where
514 appropriate. Improve warnings for break and wait code overflows.
515 Use symbolic constant of OP_MASK_COPZ.
516 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
518 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
520 * po/Make-in (top_builddir): Define.
522 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
524 * doc/Makefile.am (TEXI2DVI): Define.
525 * doc/Makefile.in: Regenerate.
526 * doc/c-arc.texi: Fix typo.
528 2006-06-01 Alan Modra <amodra@bigpond.net.au>
530 * config/obj-ieee.c: Delete.
531 * config/obj-ieee.h: Delete.
532 * Makefile.am (OBJ_FORMATS): Remove ieee.
533 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
534 (obj-ieee.o): Remove rule.
535 * Makefile.in: Regenerate.
536 * configure.in (atof): Remove tahoe.
537 (OBJ_MAYBE_IEEE): Don't define.
538 * configure: Regenerate.
539 * config.in: Regenerate.
540 * doc/Makefile.in: Regenerate.
541 * po/POTFILES.in: Regenerate.
543 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
545 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
546 and LIBINTL_DEP everywhere.
548 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
549 * acinclude.m4: Include new gettext macros.
550 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
551 Remove local code for po/Makefile.
552 * Makefile.in, configure, doc/Makefile.in: Regenerated.
554 2006-05-30 Nick Clifton <nickc@redhat.com>
556 * po/es.po: Updated Spanish translation.
558 2006-05-06 Denis Chertykov <denisc@overta.ru>
560 * doc/c-avr.texi: New file.
561 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
562 * doc/all.texi: Set AVR
563 * doc/as.texinfo: Include c-avr.texi
565 2006-05-28 Jie Zhang <jie.zhang@analog.com>
567 * config/bfin-parse.y (check_macfunc): Loose the condition of
568 calling check_multiply_halfregs ().
570 2006-05-25 Jie Zhang <jie.zhang@analog.com>
572 * config/bfin-parse.y (asm_1): Better check and deal with
573 vector and scalar Multiply 16-Bit Operands instructions.
575 2006-05-24 Nick Clifton <nickc@redhat.com>
577 * config/tc-hppa.c: Convert to ISO C90 format.
578 * config/tc-hppa.h: Likewise.
580 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
581 Randolph Chung <randolph@tausq.org>
583 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
584 is_tls_ieoff, is_tls_leoff): Define.
585 (fix_new_hppa): Handle TLS.
586 (cons_fix_new_hppa): Likewise.
588 (md_apply_fix): Handle TLS relocs.
589 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
591 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
593 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
595 2006-05-23 Thiemo Seufer <ths@mips.com>
596 David Ung <davidu@mips.com>
597 Nigel Stephens <nigel@mips.com>
600 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
601 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
602 ISA_HAS_MXHC1): New macros.
603 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
604 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
605 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
606 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
607 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
608 (mips_after_parse_args): Change default handling of float register
609 size to account for 32bit code with 64bit FP. Better sanity checking
610 of ISA/ASE/ABI option combinations.
611 (s_mipsset): Support switching of GPR and FPR sizes via
612 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
614 (mips_elf_final_processing): We should record the use of 64bit FP
615 registers in 32bit code but we don't, because ELF header flags are
617 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
618 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
619 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
620 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
621 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
622 missing -march options. Document .set arch=CPU. Move .set smartmips
623 to ASE page. Use @code for .set FOO examples.
625 2006-05-23 Jie Zhang <jie.zhang@analog.com>
627 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
630 2006-05-23 Jie Zhang <jie.zhang@analog.com>
632 * config/bfin-defs.h (bfin_equals): Remove declaration.
633 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
634 * config/tc-bfin.c (bfin_name_is_register): Remove.
635 (bfin_equals): Remove.
636 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
637 (bfin_name_is_register): Remove declaration.
639 2006-05-19 Thiemo Seufer <ths@mips.com>
640 Nigel Stephens <nigel@mips.com>
642 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
643 (mips_oddfpreg_ok): New function.
646 2006-05-19 Thiemo Seufer <ths@mips.com>
647 David Ung <davidu@mips.com>
649 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
650 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
651 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
652 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
653 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
654 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
655 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
656 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
657 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
658 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
659 reg_names_o32, reg_names_n32n64): Define register classes.
660 (reg_lookup): New function, use register classes.
661 (md_begin): Reserve register names in the symbol table. Simplify
663 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
665 (mips16_ip): Use reg_lookup.
666 (tc_get_register): Likewise.
667 (tc_mips_regname_to_dw2regnum): New function.
669 2006-05-19 Thiemo Seufer <ths@mips.com>
671 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
672 Un-constify string argument.
673 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
675 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
677 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
679 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
681 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
683 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
686 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
688 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
689 cfloat/m68881 to correct architecture before using it.
691 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
693 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
696 2006-05-15 Paul Brook <paul@codesourcery.com>
698 * config/tc-arm.c (arm_adjust_symtab): Use
699 bfd_is_arm_special_symbol_name.
701 2006-05-15 Bob Wilson <bob.wilson@acm.org>
703 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
704 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
705 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
706 Handle errors from calls to xtensa_opcode_is_* functions.
708 2006-05-14 Thiemo Seufer <ths@mips.com>
710 * config/tc-mips.c (macro_build): Test for currently active
712 (mips16_ip): Reject invalid opcodes.
714 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
716 * doc/as.texinfo: Rename "Index" to "AS Index",
717 and "ABORT" to "ABORT (COFF)".
719 2006-05-11 Paul Brook <paul@codesourcery.com>
721 * config/tc-arm.c (parse_half): New function.
722 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
723 (parse_operands): Ditto.
724 (do_mov16): Reject invalid relocations.
725 (do_t_mov16): Ditto. Use Thumb reloc numbers.
726 (insns): Replace Iffff with HALF.
727 (md_apply_fix): Add MOVW and MOVT relocs.
728 (tc_gen_reloc): Ditto.
729 * doc/c-arm.texi: Document relocation operators
731 2006-05-11 Paul Brook <paul@codesourcery.com>
733 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
735 2006-05-11 Thiemo Seufer <ths@mips.com>
737 * config/tc-mips.c (append_insn): Don't check the range of j or
740 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
742 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
743 relocs against external symbols for WinCE targets.
744 (md_apply_fix): Likewise.
746 2006-05-09 David Ung <davidu@mips.com>
748 * config/tc-mips.c (append_insn): Only warn about an out-of-range
751 2006-05-09 Nick Clifton <nickc@redhat.com>
753 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
754 against symbols which are not going to be placed into the symbol
757 2006-05-09 Ben Elliston <bje@au.ibm.com>
759 * expr.c (operand): Remove `if (0 && ..)' statement and
760 subsequently unused target_op label. Collapse `if (1 || ..)'
762 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
763 separately above the switch.
765 2006-05-08 Nick Clifton <nickc@redhat.com>
768 * config/tc-msp430.c (line_separator_character): Define as |.
770 2006-05-08 Thiemo Seufer <ths@mips.com>
771 Nigel Stephens <nigel@mips.com>
772 David Ung <davidu@mips.com>
774 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
775 (mips_opts): Likewise.
776 (file_ase_smartmips): New variable.
777 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
778 (macro_build): Handle SmartMIPS instructions.
780 (md_longopts): Add argument handling for smartmips.
781 (md_parse_options, mips_after_parse_args): Likewise.
782 (s_mipsset): Add .set smartmips support.
783 (md_show_usage): Document -msmartmips/-mno-smartmips.
784 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
786 * doc/c-mips.texi: Likewise.
788 2006-05-08 Alan Modra <amodra@bigpond.net.au>
790 * write.c (relax_segment): Add pass count arg. Don't error on
791 negative org/space on first two passes.
792 (relax_seg_info): New struct.
793 (relax_seg, write_object_file): Adjust.
794 * write.h (relax_segment): Update prototype.
796 2006-05-05 Julian Brown <julian@codesourcery.com>
798 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
800 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
801 architecture version checks.
802 (insns): Allow overlapping instructions to be used in VFP mode.
804 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
807 * config/obj-elf.c (obj_elf_change_section): Allow user
808 specified SHF_ALPHA_GPREL.
810 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
812 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
813 for PMEM related expressions.
815 2006-05-05 Nick Clifton <nickc@redhat.com>
818 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
819 insertion of a directory separator character into a string at a
820 given offset. Uses heuristics to decide when to use a backslash
821 character rather than a forward-slash character.
822 (dwarf2_directive_loc): Use the macro.
823 (out_debug_info): Likewise.
825 2006-05-05 Thiemo Seufer <ths@mips.com>
826 David Ung <davidu@mips.com>
828 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
830 (macro): Add new case M_CACHE_AB.
832 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
834 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
835 (opcode_lookup): Issue a warning for opcode with
836 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
837 identical to OT_cinfix3.
838 (TxC3w, TC3w, tC3w): New.
839 (insns): Use tC3w and TC3w for comparison instructions with
842 2006-05-04 Alan Modra <amodra@bigpond.net.au>
844 * subsegs.h (struct frchain): Delete frch_seg.
845 (frchain_root): Delete.
846 (seg_info): Define as macro.
847 * subsegs.c (frchain_root): Delete.
848 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
849 (subsegs_begin, subseg_change): Adjust for above.
850 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
851 rather than to one big list.
852 (subseg_get): Don't special case abs, und sections.
853 (subseg_new, subseg_force_new): Don't set frchainP here.
855 (subsegs_print_statistics): Adjust frag chain control list traversal.
856 * debug.c (dmp_frags): Likewise.
857 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
858 at frchain_root. Make use of known frchain ordering.
859 (last_frag_for_seg): Likewise.
860 (get_frag_fix): Likewise. Add seg param.
861 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
862 * write.c (chain_frchains_together_1): Adjust for struct frchain.
863 (SUB_SEGMENT_ALIGN): Likewise.
864 (subsegs_finish): Adjust frchain list traversal.
865 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
866 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
867 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
868 (xtensa_fix_b_j_loop_end_frags): Likewise.
869 (xtensa_fix_close_loop_end_frags): Likewise.
870 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
871 (retrieve_segment_info): Delete frch_seg initialisation.
873 2006-05-03 Alan Modra <amodra@bigpond.net.au>
875 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
876 * config/obj-elf.h (obj_sec_set_private_data): Delete.
877 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
878 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
880 2006-05-02 Joseph Myers <joseph@codesourcery.com>
882 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
884 (md_apply_fix3): Multiply offset by 4 here for
885 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
887 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
888 Jan Beulich <jbeulich@novell.com>
890 * config/tc-i386.c (output_invalid_buf): Change size for
892 * config/tc-tic30.c (output_invalid_buf): Likewise.
894 * config/tc-i386.c (output_invalid): Cast none-ascii char to
896 * config/tc-tic30.c (output_invalid): Likewise.
898 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
900 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
901 (TEXI2POD): Use AM_MAKEINFOFLAGS.
902 (asconfig.texi): Don't set top_srcdir.
903 * doc/as.texinfo: Don't use top_srcdir.
904 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
906 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
908 * config/tc-i386.c (output_invalid_buf): Change size to 16.
909 * config/tc-tic30.c (output_invalid_buf): Likewise.
911 * config/tc-i386.c (output_invalid): Use snprintf instead of
913 * config/tc-ia64.c (declare_register_set): Likewise.
914 (emit_one_bundle): Likewise.
915 (check_dependencies): Likewise.
916 * config/tc-tic30.c (output_invalid): Likewise.
918 2006-05-02 Paul Brook <paul@codesourcery.com>
920 * config/tc-arm.c (arm_optimize_expr): New function.
921 * config/tc-arm.h (md_optimize_expr): Define
922 (arm_optimize_expr): Add prototype.
923 (TC_FORCE_RELOCATION_SUB_SAME): Define.
925 2006-05-02 Ben Elliston <bje@au.ibm.com>
927 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
930 * sb.h (sb_list_vector): Move to sb.c.
931 * sb.c (free_list): Use type of sb_list_vector directly.
932 (sb_build): Fix off-by-one error in assertion about `size'.
934 2006-05-01 Ben Elliston <bje@au.ibm.com>
936 * listing.c (listing_listing): Remove useless loop.
937 * macro.c (macro_expand): Remove is_positional local variable.
938 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
939 and simplify surrounding expressions, where possible.
940 (assign_symbol): Likewise.
941 (s_weakref): Likewise.
942 * symbols.c (colon): Likewise.
944 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
946 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
948 2006-04-30 Thiemo Seufer <ths@mips.com>
949 David Ung <davidu@mips.com>
951 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
952 (mips_immed): New table that records various handling of udi
953 instruction patterns.
954 (mips_ip): Adds udi handling.
956 2006-04-28 Alan Modra <amodra@bigpond.net.au>
958 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
959 of list rather than beginning.
961 2006-04-26 Julian Brown <julian@codesourcery.com>
963 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
964 (is_quarter_float): Rename from above. Simplify slightly.
965 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
967 (parse_neon_mov): Parse floating-point constants.
968 (neon_qfloat_bits): Fix encoding.
969 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
970 preference to integer encoding when using the F32 type.
972 2006-04-26 Julian Brown <julian@codesourcery.com>
974 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
975 zero-initialising structures containing it will lead to invalid types).
976 (arm_it): Add vectype to each operand.
977 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
979 (neon_typed_alias): New structure. Extra information for typed
981 (reg_entry): Add neon type info field.
982 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
983 Break out alternative syntax for coprocessor registers, etc. into...
984 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
985 out from arm_reg_parse.
986 (parse_neon_type): Move. Return SUCCESS/FAIL.
987 (first_error): New function. Call to ensure first error which occurs is
989 (parse_neon_operand_type): Parse exactly one type.
990 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
991 (parse_typed_reg_or_scalar): New function. Handle core of both
992 arm_typed_reg_parse and parse_scalar.
993 (arm_typed_reg_parse): Parse a register with an optional type.
994 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
996 (parse_scalar): Parse a Neon scalar with optional type.
997 (parse_reg_list): Use first_error.
998 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
999 (neon_alias_types_same): New function. Return true if two (alias) types
1001 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1003 (insert_reg_alias): Return new reg_entry not void.
1004 (insert_neon_reg_alias): New function. Insert type/index information as
1005 well as register for alias.
1006 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1007 make typed register aliases accordingly.
1008 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1010 (s_unreq): Delete type information if present.
1011 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1012 (s_arm_unwind_save_mmxwcg): Likewise.
1013 (s_arm_unwind_movsp): Likewise.
1014 (s_arm_unwind_setfp): Likewise.
1015 (parse_shift): Likewise.
1016 (parse_shifter_operand): Likewise.
1017 (parse_address): Likewise.
1018 (parse_tb): Likewise.
1019 (tc_arm_regname_to_dw2regnum): Likewise.
1020 (md_pseudo_table): Add dn, qn.
1021 (parse_neon_mov): Handle typed operands.
1022 (parse_operands): Likewise.
1023 (neon_type_mask): Add N_SIZ.
1024 (N_ALLMODS): New macro.
1025 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1026 (el_type_of_type_chk): Add some safeguards.
1027 (modify_types_allowed): Fix logic bug.
1028 (neon_check_type): Handle operands with types.
1029 (neon_three_same): Remove redundant optional arg handling.
1030 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1031 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1032 (do_neon_step): Adjust accordingly.
1033 (neon_cmode_for_logic_imm): Use first_error.
1034 (do_neon_bitfield): Call neon_check_type.
1035 (neon_dyadic): Rename to...
1036 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1037 to allow modification of type of the destination.
1038 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1039 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1040 (do_neon_compare): Make destination be an untyped bitfield.
1041 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1042 (neon_mul_mac): Return early in case of errors.
1043 (neon_move_immediate): Use first_error.
1044 (neon_mac_reg_scalar_long): Fix type to include scalar.
1045 (do_neon_dup): Likewise.
1046 (do_neon_mov): Likewise (in several places).
1047 (do_neon_tbl_tbx): Fix type.
1048 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1049 (do_neon_ld_dup): Exit early in case of errors and/or use
1051 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1052 Handle .dn/.qn directives.
1053 (REGDEF): Add zero for reg_entry neon field.
1055 2006-04-26 Julian Brown <julian@codesourcery.com>
1057 * config/tc-arm.c (limits.h): Include.
1058 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1059 (fpu_vfp_v3_or_neon_ext): Declare constants.
1060 (neon_el_type): New enumeration of types for Neon vector elements.
1061 (neon_type_el): New struct. Define type and size of a vector element.
1062 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1064 (neon_type): Define struct. The type of an instruction.
1065 (arm_it): Add 'vectype' for the current instruction.
1066 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1067 (vfp_sp_reg_pos): Rename to...
1068 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1070 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1071 (Neon D or Q register).
1072 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1074 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1075 (my_get_expression): Allow above constant as argument to accept
1076 64-bit constants with optional prefix.
1077 (arm_reg_parse): Add extra argument to return the specific type of
1078 register in when either a D or Q register (REG_TYPE_NDQ) is
1079 requested. Can be NULL.
1080 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1081 (parse_reg_list): Update for new arm_reg_parse args.
1082 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1083 (parse_neon_el_struct_list): New function. Parse element/structure
1084 register lists for VLD<n>/VST<n> instructions.
1085 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1086 (s_arm_unwind_save_mmxwr): Likewise.
1087 (s_arm_unwind_save_mmxwcg): Likewise.
1088 (s_arm_unwind_movsp): Likewise.
1089 (s_arm_unwind_setfp): Likewise.
1090 (parse_big_immediate): New function. Parse an immediate, which may be
1091 64 bits wide. Put results in inst.operands[i].
1092 (parse_shift): Update for new arm_reg_parse args.
1093 (parse_address): Likewise. Add parsing of alignment specifiers.
1094 (parse_neon_mov): Parse the operands of a VMOV instruction.
1095 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1096 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1097 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1098 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1099 (parse_operands): Handle new codes above.
1100 (encode_arm_vfp_sp_reg): Rename to...
1101 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1102 selected VFP version only supports D0-D15.
1103 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1104 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1105 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1106 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1107 encode_arm_vfp_reg name, and allow 32 D regs.
1108 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1109 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1111 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1112 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1113 constant-load and conversion insns introduced with VFPv3.
1114 (neon_tab_entry): New struct.
1115 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1116 those which are the targets of pseudo-instructions.
1117 (neon_opc): Enumerate opcodes, use as indices into...
1118 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1119 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1120 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1121 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1123 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1125 (neon_type_mask): New. Compact type representation for type checking.
1126 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1127 permitted type combinations.
1128 (N_IGNORE_TYPE): New macro.
1129 (neon_check_shape): New function. Check an instruction shape for
1130 multiple alternatives. Return the specific shape for the current
1132 (neon_modify_type_size): New function. Modify a vector type and size,
1133 depending on the bit mask in argument 1.
1134 (neon_type_promote): New function. Convert a given "key" type (of an
1135 operand) into the correct type for a different operand, based on a bit
1137 (type_chk_of_el_type): New function. Convert a type and size into the
1138 compact representation used for type checking.
1139 (el_type_of_type_ckh): New function. Reverse of above (only when a
1140 single bit is set in the bit mask).
1141 (modify_types_allowed): New function. Alter a mask of allowed types
1142 based on a bit mask of modifications.
1143 (neon_check_type): New function. Check the type of the current
1144 instruction against the variable argument list. The "key" type of the
1145 instruction is returned.
1146 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1147 a Neon data-processing instruction depending on whether we're in ARM
1148 mode or Thumb-2 mode.
1149 (neon_logbits): New function.
1150 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1151 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1152 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1153 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1154 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1155 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1156 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1157 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1158 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1159 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1160 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1161 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1162 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1163 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1164 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1165 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1166 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1167 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1168 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1169 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1170 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1171 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1172 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1173 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1174 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1176 (parse_neon_type): New function. Parse Neon type specifier.
1177 (opcode_lookup): Allow parsing of Neon type specifiers.
1178 (REGNUM2, REGSETH, REGSET2): New macros.
1179 (reg_names): Add new VFPv3 and Neon registers.
1180 (NUF, nUF, NCE, nCE): New macros for opcode table.
1181 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1182 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1183 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1184 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1185 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1186 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1187 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1188 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1189 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1190 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1191 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1192 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1193 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1194 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1196 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1197 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1198 (arm_option_cpu_value): Add vfp3 and neon.
1199 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1202 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1204 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1205 syntax instead of hardcoded opcodes with ".w18" suffixes.
1206 (wide_branch_opcode): New.
1207 (build_transition): Use it to check for wide branch opcodes with
1208 either ".w18" or ".w15" suffixes.
1210 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1212 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1213 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1214 frag's is_literal flag.
1216 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1218 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1220 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1222 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1223 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1224 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1225 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1226 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1228 2005-04-20 Paul Brook <paul@codesourcery.com>
1230 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1232 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1234 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1236 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1237 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1238 Make some cpus unsupported on ELF. Run "make dep-am".
1239 * Makefile.in: Regenerate.
1241 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1243 * configure.in (--enable-targets): Indent help message.
1244 * configure: Regenerate.
1246 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1249 * config/tc-i386.c (i386_immediate): Check illegal immediate
1252 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1254 * config/tc-i386.c: Formatting.
1255 (output_disp, output_imm): ISO C90 params.
1257 * frags.c (frag_offset_fixed_p): Constify args.
1258 * frags.h (frag_offset_fixed_p): Ditto.
1260 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1261 (COFF_MAGIC): Delete.
1263 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1265 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1267 * po/POTFILES.in: Regenerated.
1269 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1271 * doc/as.texinfo: Mention that some .type syntaxes are not
1272 supported on all architectures.
1274 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1276 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1277 instructions when such transformations have been disabled.
1279 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1281 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1282 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1283 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1284 decoding the loop instructions. Remove current_offset variable.
1285 (xtensa_fix_short_loop_frags): Likewise.
1286 (min_bytes_to_other_loop_end): Remove current_offset argument.
1288 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1290 * config/tc-z80.c (z80_optimize_expr): Removed.
1291 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1293 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1295 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1296 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1297 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1298 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1299 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1300 at90can64, at90usb646, at90usb647, at90usb1286 and
1302 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1304 2006-04-07 Paul Brook <paul@codesourcery.com>
1306 * config/tc-arm.c (parse_operands): Set default error message.
1308 2006-04-07 Paul Brook <paul@codesourcery.com>
1310 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1312 2006-04-07 Paul Brook <paul@codesourcery.com>
1314 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1316 2006-04-07 Paul Brook <paul@codesourcery.com>
1318 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1319 (move_or_literal_pool): Handle Thumb-2 instructions.
1320 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1322 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1325 * config/tc-i386.c (match_template): Move 64-bit operand tests
1328 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1330 * po/Make-in: Add install-html target.
1331 * Makefile.am: Add install-html and install-html-recursive targets.
1332 * Makefile.in: Regenerate.
1333 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1334 * configure: Regenerate.
1335 * doc/Makefile.am: Add install-html and install-html-am targets.
1336 * doc/Makefile.in: Regenerate.
1338 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1340 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1343 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1344 Daniel Jacobowitz <dan@codesourcery.com>
1346 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1347 (GOTT_BASE, GOTT_INDEX): New.
1348 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1349 GOTT_INDEX when generating VxWorks PIC.
1350 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1351 use the generic *-*-vxworks* stanza instead.
1353 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1356 * frags.c (frag_offset_fixed_p): New function.
1357 * frags.h (frag_offset_fixed_p): Declare.
1358 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1359 (resolve_expression): Likewise.
1361 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1363 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1364 of the same length but different numbers of slots.
1366 2006-03-30 Andreas Schwab <schwab@suse.de>
1368 * configure.in: Fix help string for --enable-targets option.
1369 * configure: Regenerate.
1371 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1373 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1374 (m68k_ip): ... here. Use for all chips. Protect against buffer
1375 overrun and avoid excessive copying.
1377 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1378 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1379 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1380 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1381 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1382 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1383 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1384 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1385 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1386 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1387 (struct m68k_cpu): Change chip field to control_regs.
1388 (current_chip): Remove.
1389 (control_regs): New.
1390 (m68k_archs, m68k_extensions): Adjust.
1391 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1392 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1393 (find_cf_chip): Reimplement for new organization of cpu table.
1394 (select_control_regs): Remove.
1396 (struct save_opts): Save control regs, not chip.
1397 (s_save, s_restore): Adjust.
1398 (m68k_lookup_cpu): Give deprecated warning when necessary.
1399 (m68k_init_arch): Adjust.
1400 (md_show_usage): Adjust for new cpu table organization.
1402 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1404 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1405 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1406 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1408 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1409 (any_gotrel): New rule.
1410 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1411 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1413 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1414 (bfin_pic_ptr): New function.
1415 (md_pseudo_table): Add it for ".picptr".
1416 (OPTION_FDPIC): New macro.
1417 (md_longopts): Add -mfdpic.
1418 (md_parse_option): Handle it.
1419 (md_begin): Set BFD flags.
1420 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1421 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1423 * Makefile.am (bfin-parse.o): Update dependencies.
1424 (DEPTC_bfin_elf): Likewise.
1425 * Makefile.in: Regenerate.
1427 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1429 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1430 mcfemac instead of mcfmac.
1432 2006-03-23 Michael Matz <matz@suse.de>
1434 * config/tc-i386.c (type_names): Correct placement of 'static'.
1435 (reloc): Map some more relocs to their 64 bit counterpart when
1437 (output_insn): Work around breakage if DEBUG386 is defined.
1438 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1439 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1440 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1441 different from i386.
1442 (output_imm): Ditto.
1443 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1445 (md_convert_frag): Jumps can now be larger than 2GB away, error
1447 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1448 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1450 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1451 Daniel Jacobowitz <dan@codesourcery.com>
1452 Phil Edwards <phil@codesourcery.com>
1453 Zack Weinberg <zack@codesourcery.com>
1454 Mark Mitchell <mark@codesourcery.com>
1455 Nathan Sidwell <nathan@codesourcery.com>
1457 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1458 (md_begin): Complain about -G being used for PIC. Don't change
1459 the text, data and bss alignments on VxWorks.
1460 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1461 generating VxWorks PIC.
1462 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1463 (macro): Likewise, but do not treat la $25 specially for
1464 VxWorks PIC, and do not handle jal.
1465 (OPTION_MVXWORKS_PIC): New macro.
1466 (md_longopts): Add -mvxworks-pic.
1467 (md_parse_option): Don't complain about using PIC and -G together here.
1468 Handle OPTION_MVXWORKS_PIC.
1469 (md_estimate_size_before_relax): Always use the first relaxation
1470 sequence on VxWorks.
1471 * config/tc-mips.h (VXWORKS_PIC): New.
1473 2006-03-21 Paul Brook <paul@codesourcery.com>
1475 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1477 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1479 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1480 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1481 (get_loop_align_size): New.
1482 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1483 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1484 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1485 (get_noop_aligned_address): Use get_loop_align_size.
1486 (get_aligned_diff): Likewise.
1488 2006-03-21 Paul Brook <paul@codesourcery.com>
1490 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1492 2006-03-20 Paul Brook <paul@codesourcery.com>
1494 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1495 (do_t_branch): Encode branches inside IT blocks as unconditional.
1496 (do_t_cps): New function.
1497 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1498 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1499 (opcode_lookup): Allow conditional suffixes on all instructions in
1501 (md_assemble): Advance condexec state before checking for errors.
1502 (insns): Use do_t_cps.
1504 2006-03-20 Paul Brook <paul@codesourcery.com>
1506 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1507 outputting the insn.
1509 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1511 * config/tc-vax.c: Update copyright year.
1512 * config/tc-vax.h: Likewise.
1514 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1516 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1518 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1520 2006-03-17 Paul Brook <paul@codesourcery.com>
1522 * config/tc-arm.c (insns): Add ldm and stm.
1524 2006-03-17 Ben Elliston <bje@au.ibm.com>
1527 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1529 2006-03-16 Paul Brook <paul@codesourcery.com>
1531 * config/tc-arm.c (insns): Add "svc".
1533 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1535 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1536 flag and avoid double underscore prefixes.
1538 2006-03-10 Paul Brook <paul@codesourcery.com>
1540 * config/tc-arm.c (md_begin): Handle EABIv5.
1541 (arm_eabis): Add EF_ARM_EABI_VER5.
1542 * doc/c-arm.texi: Document -meabi=5.
1544 2006-03-10 Ben Elliston <bje@au.ibm.com>
1546 * app.c (do_scrub_chars): Simplify string handling.
1548 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1549 Daniel Jacobowitz <dan@codesourcery.com>
1550 Zack Weinberg <zack@codesourcery.com>
1551 Nathan Sidwell <nathan@codesourcery.com>
1552 Paul Brook <paul@codesourcery.com>
1553 Ricardo Anguiano <anguiano@codesourcery.com>
1554 Phil Edwards <phil@codesourcery.com>
1556 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1557 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1559 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1560 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1561 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1563 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1565 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1566 even when using the text-section-literals option.
1568 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1570 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1572 (m68k_ip): <case 'J'> Check we have some control regs.
1573 (md_parse_option): Allow raw arch switch.
1574 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1575 whether 68881 or cfloat was meant by -mfloat.
1576 (md_show_usage): Adjust extension display.
1577 (m68k_elf_final_processing): Adjust.
1579 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1581 * config/tc-avr.c (avr_mod_hash_value): New function.
1582 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1583 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1584 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1585 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1587 (tc_gen_reloc): Handle substractions of symbols, if possible do
1588 fixups, abort otherwise.
1589 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1590 tc_fix_adjustable): Define.
1592 2006-03-02 James E Wilson <wilson@specifix.com>
1594 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1595 change the template, then clear md.slot[curr].end_of_insn_group.
1597 2006-02-28 Jan Beulich <jbeulich@novell.com>
1599 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1601 2006-02-28 Jan Beulich <jbeulich@novell.com>
1604 * macro.c (getstring): Don't treat parentheses special anymore.
1605 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1606 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1609 2006-02-28 Mat <mat@csail.mit.edu>
1611 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1613 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1615 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1617 (CFI_signal_frame): Define.
1618 (cfi_pseudo_table): Add .cfi_signal_frame.
1619 (dot_cfi): Handle CFI_signal_frame.
1620 (output_cie): Handle cie->signal_frame.
1621 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1622 different. Copy signal_frame from FDE to newly created CIE.
1623 * doc/as.texinfo: Document .cfi_signal_frame.
1625 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1627 * doc/Makefile.am: Add html target.
1628 * doc/Makefile.in: Regenerate.
1629 * po/Make-in: Add html target.
1631 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1633 * config/tc-i386.c (output_insn): Support Intel Merom New
1636 * config/tc-i386.h (CpuMNI): New.
1637 (CpuUnknownFlags): Add CpuMNI.
1639 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1641 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1642 (hpriv_reg_table): New table for hyperprivileged registers.
1643 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1646 2006-02-24 DJ Delorie <dj@redhat.com>
1648 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1649 (tc_gen_reloc): Don't define.
1650 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1651 (OPTION_LINKRELAX): New.
1652 (md_longopts): Add it.
1654 (md_parse_options): Set it.
1655 (md_assemble): Emit relaxation relocs as needed.
1656 (md_convert_frag): Emit relaxation relocs as needed.
1657 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1658 (m32c_apply_fix): New.
1659 (tc_gen_reloc): New.
1660 (m32c_force_relocation): Force out jump relocs when relaxing.
1661 (m32c_fix_adjustable): Return false if relaxing.
1663 2006-02-24 Paul Brook <paul@codesourcery.com>
1665 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1666 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1667 (struct asm_barrier_opt): Define.
1668 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1669 (parse_psr): Accept V7M psr names.
1670 (parse_barrier): New function.
1671 (enum operand_parse_code): Add OP_oBARRIER.
1672 (parse_operands): Implement OP_oBARRIER.
1673 (do_barrier): New function.
1674 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1675 (do_t_cpsi): Add V7M restrictions.
1676 (do_t_mrs, do_t_msr): Validate V7M variants.
1677 (md_assemble): Check for NULL variants.
1678 (v7m_psrs, barrier_opt_names): New tables.
1679 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1680 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1681 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1682 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1683 (struct cpu_arch_ver_table): Define.
1684 (cpu_arch_ver): New.
1685 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1686 Tag_CPU_arch_profile.
1687 * doc/c-arm.texi: Document new cpu and arch options.
1689 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1691 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1693 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1695 * config/tc-ia64.c: Update copyright years.
1697 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1699 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1702 2005-02-22 Paul Brook <paul@codesourcery.com>
1704 * config/tc-arm.c (do_pld): Remove incorrect write to
1706 (encode_thumb32_addr_mode): Use correct operand.
1708 2006-02-21 Paul Brook <paul@codesourcery.com>
1710 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1712 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1713 Anil Paranjape <anilp1@kpitcummins.com>
1714 Shilin Shakti <shilins@kpitcummins.com>
1716 * Makefile.am: Add xc16x related entry.
1717 * Makefile.in: Regenerate.
1718 * configure.in: Added xc16x related entry.
1719 * configure: Regenerate.
1720 * config/tc-xc16x.h: New file
1721 * config/tc-xc16x.c: New file
1722 * doc/c-xc16x.texi: New file for xc16x
1723 * doc/all.texi: Entry for xc16x
1724 * doc/Makefile.texi: Added c-xc16x.texi
1725 * NEWS: Announce the support for the new target.
1727 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1729 * configure.tgt: set emulation for mips-*-netbsd*
1731 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1733 * config.in: Rebuilt.
1735 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1737 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1738 from 1, not 0, in error messages.
1739 (md_assemble): Simplify special-case check for ENTRY instructions.
1740 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1741 operand in error message.
1743 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1745 * configure.tgt (arm-*-linux-gnueabi*): Change to
1748 2006-02-10 Nick Clifton <nickc@redhat.com>
1750 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1751 32-bit value is propagated into the upper bits of a 64-bit long.
1753 * config/tc-arc.c (init_opcode_tables): Fix cast.
1754 (arc_extoper, md_operand): Likewise.
1756 2006-02-09 David Heine <dlheine@tensilica.com>
1758 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1759 each relaxation step.
1761 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1763 * configure.in (CHECK_DECLS): Add vsnprintf.
1764 * configure: Regenerate.
1765 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1766 include/declare here, but...
1767 * as.h: Move code detecting VARARGS idiom to the top.
1768 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1769 (vsnprintf): Declare if not already declared.
1771 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1773 * as.c (close_output_file): New.
1774 (main): Register close_output_file with xatexit before
1775 dump_statistics. Don't call output_file_close.
1777 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1779 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1780 mcf5329_control_regs): New.
1781 (not_current_architecture, selected_arch, selected_cpu): New.
1782 (m68k_archs, m68k_extensions): New.
1783 (archs): Renamed to ...
1784 (m68k_cpus): ... here. Adjust.
1786 (md_pseudo_table): Add arch and cpu directives.
1787 (find_cf_chip, m68k_ip): Adjust table scanning.
1788 (no_68851, no_68881): Remove.
1789 (md_assemble): Lazily initialize.
1790 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1791 (md_init_after_args): Move functionality to m68k_init_arch.
1792 (mri_chip): Adjust table scanning.
1793 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1794 options with saner parsing.
1795 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1796 m68k_init_arch): New.
1797 (s_m68k_cpu, s_m68k_arch): New.
1798 (md_show_usage): Adjust.
1799 (m68k_elf_final_processing): Set CF EF flags.
1800 * config/tc-m68k.h (m68k_init_after_args): Remove.
1801 (tc_init_after_args): Remove.
1802 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1803 (M68k-Directives): Document .arch and .cpu directives.
1805 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1807 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1808 synonyms for equ and defl.
1809 (z80_cons_fix_new): New function.
1810 (emit_byte): Disallow relative jumps to absolute locations.
1811 (emit_data): Only handle defb, prototype changed, because defb is
1812 now handled as pseudo-op rather than an instruction.
1813 (instab): Entries for defb,defw,db,dw moved from here...
1814 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1815 Add entries for def24,def32,d24,d32.
1816 (md_assemble): Improved error handling.
1817 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1818 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1819 (z80_cons_fix_new): Declare.
1820 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1821 (def24,d24,def32,d32): New pseudo-ops.
1823 2006-02-02 Paul Brook <paul@codesourcery.com>
1825 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1827 2005-02-02 Paul Brook <paul@codesourcery.com>
1829 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1830 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1831 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1832 T2_OPCODE_RSB): Define.
1833 (thumb32_negate_data_op): New function.
1834 (md_apply_fix): Use it.
1836 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1838 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1840 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1841 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1843 (relaxation_requirements): Add pfinish_frag argument and use it to
1844 replace setting tinsn->record_fix fields.
1845 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1846 and vinsn_to_insnbuf. Remove references to record_fix and
1847 slot_sub_symbols fields.
1848 (xtensa_mark_narrow_branches): Delete unused code.
1849 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1851 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1853 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1854 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1855 of the record_fix field. Simplify error messages for unexpected
1857 (set_expr_symbol_offset_diff): Delete.
1859 2006-01-31 Paul Brook <paul@codesourcery.com>
1861 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1863 2006-01-31 Paul Brook <paul@codesourcery.com>
1864 Richard Earnshaw <rearnsha@arm.com>
1866 * config/tc-arm.c: Use arm_feature_set.
1867 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1868 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1869 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1872 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1873 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1874 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1875 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1877 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1878 (arm_opts): Move old cpu/arch options from here...
1879 (arm_legacy_opts): ... to here.
1880 (md_parse_option): Search arm_legacy_opts.
1881 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1882 (arm_float_abis, arm_eabis): Make const.
1884 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1886 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1888 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1890 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1891 in load immediate intruction.
1893 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1895 * config/bfin-parse.y (value_match): Use correct conversion
1896 specifications in template string for __FILE__ and __LINE__.
1900 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1902 Introduce TLS descriptors for i386 and x86_64.
1903 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1904 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1905 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1906 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1907 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1909 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1910 (lex_got): Handle @tlsdesc and @tlscall.
1911 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1913 2006-01-11 Nick Clifton <nickc@redhat.com>
1915 Fixes for building on 64-bit hosts:
1916 * config/tc-avr.c (mod_index): New union to allow conversion
1917 between pointers and integers.
1918 (md_begin, avr_ldi_expression): Use it.
1919 * config/tc-i370.c (md_assemble): Add cast for argument to print
1921 * config/tc-tic54x.c (subsym_substitute): Likewise.
1922 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1923 opindex field of fr_cgen structure into a pointer so that it can
1924 be stored in a frag.
1925 * config/tc-mn10300.c (md_assemble): Likewise.
1926 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1928 * config/tc-v850.c: Replace uses of (int) casts with correct
1931 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1934 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1936 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1939 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1940 a local-label reference.
1942 For older changes see ChangeLog-2005
1948 version-control: never