| blob | 2527e5e8425714d8dd1d96aa6242c08f64b020cd |
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
30 /* Return the relocation section associated with NAME. HTAB is the
31 bfd's elf32_arm_link_hash_entry. */
32 #define RELOC_SECTION(HTAB, NAME) \
35 /* Return size of a relocation entry. HTAB is the bfd's
36 elf32_arm_link_hash_entry. */
37 #define RELOC_SIZE(HTAB) \
38 ((HTAB)->use_rel \
39 ? sizeof (Elf32_External_Rel) \
40 : sizeof (Elf32_External_Rela))
42 /* Return function to swap relocations in. HTAB is the bfd's
43 elf32_arm_link_hash_entry. */
44 #define SWAP_RELOC_IN(HTAB) \
45 ((HTAB)->use_rel \
46 ? bfd_elf32_swap_reloc_in \
47 : bfd_elf32_swap_reloca_in)
49 /* Return function to swap relocations out. HTAB is the bfd's
50 elf32_arm_link_hash_entry. */
51 #define SWAP_RELOC_OUT(HTAB) \
52 ((HTAB)->use_rel \
53 ? bfd_elf32_swap_reloc_out \
54 : bfd_elf32_swap_reloca_out)
56 #define elf_info_to_howto 0
57 #define elf_info_to_howto_rel elf32_arm_info_to_howto
59 #define ARM_ELF_ABI_VERSION 0
60 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
65 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
66 in that slot. */
69 {
70 /* No relocation. */
99 /* 32 bit absolute */
114 /* standard 32bit pc-relative reloc */
129 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
144 /* 16 bit absolute */
159 /* 12 bit absolute */
188 /* 8 bit absolute */
287 /* BLX instruction for the ARM. */
302 /* BLX instruction for the Thumb. */
317 /* Dynamic TLS relocations. */
361 /* Relocs used in ARM Linux */
825 /* These are declared as 13-bit signed relocations because we can
826 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
827 versa. */
884 /* Group relocations. */
1264 /* End of group relocations. */
1427 /* GNU extension to record C++ vtable member usage */
1442 /* GNU extension to record C++ vtable hierarchy */
1485 /* TLS relocations */
1597 };
1599 /* 112-127 private relocations
1600 128 R_ARM_ME_TOO, obsolete
1601 129-255 unallocated in AAELF.
1603 249-255 extended, currently unused, relocations: */
1606 {
1662 };
1666 {
1675 }
1677 static void
1680 {
1685 }
1687 struct elf32_arm_reloc_map
1688 {
1689 bfd_reloc_code_real_type bfd_reloc_val;
1691 };
1693 /* All entries in this list must also be present in elf32_arm_howto_table. */
1695 {
1774 };
1778 bfd_reloc_code_real_type code)
1779 {
1787 }
1792 {
1806 }
1808 /* Support for core dump NOTE sections. */
1810 static bfd_boolean
1812 {
1817 {
1822 /* pr_cursig */
1825 /* pr_pid */
1828 /* pr_reg */
1833 }
1835 /* Make a ".reg/999" section. */
1838 }
1840 static bfd_boolean
1842 {
1844 {
1853 }
1855 /* Note that for some reason, a spurious space is tacked
1856 onto the end of the args in some (at least one anyway)
1857 implementations, so strip it off if it exists. */
1858 {
1864 }
1867 }
1869 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1871 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1874 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1875 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1880 /* In lieu of proper flags, assume all EABIv4 or later objects are
1881 interworkable. */
1882 #define INTERWORK_FLAG(abfd) \
1883 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
1884 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
1886 /* The linker script knows the section names for placement.
1887 The entry_names are used to do simple name mangling on the stubs.
1888 Given a function name, and its type, the stub can be found. The
1889 name can be changed. The only requirement is the %s be present. */
1904 /* The name of the dynamic interpreter. This is put in the .interp
1905 section. */
1908 #ifdef FOUR_WORD_PLT
1910 /* The first entry in a procedure linkage table looks like
1911 this. It is set up so that any shared library function that is
1912 called before the relocation has been set up calls the dynamic
1913 linker first. */
1915 {
1920 };
1922 /* Subsequent entries in a procedure linkage table look like
1923 this. */
1925 {
1930 };
1932 #else
1934 /* The first entry in a procedure linkage table looks like
1935 this. It is set up so that any shared library function that is
1936 called before the relocation has been set up calls the dynamic
1937 linker first. */
1939 {
1945 };
1947 /* Subsequent entries in a procedure linkage table look like
1948 this. */
1950 {
1954 };
1956 #endif
1958 /* The format of the first entry in the procedure linkage table
1959 for a VxWorks executable. */
1961 {
1966 };
1968 /* The format of subsequent entries in a VxWorks executable. */
1970 {
1977 };
1979 /* The format of entries in a VxWorks shared library. */
1981 {
1988 };
1990 /* An initial stub used if the PLT entry is referenced from Thumb code. */
1991 #define PLT_THUMB_STUB_SIZE 4
1993 {
1996 };
1998 /* The entries in a PLT when using a DLL-based target with multiple
1999 address spaces. */
2001 {
2004 };
2006 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2007 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2008 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2009 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2010 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2011 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2013 enum stub_insn_type
2014 {
2016 THUMB32_TYPE,
2017 ARM_TYPE,
2018 DATA_TYPE
2019 };
2021 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2022 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2023 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2024 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2025 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2028 {
2029 bfd_vma data;
2035 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2036 to reach the stub if necessary. */
2038 {
2041 };
2043 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2044 available. */
2046 {
2050 };
2052 /* Thumb -> Thumb long branch stub. Used on architectures which
2053 support only this mode, or on V4T where it is expensive to switch
2054 to ARM. */
2056 {
2064 };
2066 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2067 available. */
2069 {
2074 };
2076 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2077 one, when the destination is close enough. */
2079 {
2083 };
2085 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2086 blx to reach the stub if necessary. */
2088 {
2092 };
2094 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2095 blx to reach the stub if necessary. We can not add into pc;
2096 it is not guaranteed to mode switch (different in ARMv6 and
2097 ARMv7). */
2099 {
2104 };
2106 /* V4T ARM -> ARM long branch stub, PIC. */
2108 {
2113 };
2115 /* V4T Thumb -> ARM long branch stub, PIC. */
2117 {
2123 };
2125 /* Thumb -> Thumb long branch stub, PIC. Used on architectures which
2126 support only this mode, or on V4T where it is expensive to switch
2127 to ARM. */
2129 {
2137 };
2139 /* Section name for stubs is the associated section name plus this
2140 string. */
2143 enum elf32_arm_stub_type
2144 {
2145 arm_stub_none,
2146 arm_stub_long_branch_any_any,
2147 arm_stub_long_branch_v4t_arm_thumb,
2148 arm_stub_long_branch_thumb_only,
2149 arm_stub_long_branch_v4t_thumb_arm,
2150 arm_stub_short_branch_v4t_thumb_arm,
2151 arm_stub_long_branch_any_arm_pic,
2152 arm_stub_long_branch_any_thumb_pic,
2153 arm_stub_long_branch_v4t_arm_thumb_pic,
2154 arm_stub_long_branch_v4t_thumb_arm_pic,
2155 arm_stub_long_branch_thumb_only_pic,
2156 };
2158 struct elf32_arm_stub_hash_entry
2159 {
2160 /* Base hash table entry structure. */
2163 /* The stub section. */
2166 /* Offset within stub_sec of the beginning of this stub. */
2167 bfd_vma stub_offset;
2169 /* Given the symbol's value and its section we can determine its final
2170 value when building the stubs (so the stub knows where to jump). */
2171 bfd_vma target_value;
2174 /* The stub type. */
2176 /* Its encoding size in bytes. */
2178 /* Its template. */
2180 /* The size of the template (number of entries). */
2183 /* The symbol table entry, if any, that this was derived from. */
2186 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2189 /* Where this stub is being called from, or, in the case of combined
2190 stub sections, the first input section in the group. */
2193 /* The name for the local symbol at the start of this stub. The
2194 stub name in the hash table has to be unique; this does not, so
2195 it can be friendlier. */
2197 };
2199 /* Used to build a map of a section. This is required for mixed-endian
2200 code/data. */
2203 {
2204 bfd_vma vma;
2206 }
2207 elf32_arm_section_map;
2209 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2212 {
2213 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2214 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2215 VFP11_ERRATUM_ARM_VENEER,
2216 VFP11_ERRATUM_THUMB_VENEER
2217 }
2218 elf32_vfp11_erratum_type;
2221 {
2223 bfd_vma vma;
2224 union
2225 {
2226 struct
2227 {
2231 struct
2232 {
2237 elf32_vfp11_erratum_type type;
2238 }
2239 elf32_vfp11_erratum_list;
2242 {
2249 }
2250 _arm_elf_section_data;
2252 #define elf32_arm_section_data(sec) \
2253 ((_arm_elf_section_data *) elf_section_data (sec))
2255 /* The size of the thread control block. */
2256 #define TCB_SIZE 8
2258 struct elf_arm_obj_tdata
2259 {
2262 /* tls_type for each local got entry. */
2265 /* Zero to warn when linking objects with incompatible enum sizes. */
2268 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2270 };
2272 #define elf_arm_tdata(bfd) \
2273 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2275 #define elf32_arm_local_got_tls_type(bfd) \
2276 (elf_arm_tdata (bfd)->local_got_tls_type)
2278 #define is_arm_elf(bfd) \
2279 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2280 && elf_tdata (bfd) != NULL \
2281 && elf_object_id (bfd) == ARM_ELF_TDATA)
2283 static bfd_boolean
2285 {
2287 ARM_ELF_TDATA);
2288 }
2290 /* The ARM linker needs to keep track of the number of relocs that it
2291 decides to copy in check_relocs for each symbol. This is so that
2292 it can discard PC relative relocs if it doesn't need them when
2293 linking with -Bsymbolic. We store the information in a field
2294 extending the regular ELF linker hash table. */
2296 /* This structure keeps track of the number of relocs we have copied
2297 for a given symbol. */
2298 struct elf32_arm_relocs_copied
2299 {
2300 /* Next section. */
2302 /* A section in dynobj. */
2304 /* Number of relocs copied in this section. */
2305 bfd_size_type count;
2306 /* Number of PC-relative relocs copied in this section. */
2307 bfd_size_type pc_count;
2308 };
2310 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2312 /* Arm ELF linker hash entry. */
2313 struct elf32_arm_link_hash_entry
2314 {
2317 /* Number of PC relative relocs copied for this symbol. */
2320 /* We reference count Thumb references to a PLT entry separately,
2321 so that we can emit the Thumb trampoline only if needed. */
2322 bfd_signed_vma plt_thumb_refcount;
2324 /* Some references from Thumb code may be eliminated by BL->BLX
2325 conversion, so record them separately. */
2326 bfd_signed_vma plt_maybe_thumb_refcount;
2328 /* Since PLT entries have variable size if the Thumb prologue is
2329 used, we need to record the index into .got.plt instead of
2330 recomputing it from the PLT offset. */
2331 bfd_signed_vma plt_got_offset;
2333 #define GOT_UNKNOWN 0
2334 #define GOT_NORMAL 1
2335 #define GOT_TLS_GD 2
2336 #define GOT_TLS_IE 4
2339 /* The symbol marking the real symbol location for exported thumb
2340 symbols with Arm stubs. */
2343 /* A pointer to the most recently used stub hash entry against this
2344 symbol. */
2346 };
2348 /* Traverse an arm ELF linker hash table. */
2349 #define elf32_arm_link_hash_traverse(table, func, info) \
2350 (elf_link_hash_traverse \
2351 (&(table)->root, \
2352 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2353 (info)))
2355 /* Get the ARM elf linker hash table from a link_info structure. */
2356 #define elf32_arm_hash_table(info) \
2357 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2359 #define arm_stub_hash_lookup(table, string, create, copy) \
2360 ((struct elf32_arm_stub_hash_entry *) \
2361 bfd_hash_lookup ((table), (string), (create), (copy)))
2363 /* ARM ELF linker hash table. */
2364 struct elf32_arm_link_hash_table
2365 {
2366 /* The main hash table. */
2369 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2370 bfd_size_type thumb_glue_size;
2372 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2373 bfd_size_type arm_glue_size;
2375 /* The size in bytes of section containing the ARMv4 BX veneers. */
2376 bfd_size_type bx_glue_size;
2378 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2379 veneer has been populated. */
2382 /* The size in bytes of the section containing glue for VFP11 erratum
2383 veneers. */
2384 bfd_size_type vfp11_erratum_glue_size;
2386 /* An arbitrary input BFD chosen to hold the glue sections. */
2389 /* Nonzero to output a BE8 image. */
2392 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2393 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2396 /* The relocation to use for R_ARM_TARGET2 relocations. */
2399 /* 0 = Ignore R_ARM_V4BX.
2400 1 = Convert BX to MOV PC.
2401 2 = Generate v4 interworing stubs. */
2404 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2407 /* What sort of code sequences we should look for which may trigger the
2408 VFP11 denorm erratum. */
2409 bfd_arm_vfp11_fix vfp11_fix;
2411 /* Global counter for the number of fixes we have emitted. */
2414 /* Nonzero to force PIC branch veneers. */
2417 /* The number of bytes in the initial entry in the PLT. */
2418 bfd_size_type plt_header_size;
2420 /* The number of bytes in the subsequent PLT etries. */
2421 bfd_size_type plt_entry_size;
2423 /* True if the target system is VxWorks. */
2426 /* True if the target system is Symbian OS. */
2429 /* True if the target uses REL relocations. */
2432 /* Short-cuts to get to dynamic linker sections. */
2441 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2444 /* Data for R_ARM_TLS_LDM32 relocations. */
2445 union
2446 {
2447 bfd_signed_vma refcount;
2448 bfd_vma offset;
2451 /* Small local sym to section mapping cache. */
2454 /* For convenience in allocate_dynrelocs. */
2457 /* The stub hash table. */
2460 /* Linker stub bfd. */
2463 /* Linker call-backs. */
2467 /* Array to keep track of which stub sections have been created, and
2468 information on stub grouping. */
2469 struct map_stub
2470 {
2471 /* This is the section to which stubs in the group will be
2472 attached. */
2474 /* The stub section. */
2478 /* Assorted information used by elf32_arm_size_stubs. */
2482 };
2484 /* Create an entry in an ARM ELF linker hash table. */
2490 {
2494 /* Allocate the structure if it has not already been allocated by a
2495 subclass. */
2501 /* Call the allocation method of the superclass. */
2506 {
2515 }
2518 }
2520 /* Initialize an entry in the stub hash table. */
2526 {
2527 /* Allocate the structure if it has not already been allocated by a
2528 subclass. */
2530 {
2535 }
2537 /* Call the allocation method of the superclass. */
2540 {
2543 /* Initialize the local fields. */
2555 }
2558 }
2560 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
2561 shortcuts to them in our hash table. */
2563 static bfd_boolean
2565 {
2569 /* BPABI objects never have a GOT, or associated sections. */
2584 | SEC_HAS_CONTENTS
2585 | SEC_IN_MEMORY
2586 | SEC_LINKER_CREATED
2592 }
2594 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2595 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
2596 hash table. */
2598 static bfd_boolean
2600 {
2619 {
2624 {
2626 htab->plt_entry_size
2628 }
2629 else
2630 {
2631 htab->plt_header_size
2633 htab->plt_entry_size
2635 }
2636 }
2645 }
2647 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2649 static void
2653 {
2660 {
2662 {
2666 /* Add reloc counts against the indirect sym to the direct sym
2667 list. Merge any entries against the same section. */
2669 {
2674 {
2679 }
2682 }
2684 }
2688 }
2691 {
2692 /* Copy over PLT info. */
2699 {
2702 }
2703 }
2706 }
2708 /* Create an ARM elf linker hash table. */
2712 {
2721 elf32_arm_link_hash_newfunc,
2723 {
2726 }
2747 #ifdef FOUR_WORD_PLT
2750 #else
2753 #endif
2772 {
2775 }
2778 }
2780 /* Free the derived linker hash table. */
2782 static void
2784 {
2790 }
2792 /* Determine if we're dealing with a Thumb only architecture. */
2794 static bfd_boolean
2796 {
2798 Tag_CPU_arch);
2805 Tag_CPU_arch_profile);
2808 }
2810 /* Determine if we're dealing with a Thumb-2 object. */
2812 static bfd_boolean
2814 {
2816 Tag_CPU_arch);
2818 }
2820 static bfd_boolean
2822 {
2824 {
2837 }
2838 }
2840 /* Determine the type of stub needed, if any, for a call. */
2842 static enum elf32_arm_stub_type
2848 bfd_vma destination,
2852 {
2853 bfd_vma location;
2854 bfd_signed_vma branch_offset;
2861 /* We don't know the actual type of destination in case it is of
2862 type STT_SECTION: give up. */
2872 /* Determine where the call point is. */
2881 /* If the call will go through a PLT entry then we do not need
2882 glue. */
2887 {
2891 || (thumb2
2895 {
2897 {
2898 /* Thumb to thumb. */
2900 {
2902 /* PIC stubs. */
2904 /* V5T and above. */
2905 ? arm_stub_long_branch_any_thumb_pic
2906 /* On V4T, use Thumb code only. */
2909 /* non-PIC stubs. */
2911 /* V5T and above. */
2912 ? arm_stub_long_branch_any_any
2913 /* V4T. */
2915 }
2916 else
2917 {
2919 /* PIC stub. */
2920 ? arm_stub_long_branch_thumb_only_pic
2921 /* non-PIC stub. */
2923 }
2924 }
2925 else
2926 {
2927 /* Thumb to arm. */
2931 {
2936 }
2939 /* PIC stubs. */
2941 /* V5T and above. */
2942 ? arm_stub_long_branch_any_arm_pic
2943 /* V4T PIC stub. */
2946 /* non-PIC stubs. */
2948 /* V5T and above. */
2949 ? arm_stub_long_branch_any_any
2950 /* V4T. */
2953 /* Handle v4t short branches. */
2958 }
2959 }
2960 }
2962 {
2964 {
2965 /* Arm to thumb. */
2970 {
2975 }
2977 /* We have an extra 2-bytes reach because of
2978 the mode change (bit 24 (H) of BLX encoding). */
2982 {
2984 /* PIC stubs. */
2986 /* V5T and above. */
2987 ? arm_stub_long_branch_any_thumb_pic
2988 /* V4T stub. */
2991 /* non-PIC stubs. */
2993 /* V5T and above. */
2994 ? arm_stub_long_branch_any_any
2995 /* V4T. */
2997 }
2998 }
2999 else
3000 {
3001 /* Arm to arm. */
3004 {
3006 /* PIC stubs. */
3007 ? arm_stub_long_branch_any_arm_pic
3008 /* non-PIC stubs. */
3010 }
3011 }
3012 }
3015 }
3017 /* Build a name for an entry in the stub hash table. */
3024 {
3026 bfd_size_type len;
3029 {
3037 }
3038 else
3039 {
3048 }
3051 }
3053 /* Look up an entry in the stub hash. Stub entries are cached because
3054 creating the stub name takes a bit of time. */
3062 {
3070 /* If this input section is part of a group of sections sharing one
3071 stub section, then use the id of the first section in the group.
3072 Stub names need to include a section id, as there may well be
3073 more than one stub used to reach say, printf, and we need to
3074 distinguish between them. */
3080 {
3082 }
3083 else
3084 {
3097 }
3100 }
3102 /* Add a new stub entry to the stub hash. Not all fields of the new
3103 stub entry are initialised. */
3109 {
3117 {
3120 {
3122 bfd_size_type len;
3137 }
3139 }
3141 /* Enter this entry into the linker stub hash table. */
3145 {
3148 stub_name);
3150 }
3157 }
3159 /* Store an Arm insn into an output section not processed by
3160 elf32_arm_write_section. */
3162 static void
3165 {
3168 else
3170 }
3172 /* Store a 16-bit Thumb insn into an output section not processed by
3173 elf32_arm_write_section. */
3175 static void
3178 {
3181 else
3183 }
3185 static bfd_boolean
3188 {
3194 bfd_vma stub_addr;
3196 bfd_vma sym_value;
3205 /* Massage our args to the form they really have. */
3214 /* Make a note of the offset within the stubs for this entry. */
3220 /* This is the address of the start of the stub. */
3224 /* This is the address of the stub destination. */
3234 {
3236 {
3244 /* Handle cases where the target is encoded within the
3245 instruction. */
3247 {
3250 }
3264 }
3265 }
3269 /* Stub size has already been computed in arm_size_one_stub. Check
3270 consistency. */
3273 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3277 /* Assume there is one and only one entry to relocate in each stub. */
3286 }
3288 /* As above, but don't actually build the stub. Just bump offset so
3289 we know stub section sizes. */
3291 static bfd_boolean
3294 {
3302 /* Massage our args to the form they really have. */
3307 {
3351 }
3355 {
3357 {
3373 }
3374 }
3384 }
3386 /* External entry points for sizing and building linker stubs. */
3388 /* Set up various things so that we can make a list of input sections
3389 for each output section included in the link. Returns -1 on error,
3390 0 when no stubs will be needed, and 1 on success. */
3392 int
3395 {
3401 bfd_size_type amt;
3407 /* Count the number of input BFDs and find the top input section id. */
3411 {
3416 {
3419 }
3420 }
3428 /* We can't use output_bfd->section_count here to find the top output
3429 section index as some sections may have been removed, and
3430 _bfd_strip_section_from_output doesn't renumber the indices. */
3434 {
3437 }
3446 /* For sections we aren't interested in, mark their entries with a
3447 value we can check later. */
3449 do
3456 {
3459 }
3462 }
3464 /* The linker repeatedly calls this function for each input section,
3465 in the order that input sections are linked into output sections.
3466 Build lists of input sections to determine groupings between which
3467 we may insert linker stubs. */
3469 void
3472 {
3476 {
3480 {
3481 /* Steal the link_sec pointer for our list. */
3482 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3483 /* This happens to make the list in reverse order,
3484 which we reverse later. */
3487 }
3488 }
3489 }
3491 /* See whether we can group stub sections together. Grouping stub
3492 sections may result in fewer stubs. More importantly, we need to
3493 put all .init* and .fini* stubs at the end of the .init or
3494 .fini output sections respectively, because glibc splits the
3495 _init and _fini functions into multiple parts. Putting a stub in
3496 the middle of a function is not a good idea. */
3498 static void
3500 bfd_size_type stub_group_size,
3501 bfd_boolean stubs_always_after_branch)
3502 {
3505 do
3506 {
3514 /* Reverse the list: we must avoid placing stubs at the
3515 beginning of the section because the beginning of the text
3516 section may be required for an interrupt vector in bare metal
3517 code. */
3518 #define NEXT_SEC PREV_SEC
3522 {
3529 }
3532 {
3535 bfd_size_type total;
3544 /* OK, the size from the start to the start of CURR is less
3545 than stub_group_size and thus can be handled by one stub
3546 section. (Or the head section is itself larger than
3547 stub_group_size, in which case we may be toast.)
3548 We should really be keeping track of the total size of
3549 stubs added here, as stubs contribute to the final output
3550 section size. */
3551 do
3552 {
3554 /* Set up this stub group. */
3556 }
3559 /* But wait, there's more! Input sections up to stub_group_size
3560 bytes after the stub section can be handled by it too. */
3562 {
3567 {
3571 }
3572 }
3574 }
3575 }
3579 #undef PREV_SEC
3580 #undef NEXT_SEC
3581 }
3583 /* Determine and set the size of the stub section for a final link.
3585 The basic idea here is to examine all the relocations looking for
3586 PC-relative calls to a target that is unreachable with a "bl"
3587 instruction. */
3589 bfd_boolean
3593 bfd_signed_vma group_size,
3596 {
3597 bfd_size_type stub_group_size;
3598 bfd_boolean stubs_always_after_branch;
3602 /* Propagate mach to stub bfd, because it may not have been
3603 finalized when we created stub_bfd. */
3607 /* Stash our params away. */
3614 else
3618 {
3619 /* Default values. */
3620 /* Thumb branch range is +-4MB has to be used as the default
3621 maximum size (a given section can contain both ARM and Thumb
3622 code, so the worst case has to be taken into account).
3624 This value is 24K less than that, which allows for 2025
3625 12-byte stubs. If we exceed that, then we will fail to link.
3626 The user will have to relink with an explicit group size
3627 option. */
3629 }
3634 {
3642 {
3647 /* We'll need the symbol table in a second. */
3652 /* Walk over each section attached to the input bfd. */
3656 {
3659 /* If there aren't any relocs, then there's nothing more
3660 to do. */
3666 /* If this section is a link-once section that will be
3667 discarded, then don't create any stubs. */
3672 /* Get the relocs. */
3673 internal_relocs
3679 /* Now examine each relocation. */
3683 {
3688 bfd_vma sym_value;
3689 bfd_vma destination;
3700 {
3702 error_ret_free_internal:
3706 }
3708 /* Only look for stubs on call instructions. */
3713 /* Now determine the call target, its name, value,
3714 section. */
3721 {
3722 /* It's a local symbol. */
3727 {
3728 local_syms
3731 local_syms
3737 }
3748 sym_name
3752 }
3753 else
3754 {
3755 /* It's an external symbol. */
3769 {
3776 }
3779 /* For a shared library, these will need a PLT stub,
3780 which is treated separately.
3781 For absolute code, they cannot be handled. */
3783 else
3784 {
3787 }
3790 }
3792 /* Determine what (if any) linker stub is needed. */
3799 /* Support for grouping stub sections. */
3802 /* Get the name of this stub. */
3808 stub_name,
3811 {
3812 /* The proper stub has already been created. */
3815 }
3819 {
3822 }
3832 stub_entry->output_name
3837 {
3840 }
3842 /* For historical reasons, use the existing names for
3843 ARM-to-Thumb and Thumb-to-ARM stubs. */
3847 sym_name);
3851 sym_name);
3852 else
3854 sym_name);
3857 }
3859 /* We're done with the internal relocs, free them. */
3862 }
3863 }
3868 /* OK, we've added some stubs. Find out the new size of the
3869 stub sections. */
3877 /* Ask the linker to do its stuff. */
3880 }
3884 error_ret_free_local:
3886 }
3888 /* Build all the stubs associated with the current output file. The
3889 stubs are kept in a hash table attached to the main linker hash
3890 table. We also set up the .plt entries for statically linked PIC
3891 functions here. This function is called via arm_elf_finish in the
3892 linker. */
3894 bfd_boolean
3896 {
3906 {
3907 bfd_size_type size;
3909 /* Ignore non-stub sections. */
3913 /* Allocate memory to hold the linker stubs. */
3919 }
3921 /* Build the stubs as directed by the stub hash table. */
3926 }
3928 /* Locate the Thumb encoded calling stub for NAME. */
3934 {
3939 /* We need a pointer to the armelf specific hash table. */
3949 hash = elf_link_hash_lookup
3960 }
3962 /* Locate the ARM encoded calling stub for NAME. */
3968 {
3973 /* We need a pointer to the elfarm specific hash table. */
3983 myh = elf_link_hash_lookup
3994 }
3996 /* ARM->Thumb glue (static images):
3998 .arm
3999 __func_from_arm:
4000 ldr r12, __func_addr
4001 bx r12
4002 __func_addr:
4003 .word func @ behave as if you saw a ARM_32 reloc.
4005 (v5t static images)
4006 .arm
4007 __func_from_arm:
4008 ldr pc, __func_addr
4009 __func_addr:
4010 .word func @ behave as if you saw a ARM_32 reloc.
4012 (relocatable images)
4013 .arm
4014 __func_from_arm:
4015 ldr r12, __func_offset
4016 add r12, r12, pc
4017 bx r12
4018 __func_offset:
4019 .word func - . */
4021 #define ARM2THUMB_STATIC_GLUE_SIZE 12
4026 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4030 #define ARM2THUMB_PIC_GLUE_SIZE 16
4035 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
4037 .thumb .thumb
4038 .align 2 .align 2
4039 __func_from_thumb: __func_from_thumb:
4040 bx pc push {r6, lr}
4041 nop ldr r6, __func_addr
4042 .arm mov lr, pc
4043 b func bx r6
4044 .arm
4045 ;; back_to_thumb
4046 ldmia r13! {r6, lr}
4047 bx lr
4048 __func_addr:
4049 .word func */
4051 #define THUMB2ARM_GLUE_SIZE 8
4056 #define VFP11_ERRATUM_VENEER_SIZE 8
4058 #define ARM_BX_VENEER_SIZE 12
4063 #ifndef ELFARM_NABI_C_INCLUDED
4064 static void
4066 {
4082 }
4084 bfd_boolean
4086 {
4094 ARM2THUMB_GLUE_SECTION_NAME);
4098 THUMB2ARM_GLUE_SECTION_NAME);
4102 VFP11_ERRATUM_VENEER_SECTION_NAME);
4106 ARM_BX_GLUE_SECTION_NAME);
4109 }
4111 /* Allocate space and symbols for calling a Thumb function from Arm mode.
4112 returns the symbol identifying the stub. */
4117 {
4124 bfd_vma val;
4125 bfd_size_type size;
4132 s = bfd_get_section_by_name
4137 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
4143 myh = elf_link_hash_lookup
4147 {
4148 /* We've already seen this guy. */
4151 }
4153 /* The only trick here is using hash_table->arm_glue_size as the value.
4154 Even though the section isn't allocated yet, this is where we will be
4155 putting it. The +1 on the value marks that the stub has not been
4156 output yet - not that it is a Thumb function. */
4174 else
4181 }
4183 static void
4186 {
4193 bfd_vma val;
4200 s = bfd_get_section_by_name
4212 myh = elf_link_hash_lookup
4216 {
4217 /* We've already seen this guy. */
4220 }
4222 /* The only trick here is using hash_table->thumb_glue_size as the value.
4223 Even though the section isn't allocated yet, this is where we will be
4224 putting it. The +1 on the value marks that the stub has not been
4225 output yet - not that it is a Thumb function. */
4232 /* If we mark it 'Thumb', the disassembler will do a better job. */
4242 /* Allocate another symbol to mark where we switch to Arm mode. */
4260 }
4263 /* Allocate space for ARMv4 BX veneers. */
4265 static void
4267 {
4273 bfd_vma val;
4275 /* BX PC does not need a veneer. */
4284 /* Check if this veneer has already been allocated. */
4288 s = bfd_get_section_by_name
4293 /* Add symbol for veneer. */
4300 myh = elf_link_hash_lookup
4318 }
4321 /* Add an entry to the code/data map for section SEC. */
4323 static void
4325 {
4330 {
4334 }
4339 {
4343 }
4346 {
4349 }
4350 }
4353 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
4354 veneers are handled for now. */
4356 static bfd_vma
4362 {
4368 bfd_vma val;
4378 s = bfd_get_section_by_name
4393 myh = elf_link_hash_lookup
4408 /* Link veneer back to calling location. */
4421 /* A symbol for the return from the veneer. */
4425 myh = elf_link_hash_lookup
4442 /* Generate a mapping symbol for the veneer section, and explicitly add an
4443 entry for that symbol to the code/data map for the section. */
4445 {
4447 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
4448 ever requires this erratum fix. */
4458 /* The elf32_arm_init_maps function only cares about symbols from input
4459 BFDs. We must make a note of this generated mapping symbol
4460 ourselves so that code byteswapping works properly in
4461 elf32_arm_write_section. */
4463 }
4469 /* The offset of the veneer. */
4471 }
4473 /* Note: we do not include the flag SEC_LINKER_CREATED, as that
4474 would prevent elf_link_input_bfd() from processing the contents
4475 of the section. */
4476 #define ARM_GLUE_SECTION_FLAGS \
4477 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY)
4479 /* Create a fake section for use by the ARM backend of the linker. */
4481 static bfd_boolean
4483 {
4488 /* Already made. */
4497 /* Set the gc mark to prevent the section from being removed by garbage
4498 collection, despite the fact that no relocs refer to this section. */
4502 }
4504 /* Add the glue sections to ABFD. This function is called from the
4505 linker scripts in ld/emultempl/{armelf}.em. */
4507 bfd_boolean
4510 {
4511 /* If we are only performing a partial
4512 link do not bother adding the glue. */
4516 /* Linker stubs don't need glue. */
4524 }
4526 /* Select a BFD to be used to hold the sections used by the glue code.
4527 This function is called from the linker scripts in ld/emultempl/
4528 {armelf/pe}.em. */
4530 bfd_boolean
4532 {
4535 /* If we are only performing a partial link
4536 do not bother getting a bfd to hold the glue. */
4540 /* Make sure we don't attach the glue sections to a dynamic object. */
4550 /* Save the bfd for later use. */
4554 }
4556 static void
4558 {
4562 }
4564 bfd_boolean
4567 {
4576 /* If we are only performing a partial link do not bother
4577 to construct any glue. */
4581 /* Here we have a bfd that is to be included on the link. We have a
4582 hook to do reloc rummaging, before section sizes are nailed down. */
4590 {
4592 abfd);
4594 }
4596 /* PR 5398: If we have not decided to include any loadable sections in
4597 the output then we will not have a glue owner bfd. This is OK, it
4598 just means that there is nothing else for us to do here. */
4602 /* Rummage around all the relocs and map the glue vectors. */
4609 {
4618 /* Load the relocs. */
4619 internal_relocs
4627 {
4636 /* These are the only relocation types we care about. */
4644 /* Get the section contents if we haven't done so already. */
4646 {
4647 /* Get cached copy if it exists. */
4650 else
4651 {
4652 /* Go get them off disk. */
4655 }
4656 }
4659 {
4665 }
4667 /* If the relocation is not against a symbol it cannot concern us. */
4670 /* We don't care about local symbols. */
4674 /* This is an external symbol. */
4679 /* If the relocation is against a static symbol it must be within
4680 the current section and so cannot be a cross ARM/Thumb relocation. */
4684 /* If the call will go through a PLT entry then we do not need
4685 glue. */
4690 {
4694 /* This one is a call from arm code. We need to look up
4695 the target of the call. If it is a thumb target, we
4696 insert glue. */
4702 /* This one is a call from thumb code. We look
4703 up the target of the call. If it is not a thumb
4704 target, we insert glue. */
4713 }
4714 }
4725 }
4729 error_return:
4738 }
4739 #endif
4742 /* Initialise maps of ARM/Thumb/data for input BFDs. */
4744 void
4746 {
4751 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
4761 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
4762 should contain the number of local symbols, which should come before any
4763 global symbols. Mapping symbols are always local. */
4765 NULL);
4767 /* No internal symbols read? Skip this BFD. */
4772 {
4779 {
4784 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
4786 }
4787 }
4788 }
4791 void
4793 {
4797 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
4799 {
4801 {
4808 /* Give a warning, but do as the user requests anyway. */
4811 }
4812 }
4814 /* For earlier architectures, we might need the workaround, but do not
4815 enable it by default. If users is running with broken hardware, they
4816 must enable the erratum fix explicitly. */
4818 }
4821 enum bfd_arm_vfp11_pipe
4822 {
4823 VFP11_FMAC,
4824 VFP11_LS,
4825 VFP11_DS,
4826 VFP11_BAD
4827 };
4829 /* Return a VFP register number. This is encoded as RX:X for single-precision
4830 registers, or X:RX for double-precision registers, where RX is the group of
4831 four bits in the instruction encoding and X is the single extension bit.
4832 RX and X fields are specified using their lowest (starting) bit. The return
4833 value is:
4835 0...31: single-precision registers s0...s31
4836 32...63: double-precision registers d0...d31.
4838 Although X should be zero for VFP11 (encoding d0...d15 only), we might
4839 encounter VFP3 instructions, so we allow the full range for DP registers. */
4841 static unsigned int
4844 {
4847 else
4849 }
4851 /* Set bits in *WMASK according to a register number REG as encoded by
4852 bfd_arm_vfp11_regno(). Ignore d16-d31. */
4854 static void
4856 {
4861 }
4863 /* Return TRUE if WMASK overwrites anything in REGS. */
4865 static bfd_boolean
4867 {
4871 {
4884 }
4887 }
4889 /* In this function, we're interested in two things: finding input registers
4890 for VFP data-processing instructions, and finding the set of registers which
4891 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
4892 hold the written set, so FLDM etc. are easy to deal with (we're only
4893 interested in 32 SP registers or 16 dp registers, due to the VFP version
4894 implemented by the chip in question). DP registers are marked by setting
4895 both SP registers in the write mask). */
4897 static enum bfd_arm_vfp11_pipe
4900 {
4905 {
4915 {
4937 vfp_binop:
4945 {
4950 {
4964 /* These instructions will not bounce due to underflow. */
4970 /* fsqrt cannot underflow, but it can (perhaps) overwrite
4971 registers to cause the erratum in previous instructions. */
4977 {
4982 /* Only FCVTSD can underflow. */
4989 }
4994 }
4995 }
5000 }
5001 }
5002 /* Two-register transfer. */
5004 {
5008 {
5011 else
5012 {
5015 }
5016 }
5019 }
5021 {
5026 {
5033 {
5041 }
5051 }
5054 }
5055 /* Single-register transfer. Note L==0. */
5057 {
5062 {
5065 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5066 destination register. I don't know if this is exactly right,
5067 but it is the conservative choice. */
5073 }
5076 }
5079 }
5085 /* Look for potentially-troublesome code sequences which might trigger the
5086 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5087 (available from ARM) for details of the erratum. A short version is
5088 described in ld.texinfo. */
5090 bfd_boolean
5092 {
5100 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5101 The states transition as follows:
5103 0 -> 1 (vector) or 0 -> 2 (scalar)
5104 A VFP FMAC-pipeline instruction has been seen. Fill
5105 regs[0]..regs[numregs-1] with its input operands. Remember this
5106 instruction in 'first_fmac'.
5108 1 -> 2
5109 Any instruction, except for a VFP instruction which overwrites
5110 regs[*].
5112 1 -> 3 [ -> 0 ] or
5113 2 -> 3 [ -> 0 ]
5114 A VFP instruction has been seen which overwrites any of regs[*].
5115 We must make a veneer! Reset state to 0 before examining next
5116 instruction.
5118 2 -> 0
5119 If we fail to match anything in state 2, reset to state 0 and reset
5120 the instruction pointer to the instruction after 'first_fmac'.
5122 If the VFP11 vector mode is in use, there must be at least two unrelated
5123 instructions between anti-dependent VFP11 instructions to properly avoid
5124 triggering the erratum, hence the use of the extra state 1. */
5126 /* If we are only performing a partial link do not bother
5127 to construct any glue. */
5131 /* Skip if this bfd does not correspond to an ELF image. */
5135 /* We should have chosen a fix type by the time we get here. */
5141 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5146 {
5150 /* If we don't have executable progbits, we're not interested in this
5151 section. Also skip if section is to be excluded. */
5171 elf32_arm_compare_mapping);
5174 {
5180 /* FIXME: Only ARM mode is supported at present. We may need to
5181 support Thumb-2 mode also at some point. */
5186 {
5201 {
5205 /* I'm assuming the VFP11 erratum can trigger with denorm
5206 operands on either the FMAC or the DS pipeline. This might
5207 lead to slightly overenthusiastic veneer insertion. */
5209 {
5213 }
5217 {
5220 other_regs,
5224 numregs))
5226 else
5228 }
5232 {
5235 other_regs,
5239 numregs))
5241 else
5242 {
5245 }
5246 }
5251 }
5254 {
5255 elf32_vfp11_erratum_list *newerr
5264 {
5271 }
5274 first_fmac);
5282 }
5285 }
5286 }
5292 }
5296 error_return:
5302 }
5304 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
5305 after sections have been laid out, using specially-named symbols. */
5307 void
5310 {
5318 /* Skip if this bfd does not correspond to an ELF image. */
5328 {
5333 {
5335 bfd_vma vma;
5338 {
5341 /* Find veneer symbol. */
5345 myh = elf_link_hash_lookup
5361 /* Find return location. */
5365 myh = elf_link_hash_lookup
5381 }
5382 }
5383 }
5386 }
5389 /* Set target relocation values needed during linking. */
5391 void
5398 bfd_arm_vfp11_fix vfp11_fix,
5401 {
5413 else
5414 {
5416 target2_type);
5417 }
5426 }
5428 /* Replace the target offset of a Thumb bl or b.w instruction. */
5430 static void
5432 {
5433 bfd_vma upper;
5434 bfd_vma lower;
5451 }
5453 /* Thumb code calling an ARM function. */
5455 static int
5463 bfd_vma offset,
5464 bfd_signed_vma addend,
5465 bfd_vma val,
5467 {
5469 bfd_vma my_offset;
5486 THUMB2ARM_GLUE_SECTION_NAME);
5493 {
5497 {
5504 }
5515 ret_offset =
5516 /* Address of destination of the stub. */
5519 /* Offset from the start of the current section
5520 to the start of the stubs. */
5522 /* Offset of the start of this stub from the start of the stubs. */
5523 + my_offset
5524 /* Address of the start of the current section. */
5526 /* The branch instruction is 4 bytes into the stub. */
5528 /* ARM branches work from the pc of the instruction + 8. */
5534 }
5538 /* Now go back and fix up the original BL insn to point to here. */
5539 ret_offset =
5540 /* Address of where the stub is located. */
5542 /* Address of where the BL is located. */
5545 /* Addend in the relocation. */
5546 - addend
5547 /* Biassing for PC-relative addressing. */
5553 }
5555 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
5563 bfd_vma val,
5566 {
5567 bfd_vma my_offset;
5584 {
5588 {
5593 }
5600 {
5601 /* For relocatable objects we can't use absolute addresses,
5602 so construct the address from a relative offset. */
5603 /* TODO: If the offset is small it's probably worth
5604 constructing the address with adds. */
5611 /* Adjust the offset by 4 for the position of the add,
5612 and 8 for the pipeline offset. */
5619 }
5621 {
5625 /* It's a thumb address. Add the low order bit. */
5628 }
5629 else
5630 {
5637 /* It's a thumb address. Add the low order bit. */
5642 }
5643 }
5648 }
5650 /* Arm code calling a Thumb function. */
5652 static int
5660 bfd_vma offset,
5661 bfd_signed_vma addend,
5662 bfd_vma val,
5664 {
5666 bfd_vma my_offset;
5678 ARM2THUMB_GLUE_SECTION_NAME);
5692 /* Somehow these are both 4 too far, so subtract 8. */
5694 + my_offset
5706 }
5708 /* Populate Arm stub for an exported Thumb function. */
5710 static bfd_boolean
5712 {
5719 bfd_vma val;
5723 /* Allocate stubs for exported Thumb functions on v4t. */
5733 ARM2THUMB_GLUE_SECTION_NAME);
5751 }
5753 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
5755 static bfd_vma
5757 {
5759 bfd_vma glue_addr;
5769 ARM_BX_GLUE_SECTION_NAME);
5779 {
5785 }
5788 }
5790 /* Generate Arm stubs for exported Thumb symbols. */
5791 static void
5794 {
5798 /* Ignore this if we are not called by the ELF backend linker. */
5802 /* If blx is available then exported Thumb symbols are OK and there is
5803 nothing to do. */
5808 link_info);
5809 }
5811 /* Some relocations map to different relocations depending on the
5812 target. Return the real relocation. */
5814 static int
5817 {
5819 {
5823 else
5831 }
5832 }
5834 /* Return the base VMA address which should be subtracted from real addresses
5835 when resolving @dtpoff relocation.
5836 This is PT_TLS segment p_vaddr. */
5838 static bfd_vma
5840 {
5841 /* If tls_sec is NULL, we should have signalled an error already. */
5845 }
5847 /* Return the relocation value for @tpoff relocation
5848 if STT_TLS virtual address is ADDRESS. */
5850 static bfd_vma
5852 {
5854 bfd_vma base;
5856 /* If tls_sec is NULL, we should have signalled an error already. */
5861 }
5863 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
5864 VALUE is the relocation value. */
5866 static bfd_reloc_status_type
5868 {
5875 }
5877 /* For a given value of n, calculate the value of G_n as required to
5878 deal with group relocations. We return it in the form of an
5879 encoded constant-and-rotation, together with the final residual. If n is
5880 specified as less than zero, then final_residual is filled with the
5881 input value and no further action is performed. */
5883 static bfd_vma
5885 {
5887 bfd_vma g_n;
5892 {
5895 /* Calculate which part of the value to mask. */
5898 else
5899 {
5902 /* Determine the most significant bit in the residual and
5903 align the resulting value to a 2-bit boundary. */
5908 /* The desired shift is now (msb - 6), or zero, whichever
5909 is the greater. */
5913 }
5915 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
5920 /* Calculate the residual for the next time around. */
5922 }
5927 }
5929 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
5930 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
5932 static int
5934 {
5944 }
5946 /* Perform a relocation as part of a final link. */
5948 static bfd_reloc_status_type
5955 bfd_vma value,
5963 {
5974 bfd_vma addend;
5975 bfd_signed_vma signed_addend;
5982 /* Some relocation types map to different relocations depending on the
5983 target. We pick the right one here. */
5988 /* If the start address has been set, then set the EF_ARM_HASENTRY
5989 flag. Setting this more than once is redundant, but the cost is
5990 not too high, and it keeps the code simple.
5992 The test is done here, rather than somewhere else, because the
5993 start address is only set just before the final link commences.
5995 Note - if the user deliberately sets a start address of 0, the
5996 flag will not be set. */
6002 {
6005 }
6012 {
6016 {
6020 }
6021 else
6023 }
6024 else
6028 {
6030 /* We don't need to find a value for this symbol. It's just a
6031 marker. */
6049 /* Handle relocations which should use the PLT entry. ABS32/REL32
6050 will use the symbol's value, which may point to a PLT entry, but we
6051 don't need to handle that here. If we created a PLT entry, all
6052 branches in this object should go to it. */
6058 {
6059 /* If we've created a .plt section, and assigned a PLT entry to
6060 this function, it should not be known to bind locally. If
6061 it were, we would have cleared the PLT entry. */
6071 }
6073 /* When generating a shared object or relocatable executable, these
6074 relocations are copied into the output file to be resolved at
6075 run time. */
6091 {
6092 Elf_Internal_Rela outrel;
6099 {
6105 }
6129 else
6130 {
6133 /* This symbol is local, or marked to become local. */
6137 {
6140 /* On Symbian OS, the data segment and text segement
6141 can be relocated independently. Therefore, we
6142 must indicate the segment to which this
6143 relocation is relative. The BPABI allows us to
6144 use any symbol in the right segment; we just use
6145 the section symbol as it is convenient. (We
6146 cannot use the symbol given by "h" directly as it
6147 will not appear in the dynamic symbol table.)
6149 Note that the dynamic linker ignores the section
6150 symbol value, so we don't subtract osec->vma
6151 from the emitted reloc addend. */
6154 else
6158 {
6164 else
6167 }
6169 }
6170 else
6171 /* On SVR4-ish systems, the dynamic loader cannot
6172 relocate the text and data segments independently,
6173 so the symbol does not matter. */
6178 else
6180 }
6186 /* If this reloc is against an external symbol, we do not want to
6187 fiddle with the addend. Otherwise, we need to include the symbol
6188 value so that it becomes an addend for the dynamic reloc. */
6195 }
6197 {
6206 {
6207 bfd_vma from;
6208 bfd_signed_vma branch_offset;
6217 {
6218 /* Check for Arm calling Arm function. */
6219 /* FIXME: Should we translate the instruction into a BL
6220 instruction instead ? */
6224 input_bfd,
6226 }
6228 {
6229 /* Check for Arm calling Thumb function. */
6231 {
6236 error_message))
6238 else
6240 }
6241 }
6243 /* Check if a stub has to be inserted because the
6244 destination is too far or we are changing mode. */
6246 {
6250 {
6251 /* The target is out of reach, so redirect the
6252 branch to the local stub for this function. */
6261 }
6262 }
6264 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6265 where:
6266 S is the address of the symbol in the relocation.
6267 P is address of the instruction being relocated.
6268 A is the addend (extracted from the instruction) in bytes.
6270 S is held in 'value'.
6271 P is the base address of the section containing the
6272 instruction plus the offset of the reloc into that
6273 section, ie:
6274 (input_section->output_section->vma +
6275 input_section->output_offset +
6276 rel->r_offset).
6277 A is the addend, converted into bytes, ie:
6278 (signed_addend * 4)
6280 Note: None of these operations have knowledge of the pipeline
6281 size of the processor, thus it is up to the assembler to
6282 encode this information into the addend. */
6288 else
6289 /* RELA addends do not have to be adjusted by howto->size. */
6295 /* A branch to an undefined weak symbol is turned into a jump to
6296 the next instruction. */
6298 {
6301 }
6302 else
6303 {
6304 /* Perform a signed range check. */
6314 /* Set the H bit in the BLX instruction. */
6316 {
6319 else
6321 }
6323 {
6324 /* Select the correct instruction (BL or BLX). */
6325 /* Only if we are not handling a BL to a stub. In this
6326 case, mode switching is performed by the stub. */
6329 else
6330 {
6333 }
6334 }
6335 }
6336 }
6368 {
6369 /* Check for overflow. */
6372 }
6378 }
6401 /* Support ldr and str instructions for the thumb. */
6403 {
6404 /* Need to refetch addend. */
6406 /* ??? Need to determine shift amount from operand size. */
6408 }
6411 /* ??? Isn't value unsigned? */
6415 /* ??? Value needs to be properly shifted into place first. */
6421 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
6422 {
6423 bfd_vma insn;
6424 bfd_signed_vma relocation;
6430 {
6435 }
6457 }
6460 /* Corresponds to: ldr.w reg, [pc, #offset]. */
6461 {
6462 bfd_vma insn;
6463 bfd_signed_vma relocation;
6469 {
6473 }
6493 }
6498 /* Thumb BL (branch long instruction). */
6499 {
6500 bfd_vma relocation;
6501 bfd_vma reloc_sign;
6505 bfd_signed_vma reloc_signed_max;
6506 bfd_signed_vma reloc_signed_min;
6507 bfd_vma check;
6508 bfd_signed_vma signed_check;
6512 /* A branch to an undefined weak symbol is turned into a jump to
6513 the next instruction unless a PLT entry will be created. */
6516 {
6520 }
6522 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
6523 with Thumb-1) involving the J1 and J2 bits. */
6525 {
6535 /* Sign extend. */
6539 }
6542 {
6543 /* Check for Thumb to Thumb call. */
6544 /* FIXME: Should we translate the instruction into a BL
6545 instruction instead ? */
6549 input_bfd,
6551 }
6552 else
6553 {
6554 /* If it is not a call to Thumb, assume call to Arm.
6555 If it is a call relative to a section name, then it is not a
6556 function call at all, but rather a long jump. Calls through
6557 the PLT do not require stubs. */
6561 {
6563 {
6564 /* Convert BL to BLX. */
6566 }
6568 {
6572 error_message))
6574 else
6576 }
6577 }
6580 {
6581 /* Make sure this is a BL. */
6583 }
6584 }
6586 /* Handle calls via the PLT. */
6588 {
6593 {
6594 /* If the Thumb BLX instruction is available, convert the
6595 BL to a BLX instruction to call the ARM-mode PLT entry. */
6597 }
6598 else
6599 /* Target the Thumb stub before the ARM PLT entry. */
6602 }
6605 {
6606 /* Check if a stub has to be inserted because the destination
6607 is too far. */
6608 bfd_vma from;
6609 bfd_signed_vma branch_offset;
6620 ||
6621 (thumb2
6625 {
6626 /* The target is out of reach or we are changing modes, so
6627 redirect the branch to the local stub for this
6628 function. */
6637 /* If this call becomes a call to Arm, force BLX. */
6639 {
6644 }
6645 }
6646 }
6656 /* If this is a signed value, the rightshift just dropped
6657 leading 1 bits (assuming twos complement). */
6660 else
6663 /* Calculate the permissable maximum and minimum values for
6664 this relocation according to whether we're relocating for
6665 Thumb-2 or not. */
6672 /* Assumes two's complement. */
6677 /* For a BLX instruction, make sure that the relocation is rounded up
6678 to a word boundary. This follows the semantics of the instruction
6679 which specifies that bit 1 of the target address will come from bit
6680 1 of the base address. */
6683 /* Put RELOCATION back into the insn. Assumes two's complement.
6684 We use the Thumb-2 encoding, which is safe even if dealing with
6685 a Thumb-1 instruction by virtue of our overflow check above. */
6695 /* Put the relocated value back in the object file: */
6700 }
6704 /* Thumb32 conditional branch instruction. */
6705 {
6706 bfd_vma relocation;
6712 bfd_signed_vma signed_check;
6714 /* Need to refetch the addend, reconstruct the top three bits,
6715 and squish the two 11 bit pieces together. */
6717 {
6731 }
6733 /* Handle calls via the PLT. */
6735 {
6739 /* Target the Thumb stub before the ARM PLT entry. */
6742 }
6744 /* ??? Should handle interworking? GCC might someday try to
6745 use this for tail calls. */
6756 /* Put RELOCATION back into the insn. */
6757 {
6766 }
6768 /* Put the relocated value back in the object file: */
6773 }
6778 /* Thumb B (branch) instruction). */
6779 {
6780 bfd_signed_vma relocation;
6783 bfd_signed_vma signed_check;
6785 /* CZB cannot jump backward. */
6790 {
6791 /* Need to refetch addend. */
6794 {
6798 }
6799 else
6801 /* The value in the insn has been right shifted. We need to
6802 undo this, so that we can perform the address calculation
6803 in terms of bytes. */
6805 }
6817 else
6823 /* Assumes two's complement. */
6828 }
6833 {
6834 bfd_vma insn;
6835 bfd_vma relocation;
6839 {
6840 /* Extract the addend. */
6843 }
6853 }
6861 /* Relocation is relative to the start of the
6862 global offset table. */
6868 /* If we are addressing a Thumb function, we need to adjust the
6869 address by one, so that attempts to call the function pointer will
6870 correctly interpret it as Thumb code. */
6874 /* Note that sgot->output_offset is not involved in this
6875 calculation. We always want the start of .got. If we
6876 define _GLOBAL_OFFSET_TABLE in a different way, as is
6877 permitted by the ABI, we might have to change this
6878 calculation. */
6885 /* Use global offset table as symbol value. */
6899 /* Relocation is to the entry for this symbol in the
6900 global offset table. */
6905 {
6906 bfd_vma off;
6907 bfd_boolean dyn;
6918 {
6919 /* This is actually a static link, or it is a -Bsymbolic link
6920 and the symbol is defined locally. We must initialize this
6921 entry in the global offset table. Since the offset must
6922 always be a multiple of 4, we use the least significant bit
6923 to record whether we have initialized it already.
6925 When doing a dynamic link, we create a .rel(a).got relocation
6926 entry to initialize the value. This is done in the
6927 finish_dynamic_symbol routine. */
6930 else
6931 {
6932 /* If we are addressing a Thumb function, we need to
6933 adjust the address by one, so that attempts to
6934 call the function pointer will correctly
6935 interpret it as Thumb code. */
6941 }
6942 }
6943 else
6947 }
6948 else
6949 {
6950 bfd_vma off;
6957 /* The offset must always be a multiple of 4. We use the
6958 least significant bit to record whether we have already
6959 generated the necessary reloc. */
6962 else
6963 {
6964 /* If we are addressing a Thumb function, we need to
6965 adjust the address by one, so that attempts to
6966 call the function pointer will correctly
6967 interpret it as Thumb code. */
6975 {
6977 Elf_Internal_Rela outrel;
6980 srelgot = (bfd_get_section_by_name
6992 }
6995 }
6998 }
7014 {
7015 bfd_vma off;
7024 else
7025 {
7026 /* If we don't know the module number, create a relocation
7027 for it. */
7029 {
7030 Elf_Internal_Rela outrel;
7048 }
7049 else
7053 }
7061 }
7065 {
7066 bfd_vma off;
7075 {
7076 bfd_boolean dyn;
7081 {
7084 }
7087 }
7088 else
7089 {
7094 }
7101 else
7102 {
7104 Elf_Internal_Rela outrel;
7108 /* The GOT entries have not been initialized yet. Do it
7109 now, and emit any relocations. If both an IE GOT and a
7110 GD GOT are necessary, we emit the GD first. */
7116 {
7122 }
7125 {
7127 {
7145 else
7146 {
7149 R_ARM_TLS_DTPOFF32);
7160 }
7161 }
7162 else
7163 {
7164 /* If we are not emitting relocations for a
7165 general dynamic reference, then we must be in a
7166 static link or an executable link with the
7167 symbol binding locally. Mark it as belonging
7168 to module 1, the executable. */
7173 }
7176 }
7179 {
7181 {
7184 else
7198 }
7199 else
7203 }
7207 else
7209 }
7219 }
7223 {
7229 }
7230 else
7239 {
7242 /* Ensure that we have a BX instruction. */
7246 {
7247 /* Branch to veneer. */
7248 bfd_vma glue_addr;
7255 }
7256 else
7257 {
7258 /* Preserve Rm (lowest four bits) and the condition code
7259 (highest four bits). Other bits encode MOV PC,Rm. */
7261 }
7264 }
7271 /* Until we properly support segment-base-relative addressing then
7272 we assume the segment base to be zero, as for the group relocations.
7273 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
7274 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
7278 {
7282 {
7285 }
7307 }
7314 /* Until we properly support segment-base-relative addressing then
7315 we assume the segment base to be zero, as for the above relocations.
7316 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
7317 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
7318 as R_ARM_THM_MOVT_ABS. */
7322 {
7323 bfd_vma insn;
7329 {
7335 }
7361 }
7374 {
7378 /* sb should be the origin of the *segment* containing the symbol.
7379 It is not clear how to obtain this OS-dependent value, so we
7380 make an arbitrary choice of zero. */
7382 bfd_vma residual;
7383 bfd_vma g_n;
7384 bfd_signed_vma signed_value;
7387 /* Determine which group of bits to select. */
7389 {
7411 }
7413 /* If REL, extract the addend from the insn. If RELA, it will
7414 have already been fetched for us. */
7416 {
7423 else
7424 {
7425 /* Compensate for the fact that in the instruction, the
7426 rotation is stored in multiples of 2 bits. */
7429 /* Rotate "constant" right by "rotation" bits. */
7432 }
7434 /* Determine if the instruction is an ADD or a SUB.
7435 (For REL, this determines the sign of the addend.) */
7438 {
7444 }
7447 }
7449 /* Compute the value (X) to go in the place. */
7455 /* PC relative. */
7457 else
7458 /* Section base relative. */
7461 /* If the target symbol is a Thumb function, then set the
7462 Thumb bit in the address. */
7466 /* Calculate the value of the relevant G_n, in encoded
7467 constant-with-rotation format. */
7471 /* Check for overflow if required. */
7478 {
7484 }
7486 /* Mask out the value and the ADD/SUB part of the opcode; take care
7487 not to destroy the S bit. */
7490 /* Set the opcode according to whether the value to go in the
7491 place is negative. */
7494 else
7497 /* Encode the offset. */
7501 }
7510 {
7515 bfd_vma residual;
7516 bfd_signed_vma signed_value;
7519 /* Determine which groups of bits to calculate. */
7521 {
7539 }
7541 /* If REL, extract the addend from the insn. If RELA, it will
7542 have already been fetched for us. */
7544 {
7547 }
7549 /* Compute the value (X) to go in the place. */
7553 /* PC relative. */
7555 else
7556 /* Section base relative. */
7559 /* Calculate the value of the relevant G_{n-1} to obtain
7560 the residual at that stage. */
7563 /* Check for overflow. */
7565 {
7571 }
7573 /* Mask out the value and U bit. */
7576 /* Set the U bit if the value to go in the place is non-negative. */
7580 /* Encode the offset. */
7584 }
7593 {
7598 bfd_vma residual;
7599 bfd_signed_vma signed_value;
7602 /* Determine which groups of bits to calculate. */
7604 {
7622 }
7624 /* If REL, extract the addend from the insn. If RELA, it will
7625 have already been fetched for us. */
7627 {
7630 }
7632 /* Compute the value (X) to go in the place. */
7636 /* PC relative. */
7638 else
7639 /* Section base relative. */
7642 /* Calculate the value of the relevant G_{n-1} to obtain
7643 the residual at that stage. */
7646 /* Check for overflow. */
7648 {
7654 }
7656 /* Mask out the value and U bit. */
7659 /* Set the U bit if the value to go in the place is non-negative. */
7663 /* Encode the offset. */
7667 }
7676 {
7681 bfd_vma residual;
7682 bfd_signed_vma signed_value;
7685 /* Determine which groups of bits to calculate. */
7687 {
7705 }
7707 /* If REL, extract the addend from the insn. If RELA, it will
7708 have already been fetched for us. */
7710 {
7713 }
7715 /* Compute the value (X) to go in the place. */
7719 /* PC relative. */
7721 else
7722 /* Section base relative. */
7725 /* Calculate the value of the relevant G_{n-1} to obtain
7726 the residual at that stage. */
7729 /* Check for overflow. (The absolute value to go in the place must be
7730 divisible by four and, after having been divided by four, must
7731 fit in eight bits.) */
7733 {
7739 }
7741 /* Mask out the value and U bit. */
7744 /* Set the U bit if the value to go in the place is non-negative. */
7748 /* Encode the offset. */
7752 }
7757 }
7758 }
7760 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
7761 static void
7765 bfd_signed_vma increment)
7766 {
7767 bfd_signed_vma addend;
7771 {
7789 }
7790 else
7791 {
7792 bfd_vma contents;
7796 /* Get the (signed) value from the instruction. */
7799 {
7800 bfd_signed_vma mask;
7805 }
7807 /* Add in the increment, (which is a byte value). */
7809 {
7821 /* Should we check for overflow here ? */
7823 /* Drop any undesired bits. */
7826 }
7831 }
7832 }
7834 #define IS_ARM_TLS_RELOC(R_TYPE) \
7835 ((R_TYPE) == R_ARM_TLS_GD32 \
7836 || (R_TYPE) == R_ARM_TLS_LDO32 \
7837 || (R_TYPE) == R_ARM_TLS_LDM32 \
7838 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
7839 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
7840 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
7841 || (R_TYPE) == R_ARM_TLS_LE32 \
7842 || (R_TYPE) == R_ARM_TLS_IE32)
7844 /* Relocate an ARM ELF section. */
7846 static bfd_boolean
7855 {
7871 {
7878 bfd_vma relocation;
7879 bfd_reloc_status_type r;
7880 arelent bfd_reloc;
7901 {
7906 {
7913 {
7918 {
7940 {
7946 }
7950 /* Get the (signed) value from the instruction. */
7953 {
7954 bfd_signed_vma mask;
7959 }
7961 }
7964 addend =
7969 /* Cases here must match those in the preceeding
7970 switch statement. */
7972 {
7995 }
7996 }
7997 }
7998 else
8000 }
8001 else
8002 {
8003 bfd_boolean warned;
8011 }
8014 {
8015 /* For relocs against symbols from removed linkonce sections,
8016 or sections discarded by a linker script, we just want the
8017 section contents zeroed. Avoid any special processing. */
8022 }
8025 {
8026 /* This is a relocatable link. We don't have to change
8027 anything, unless the reloc is against a section symbol,
8028 in which case we have to adjust according to where the
8029 section symbol winds up in the output section. */
8031 {
8035 else
8037 }
8039 }
8043 else
8044 {
8045 name = (bfd_elf_string_from_elf_section
8049 }
8057 {
8062 input_bfd,
8063 input_section,
8066 name);
8067 }
8076 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8077 because such sections are not SEC_ALLOC and thus ld.so will
8078 not process them. */
8082 {
8085 input_bfd,
8086 input_section,
8091 }
8094 {
8096 {
8098 /* If the overflowing reloc was to an undefined symbol,
8099 we have already printed one error message and there
8100 is no point complaining again. */
8126 /* error_message should already be set. */
8131 /* Fall through. */
8133 common_error:
8140 }
8141 }
8142 }
8145 }
8147 /* Set the right machine number. */
8149 static bfd_boolean
8151 {
8162 else
8166 }
8168 /* Function to keep ARM specific flags in the ELF header. */
8170 static bfd_boolean
8172 {
8175 {
8177 {
8180 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
8181 abfd);
8182 else
8183 _bfd_error_handler
8185 abfd);
8186 }
8187 }
8188 else
8189 {
8192 }
8195 }
8197 /* Copy backend specific data from one object module to another. */
8199 static bfd_boolean
8201 {
8202 flagword in_flags;
8203 flagword out_flags;
8214 {
8215 /* Cannot mix APCS26 and APCS32 code. */
8219 /* Cannot mix float APCS and non-float APCS code. */
8223 /* If the src and dest have different interworking flags
8224 then turn off the interworking bit. */
8226 {
8228 _bfd_error_handler
8229 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
8233 }
8235 /* Likewise for PIC, though don't warn for this case. */
8238 }
8243 /* Also copy the EI_OSABI field. */
8247 /* Copy object attributes. */
8251 }
8253 /* Values for Tag_ABI_PCS_R9_use. */
8254 enum
8255 {
8256 AEABI_R9_V6,
8257 AEABI_R9_SB,
8258 AEABI_R9_TLS,
8259 AEABI_R9_unused
8260 };
8262 /* Values for Tag_ABI_PCS_RW_data. */
8263 enum
8264 {
8265 AEABI_PCS_RW_data_absolute,
8266 AEABI_PCS_RW_data_PCrel,
8267 AEABI_PCS_RW_data_SBrel,
8268 AEABI_PCS_RW_data_unused
8269 };
8271 /* Values for Tag_ABI_enum_size. */
8272 enum
8273 {
8274 AEABI_enum_unused,
8275 AEABI_enum_short,
8276 AEABI_enum_wide,
8277 AEABI_enum_forced_wide
8278 };
8280 /* Determine whether an object attribute tag takes an integer, a
8281 string or both. */
8283 static int
8285 {
8294 else
8296 }
8298 /* The ABI defines that Tag_conformance should be emitted first, and that
8299 Tag_nodefaults should be second (if either is defined). This sets those
8300 two positions, and bumps up the position of all the remaining tags to
8301 compensate. */
8302 static int
8304 {
8314 }
8316 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
8317 Returns -1 if no architecture could be read. */
8319 static int
8321 {
8325 /* Note: the tag and its argument below are uleb128 values, though
8326 currently-defined values fit in one byte for each. */
8333 /* This tag is "safely ignorable", so don't complain if it looks funny. */
8335 }
8337 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8338 The tag is removed if ARCH is -1. */
8340 static void
8342 {
8347 {
8350 }
8352 /* Note: the tag and its argument below are uleb128 values, though
8353 currently-defined values fit in one byte for each. */
8359 }
8361 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8362 into account. */
8364 static int
8367 {
8368 #define T(X) TAG_CPU_ARCH_##X
8371 {
8381 };
8383 {
8394 };
8396 {
8408 };
8410 {
8423 };
8425 {
8439 };
8441 {
8456 };
8458 {
8459 v6t2,
8460 v6k,
8461 v7,
8462 v6_m,
8463 v6s_m,
8464 /* Pseudo-architecture. */
8465 v4t_plus_v6_m
8466 };
8468 /* Check we've not got a higher architecture than we know about. */
8471 {
8474 }
8476 /* Override old tag if we have a Tag_also_compatible_with on the output. */
8482 /* And override the new tag if we have a Tag_also_compatible_with on the
8483 input. */
8492 /* Architectures before V6KZ add features monotonically. */
8498 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8499 as the canonical version. */
8501 {
8504 }
8505 else
8509 {
8513 }
8516 #undef T
8517 }
8519 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
8520 are conflicting attributes. */
8522 static bfd_boolean
8524 {
8530 /* Some tags have 0 = don't care, 1 = strong requirement,
8531 2 = weak requirement. */
8533 /* For use with Tag_VFP_arch. */
8539 {
8540 /* This is the first object. Copy the attributes. */
8543 /* Use the Tag_null value to indicate the attributes have been
8544 initialized. */
8548 }
8552 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
8554 {
8555 /* Ignore mismatches if the object doesn't use floating point. */
8559 {
8560 _bfd_error_handler
8564 }
8565 }
8568 {
8569 /* Merge this attribute with existing attributes. */
8571 {
8574 /* These are merged after Tag_CPU_arch. */
8579 /* Use the first value seen. */
8583 {
8587 /* These aren't real CPU names, but we can't guess
8588 that from the architecture version alone. */
8601 "ARM v6S-M"
8602 };
8604 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
8610 secondary_compat);
8613 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
8617 {
8618 /* The output architecture has been changed to match the
8619 input architecture. Use the input names. */
8626 }
8627 else
8628 {
8631 }
8633 /* If we still don't have a value for Tag_CPU_name,
8634 make one up now. Tag_CPU_raw_name remains blank. */
8639 }
8646 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
8656 /* Use the largest value specified. */
8663 /* Use the smallest value specified. */
8672 {
8673 /* This error message should be enabled once all non-conformant
8674 binaries in the toolchain have had the attributes set
8675 properly.
8676 _bfd_error_handler
8677 (_("ERROR: %B: 8-byte data alignment conflicts with %B"),
8678 obfd, ibfd);
8679 result = FALSE; */
8680 }
8681 /* Fall through. */
8684 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
8685 value if greater than 2 (for future-proofing). */
8695 {
8696 /* 0 will merge with anything.
8697 'A' and 'S' merge to 'A'.
8698 'R' and 'S' merge to 'R'.
8699 'M' and 'A|R|S' is an error. */
8708 else
8709 {
8710 _bfd_error_handler
8712 ibfd,
8716 }
8717 }
8720 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
8721 largest value if greater than 4 (for future-proofing). */
8731 {
8732 /* It's sometimes ok to mix different configs, so this is only
8733 a warning. */
8734 _bfd_error_handler
8736 }
8742 {
8743 _bfd_error_handler
8746 }
8754 {
8755 _bfd_error_handler
8757 ibfd);
8759 }
8760 /* Use the smallest value specified. */
8767 {
8768 _bfd_error_handler
8769 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
8771 }
8777 {
8780 {
8781 /* The existing object is compatible with anything.
8782 Use whatever requirements the new object has. */
8784 }
8788 {
8799 _bfd_error_handler
8800 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
8802 }
8803 }
8806 /* Aready done. */
8810 {
8811 _bfd_error_handler
8815 }
8818 /* Merged in target-independent code. */
8821 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
8830 {
8832 {
8833 _bfd_error_handler
8837 }
8838 }
8844 /* This tag is set if it exists, but the value is unused (and is
8845 typically zero). We don't actually need to do anything here -
8846 the merge happens automatically when the type flags are merged
8847 below. */
8850 /* Already done in Tag_CPU_arch. */
8853 /* Keep the attribute if it matches. Throw it away otherwise.
8854 No attribute means no claim to conform. */
8861 {
8864 /* The "known_obj_attributes" table does contain some undefined
8865 attributes. Ensure that there are unused. */
8872 {
8873 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
8875 {
8876 _bfd_error_handler
8881 }
8882 else
8883 {
8884 _bfd_error_handler
8887 }
8888 }
8890 /* Only pass on attributes that match in both inputs. */
8895 {
8898 }
8899 }
8900 }
8902 /* If out_attr was copied from in_attr then it won't have a type yet. */
8905 }
8907 /* Merge Tag_compatibility attributes and any common GNU ones. */
8910 /* Check for any attributes not known on ARM. */
8916 {
8920 /* The tags for each list are in numerical order. */
8921 /* If the tags are equal, then merge. */
8923 {
8924 /* This attribute only exists in obfd. We can't merge, and we don't
8925 know what the tag means, so delete it. */
8930 }
8932 {
8933 /* This attribute only exists in ibfd. We can't merge, and we don't
8934 know what the tag means, so ignore it. */
8938 }
8940 {
8941 /* As present, all attributes in the list are unknown, and
8942 therefore can't be merged meaningfully. */
8946 /* Only pass on attributes that match in both inputs. */
8951 {
8952 /* No match. Delete the attribute. */
8955 }
8956 else
8957 {
8958 /* Matched. Keep the attribute and move to the next. */
8961 }
8962 }
8965 {
8966 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
8968 {
8969 _bfd_error_handler
8974 }
8975 else
8976 {
8977 _bfd_error_handler
8980 }
8981 }
8982 }
8984 }
8987 /* Return TRUE if the two EABI versions are incompatible. */
8989 static bfd_boolean
8991 {
8992 /* v4 and v5 are the same spec before and after it was released,
8993 so allow mixing them. */
8999 }
9001 /* Merge backend specific data from an object file to the output
9002 object file when linking. */
9004 static bfd_boolean
9006 {
9007 flagword out_flags;
9008 flagword in_flags;
9012 /* Check if we have the same endianess. */
9022 /* The input BFD must have had its flags initialised. */
9023 /* The following seems bogus to me -- The flags are initialized in
9024 the assembler but I don't think an elf_flags_init field is
9025 written into the object. */
9026 /* BFD_ASSERT (elf_flags_init (ibfd)); */
9031 /* In theory there is no reason why we couldn't handle this. However
9032 in practice it isn't even close to working and there is no real
9033 reason to want it. */
9037 {
9039 ibfd);
9041 }
9044 {
9045 /* If the input is the default architecture and had the default
9046 flags then do not bother setting the flags for the output
9047 architecture, instead allow future merges to do this. If no
9048 future merges ever set these flags then they will retain their
9049 uninitialised values, which surprise surprise, correspond
9050 to the default values. */
9063 }
9065 /* Determine what should happen if the input ARM architecture
9066 does not match the output ARM architecture. */
9070 /* Identical flags must be compatible. */
9074 /* Check to see if the input BFD actually contains any sections. If
9075 not, its flags may not have been initialised either, but it
9076 cannot actually cause any incompatiblity. Do not short-circuit
9077 dynamic objects; their section list may be emptied by
9078 elf_link_add_object_symbols.
9080 Also check to see if there are no code sections in the input.
9081 In this case there is no need to check for code specific flags.
9082 XXX - do we need to worry about floating-point format compatability
9083 in data sections ? */
9085 {
9090 {
9091 /* Ignore synthetic glue sections. */
9094 {
9102 }
9103 }
9107 }
9109 /* Complain about various flag mismatches. */
9112 {
9113 _bfd_error_handler
9119 }
9121 /* Not sure what needs to be checked for EABI versions >= 1. */
9122 /* VxWorks libraries do not use these flags. */
9126 {
9128 {
9129 _bfd_error_handler
9135 }
9138 {
9140 _bfd_error_handler
9143 else
9144 _bfd_error_handler
9149 }
9152 {
9154 _bfd_error_handler
9157 else
9158 _bfd_error_handler
9163 }
9166 {
9168 _bfd_error_handler
9171 else
9172 _bfd_error_handler
9177 }
9179 #ifdef EF_ARM_SOFT_FLOAT
9181 {
9182 /* We can allow interworking between code that is VFP format
9183 layout, and uses either soft float or integer regs for
9184 passing floating point arguments and results. We already
9185 know that the APCS_FLOAT flags match; similarly for VFP
9186 flags. */
9189 {
9191 _bfd_error_handler
9194 else
9195 _bfd_error_handler
9200 }
9201 }
9202 #endif
9204 /* Interworking mismatch is only a warning. */
9206 {
9208 {
9209 _bfd_error_handler
9212 }
9213 else
9214 {
9215 _bfd_error_handler
9218 }
9219 }
9220 }
9223 }
9225 /* Display the flags field. */
9227 static bfd_boolean
9229 {
9235 /* Print normal ELF private data. */
9239 /* Ignore init flag - it may not be set, despite the flags field
9240 containing valid data. */
9242 /* xgettext:c-format */
9246 {
9248 /* The following flag bits are GNU extensions and not part of the
9249 official ARM ELF extended ABI. Hence they are only decoded if
9250 the EABI version is not set. */
9256 else
9263 else
9292 else
9303 else
9326 eabi:
9339 }
9357 }
9359 static int
9361 {
9363 {
9368 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
9369 This allows us to distinguish between data used by Thumb instructions
9370 and non-data (which is probably code) inside Thumb regions of an
9371 executable. */
9378 }
9381 }
9389 {
9392 {
9396 }
9399 }
9401 /* Update the got entry reference counts for the section being removed. */
9403 static bfd_boolean
9408 {
9430 {
9437 {
9442 }
9447 {
9453 {
9456 }
9458 {
9461 }
9488 /* Should the interworking branches be here also? */
9491 {
9499 {
9507 }
9513 {
9517 {
9525 }
9526 }
9527 }
9532 }
9533 }
9536 }
9538 /* Look through the relocs for a section during the first phase. */
9540 static bfd_boolean
9543 {
9552 bfd_boolean needs_plt;
9562 /* Create dynamic sections for relocatable executables so that we can
9563 copy relocations. */
9566 {
9569 }
9579 {
9590 {
9592 r_symndx);
9594 }
9598 else
9599 {
9604 }
9609 {
9614 /* This symbol requires a global offset table entry. */
9615 {
9619 {
9623 }
9626 {
9629 }
9630 else
9631 {
9634 /* This is a global offset table entry for a local symbol. */
9637 {
9638 bfd_size_type size;
9648 }
9651 }
9653 /* We will already have issued an error message if there is a
9654 TLS / non-TLS mismatch, based on the symbol type. We don't
9655 support any linker relaxations. So just combine any TLS
9656 types needed. */
9662 {
9665 else
9667 }
9668 }
9669 /* Fall through. */
9674 /* Fall through. */
9679 {
9684 }
9688 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
9689 ldr __GOTT_INDEX__ offsets. */
9692 /* Fall through. */
9718 normal_reloc:
9720 /* Should the interworking branches be listed here? */
9722 {
9723 /* If this reloc is in a read-only section, we might
9724 need a copy reloc. We can't check reliably at this
9725 stage whether the section is read-only, as input
9726 sections have not yet been mapped to output sections.
9727 Tentatively set the flag for now, and correct in
9728 adjust_dynamic_symbol. */
9732 /* We may need a .plt entry if the function this reloc
9733 refers to is in a different object. We can't tell for
9734 sure yet, because something later might force the
9735 symbol local. */
9739 /* If we create a PLT entry, this relocation will reference
9740 it, even if it's an ABS32 relocation. */
9743 /* It's too early to use htab->use_blx here, so we have to
9744 record possible blx references separately from
9745 relocs that definitely need a thumb stub. */
9753 }
9755 /* If we are creating a shared library or relocatable executable,
9756 and this is a reloc against a global symbol, or a non PC
9757 relative reloc against a local symbol, then we need to copy
9758 the reloc into the shared library. However, if we are linking
9759 with -Bsymbolic, we do not need to copy a reloc against a
9760 global symbol which is defined in an object we are
9761 including in the link (i.e., DEF_REGULAR is set). At
9762 this point we have not seen all the input files, so it is
9763 possible that DEF_REGULAR is not set now but will be set
9764 later (it is never cleared). We account for that
9765 possibility below by storing information in the
9766 relocs_copied field of the hash table entry. */
9772 {
9775 /* When creating a shared object, we must copy these
9776 reloc types into the output file. We create a reloc
9777 section in dynobj and make room for this reloc. */
9779 {
9780 sreloc = _bfd_elf_make_dynamic_reloc_section
9786 /* BPABI objects never have dynamic relocations mapped. */
9788 {
9789 flagword flags;
9794 }
9795 }
9797 /* If this is a global symbol, we count the number of
9798 relocations we need for this symbol. */
9800 {
9802 }
9803 else
9804 {
9805 /* Track dynamic relocs needed for local syms too.
9806 We really need local syms available to do this
9807 easily. Oh well. */
9819 }
9823 {
9834 }
9839 }
9842 /* This relocation describes the C++ object vtable hierarchy.
9843 Reconstruct it for later use during GC. */
9849 /* This relocation describes which C++ vtable entries are actually
9850 used. Record for later use during GC. */
9857 }
9858 }
9861 }
9863 /* Unwinding tables are not referenced directly. This pass marks them as
9864 required if the corresponding code section is marked. */
9866 static bfd_boolean
9868 elf_gc_mark_hook_fn gc_mark_hook)
9869 {
9872 bfd_boolean again;
9874 /* Marking EH data may cause additional code sections to be marked,
9875 requiring multiple passes. */
9878 {
9881 {
9889 {
9898 {
9902 }
9903 }
9904 }
9905 }
9908 }
9910 /* Treat mapping symbols as special target symbols. */
9912 static bfd_boolean
9914 {
9916 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
9917 }
9919 /* This is a copy of elf_find_function() from elf.c except that
9920 ARM mapping symbols are ignored when looking for function names
9921 and STT_ARM_TFUNC is considered to a function type. */
9923 static bfd_boolean
9927 bfd_vma offset,
9930 {
9937 {
9943 {
9952 /* Skip mapping symbols. */
9955 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
9957 /* Fall through. */
9961 {
9964 }
9966 }
9967 }
9978 }
9981 /* Find the nearest line to a particular section and offset, for error
9982 reporting. This code is a duplicate of the code in elf.c, except
9983 that it uses arm_elf_find_function. */
9985 static bfd_boolean
9989 bfd_vma offset,
9993 {
9996 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
10002 {
10006 functionname_ptr);
10009 }
10029 }
10031 static bfd_boolean
10036 {
10037 bfd_boolean found;
10042 }
10044 /* Adjust a symbol defined by a dynamic object and referenced by a
10045 regular object. The current definition is in some section of the
10046 dynamic object, but we're not including those sections. We have to
10047 change the definition to something the rest of the link can
10048 understand. */
10050 static bfd_boolean
10053 {
10062 /* Make sure we know what is going on here. */
10072 /* If this is a function, put it in the procedure linkage table. We
10073 will fill in the contents of the procedure linkage table later,
10074 when we know the address of the .got section. */
10077 {
10082 {
10083 /* This case can occur if we saw a PLT32 reloc in an input
10084 file, but the symbol was never referred to by a dynamic
10085 object, or if all references were garbage collected. In
10086 such a case, we don't actually need to build a procedure
10087 linkage table, and we can just do a PC24 reloc instead. */
10092 }
10095 }
10096 else
10097 {
10098 /* It's possible that we incorrectly decided a .plt reloc was
10099 needed for an R_ARM_PC24 or similar reloc to a non-function sym
10100 in check_relocs. We can't decide accurately between function
10101 and non-function syms in check-relocs; Objects loaded later in
10102 the link may change h->type. So fix it now. */
10106 }
10108 /* If this is a weak symbol, and there is a real definition, the
10109 processor independent code will have arranged for us to see the
10110 real definition first, and we can just use the same value. */
10112 {
10118 }
10120 /* If there are no non-GOT references, we do not need a copy
10121 relocation. */
10125 /* This is a reference to a symbol defined by a dynamic object which
10126 is not a function. */
10128 /* If we are creating a shared library, we must presume that the
10129 only references to the symbol are via the global offset table.
10130 For such cases we need not do anything here; the relocations will
10131 be handled correctly by relocate_section. Relocatable executables
10132 can reference data in shared objects directly, so we don't need to
10133 do anything here. */
10138 {
10142 }
10144 /* We must allocate the symbol in our .dynbss section, which will
10145 become part of the .bss section of the executable. There will be
10146 an entry for this symbol in the .dynsym section. The dynamic
10147 object will contain position independent code, so all references
10148 from the dynamic object to this symbol will go through the global
10149 offset table. The dynamic linker will use the .dynsym entry to
10150 determine the address it must put in the global offset table, so
10151 both the dynamic object and the regular object will refer to the
10152 same memory location for the variable. */
10156 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
10157 copy the initial value out of the dynamic object and into the
10158 runtime process image. We need to remember the offset into the
10159 .rel(a).bss section we are going to use. */
10161 {
10168 }
10171 }
10173 /* Allocate space in .plt, .got and associated reloc sections for
10174 dynamic relocs. */
10176 static bfd_boolean
10178 {
10183 bfd_signed_vma thumb_refs;
10191 /* When warning symbols are created, they **replace** the "real"
10192 entry in the hash table, thus we never get to see the real
10193 symbol in a hash traversal. So look at it now. */
10201 {
10202 /* Make sure this symbol is output as a dynamic symbol.
10203 Undefined weak syms won't yet be marked as dynamic. */
10206 {
10209 }
10213 {
10216 /* If this is the first .plt entry, make room for the special
10217 first entry. */
10223 /* If we will insert a Thumb trampoline before this PLT, leave room
10224 for it. */
10230 {
10233 }
10235 /* If this symbol is not defined in a regular file, and we are
10236 not generating a shared library, then set the symbol to this
10237 location in the .plt. This is required to make function
10238 pointers compare as equal between the normal executable and
10239 the shared library. */
10242 {
10246 /* Make sure the function is not marked as Thumb, in case
10247 it is the target of an ABS32 relocation, which will
10248 point to the PLT entry. */
10251 }
10253 /* Make room for this entry. */
10257 {
10258 /* We also need to make an entry in the .got.plt section, which
10259 will be placed in the .got section by the linker script. */
10262 }
10264 /* We also need to make an entry in the .rel(a).plt section. */
10267 /* VxWorks executables have a second set of relocations for
10268 each PLT entry. They go in a separate relocation section,
10269 which is processed by the kernel loader. */
10271 {
10272 /* There is a relocation for the initial PLT entry:
10273 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
10277 /* There are two extra relocations for each subsequent
10278 PLT entry: an R_ARM_32 relocation for the GOT entry,
10279 and an R_ARM_32 relocation for the PLT entry. */
10281 }
10282 }
10283 else
10284 {
10287 }
10288 }
10289 else
10290 {
10293 }
10296 {
10298 bfd_boolean dyn;
10302 /* Make sure this symbol is output as a dynamic symbol.
10303 Undefined weak syms won't yet be marked as dynamic. */
10306 {
10309 }
10312 {
10320 /* Non-TLS symbols need one GOT slot. */
10322 else
10323 {
10325 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
10328 /* R_ARM_TLS_IE32 needs one GOT slot. */
10330 }
10344 {
10353 }
10359 }
10360 }
10361 else
10364 /* Allocate stubs for exported Thumb functions on v4t. */
10369 {
10376 /* Create a new symbol to regist the real location of the function. */
10389 /* Point the symbol at the stub. */
10393 }
10398 /* In the shared -Bsymbolic case, discard space allocated for
10399 dynamic pc-relative relocs against symbols which turn out to be
10400 defined in regular objects. For the normal shared case, discard
10401 space for pc-relative relocs that have become local due to symbol
10402 visibility changes. */
10405 {
10406 /* The only relocs that use pc_count are R_ARM_REL32 and
10407 R_ARM_REL32_NOI, which will appear on something like
10408 ".long foo - .". We want calls to protected symbols to resolve
10409 directly to the function rather than going via the plt. If people
10410 want function pointer comparisons to work as expected then they
10411 should avoid writing assembly like ".long foo - .". */
10413 {
10417 {
10422 else
10424 }
10425 }
10428 {
10432 {
10435 else
10437 }
10438 }
10440 /* Also discard relocs on undefined weak syms with non-default
10441 visibility. */
10444 {
10448 /* Make sure undefined weak symbols are output as a dynamic
10449 symbol in PIEs. */
10452 {
10455 }
10456 }
10460 {
10461 /* Output absolute symbols so that we can create relocations
10462 against them. For normal symbols we output a relocation
10463 against the section that contains them. */
10466 }
10468 }
10469 else
10470 {
10471 /* For the non-shared case, discard space for relocs against
10472 symbols which turn out to need copy relocs or are not
10473 dynamic. */
10481 {
10482 /* Make sure this symbol is output as a dynamic symbol.
10483 Undefined weak syms won't yet be marked as dynamic. */
10486 {
10489 }
10491 /* If that succeeded, we know we'll be keeping all the
10492 relocs. */
10495 }
10499 keep: ;
10500 }
10502 /* Finally, allocate space. */
10504 {
10507 }
10510 }
10512 /* Find any dynamic relocs that apply to read-only sections. */
10514 static bfd_boolean
10516 {
10525 {
10529 {
10534 /* Not an error, just cut short the traversal. */
10536 }
10537 }
10539 }
10541 void
10544 {
10549 }
10551 /* Set the sizes of the dynamic sections. */
10553 static bfd_boolean
10556 {
10559 bfd_boolean plt;
10560 bfd_boolean relocs;
10570 {
10571 /* Set the contents of the .interp section to the interpreter. */
10573 {
10578 }
10579 }
10581 /* Set up .got offsets for local syms, and space for local dynamic
10582 relocs. */
10584 {
10588 bfd_size_type locsymcount;
10597 {
10601 {
10604 {
10605 /* Input section has been discarded, either because
10606 it is a copy of a linkonce section or due to
10607 linker script /DISCARD/, so we'll be discarding
10608 the relocs too. */
10609 }
10613 {
10614 /* Relocations in vxworks .tls_vars sections are
10615 handled specially by the loader. */
10616 }
10618 {
10623 }
10624 }
10625 }
10638 {
10640 {
10643 /* TLS_GD relocs need an 8-byte structure in the GOT. */
10652 }
10653 else
10655 }
10656 }
10659 {
10660 /* Allocate two GOT entries and one dynamic relocation (if necessary)
10661 for R_ARM_TLS_LDM32 relocations. */
10666 }
10667 else
10670 /* Allocate global sym .plt and .got entries, and space for global
10671 sym dynamic relocs. */
10674 /* Here we rummage through the found bfds to collect glue information. */
10676 {
10680 /* Initialise mapping tables for code/data. */
10685 /* xgettext:c-format */
10688 }
10690 /* The check_relocs and adjust_dynamic_symbol entry points have
10691 determined the sizes of the various dynamic sections. Allocate
10692 memory for them. */
10696 {
10702 /* It's OK to base decisions on the section name, because none
10703 of the dynobj section names depend upon the input files. */
10707 {
10708 /* Remember whether there is a PLT. */
10710 }
10712 {
10714 {
10715 /* Remember whether there are any reloc sections other
10716 than .rel(a).plt and .rela.plt.unloaded. */
10720 /* We use the reloc_count field as a counter if we need
10721 to copy relocs into the output file. */
10723 }
10724 }
10727 {
10728 /* It's not one of our sections, so don't allocate space. */
10730 }
10733 {
10734 /* If we don't need this section, strip it from the
10735 output file. This is mostly to handle .rel(a).bss and
10736 .rel(a).plt. We must create both sections in
10737 create_dynamic_sections, because they must be created
10738 before the linker maps input sections to output
10739 sections. The linker does that before
10740 adjust_dynamic_symbol is called, and it is that
10741 function which decides whether anything needs to go
10742 into these sections. */
10745 }
10750 /* Allocate memory for the section contents. */
10754 }
10757 {
10758 /* Add some entries to the .dynamic section. We fill in the
10759 values later, in elf32_arm_finish_dynamic_sections, but we
10760 must add the entries now so that we get the correct size for
10761 the .dynamic section. The DT_DEBUG entry is filled in by the
10762 dynamic linker and used by the debugger. */
10763 #define add_dynamic_entry(TAG, VAL) \
10764 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
10767 {
10770 }
10773 {
10780 }
10783 {
10785 {
10790 }
10791 else
10792 {
10797 }
10798 }
10800 /* If any dynamic relocs apply to a read-only section,
10801 then we need a DT_TEXTREL entry. */
10804 info);
10807 {
10810 }
10814 }
10815 #undef add_dynamic_entry
10818 }
10820 /* Finish up dynamic symbol handling. We set the contents of various
10821 dynamic sections here. */
10823 static bfd_boolean
10828 {
10838 {
10842 bfd_vma plt_index;
10843 Elf_Internal_Rela rel;
10845 /* This symbol has an entry in the procedure linkage table. Set
10846 it up. */
10854 /* Fill in the entry in the procedure linkage table. */
10856 {
10864 /* Fill in the entry in the .rel.plt section. */
10870 /* Get the index in the procedure linkage table which
10871 corresponds to this symbol. This is the index of this symbol
10872 in all the symbols for which we are making plt entries. The
10873 first entry in the procedure linkage table is reserved. */
10876 }
10877 else
10878 {
10880 bfd_vma got_displacement;
10887 /* Get the offset into the .got.plt table of the entry that
10888 corresponds to this function. */
10891 /* Get the index in the procedure linkage table which
10892 corresponds to this symbol. This is the index of this symbol
10893 in all the symbols for which we are making plt entries. The
10894 first three entries in .got.plt are reserved; after that
10895 symbols appear in the same order as in .plt. */
10898 /* Calculate the address of the GOT entry. */
10903 /* ...and the address of the PLT entry. */
10910 {
10912 bfd_vma val;
10915 {
10923 else
10925 }
10926 }
10928 {
10930 bfd_vma val;
10933 {
10943 else
10945 }
10950 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
10951 referencing the GOT for this PLT entry. */
10958 /* Create the R_ARM_ABS32 relocation referencing the
10959 beginning of the PLT for this GOT entry. */
10964 }
10965 else
10966 {
10967 bfd_signed_vma thumb_refs;
10968 /* Calculate the displacement between the PLT slot and the
10969 entry in the GOT. The eight-byte offset accounts for the
10970 value produced by adding to pc in the first instruction
10971 of the PLT stub. */
10981 {
10986 }
11000 #ifdef FOUR_WORD_PLT
11002 #endif
11003 }
11005 /* Fill in the entry in the global offset table. */
11011 /* Fill in the entry in the .rel(a).plt section. */
11015 }
11021 {
11022 /* Mark the symbol as undefined, rather than as defined in
11023 the .plt section. Leave the value alone. */
11025 /* If the symbol is weak, we do need to clear the value.
11026 Otherwise, the PLT entry would provide a definition for
11027 the symbol even if the symbol wasn't defined anywhere,
11028 and so the symbol would never be NULL. */
11031 }
11032 }
11037 {
11040 Elf_Internal_Rela rel;
11042 bfd_vma offset;
11044 /* This symbol has an entry in the global offset table. Set it
11045 up. */
11056 /* If this is a static link, or it is a -Bsymbolic link and the
11057 symbol is defined locally or was forced to be local because
11058 of a version file, we just want to emit a RELATIVE reloc.
11059 The entry in the global offset table will already have been
11060 initialized in the relocate_section function. */
11063 {
11067 {
11070 }
11071 }
11072 else
11073 {
11077 }
11081 }
11084 {
11086 Elf_Internal_Rela rel;
11089 /* This symbol needs a copy reloc. Set it up. */
11105 }
11107 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
11108 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
11109 to the ".got" section. */
11115 }
11117 /* Finish up the dynamic sections. */
11119 static bfd_boolean
11121 {
11133 {
11146 {
11147 Elf_Internal_Dyn dyn;
11154 {
11187 get_vma:
11192 else
11193 /* In the BPABI, tags in the PT_DYNAMIC section point
11194 at the file offset, not the memory address, for the
11195 convenience of the post linker. */
11200 get_vma_if_bpabi:
11216 {
11217 /* My reading of the SVR4 ABI indicates that the
11218 procedure linkage table relocs (DT_JMPREL) should be
11219 included in the overall relocs (DT_REL). This is
11220 what Solaris does. However, UnixWare can not handle
11221 that case. Therefore, we override the DT_RELSZ entry
11222 here to make it not include the JMPREL relocs. Since
11223 the linker script arranges for .rel(a).plt to follow all
11224 other relocation sections, we don't have to worry
11225 about changing the DT_REL entry. */
11232 }
11233 /* Fall through. */
11237 /* In the BPABI, the DT_REL tag must point at the file
11238 offset, not the VMA, of the first relocation
11239 section. So, we use code similar to that in
11240 elflink.c, but do not check for SHF_ALLOC on the
11241 relcoation section, since relocations sections are
11242 never allocated under the BPABI. The comments above
11243 about Unixware notwithstanding, we include all of the
11244 relocations here. */
11246 {
11252 {
11253 Elf_Internal_Shdr *hdr
11256 {
11263 }
11264 }
11266 }
11269 /* Set the bottom bit of DT_INIT/FINI if the
11270 corresponding function is Thumb. */
11276 get_sym:
11277 /* If it wasn't set by elf_bfd_final_link
11278 then there is nothing to adjust. */
11280 {
11287 {
11290 }
11291 }
11293 }
11294 }
11296 /* Fill in the first entry in the procedure linkage table. */
11298 {
11302 /* Calculate the addresses of the GOT and PLT. */
11307 {
11308 /* The VxWorks GOT is relocated by the dynamic linker.
11309 Therefore, we must emit relocations rather than simply
11310 computing the values now. */
11311 Elf_Internal_Rela rel;
11322 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
11328 }
11329 else
11330 {
11343 #ifdef FOUR_WORD_PLT
11344 /* The displacement value goes in the otherwise-unused
11345 last word of the second entry. */
11347 #else
11349 #endif
11350 }
11351 }
11353 /* UnixWare sets the entsize of .plt to 4, although that doesn't
11354 really seem like the right value. */
11359 {
11360 /* Correct the .rel(a).plt.unloaded relocations. They will have
11361 incorrect symbol indexes. */
11370 {
11371 Elf_Internal_Rela rel;
11382 }
11383 }
11384 }
11386 /* Fill in the first three entries in the global offset table. */
11388 {
11390 {
11393 else
11399 }
11402 }
11405 }
11407 static void
11408 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
11409 {
11417 else
11422 {
11426 }
11427 }
11429 static enum elf_reloc_type_class
11431 {
11433 {
11442 }
11443 }
11445 /* Set the right machine number for an Arm ELF file. */
11447 static bfd_boolean
11449 {
11454 }
11456 static void
11458 {
11460 }
11462 /* Return TRUE if this is an unwinding table entry. */
11464 static bfd_boolean
11466 {
11469 }
11472 /* Set the type and flags for an ARM section. We do this by
11473 the section name, which is a hack, but ought to work. */
11475 static bfd_boolean
11477 {
11483 {
11486 }
11488 }
11490 /* Handle an ARM specific section when reading an object file. This is
11491 called when bfd_section_from_shdr finds a section with an unknown
11492 type. */
11494 static bfd_boolean
11499 {
11500 /* There ought to be a place to keep ELF backend specific flags, but
11501 at the moment there isn't one. We just keep track of the
11502 sections by their name, instead. Fortunately, the ABI gives
11503 names for all the ARM specific sections, so we will probably get
11504 away with this. */
11506 {
11514 }
11520 }
11522 /* A structure used to record a list of sections, independently
11523 of the next and prev fields in the asection structure. */
11525 {
11529 }
11530 section_list;
11532 /* Unfortunately we need to keep a list of sections for which
11533 an _arm_elf_section_data structure has been allocated. This
11534 is because it is possible for functions like elf32_arm_write_section
11535 to be called on a section which has had an elf_data_structure
11536 allocated for it (and so the used_by_bfd field is valid) but
11537 for which the ARM extended version of this structure - the
11538 _arm_elf_section_data structure - has not been allocated. */
11541 static void
11543 {
11555 }
11559 {
11563 /* This is a short cut for the typical case where the sections are added
11564 to the sections_with_arm_elf_section_data list in forward order and
11565 then looked up here in backwards order. This makes a real difference
11566 to the ld-srec/sec64k.exp linker test. */
11569 {
11575 }
11582 /* Record the entry prior to this one - it is the entry we are most
11583 likely to want to locate next time. Also this way if we have been
11584 called from unrecord_section_with_arm_elf_section_data() we will not
11585 be caching a pointer that is about to be freed. */
11589 }
11593 {
11600 else
11602 }
11604 static void
11606 {
11612 {
11620 }
11621 }
11625 {
11634 enum map_symbol_type
11635 {
11636 ARM_MAP_ARM,
11637 ARM_MAP_THUMB,
11638 ARM_MAP_DATA
11639 };
11642 /* Output a single mapping symbol. */
11644 static bfd_boolean
11647 bfd_vma offset)
11648 {
11651 Elf_Internal_Sym sym;
11664 }
11667 /* Output mapping symbols for PLT entries associated with H. */
11669 static bfd_boolean
11671 {
11675 bfd_vma addr;
11683 /* When warning symbols are created, they **replace** the "real"
11684 entry in the hash table, thus we never get to see the real
11685 symbol in a hash traversal. So look at it now. */
11694 {
11699 }
11701 {
11710 }
11711 else
11712 {
11713 bfd_signed_vma thumb_refs;
11720 {
11723 }
11724 #ifdef FOUR_WORD_PLT
11729 #else
11730 /* A three-word PLT with no Thumb thunk contains only Arm code,
11731 so only need to output a mapping symbol for the first PLT entry and
11732 entries with thumb thunks. */
11734 {
11737 }
11738 #endif
11739 }
11742 }
11744 /* Output a single local symbol for a generated stub. */
11746 static bfd_boolean
11749 {
11751 Elf_Internal_Sym sym;
11764 }
11766 static bfd_boolean
11769 {
11774 bfd_vma addr;
11783 /* Massage our args to the form they really have. */
11792 /* Ensure this stub is attached to the current section being
11793 processed. */
11802 {
11815 }
11820 {
11822 {
11838 }
11841 {
11845 }
11848 {
11864 }
11865 }
11868 }
11870 /* Output mapping symbols for linker generated sections. */
11872 static bfd_boolean
11877 Elf_Internal_Sym *,
11878 asection *,
11880 {
11881 output_arch_syminfo osi;
11883 bfd_vma offset;
11884 bfd_size_type size;
11893 /* ARM->Thumb glue. */
11895 {
11897 ARM2THUMB_GLUE_SECTION_NAME);
11906 else
11910 {
11913 }
11914 }
11916 /* Thumb->ARM glue. */
11918 {
11920 THUMB2ARM_GLUE_SECTION_NAME);
11927 {
11930 }
11931 }
11933 /* ARMv4 BX veneers. */
11935 {
11937 ARM_BX_GLUE_SECTION_NAME);
11943 }
11945 /* Long calls stubs. */
11947 {
11953 {
11954 /* Ignore non-stub sections. */
11964 }
11965 }
11967 /* Finally, output mapping symbols for the PLT. */
11974 /* Output mapping symbols for the plt header. SymbianOS does not have a
11975 plt header. */
11977 {
11978 /* VxWorks shared libraries have no PLT header. */
11980 {
11985 }
11986 }
11988 {
11991 #ifndef FOUR_WORD_PLT
11994 #endif
11995 }
11999 }
12001 /* Allocate target specific section data. */
12003 static bfd_boolean
12005 {
12007 {
12015 }
12020 }
12023 /* Used to order a list of mapping symbols by address. */
12025 static int
12027 {
12036 /* Ensure results do not depend on the host qsort for objects with
12037 multiple mapping symbols at the same address by sorting on type
12038 after vma. */
12042 else
12044 }
12047 /* Do code byteswapping. Return FALSE afterwards so that the section is
12048 written out as normal. */
12050 static bfd_boolean
12055 {
12061 bfd_vma ptr;
12062 bfd_vma end;
12064 bfd_byte tmp;
12067 /* If this section has not been allocated an _arm_elf_section_data
12068 structure then we cannot record anything. */
12078 {
12083 {
12087 {
12089 {
12090 bfd_vma branch_to_veneer;
12091 /* Original condition code of instruction, plus bit mask for
12092 ARM B instruction. */
12096 /* The instruction is before the label. */
12099 /* Above offset included in -4 below. */
12113 }
12117 {
12118 bfd_vma branch_from_veneer;
12121 /* Take size of veneer into account. */
12130 /* Original instruction. */
12137 /* Branch back to insn after original insn. */
12143 }
12148 }
12149 }
12150 }
12156 {
12161 {
12164 else
12168 {
12170 /* Byte swap code words. */
12172 {
12180 }
12184 /* Byte swap code halfwords. */
12186 {
12191 }
12195 /* Leave data alone. */
12197 }
12199 }
12200 }
12209 }
12211 static void
12215 {
12217 }
12219 static bfd_boolean
12221 {
12224 unrecord_section_via_map_over_sections,
12225 NULL);
12228 }
12230 static bfd_boolean
12232 {
12235 unrecord_section_via_map_over_sections,
12236 NULL);
12239 }
12241 /* Display STT_ARM_TFUNC symbols as functions. */
12243 static void
12246 {
12251 }
12254 /* Mangle thumb function symbols as we read them in. */
12256 static bfd_boolean
12261 {
12265 /* New EABI objects mark thumb function symbols by setting the low bit of
12266 the address. Turn these into STT_ARM_TFUNC. */
12269 {
12272 }
12274 }
12277 /* Mangle thumb function symbols as we write them out. */
12279 static void
12284 {
12285 Elf_Internal_Sym newsym;
12287 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
12288 of the address set, as per the new EABI. We do this unconditionally
12289 because objcopy does not set the elf header flags until after
12290 it writes out the symbol table. */
12292 {
12296 {
12297 /* Do this only for defined symbols. At link type, the static
12298 linker will simulate the work of dynamic linker of resolving
12299 symbols and will carry over the thumbness of found symbols to
12300 the output symbol table. It's not clear how it happens, but
12301 the thumbness of undefined symbols can well be different at
12302 runtime, and writing '1' for them will be confusing for users
12303 and possibly for dynamic linker itself.
12304 */
12306 }
12309 }
12311 }
12313 /* Add the PT_ARM_EXIDX program header. */
12315 static bfd_boolean
12318 {
12324 {
12325 /* If there is already a PT_ARM_EXIDX header, then we do not
12326 want to add another one. This situation arises when running
12327 "strip"; the input binary already has the header. */
12332 {
12342 }
12343 }
12346 }
12348 /* We may add a PT_ARM_EXIDX program header. */
12350 static int
12353 {
12359 else
12361 }
12363 /* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
12365 static bfd_boolean
12367 {
12369 }
12371 /* We use this to override swap_symbol_in and swap_symbol_out. */
12373 {
12386 bfd_elf32_write_out_phdrs,
12387 bfd_elf32_write_shdrs_and_ehdr,
12388 bfd_elf32_checksum_contents,
12389 bfd_elf32_write_relocs,
12390 elf32_arm_swap_symbol_in,
12391 elf32_arm_swap_symbol_out,
12392 bfd_elf32_slurp_reloc_table,
12393 bfd_elf32_slurp_symbol_table,
12394 bfd_elf32_swap_dyn_in,
12395 bfd_elf32_swap_dyn_out,
12396 bfd_elf32_swap_reloc_in,
12397 bfd_elf32_swap_reloc_out,
12398 bfd_elf32_swap_reloca_in,
12399 bfd_elf32_swap_reloca_out
12400 };
12402 #define ELF_ARCH bfd_arch_arm
12403 #define ELF_MACHINE_CODE EM_ARM
12404 #ifdef __QNXTARGET__
12405 #define ELF_MAXPAGESIZE 0x1000
12406 #else
12407 #define ELF_MAXPAGESIZE 0x8000
12408 #endif
12409 #define ELF_MINPAGESIZE 0x1000
12410 #define ELF_COMMONPAGESIZE 0x1000
12412 #define bfd_elf32_mkobject elf32_arm_mkobject
12414 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
12415 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
12416 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
12417 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
12418 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
12419 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
12420 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
12421 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
12422 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
12423 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
12424 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
12425 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
12426 #define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
12427 #define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
12429 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
12430 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
12431 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
12432 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
12433 #define elf_backend_check_relocs elf32_arm_check_relocs
12434 #define elf_backend_relocate_section elf32_arm_relocate_section
12435 #define elf_backend_write_section elf32_arm_write_section
12436 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
12437 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
12438 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
12439 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
12440 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
12441 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
12442 #define elf_backend_post_process_headers elf32_arm_post_process_headers
12443 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
12444 #define elf_backend_object_p elf32_arm_object_p
12445 #define elf_backend_section_flags elf32_arm_section_flags
12446 #define elf_backend_fake_sections elf32_arm_fake_sections
12447 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
12448 #define elf_backend_final_write_processing elf32_arm_final_write_processing
12449 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
12450 #define elf_backend_symbol_processing elf32_arm_symbol_processing
12451 #define elf_backend_size_info elf32_arm_size_info
12452 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
12453 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
12454 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
12455 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
12456 #define elf_backend_is_function_type elf32_arm_is_function_type
12458 #define elf_backend_can_refcount 1
12459 #define elf_backend_can_gc_sections 1
12460 #define elf_backend_plt_readonly 1
12461 #define elf_backend_want_got_plt 1
12462 #define elf_backend_want_plt_sym 0
12463 #define elf_backend_may_use_rel_p 1
12464 #define elf_backend_may_use_rela_p 0
12465 #define elf_backend_default_use_rela_p 0
12467 #define elf_backend_got_header_size 12
12469 #undef elf_backend_obj_attrs_vendor
12471 #undef elf_backend_obj_attrs_section
12473 #undef elf_backend_obj_attrs_arg_type
12474 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
12475 #undef elf_backend_obj_attrs_section_type
12476 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
12477 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
12481 /* VxWorks Targets. */
12483 #undef TARGET_LITTLE_SYM
12484 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
12485 #undef TARGET_LITTLE_NAME
12487 #undef TARGET_BIG_SYM
12488 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
12489 #undef TARGET_BIG_NAME
12492 /* Like elf32_arm_link_hash_table_create -- but overrides
12493 appropriately for VxWorks. */
12497 {
12502 {
12507 }
12509 }
12511 static void
12513 {
12516 }
12518 #undef elf32_bed
12519 #define elf32_bed elf32_arm_vxworks_bed
12521 #undef bfd_elf32_bfd_link_hash_table_create
12522 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
12523 #undef elf_backend_add_symbol_hook
12524 #define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
12525 #undef elf_backend_final_write_processing
12526 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
12527 #undef elf_backend_emit_relocs
12528 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
12530 #undef elf_backend_may_use_rel_p
12531 #define elf_backend_may_use_rel_p 0
12532 #undef elf_backend_may_use_rela_p
12533 #define elf_backend_may_use_rela_p 1
12534 #undef elf_backend_default_use_rela_p
12535 #define elf_backend_default_use_rela_p 1
12536 #undef elf_backend_want_plt_sym
12537 #define elf_backend_want_plt_sym 1
12538 #undef ELF_MAXPAGESIZE
12539 #define ELF_MAXPAGESIZE 0x1000
12544 /* Symbian OS Targets. */
12546 #undef TARGET_LITTLE_SYM
12547 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
12548 #undef TARGET_LITTLE_NAME
12550 #undef TARGET_BIG_SYM
12551 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
12552 #undef TARGET_BIG_NAME
12555 /* Like elf32_arm_link_hash_table_create -- but overrides
12556 appropriately for Symbian OS. */
12560 {
12565 {
12568 /* There is no PLT header for Symbian OS. */
12570 /* The PLT entries are each one instruction and one word. */
12573 /* Symbian uses armv5t or above, so use_blx is always true. */
12576 }
12578 }
12580 static const struct bfd_elf_special_section
12581 elf32_arm_symbian_special_sections[] =
12582 {
12583 /* In a BPABI executable, the dynamic linking sections do not go in
12584 the loadable read-only segment. The post-linker may wish to
12585 refer to these sections, but they are not part of the final
12586 program image. */
12592 /* These sections do not need to be writable as the SymbianOS
12593 postlinker will arrange things so that no dynamic relocation is
12594 required. */
12599 };
12601 static void
12604 {
12605 /* BPABI objects are never loaded directly by an OS kernel; they are
12606 processed by a postlinker first, into an OS-specific format. If
12607 the D_PAGED bit is set on the file, BFD will align segments on
12608 page boundaries, so that an OS can directly map the file. With
12609 BPABI objects, that just results in wasted space. In addition,
12610 because we clear the D_PAGED bit, map_sections_to_segments will
12611 recognize that the program headers should not be mapped into any
12612 loadable segment. */
12615 }
12617 static bfd_boolean
12620 {
12624 /* BPABI shared libraries and executables should have a PT_DYNAMIC
12625 segment. However, because the .dynamic section is not marked
12626 with SEC_LOAD, the generic ELF code will not create such a
12627 segment. */
12630 {
12636 {
12640 }
12641 }
12643 /* Also call the generic arm routine. */
12645 }
12647 /* Return address for Ith PLT stub in section PLT, for relocation REL
12648 or (bfd_vma) -1 if it should not be included. */
12650 static bfd_vma
12653 {
12655 }
12658 #undef elf32_bed
12659 #define elf32_bed elf32_arm_symbian_bed
12661 /* The dynamic sections are not allocated on SymbianOS; the postlinker
12662 will process them and then discard them. */
12663 #undef ELF_DYNAMIC_SEC_FLAGS
12664 #define ELF_DYNAMIC_SEC_FLAGS \
12665 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
12667 #undef elf_backend_add_symbol_hook
12668 #undef elf_backend_emit_relocs
12670 #undef bfd_elf32_bfd_link_hash_table_create
12671 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
12672 #undef elf_backend_special_sections
12673 #define elf_backend_special_sections elf32_arm_symbian_special_sections
12674 #undef elf_backend_begin_write_processing
12675 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
12676 #undef elf_backend_final_write_processing
12677 #define elf_backend_final_write_processing elf32_arm_final_write_processing
12679 #undef elf_backend_modify_segment_map
12680 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
12682 /* There is no .got section for BPABI objects, and hence no header. */
12683 #undef elf_backend_got_header_size
12684 #define elf_backend_got_header_size 0
12686 /* Similarly, there is no .got.plt section. */
12687 #undef elf_backend_want_got_plt
12688 #define elf_backend_want_got_plt 0
12690 #undef elf_backend_plt_sym_val
12691 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
12693 #undef elf_backend_may_use_rel_p
12694 #define elf_backend_may_use_rel_p 1
12695 #undef elf_backend_may_use_rela_p
12696 #define elf_backend_may_use_rela_p 0
12697 #undef elf_backend_default_use_rela_p
12698 #define elf_backend_default_use_rela_p 0
12699 #undef elf_backend_want_plt_sym
12700 #define elf_backend_want_plt_sym 0
12701 #undef ELF_MAXPAGESIZE
12702 #define ELF_MAXPAGESIZE 0x8000