* elf32-spu.c (build_stub): Fix malloc under-allocation.
[binutils.git] / gas / testsuite / gas / i386 / intel-regs.d
blob97fc27ff762aa1017dcb5e3a93ee572cf5cc61e1
1 #objdump: -drw
2 #name: i386 Intel register names
4 .*: +file format .*i386.*
6 Disassembly of section \.text:
7 0+0 <.*>:
8 .*[ ]+R_386_16[ ]+eax
9 .*[ ]+R_386_16[ ]+rax
10 .*[ ]+R_386_16[ ]+axl
11 .*[ ]+R_386_16[ ]+r8b
12 .*[ ]+R_386_16[ ]+r8w
13 .*[ ]+R_386_16[ ]+r8d
14 .*[ ]+R_386_16[ ]+r8
15 .*[ ]+R_386_16[ ]+fs
16 .*[ ]+R_386_16[ ]+st
17 .*[ ]+R_386_16[ ]+cr0
18 .*[ ]+R_386_16[ ]+dr0
19 .*[ ]+R_386_16[ ]+tr0
20 .*[ ]+R_386_16[ ]+mm0
21 .*[ ]+R_386_16[ ]+xmm0
22 .*[ ]+R_386_16[ ]+ymm0
23 .*[ ]+R_386_32[ ]+rax
24 .*[ ]+R_386_32[ ]+axl
25 .*[ ]+R_386_32[ ]+r8b
26 .*[ ]+R_386_32[ ]+r8w
27 .*[ ]+R_386_32[ ]+r8d
28 .*[ ]+R_386_32[ ]+r8
29 .*[ ]+R_386_32[ ]+st
30 .*:[ ]+0f 20 c0[ ]+mov[ ]+%cr0,%eax
31 .*:[ ]+0f 21 c0[ ]+mov[ ]+%db0,%eax
32 .*:[ ]+0f 24 c0[ ]+mov[ ]+%tr0,%eax
33 .*[ ]+R_386_32[ ]+mm0
34 .*[ ]+R_386_32[ ]+xmm0
35 .*[ ]+R_386_32[ ]+ymm0
36 .*:[ ]+dd c0[ ]+ffree[ ]+%st(\(0\))?
37 .*:[ ]+0f ef c0[ ]+pxor[ ]+%mm0,%mm0
38 .*:[ ]+0f 57 c0[ ]+xorps[ ]+%xmm0,%xmm0
39 .*:[ ]+c5 fc 57 c0[ ]+vxorps[ ]+%ymm0,%ymm0,%ymm0
40 .*:[ ]+44[ ]+inc %esp
41 .*:[ ]+88 c0[ ]+mov[ ]+%al,%al
42 .*:[ ]+66 44[ ]+inc[ ]+%sp
43 .*:[ ]+89 c0[ ]+mov[ ]+%eax,%eax
44 .*:[ ]+44[ ]+inc %esp
45 .*:[ ]+89 c0[ ]+mov[ ]+%eax,%eax
46 .*:[ ]+4c[ ]+dec %esp
47 .*:[ ]+89 c0[ ]+mov[ ]+%eax,%eax
49 .* <ymm8>:
50 .*[ ]+<ymm8>
51 #pass