3 Free Software Foundation, Inc.
4 Contributed by Joseph Myers <joseph@codesourcery.com>
5 Bernd Schmidt <bernds@codesourcery.com>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "dwarf2dbg.h"
26 #include "safe-ctype.h"
28 #include "opcode/tic6x.h"
29 #include "elf/tic6x.h"
30 #include "elf32-tic6x.h"
32 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
37 const char comment_chars
[] = ";";
38 const char line_comment_chars
[] = "#*;";
39 const char line_separator_chars
[] = "@";
41 const char EXP_CHARS
[] = "eE";
42 const char FLT_CHARS
[] = "dDfF";
44 const char *md_shortopts
= "";
48 OPTION_MARCH
= OPTION_MD_BASE
,
50 OPTION_MLITTLE_ENDIAN
,
59 struct option md_longopts
[] =
61 { "march", required_argument
, NULL
, OPTION_MARCH
},
62 { "mbig-endian", no_argument
, NULL
, OPTION_MBIG_ENDIAN
},
63 { "mlittle-endian", no_argument
, NULL
, OPTION_MLITTLE_ENDIAN
},
64 { "mdsbt", no_argument
, NULL
, OPTION_MDSBT
},
65 { "mno-dsbt", no_argument
, NULL
, OPTION_MNO_DSBT
},
66 { "mpid", required_argument
, NULL
, OPTION_MPID
},
67 { "mpic", no_argument
, NULL
, OPTION_MPIC
},
68 { "mno-pic", no_argument
, NULL
, OPTION_MNO_PIC
},
69 { "mgenerate-rel", no_argument
, NULL
, OPTION_MGENERATE_REL
},
70 { NULL
, no_argument
, NULL
, 0 }
72 size_t md_longopts_size
= sizeof (md_longopts
);
74 /* The instructions enabled based only on the selected architecture
75 (all instructions, if no architecture specified). */
76 static unsigned short tic6x_arch_enable
= (TIC6X_INSN_C62X
83 /* The instructions enabled based on the current set of features
84 (architecture, as modified by other options). */
85 static unsigned short tic6x_features
;
87 /* The architecture attribute value, or C6XABI_Tag_ISA_none if
89 static int tic6x_arch_attribute
= C6XABI_Tag_ISA_none
;
91 /* Whether any instructions at all have been seen. Once any
92 instructions have been seen, architecture attributes merge into the
93 previous attribute value rather than replacing it. */
94 static bfd_boolean tic6x_seen_insns
= FALSE
;
96 /* The number of registers in each register file supported by the
97 current architecture. */
98 static unsigned int tic6x_num_registers
;
100 /* Whether predication on A0 is possible. */
101 static bfd_boolean tic6x_predicate_a0
;
103 /* Whether execute packets can cross fetch packet boundaries. */
104 static bfd_boolean tic6x_can_cross_fp_boundary
;
106 /* Whether there are constraints on simultaneous reads and writes of
108 static bfd_boolean tic6x_long_data_constraints
;
110 /* Whether compact instructions are available. */
111 static bfd_boolean tic6x_compact_insns
;
113 /* Whether to generate RELA relocations. */
114 static bfd_boolean tic6x_generate_rela
= TRUE
;
116 /* Whether the code uses DSBT addressing. */
117 static bfd_boolean tic6x_dsbt
;
119 /* Types of position-independent data (attribute values for
128 /* The type of data addressing used in this code. */
129 static tic6x_pid_type tic6x_pid
;
131 /* Whether the code uses position-independent code. */
132 static bfd_boolean tic6x_pic
;
134 /* Table of supported architecture variants. */
139 unsigned short features
;
141 static const tic6x_arch_table tic6x_arches
[] =
143 { "c62x", C6XABI_Tag_ISA_C62X
, TIC6X_INSN_C62X
},
144 { "c64x", C6XABI_Tag_ISA_C64X
, TIC6X_INSN_C62X
| TIC6X_INSN_C64X
},
145 { "c64x+", C6XABI_Tag_ISA_C64XP
, (TIC6X_INSN_C62X
147 | TIC6X_INSN_C64XP
) },
148 { "c67x", C6XABI_Tag_ISA_C67X
, TIC6X_INSN_C62X
| TIC6X_INSN_C67X
},
149 { "c67x+", C6XABI_Tag_ISA_C67XP
, (TIC6X_INSN_C62X
151 | TIC6X_INSN_C67XP
) },
152 { "c674x", C6XABI_Tag_ISA_C674X
, (TIC6X_INSN_C62X
157 | TIC6X_INSN_C674X
) }
160 /* Update the selected architecture based on ARCH, giving an error if
161 ARCH is an invalid value. Does not call tic6x_update_features; the
162 caller must do that if necessary. */
165 tic6x_use_arch (const char *arch
)
169 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
170 if (strcmp (arch
, tic6x_arches
[i
].arch
) == 0)
172 tic6x_arch_enable
= tic6x_arches
[i
].features
;
173 if (tic6x_seen_insns
)
175 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute
,
176 tic6x_arches
[i
].attr
);
178 tic6x_arch_attribute
= tic6x_arches
[i
].attr
;
182 as_bad (_("unknown architecture '%s'"), arch
);
185 /* Table of supported -mpid arguments. */
190 } tic6x_pid_type_table
;
191 static const tic6x_pid_type_table tic6x_pid_types
[] =
193 { "no", tic6x_pid_no
},
194 { "near", tic6x_pid_near
},
195 { "far", tic6x_pid_far
}
198 /* Handle -mpid=ARG. */
201 tic6x_use_pid (const char *arg
)
205 for (i
= 0; i
< ARRAY_SIZE (tic6x_pid_types
); i
++)
206 if (strcmp (arg
, tic6x_pid_types
[i
].arg
) == 0)
208 tic6x_pid
= tic6x_pid_types
[i
].attr
;
212 as_bad (_("unknown -mpid= argument '%s'"), arg
);
215 /* Parse a target-specific option. */
218 md_parse_option (int c
, char *arg
)
223 tic6x_use_arch (arg
);
226 case OPTION_MBIG_ENDIAN
:
227 target_big_endian
= 1;
230 case OPTION_MLITTLE_ENDIAN
:
231 target_big_endian
= 0;
238 case OPTION_MNO_DSBT
:
254 case OPTION_MGENERATE_REL
:
255 tic6x_generate_rela
= FALSE
;
265 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
269 fputc ('\n', stream
);
270 fprintf (stream
, _("TMS320C6000 options:\n"));
271 fprintf (stream
, _(" -march=ARCH enable instructions from architecture ARCH\n"));
272 fprintf (stream
, _(" -mbig-endian generate big-endian code\n"));
273 fprintf (stream
, _(" -mlittle-endian generate little-endian code\n"));
274 fprintf (stream
, _(" -mdsbt code uses DSBT addressing\n"));
275 fprintf (stream
, _(" -mno-dsbt code does not use DSBT addressing\n"));
276 fprintf (stream
, _(" -mpid=no code uses position-dependent data addressing\n"));
277 fprintf (stream
, _(" -mpid=near code uses position-independent data addressing,\n"
278 " GOT accesses use near DP addressing\n"));
279 fprintf (stream
, _(" -mpid=far code uses position-independent data addressing,\n"
280 " GOT accesses use far DP addressing\n"));
281 fprintf (stream
, _(" -mpic code addressing is position-independent\n"));
282 fprintf (stream
, _(" -mno-pic code addressing is position-dependent\n"));
283 /* -mgenerate-rel is only for testsuite use and is deliberately
286 fputc ('\n', stream
);
287 fprintf (stream
, _("Supported ARCH values are:"));
288 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
289 fprintf (stream
, " %s", tic6x_arches
[i
].arch
);
290 fputc ('\n', stream
);
293 /* Update enabled features based on the current architecture and
296 tic6x_update_features (void)
298 tic6x_features
= tic6x_arch_enable
;
301 = (tic6x_arch_enable
& (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? 32 : 16;
303 tic6x_predicate_a0
= (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? TRUE
: FALSE
;
305 tic6x_can_cross_fp_boundary
307 & (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? TRUE
: FALSE
;
309 tic6x_long_data_constraints
310 = (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? FALSE
: TRUE
;
312 tic6x_compact_insns
= (tic6x_arch_enable
& TIC6X_INSN_C64XP
) ? TRUE
: FALSE
;
315 /* Do configuration after all options have been parsed. */
318 tic6x_after_parse_args (void)
320 tic6x_update_features ();
323 /* Parse a .arch directive. */
326 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED
)
331 arch
= input_line_pointer
;
332 while (*input_line_pointer
&& !ISSPACE (*input_line_pointer
))
333 input_line_pointer
++;
334 c
= *input_line_pointer
;
335 *input_line_pointer
= 0;
337 tic6x_use_arch (arch
);
338 tic6x_update_features ();
339 *input_line_pointer
= c
;
340 demand_empty_rest_of_line ();
343 /* Parse a .nocmp directive. */
346 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED
)
348 seg_info (now_seg
)->tc_segment_info_data
.nocmp
= TRUE
;
349 demand_empty_rest_of_line ();
352 /* Track for each attribute whether it has been set explicitly (and so
353 should not have a default value set by the assembler). */
354 static bfd_boolean tic6x_attributes_set_explicitly
[NUM_KNOWN_OBJ_ATTRIBUTES
];
356 /* Parse a .c6xabi_attribute directive. */
359 s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED
)
361 int tag
= s_vendor_attribute (OBJ_ATTR_PROC
);
363 if (tag
< NUM_KNOWN_OBJ_ATTRIBUTES
)
364 tic6x_attributes_set_explicitly
[tag
] = TRUE
;
371 } tic6x_attribute_table
;
373 static const tic6x_attribute_table tic6x_attributes
[] =
375 #define TAG(tag, value) { #tag, tag },
376 #include "elf/tic6x-attrs.h"
380 /* Convert an attribute name to a number. */
383 tic6x_convert_symbolic_attribute (const char *name
)
387 for (i
= 0; i
< ARRAY_SIZE (tic6x_attributes
); i
++)
388 if (strcmp (name
, tic6x_attributes
[i
].name
) == 0)
389 return tic6x_attributes
[i
].tag
;
394 const pseudo_typeS md_pseudo_table
[] =
396 { "arch", s_tic6x_arch
, 0 },
397 { "c6xabi_attribute", s_tic6x_c6xabi_attribute
, 0 },
398 { "nocmp", s_tic6x_nocmp
, 0 },
403 /* Hash table of opcodes. For each opcode name, this stores a pointer
404 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
405 table entries with that name. */
406 static struct hash_control
*opcode_hash
;
408 /* Initialize the assembler (called once at assembler startup). */
415 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, 0);
417 /* Insert opcodes into the hash table. */
418 opcode_hash
= hash_new ();
419 for (id
= 0; id
< tic6x_opcode_max
; id
++)
422 tic6x_opcode_list
*opc
= xmalloc (sizeof (tic6x_opcode_list
));
425 opc
->next
= hash_find (opcode_hash
, tic6x_opcode_table
[id
].name
);
426 if ((errmsg
= hash_jam (opcode_hash
, tic6x_opcode_table
[id
].name
, opc
))
428 as_fatal ("%s", _(errmsg
));
432 /* Whether the current line being parsed had the "||" parallel bars. */
433 static bfd_boolean tic6x_line_parallel
;
435 /* Whether the current line being parsed started "||^" to indicate an
436 SPMASKed parallel instruction. */
437 static bfd_boolean tic6x_line_spmask
;
439 /* If the current line being parsed had an instruction predicate, the
440 creg value for that predicate (which must be nonzero); otherwise
442 static unsigned int tic6x_line_creg
;
444 /* If the current line being parsed had an instruction predicate, the
445 z value for that predicate; otherwise 0. */
446 static unsigned int tic6x_line_z
;
448 /* Return 1 (updating input_line_pointer as appropriate) if the line
449 starting with C (immediately before input_line_pointer) starts with
450 pre-opcode text appropriate for this target, 0 otherwise. */
453 tic6x_unrecognized_line (int c
)
458 bfd_boolean bad_predicate
;
463 if (input_line_pointer
[0] == '|')
465 if (input_line_pointer
[1] == '^')
467 tic6x_line_spmask
= TRUE
;
468 input_line_pointer
+= 2;
471 input_line_pointer
+= 1;
472 if (tic6x_line_parallel
)
473 as_bad (_("multiple '||' on same line"));
474 tic6x_line_parallel
= TRUE
;
476 as_bad (_("'||' after predicate"));
482 /* If it doesn't look like a predicate at all, just return 0.
483 If it looks like one but not a valid one, give a better
485 p
= input_line_pointer
;
486 while (*p
!= ']' && !is_end_of_line
[(unsigned char) *p
])
491 p
= input_line_pointer
;
493 bad_predicate
= FALSE
;
499 if (*p
== 'A' || *p
== 'a')
501 else if (*p
== 'B' || *p
== 'b')
505 areg
= TRUE
; /* Avoid uninitialized warning. */
506 bad_predicate
= TRUE
;
511 if (*p
!= '0' && *p
!= '1' && *p
!= '2')
512 bad_predicate
= TRUE
;
513 else if (p
[1] != ']')
514 bad_predicate
= TRUE
;
516 input_line_pointer
= p
+ 2;
520 as_bad (_("multiple predicates on same line"));
526 as_bad (_("bad predicate '%s'"), input_line_pointer
- 1);
528 input_line_pointer
= endp
;
535 tic6x_line_creg
= (areg
? 6 : 1);
536 if (areg
&& !tic6x_predicate_a0
)
537 as_bad (_("predication on A0 not supported on this architecture"));
541 tic6x_line_creg
= (areg
? 4 : 2);
545 tic6x_line_creg
= (areg
? 5 : 3);
560 /* Do any target-specific handling of a label required. */
563 tic6x_frob_label (symbolS
*sym
)
565 segment_info_type
*si
;
566 tic6x_label_list
*list
;
568 if (tic6x_line_parallel
)
570 as_bad (_("label after '||'"));
571 tic6x_line_parallel
= FALSE
;
572 tic6x_line_spmask
= FALSE
;
576 as_bad (_("label after predicate"));
581 si
= seg_info (now_seg
);
582 list
= si
->tc_segment_info_data
.label_list
;
583 si
->tc_segment_info_data
.label_list
= xmalloc (sizeof (tic6x_label_list
));
584 si
->tc_segment_info_data
.label_list
->next
= list
;
585 si
->tc_segment_info_data
.label_list
->label
= sym
;
587 /* Defining tc_frob_label overrides the ELF definition of
588 obj_frob_label, so we need to apply its effects here. */
589 dwarf2_emit_label (sym
);
592 /* At end-of-line, give errors for start-of-line decorations that
593 needed an instruction but were not followed by one. */
596 tic6x_end_of_line (void)
598 if (tic6x_line_parallel
)
600 as_bad (_("'||' not followed by instruction"));
601 tic6x_line_parallel
= FALSE
;
602 tic6x_line_spmask
= FALSE
;
606 as_bad (_("predicate not followed by instruction"));
612 /* Do any target-specific handling of the start of a logical line. */
615 tic6x_start_line_hook (void)
617 tic6x_end_of_line ();
620 /* Do target-specific handling immediately after an input file from
621 the command line, and any other inputs it includes, have been
627 tic6x_end_of_line ();
630 /* Do target-specific initialization after arguments have been
631 processed and the output file created. */
634 tic6x_init_after_args (void)
636 elf32_tic6x_set_use_rela_p (stdoutput
, tic6x_generate_rela
);
639 /* Free LIST of labels (possibly NULL). */
642 tic6x_free_label_list (tic6x_label_list
*list
)
646 tic6x_label_list
*old
= list
;
653 /* Handle a data alignment of N bytes. */
656 tic6x_cons_align (int n ATTRIBUTE_UNUSED
)
658 segment_info_type
*seginfo
= seg_info (now_seg
);
660 /* Data means there is no current execute packet, and that any label
661 applies to that data rather than a subsequent instruction. */
662 tic6x_free_label_list (seginfo
->tc_segment_info_data
.label_list
);
663 seginfo
->tc_segment_info_data
.label_list
= NULL
;
664 seginfo
->tc_segment_info_data
.execute_packet_frag
= NULL
;
665 seginfo
->tc_segment_info_data
.last_insn_lsb
= NULL
;
666 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
667 seginfo
->tc_segment_info_data
.func_units_used
= 0;
670 /* Handle an alignment directive. Return TRUE if the
671 machine-independent frag generation should be skipped. */
674 tic6x_do_align (int n
, char *fill
, int len ATTRIBUTE_UNUSED
, int max
)
676 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
677 them in the md_end pass by inserting NOPs in parallel with
678 previous instructions. We only do this in sections containing
679 nothing but instructions. Code alignments of 1 or 2 bytes have
680 no effect in such sections (but we record them with
681 machine-dependent frags anyway so they can be skipped or
682 converted to machine-independent), while those of more than 64
683 bytes cannot reliably be handled in this way. */
689 && subseg_text_p (now_seg
))
697 /* Machine-independent code would generate a frag here, but we
698 wish to handle it in a machine-dependent way. */
699 if (frag_now_fix () != 0)
701 if (frag_now
->fr_type
!= rs_machine_dependent
)
702 frag_wane (frag_now
);
707 align_frag
= frag_now
;
708 p
= frag_var (rs_machine_dependent
, 32, 32, max
, NULL
, n
, NULL
);
709 /* This must be the same as the frag to which a pointer was just
711 if (p
!= align_frag
->fr_literal
)
713 align_frag
->tc_frag_data
.is_insns
= FALSE
;
720 /* Types of operand for parsing purposes. These are used as bit-masks
721 to tell tic6x_parse_operand what forms of operand are
723 #define TIC6X_OP_EXP 0x0001u
724 #define TIC6X_OP_REG 0x0002u
725 #define TIC6X_OP_REGPAIR 0x0004u
726 #define TIC6X_OP_IRP 0x0008u
727 #define TIC6X_OP_NRP 0x0010u
728 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
729 interpreted as an expression, which may be a symbol with the same
730 name as a register that ends up being implicitly DP-relative. With
731 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
732 a register if they match one, and failing that as an expression,
733 which must be constant. */
734 #define TIC6X_OP_MEM_NOUNREG 0x0020u
735 #define TIC6X_OP_MEM_UNREG 0x0040u
736 #define TIC6X_OP_CTRL 0x0080u
737 #define TIC6X_OP_FUNC_UNIT 0x0100u
739 /* A register or register pair read by the assembler. */
742 /* The side the register is on (1 or 2). */
744 /* The register number (0 to 31). */
748 /* Types of modification of a base address. */
754 tic6x_mem_mod_preinc
,
755 tic6x_mem_mod_predec
,
756 tic6x_mem_mod_postinc
,
757 tic6x_mem_mod_postdec
760 /* Scaled [] or unscaled () nature of an offset. */
765 tic6x_offset_unscaled
768 /* A memory operand read by the assembler. */
771 /* The base register. */
772 tic6x_register base_reg
;
773 /* How the base register is modified. */
775 /* Whether there is an offset (required with plain "+" and "-"), and
776 whether it is scaled or unscaled if so. */
777 tic6x_mem_scaling scaled
;
778 /* Whether the offset is a register (TRUE) or an expression
780 bfd_boolean offset_is_reg
;
789 /* A functional unit in SPMASK operands read by the assembler. */
792 /* The basic unit. */
793 tic6x_func_unit_base base
;
794 /* The side (1 or 2). */
796 } tic6x_func_unit_operand
;
798 /* An operand read by the assembler. */
801 /* The syntactic form of the operand, as one of the bit-masks
804 /* The operand value. */
807 /* An expression: TIC6X_OP_EXP. */
809 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
811 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
812 TIC6X_OP_MEM_UNREG. */
814 /* A control register: TIC6X_OP_CTRL. */
816 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
817 tic6x_func_unit_operand func_unit
;
821 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
823 /* Parse a register operand, or part of an operand, starting at *P.
824 If syntactically OK (including that the number is in the range 0 to
825 31, but not necessarily in range for this architecture), return
826 TRUE, putting the register side and number in *REG and update *P to
827 point immediately after the register number; otherwise return FALSE
828 without changing *P (but possibly changing *REG). Do not print any
832 tic6x_parse_register (char **p
, tic6x_register
*reg
)
853 if (*r
>= '0' && *r
<= '9')
861 if (reg
->num
> 0 && *r
>= '0' && *r
<= '9')
863 reg
->num
= reg
->num
* 10 + (*r
- '0');
867 if (*r
>= '0' && *r
<= '9')
876 /* Parse the initial two characters of a functional unit name starting
877 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
881 tic6x_parse_func_unit_base (char *p
, tic6x_func_unit_base
*base
,
884 bfd_boolean good_func_unit
= TRUE
;
885 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
886 unsigned int maybe_side
= 0;
892 maybe_base
= tic6x_func_unit_d
;
897 maybe_base
= tic6x_func_unit_l
;
902 maybe_base
= tic6x_func_unit_m
;
907 maybe_base
= tic6x_func_unit_s
;
911 good_func_unit
= FALSE
;
927 good_func_unit
= FALSE
;
937 return good_func_unit
;
940 /* Parse an operand starting at *P. If the operand parses OK, return
941 TRUE and store the value in *OP; otherwise return FALSE (possibly
942 changing *OP). In any case, update *P to point to the following
943 comma or end of line. The possible operand forms are given by
944 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
945 starting at STR, length OPC_LEN. */
948 tic6x_parse_operand (char **p
, tic6x_operand
*op
, unsigned int op_forms
,
949 char *str
, int opc_len
, unsigned int opno
)
951 bfd_boolean operand_parsed
= FALSE
;
954 if ((op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
955 == (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
958 /* Check for functional unit names for SPMASK and SPMASKR. */
959 if (!operand_parsed
&& (op_forms
& TIC6X_OP_FUNC_UNIT
))
961 tic6x_func_unit_base base
= tic6x_func_unit_nfu
;
962 unsigned int side
= 0;
964 if (tic6x_parse_func_unit_base (q
, &base
, &side
))
968 skip_whitespace (rq
);
969 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
971 op
->form
= TIC6X_OP_FUNC_UNIT
;
972 op
->value
.func_unit
.base
= base
;
973 op
->value
.func_unit
.side
= side
;
974 operand_parsed
= TRUE
;
980 /* Check for literal "irp". */
981 if (!operand_parsed
&& (op_forms
& TIC6X_OP_IRP
))
983 if ((q
[0] == 'i' || q
[0] == 'I')
984 && (q
[1] == 'r' || q
[1] == 'R')
985 && (q
[2] == 'p' || q
[2] == 'P'))
989 skip_whitespace (rq
);
990 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
992 op
->form
= TIC6X_OP_IRP
;
993 operand_parsed
= TRUE
;
999 /* Check for literal "nrp". */
1000 if (!operand_parsed
&& (op_forms
& TIC6X_OP_NRP
))
1002 if ((q
[0] == 'n' || q
[0] == 'N')
1003 && (q
[1] == 'r' || q
[1] == 'R')
1004 && (q
[2] == 'p' || q
[2] == 'P'))
1008 skip_whitespace (rq
);
1009 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1011 op
->form
= TIC6X_OP_NRP
;
1012 operand_parsed
= TRUE
;
1018 /* Check for control register names. */
1019 if (!operand_parsed
&& (op_forms
& TIC6X_OP_CTRL
))
1023 for (crid
= 0; crid
< tic6x_ctrl_max
; crid
++)
1025 size_t len
= strlen (tic6x_ctrl_table
[crid
].name
);
1027 if (strncasecmp (tic6x_ctrl_table
[crid
].name
, q
, len
) == 0)
1031 skip_whitespace (rq
);
1032 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1034 op
->form
= TIC6X_OP_CTRL
;
1035 op
->value
.ctrl
= crid
;
1036 operand_parsed
= TRUE
;
1038 if (!(tic6x_ctrl_table
[crid
].isa_variants
& tic6x_features
))
1039 as_bad (_("control register '%s' not supported "
1040 "on this architecture"),
1041 tic6x_ctrl_table
[crid
].name
);
1047 /* See if this looks like a memory reference. */
1049 && (op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
)))
1051 bfd_boolean mem_ok
= TRUE
;
1053 tic6x_mem_mod mem_mod
= tic6x_mem_mod_none
;
1054 tic6x_register base_reg
;
1055 bfd_boolean require_offset
, permit_offset
;
1056 tic6x_mem_scaling scaled
;
1057 bfd_boolean offset_is_reg
;
1058 expressionS offset_exp
;
1059 tic6x_register offset_reg
;
1068 skip_whitespace (mq
);
1074 mem_mod
= tic6x_mem_mod_preinc
;
1079 mem_mod
= tic6x_mem_mod_plus
;
1087 mem_mod
= tic6x_mem_mod_predec
;
1092 mem_mod
= tic6x_mem_mod_minus
;
1104 skip_whitespace (mq
);
1105 mem_ok
= tic6x_parse_register (&mq
, &base_reg
);
1108 if (mem_ok
&& mem_mod
== tic6x_mem_mod_none
)
1110 skip_whitespace (mq
);
1111 if (mq
[0] == '+' && mq
[1] == '+')
1113 mem_mod
= tic6x_mem_mod_postinc
;
1116 else if (mq
[0] == '-' && mq
[1] == '-')
1118 mem_mod
= tic6x_mem_mod_postdec
;
1123 if (mem_mod
== tic6x_mem_mod_none
)
1124 permit_offset
= FALSE
;
1126 permit_offset
= TRUE
;
1127 if (mem_mod
== tic6x_mem_mod_plus
|| mem_mod
== tic6x_mem_mod_minus
)
1128 require_offset
= TRUE
;
1130 require_offset
= FALSE
;
1131 scaled
= tic6x_offset_none
;
1132 offset_is_reg
= FALSE
;
1134 if (mem_ok
&& permit_offset
)
1138 skip_whitespace (mq
);
1142 scaled
= tic6x_offset_scaled
;
1148 scaled
= tic6x_offset_unscaled
;
1156 if (scaled
!= tic6x_offset_none
)
1158 skip_whitespace (mq
);
1159 if (scaled
== tic6x_offset_scaled
1160 || (op_forms
& TIC6X_OP_MEM_UNREG
))
1165 reg_ok
= tic6x_parse_register (&rq
, &offset_reg
);
1168 skip_whitespace (rq
);
1172 offset_is_reg
= TRUE
;
1178 char *save_input_line_pointer
;
1180 save_input_line_pointer
= input_line_pointer
;
1181 input_line_pointer
= mq
;
1182 expression (&offset_exp
);
1183 mq
= input_line_pointer
;
1184 input_line_pointer
= save_input_line_pointer
;
1186 skip_whitespace (mq
);
1194 if (mem_ok
&& require_offset
&& scaled
== tic6x_offset_none
)
1199 skip_whitespace (mq
);
1200 if (!is_end_of_line
[(unsigned char) *mq
] && *mq
!= ',')
1206 op
->form
= op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
);
1207 op
->value
.mem
.base_reg
= base_reg
;
1208 op
->value
.mem
.mod
= mem_mod
;
1209 op
->value
.mem
.scaled
= scaled
;
1210 op
->value
.mem
.offset_is_reg
= offset_is_reg
;
1212 op
->value
.mem
.offset
.reg
= offset_reg
;
1214 op
->value
.mem
.offset
.exp
= offset_exp
;
1215 operand_parsed
= TRUE
;
1217 if (base_reg
.num
>= tic6x_num_registers
)
1218 as_bad (_("register number %u not supported on this architecture"),
1220 if (offset_is_reg
&& offset_reg
.num
>= tic6x_num_registers
)
1221 as_bad (_("register number %u not supported on this architecture"),
1226 /* See if this looks like a register or register pair. */
1227 if (!operand_parsed
&& (op_forms
& (TIC6X_OP_REG
| TIC6X_OP_REGPAIR
)))
1229 tic6x_register first_reg
, second_reg
;
1233 reg_ok
= tic6x_parse_register (&rq
, &first_reg
);
1237 if (*rq
== ':' && (op_forms
& TIC6X_OP_REGPAIR
))
1240 reg_ok
= tic6x_parse_register (&rq
, &second_reg
);
1243 skip_whitespace (rq
);
1244 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1246 if ((second_reg
.num
& 1)
1247 || (first_reg
.num
!= second_reg
.num
+ 1)
1248 || (first_reg
.side
!= second_reg
.side
))
1249 as_bad (_("register pair for operand %u of '%.*s'"
1250 " not a valid even/odd pair"), opno
,
1252 op
->form
= TIC6X_OP_REGPAIR
;
1253 op
->value
.reg
= second_reg
;
1254 operand_parsed
= TRUE
;
1259 else if (op_forms
& TIC6X_OP_REG
)
1261 skip_whitespace (rq
);
1262 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1264 op
->form
= TIC6X_OP_REG
;
1265 op
->value
.reg
= first_reg
;
1266 operand_parsed
= TRUE
;
1273 if (first_reg
.num
>= tic6x_num_registers
)
1274 as_bad (_("register number %u not supported on this architecture"),
1276 if (op
->form
== TIC6X_OP_REGPAIR
1277 && second_reg
.num
>= tic6x_num_registers
)
1278 as_bad (_("register number %u not supported on this architecture"),
1283 /* Otherwise, parse it as an expression. */
1284 if (!operand_parsed
&& (op_forms
& TIC6X_OP_EXP
))
1286 char *save_input_line_pointer
;
1288 save_input_line_pointer
= input_line_pointer
;
1289 input_line_pointer
= q
;
1290 op
->form
= TIC6X_OP_EXP
;
1291 expression (&op
->value
.exp
);
1292 q
= input_line_pointer
;
1293 input_line_pointer
= save_input_line_pointer
;
1294 operand_parsed
= TRUE
;
1299 /* Now the operand has been parsed, there must be nothing more
1300 before the comma or end of line. */
1301 skip_whitespace (q
);
1302 if (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1304 operand_parsed
= FALSE
;
1305 as_bad (_("junk after operand %u of '%.*s'"), opno
,
1307 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1313 /* This could not be parsed as any acceptable form of
1317 case TIC6X_OP_REG
| TIC6X_OP_REGPAIR
:
1318 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1319 opno
, opc_len
, str
);
1322 case TIC6X_OP_REG
| TIC6X_OP_CTRL
:
1324 as_bad (_("bad register for operand %u of '%.*s'"),
1325 opno
, opc_len
, str
);
1328 case TIC6X_OP_REGPAIR
:
1329 as_bad (_("bad register pair for operand %u of '%.*s'"),
1330 opno
, opc_len
, str
);
1333 case TIC6X_OP_FUNC_UNIT
:
1334 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1335 opno
, opc_len
, str
);
1339 as_bad (_("bad operand %u of '%.*s'"),
1340 opno
, opc_len
, str
);
1344 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1348 return operand_parsed
;
1351 /* Table of assembler operators and associated O_* values. */
1356 } tic6x_operator_table
;
1357 static const tic6x_operator_table tic6x_operators
[] = {
1358 #define O_dsbt_index O_md1
1359 { "dsbt_index", O_dsbt_index
},
1362 #define O_dpr_got O_md3
1363 { "dpr_got", O_dpr_got
},
1364 #define O_dpr_byte O_md4
1365 { "dpr_byte", O_dpr_byte
},
1366 #define O_dpr_hword O_md5
1367 { "dpr_hword", O_dpr_hword
},
1368 #define O_dpr_word O_md6
1369 { "dpr_word", O_dpr_word
},
1372 /* Parse a name in some machine-specific way. Used on C6X to handle
1373 assembler operators. */
1376 tic6x_parse_name (const char *name
, expressionS
*exprP
,
1377 enum expr_mode mode ATTRIBUTE_UNUSED
, char *nextchar
)
1379 char *p
= input_line_pointer
;
1380 char c
, *name_start
, *name_end
;
1381 const char *inner_name
;
1383 operatorT op
= O_illegal
;
1389 for (i
= 0; i
< ARRAY_SIZE (tic6x_operators
); i
++)
1390 if (strcasecmp (name
+ 1, tic6x_operators
[i
].name
) == 0)
1392 op
= tic6x_operators
[i
].op
;
1396 if (op
== O_illegal
)
1399 *input_line_pointer
= *nextchar
;
1400 skip_whitespace (p
);
1404 *input_line_pointer
= 0;
1408 skip_whitespace (p
);
1410 if (!is_name_beginner (*p
))
1412 *input_line_pointer
= 0;
1418 while (is_part_of_name (*p
))
1421 skip_whitespace (p
);
1425 *input_line_pointer
= 0;
1429 input_line_pointer
= p
+ 1;
1430 *nextchar
= *input_line_pointer
;
1431 *input_line_pointer
= 0;
1435 inner_name
= name_start
;
1436 if (op
== O_dsbt_index
&& strcmp (inner_name
, "__c6xabi_DSBT_BASE") != 0)
1438 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1439 inner_name
= "__c6xabi_DSBT_BASE";
1441 sym
= symbol_find_or_make (inner_name
);
1445 exprP
->X_add_symbol
= sym
;
1446 exprP
->X_add_number
= 0;
1447 exprP
->X_op_symbol
= NULL
;
1453 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1454 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1455 fixes resolving to constants should have those constants implicitly
1456 shifted) and FALSE otherwise, but look for C6X-specific expression
1457 types and adjust the relocations or give errors accordingly. */
1460 tic6x_fix_new_exp (fragS
*frag
, int where
, int size
, expressionS
*exp
,
1461 int pcrel
, bfd_reloc_code_real_type r_type
,
1462 bfd_boolean fix_adda
)
1464 bfd_reloc_code_real_type new_reloc
= BFD_RELOC_UNUSED
;
1472 case BFD_RELOC_C6000_SBR_U15_W
:
1473 new_reloc
= BFD_RELOC_C6000_DSBT_INDEX
;
1477 as_bad (_("$DSBT_INDEX not supported in this context"));
1485 case BFD_RELOC_C6000_SBR_U15_W
:
1486 new_reloc
= BFD_RELOC_C6000_SBR_GOT_U15_W
;
1490 as_bad (_("$GOT not supported in this context"));
1498 case BFD_RELOC_C6000_ABS_L16
:
1499 new_reloc
= BFD_RELOC_C6000_SBR_GOT_L16_W
;
1502 case BFD_RELOC_C6000_ABS_H16
:
1503 new_reloc
= BFD_RELOC_C6000_SBR_GOT_H16_W
;
1507 as_bad (_("$DPR_GOT not supported in this context"));
1515 case BFD_RELOC_C6000_ABS_S16
:
1516 new_reloc
= BFD_RELOC_C6000_SBR_S16
;
1519 case BFD_RELOC_C6000_ABS_L16
:
1520 new_reloc
= BFD_RELOC_C6000_SBR_L16_B
;
1523 case BFD_RELOC_C6000_ABS_H16
:
1524 new_reloc
= BFD_RELOC_C6000_SBR_H16_B
;
1528 as_bad (_("$DPR_BYTE not supported in this context"));
1536 case BFD_RELOC_C6000_ABS_L16
:
1537 new_reloc
= BFD_RELOC_C6000_SBR_L16_H
;
1540 case BFD_RELOC_C6000_ABS_H16
:
1541 new_reloc
= BFD_RELOC_C6000_SBR_H16_H
;
1545 as_bad (_("$DPR_HWORD not supported in this context"));
1553 case BFD_RELOC_C6000_ABS_L16
:
1554 new_reloc
= BFD_RELOC_C6000_SBR_L16_W
;
1557 case BFD_RELOC_C6000_ABS_H16
:
1558 new_reloc
= BFD_RELOC_C6000_SBR_H16_W
;
1562 as_bad (_("$DPR_WORD not supported in this context"));
1573 as_bad (_("invalid PC-relative operand"));
1579 if (new_reloc
== BFD_RELOC_UNUSED
)
1580 fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
1582 fix
= fix_new (frag
, where
, size
, exp
->X_add_symbol
, exp
->X_add_number
,
1584 fix
->tc_fix_data
.fix_adda
= fix_adda
;
1587 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1588 go through the error checking in tic6x_fix_new_exp. */
1591 tic6x_cons_fix_new (fragS
*frag
, int where
, int size
, expressionS
*exp
)
1593 bfd_reloc_code_real_type r_type
;
1598 r_type
= BFD_RELOC_8
;
1602 r_type
= BFD_RELOC_16
;
1606 r_type
= BFD_RELOC_32
;
1610 as_bad (_("no %d-byte relocations available"), size
);
1614 tic6x_fix_new_exp (frag
, where
, size
, exp
, 0, r_type
, FALSE
);
1617 /* Initialize target-specific fix data. */
1620 tic6x_init_fix_data (fixS
*fixP
)
1622 fixP
->tc_fix_data
.fix_adda
= FALSE
;
1625 /* Return true if the fix can be handled by GAS, false if it must
1626 be passed through to the linker. */
1629 tic6x_fix_adjustable (fixS
*fixP
)
1631 switch (fixP
->fx_r_type
)
1633 /* Adjust_reloc_syms doesn't know about the GOT. */
1634 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
1635 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
1636 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
1644 /* Given the fine-grained form of an operand, return the coarse
1648 tic6x_coarse_operand_form (tic6x_operand_form form
)
1652 case tic6x_operand_asm_const
:
1653 case tic6x_operand_link_const
:
1654 return TIC6X_OP_EXP
;
1656 case tic6x_operand_reg
:
1657 case tic6x_operand_xreg
:
1658 case tic6x_operand_dreg
:
1659 case tic6x_operand_areg
:
1660 case tic6x_operand_retreg
:
1661 return TIC6X_OP_REG
;
1663 case tic6x_operand_regpair
:
1664 case tic6x_operand_xregpair
:
1665 case tic6x_operand_dregpair
:
1666 return TIC6X_OP_REGPAIR
;
1668 case tic6x_operand_irp
:
1669 return TIC6X_OP_IRP
;
1671 case tic6x_operand_nrp
:
1672 return TIC6X_OP_NRP
;
1674 case tic6x_operand_ctrl
:
1675 return TIC6X_OP_CTRL
;
1677 case tic6x_operand_mem_short
:
1678 case tic6x_operand_mem_long
:
1679 case tic6x_operand_mem_deref
:
1680 return TIC6X_OP_MEM_NOUNREG
;
1682 case tic6x_operand_mem_ndw
:
1683 return TIC6X_OP_MEM_UNREG
;
1685 case tic6x_operand_func_unit
:
1686 return TIC6X_OP_FUNC_UNIT
;
1693 /* How an operand may match or not match a desired form. If different
1694 instruction alternatives fail in different ways, the first failure
1695 in this list determines the diagnostic. */
1699 tic6x_match_matches
,
1700 /* Bad coarse form. */
1703 tic6x_match_non_const
,
1704 /* Register on wrong side. */
1705 tic6x_match_wrong_side
,
1706 /* Not a valid address register. */
1707 tic6x_match_bad_address
,
1708 /* Not a valid return address register. */
1709 tic6x_match_bad_return
,
1710 /* Control register not readable. */
1711 tic6x_match_ctrl_write_only
,
1712 /* Control register not writable. */
1713 tic6x_match_ctrl_read_only
,
1714 /* Not a valid memory reference for this instruction. */
1716 } tic6x_operand_match
;
1718 /* Return whether an operand matches the given fine-grained form and
1719 read/write usage, and, if it does not match, how it fails to match.
1720 The main functional unit side is SIDE; the cross-path side is CROSS
1721 (the same as SIDE if a cross path not used); the data side is
1723 static tic6x_operand_match
1724 tic6x_operand_matches_form (const tic6x_operand
*op
, tic6x_operand_form form
,
1725 tic6x_rw rw
, unsigned int side
, unsigned int cross
,
1726 unsigned int data_side
)
1728 unsigned int coarse
= tic6x_coarse_operand_form (form
);
1730 if (coarse
!= op
->form
)
1731 return tic6x_match_coarse
;
1735 case tic6x_operand_asm_const
:
1736 if (op
->value
.exp
.X_op
== O_constant
)
1737 return tic6x_match_matches
;
1739 return tic6x_match_non_const
;
1741 case tic6x_operand_link_const
:
1742 case tic6x_operand_irp
:
1743 case tic6x_operand_nrp
:
1744 case tic6x_operand_func_unit
:
1745 /* All expressions are link-time constants, although there may
1746 not be relocations to express them in the output file. "irp"
1747 and "nrp" are unique operand values. All parsed functional
1748 unit names are valid. */
1749 return tic6x_match_matches
;
1751 case tic6x_operand_reg
:
1752 case tic6x_operand_regpair
:
1753 if (op
->value
.reg
.side
== side
)
1754 return tic6x_match_matches
;
1756 return tic6x_match_wrong_side
;
1758 case tic6x_operand_xreg
:
1759 case tic6x_operand_xregpair
:
1760 if (op
->value
.reg
.side
== cross
)
1761 return tic6x_match_matches
;
1763 return tic6x_match_wrong_side
;
1765 case tic6x_operand_dreg
:
1766 case tic6x_operand_dregpair
:
1767 if (op
->value
.reg
.side
== data_side
)
1768 return tic6x_match_matches
;
1770 return tic6x_match_wrong_side
;
1772 case tic6x_operand_areg
:
1773 if (op
->value
.reg
.side
!= cross
)
1774 return tic6x_match_wrong_side
;
1775 else if (op
->value
.reg
.side
== 2
1776 && (op
->value
.reg
.num
== 14 || op
->value
.reg
.num
== 15))
1777 return tic6x_match_matches
;
1779 return tic6x_match_bad_address
;
1781 case tic6x_operand_retreg
:
1782 if (op
->value
.reg
.side
!= side
)
1783 return tic6x_match_wrong_side
;
1784 else if (op
->value
.reg
.num
!= 3)
1785 return tic6x_match_bad_return
;
1787 return tic6x_match_matches
;
1789 case tic6x_operand_ctrl
:
1793 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read
1794 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1795 return tic6x_match_matches
;
1797 return tic6x_match_ctrl_write_only
;
1799 case tic6x_rw_write
:
1800 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_write
1801 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1802 return tic6x_match_matches
;
1804 return tic6x_match_ctrl_read_only
;
1810 case tic6x_operand_mem_deref
:
1811 if (op
->value
.mem
.mod
!= tic6x_mem_mod_none
)
1812 return tic6x_match_bad_mem
;
1813 else if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1815 else if (op
->value
.mem
.base_reg
.side
!= side
)
1816 return tic6x_match_bad_mem
;
1818 return tic6x_match_matches
;
1820 case tic6x_operand_mem_short
:
1821 case tic6x_operand_mem_ndw
:
1822 if (op
->value
.mem
.base_reg
.side
!= side
)
1823 return tic6x_match_bad_mem
;
1824 if (op
->value
.mem
.mod
== tic6x_mem_mod_none
)
1826 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1828 return tic6x_match_matches
;
1830 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1832 if (op
->value
.mem
.mod
== tic6x_mem_mod_plus
1833 || op
->value
.mem
.mod
== tic6x_mem_mod_minus
)
1835 return tic6x_match_matches
;
1837 if (op
->value
.mem
.offset_is_reg
)
1839 if (op
->value
.mem
.scaled
== tic6x_offset_unscaled
1840 && form
!= tic6x_operand_mem_ndw
)
1842 if (op
->value
.mem
.offset
.reg
.side
== side
)
1843 return tic6x_match_matches
;
1845 return tic6x_match_bad_mem
;
1849 if (op
->value
.mem
.offset
.exp
.X_op
== O_constant
)
1850 return tic6x_match_matches
;
1852 return tic6x_match_bad_mem
;
1855 case tic6x_operand_mem_long
:
1856 if (op
->value
.mem
.base_reg
.side
== 2
1857 && (op
->value
.mem
.base_reg
.num
== 14
1858 || op
->value
.mem
.base_reg
.num
== 15))
1860 switch (op
->value
.mem
.mod
)
1862 case tic6x_mem_mod_none
:
1863 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1865 return tic6x_match_matches
;
1867 case tic6x_mem_mod_plus
:
1868 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1870 if (op
->value
.mem
.offset_is_reg
)
1871 return tic6x_match_bad_mem
;
1872 else if (op
->value
.mem
.scaled
== tic6x_offset_scaled
1873 && op
->value
.mem
.offset
.exp
.X_op
!= O_constant
)
1874 return tic6x_match_bad_mem
;
1876 return tic6x_match_matches
;
1878 case tic6x_mem_mod_minus
:
1879 case tic6x_mem_mod_preinc
:
1880 case tic6x_mem_mod_predec
:
1881 case tic6x_mem_mod_postinc
:
1882 case tic6x_mem_mod_postdec
:
1883 return tic6x_match_bad_mem
;
1891 return tic6x_match_bad_mem
;
1898 /* Return the number of bits shift used with DP-relative coding method
1902 tic6x_dpr_shift (tic6x_coding_method coding
)
1906 case tic6x_coding_ulcst_dpr_byte
:
1909 case tic6x_coding_ulcst_dpr_half
:
1912 case tic6x_coding_ulcst_dpr_word
:
1920 /* Return the relocation used with DP-relative coding method
1923 static bfd_reloc_code_real_type
1924 tic6x_dpr_reloc (tic6x_coding_method coding
)
1928 case tic6x_coding_ulcst_dpr_byte
:
1929 return BFD_RELOC_C6000_SBR_U15_B
;
1931 case tic6x_coding_ulcst_dpr_half
:
1932 return BFD_RELOC_C6000_SBR_U15_H
;
1934 case tic6x_coding_ulcst_dpr_word
:
1935 return BFD_RELOC_C6000_SBR_U15_W
;
1942 /* Given a memory reference *MEM_REF as originally parsed, fill in
1943 defaults for missing offsets. */
1946 tic6x_default_mem_ref (tic6x_mem_ref
*mem_ref
)
1948 switch (mem_ref
->mod
)
1950 case tic6x_mem_mod_none
:
1951 if (mem_ref
->scaled
!= tic6x_offset_none
)
1953 mem_ref
->mod
= tic6x_mem_mod_plus
;
1954 mem_ref
->scaled
= tic6x_offset_unscaled
;
1955 mem_ref
->offset_is_reg
= FALSE
;
1956 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1957 mem_ref
->offset
.exp
.X_op
= O_constant
;
1958 mem_ref
->offset
.exp
.X_add_number
= 0;
1959 mem_ref
->offset
.exp
.X_unsigned
= 0;
1962 case tic6x_mem_mod_plus
:
1963 case tic6x_mem_mod_minus
:
1964 if (mem_ref
->scaled
== tic6x_offset_none
)
1968 case tic6x_mem_mod_preinc
:
1969 case tic6x_mem_mod_predec
:
1970 case tic6x_mem_mod_postinc
:
1971 case tic6x_mem_mod_postdec
:
1972 if (mem_ref
->scaled
!= tic6x_offset_none
)
1974 mem_ref
->scaled
= tic6x_offset_scaled
;
1975 mem_ref
->offset_is_reg
= FALSE
;
1976 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
1977 mem_ref
->offset
.exp
.X_op
= O_constant
;
1978 mem_ref
->offset
.exp
.X_add_number
= 1;
1979 mem_ref
->offset
.exp
.X_unsigned
= 0;
1987 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
1988 instruction of the specified UNIT, side SIDE. */
1991 tic6x_encode_spmask (tic6x_func_unit_base unit
, unsigned int side
)
1995 case tic6x_func_unit_l
:
1996 return 1 << (side
- 1);
1998 case tic6x_func_unit_s
:
1999 return 1 << (side
+ 1);
2001 case tic6x_func_unit_d
:
2002 return 1 << (side
+ 3);
2004 case tic6x_func_unit_m
:
2005 return 1 << (side
+ 5);
2012 /* Try to encode the instruction with opcode number ID and operands
2013 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2014 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2015 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2016 SPLOOP_II is the ii value from the previous SPLOOP-family
2017 instruction, or 0 if not in such a loop; the only possible problems
2018 are operands being out of range (they already match the
2019 fine-grained form), and inappropriate predication. If this
2020 succeeds, return the encoding and set *OK to TRUE; otherwise return
2021 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2022 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2023 Print error messages for failure if PRINT_ERRORS is TRUE; the
2024 opcode starts at STR and has length OPC_LEN. */
2027 tic6x_try_encode (tic6x_opcode_id id
, tic6x_operand
*operands
,
2028 unsigned int num_operands
, unsigned int this_line_creg
,
2029 unsigned int this_line_z
, unsigned int func_unit_side
,
2030 unsigned int func_unit_cross
,
2031 unsigned int func_unit_data_side
, int sploop_ii
,
2032 expressionS
**fix_exp
, int *fix_pcrel
,
2033 bfd_reloc_code_real_type
*fx_r_type
, bfd_boolean
*fix_adda
,
2034 bfd_boolean
*fix_needed
, bfd_boolean
*ok
,
2035 bfd_boolean print_errors
, char *str
, int opc_len
)
2037 const tic6x_opcode
*opct
;
2038 const tic6x_insn_format
*fmt
;
2039 unsigned int opcode_value
;
2042 opct
= &tic6x_opcode_table
[id
];
2043 fmt
= &tic6x_insn_format_table
[opct
->format
];
2044 opcode_value
= fmt
->cst_bits
;
2046 for (fld
= 0; fld
< opct
->num_fixed_fields
; fld
++)
2048 if (opct
->fixed_fields
[fld
].min_val
== opct
->fixed_fields
[fld
].max_val
)
2050 const tic6x_insn_field
*fldd
;
2051 fldd
= tic6x_field_from_fmt (fmt
, opct
->fixed_fields
[fld
].field_id
);
2054 opcode_value
|= opct
->fixed_fields
[fld
].min_val
<< fldd
->low_pos
;
2058 for (fld
= 0; fld
< opct
->num_variable_fields
; fld
++)
2060 const tic6x_insn_field
*fldd
;
2066 unsigned int fcyc_bits
;
2071 fldd
= tic6x_field_from_fmt (fmt
, opct
->variable_fields
[fld
].field_id
);
2074 opno
= opct
->variable_fields
[fld
].operand_num
;
2075 switch (opct
->variable_fields
[fld
].coding_method
)
2077 case tic6x_coding_ucst
:
2078 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2080 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2082 ucexp
= operands
[opno
].value
.exp
;
2084 if (ucexp
.X_add_number
< 0
2085 || ucexp
.X_add_number
>= (1 << fldd
->width
))
2088 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2093 value
= ucexp
.X_add_number
;
2096 case tic6x_coding_scst
:
2097 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2099 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2102 /* Opcode table should not permit non-constants without
2103 a known relocation for them. */
2104 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2107 *fix_exp
= &operands
[opno
].value
.exp
;
2109 *fx_r_type
= BFD_RELOC_C6000_ABS_S16
;
2113 sign_value
= SEXT (operands
[opno
].value
.exp
.X_add_number
);
2115 if (sign_value
< -(1 << (fldd
->width
- 1))
2116 || (sign_value
>= (1 << (fldd
->width
- 1))))
2119 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2124 value
= sign_value
+ (1 << (fldd
->width
- 1));
2125 value
^= (1 << (fldd
->width
- 1));
2128 case tic6x_coding_ucst_minus_one
:
2129 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2131 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2133 if (operands
[opno
].value
.exp
.X_add_number
<= 0
2134 || operands
[opno
].value
.exp
.X_add_number
> (1 << fldd
->width
))
2137 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2142 value
= operands
[opno
].value
.exp
.X_add_number
- 1;
2145 case tic6x_coding_scst_negate
:
2146 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2148 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2150 sign_value
= SEXT (-operands
[opno
].value
.exp
.X_add_number
);
2151 goto signed_constant
;
2153 case tic6x_coding_ulcst_dpr_byte
:
2154 case tic6x_coding_ulcst_dpr_half
:
2155 case tic6x_coding_ulcst_dpr_word
:
2156 bits
= tic6x_dpr_shift (opct
->variable_fields
[fld
].coding_method
);
2157 switch (operands
[opno
].form
)
2160 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2162 ucexp
= operands
[opno
].value
.exp
;
2163 goto unsigned_constant
;
2165 expp
= &operands
[opno
].value
.exp
;
2168 case TIC6X_OP_MEM_NOUNREG
:
2169 mem
= operands
[opno
].value
.mem
;
2170 tic6x_default_mem_ref (&mem
);
2171 if (mem
.offset_is_reg
)
2173 if (mem
.offset
.exp
.X_op
== O_constant
)
2175 ucexp
= mem
.offset
.exp
;
2176 if (mem
.scaled
== tic6x_offset_unscaled
)
2178 if (ucexp
.X_add_number
& ((1 << bits
) - 1))
2181 as_bad (_("offset in operand %u of '%.*s' not "
2182 "divisible by %u"), opno
+ 1, opc_len
,
2187 ucexp
.X_add_number
>>= bits
;
2189 goto unsigned_constant
;
2191 if (mem
.scaled
!= tic6x_offset_unscaled
)
2193 if (operands
[opno
].value
.mem
.mod
== tic6x_mem_mod_none
2194 || operands
[opno
].value
.mem
.scaled
!= tic6x_offset_unscaled
2195 || operands
[opno
].value
.mem
.offset_is_reg
)
2197 expp
= &operands
[opno
].value
.mem
.offset
.exp
;
2204 /* Opcode table should not use this encoding without a known
2206 if (fldd
->low_pos
!= 8 || fldd
->width
!= 15)
2208 /* We do not check for offset divisibility here; such a
2209 check is not needed at this point to encode the value,
2210 and if there is eventually a problem it will be detected
2211 either in md_apply_fix or at link time. */
2216 = tic6x_dpr_reloc (opct
->variable_fields
[fld
].coding_method
);
2217 if (operands
[opno
].form
== TIC6X_OP_EXP
)
2223 case tic6x_coding_lcst_low16
:
2224 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2226 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2227 value
= operands
[opno
].value
.exp
.X_add_number
& 0xffff;
2231 /* Opcode table should not use this encoding without a
2232 known relocation. */
2233 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2236 *fix_exp
= &operands
[opno
].value
.exp
;
2238 *fx_r_type
= BFD_RELOC_C6000_ABS_L16
;
2243 case tic6x_coding_lcst_high16
:
2244 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2246 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2247 value
= (operands
[opno
].value
.exp
.X_add_number
>> 16) & 0xffff;
2251 /* Opcode table should not use this encoding without a
2252 known relocation. */
2253 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2256 *fix_exp
= &operands
[opno
].value
.exp
;
2258 *fx_r_type
= BFD_RELOC_C6000_ABS_H16
;
2263 case tic6x_coding_pcrel
:
2264 case tic6x_coding_pcrel_half
:
2265 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2269 *fix_exp
= &operands
[opno
].value
.exp
;
2271 if (fldd
->low_pos
== 7 && fldd
->width
== 21)
2272 *fx_r_type
= BFD_RELOC_C6000_PCR_S21
;
2273 else if (fldd
->low_pos
== 16 && fldd
->width
== 12)
2274 *fx_r_type
= BFD_RELOC_C6000_PCR_S12
;
2275 else if (fldd
->low_pos
== 13 && fldd
->width
== 10)
2276 *fx_r_type
= BFD_RELOC_C6000_PCR_S10
;
2277 else if (fldd
->low_pos
== 16 && fldd
->width
== 7)
2278 *fx_r_type
= BFD_RELOC_C6000_PCR_S7
;
2280 /* Opcode table should not use this encoding without a
2281 known relocation. */
2286 case tic6x_coding_reg
:
2287 switch (operands
[opno
].form
)
2290 case TIC6X_OP_REGPAIR
:
2291 value
= operands
[opno
].value
.reg
.num
;
2294 case TIC6X_OP_MEM_NOUNREG
:
2295 case TIC6X_OP_MEM_UNREG
:
2296 value
= operands
[opno
].value
.mem
.base_reg
.num
;
2304 case tic6x_coding_areg
:
2305 switch (operands
[opno
].form
)
2308 value
= (operands
[opno
].value
.reg
.num
== 15 ? 1 : 0);
2311 case TIC6X_OP_MEM_NOUNREG
:
2312 value
= (operands
[opno
].value
.mem
.base_reg
.num
== 15 ? 1 : 0);
2320 case tic6x_coding_crlo
:
2321 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2323 value
= tic6x_ctrl_table
[operands
[opno
].value
.ctrl
].crlo
;
2326 case tic6x_coding_crhi
:
2327 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2332 case tic6x_coding_reg_shift
:
2333 if (operands
[opno
].form
!= TIC6X_OP_REGPAIR
)
2335 value
= operands
[opno
].value
.reg
.num
>> 1;
2338 case tic6x_coding_mem_offset
:
2339 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
)
2341 mem
= operands
[opno
].value
.mem
;
2342 tic6x_default_mem_ref (&mem
);
2343 if (mem
.offset_is_reg
)
2345 if (mem
.scaled
!= tic6x_offset_scaled
)
2347 value
= mem
.offset
.reg
.num
;
2353 if (mem
.offset
.exp
.X_op
!= O_constant
)
2357 case tic6x_offset_scaled
:
2361 case tic6x_offset_unscaled
:
2362 scale
= opct
->operand_info
[opno
].size
;
2363 if (scale
!= 1 && scale
!= 2 && scale
!= 4 && scale
!= 8)
2370 if (mem
.offset
.exp
.X_add_number
< 0
2371 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
) * scale
)
2374 as_bad (_("offset in operand %u of '%.*s' out of range"),
2375 opno
+ 1, opc_len
, str
);
2379 if (mem
.offset
.exp
.X_add_number
% scale
)
2382 as_bad (_("offset in operand %u of '%.*s' not "
2384 opno
+ 1, opc_len
, str
, scale
);
2388 value
= mem
.offset
.exp
.X_add_number
/ scale
;
2392 case tic6x_coding_mem_offset_noscale
:
2393 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2395 mem
= operands
[opno
].value
.mem
;
2396 tic6x_default_mem_ref (&mem
);
2397 if (mem
.offset_is_reg
)
2398 value
= mem
.offset
.reg
.num
;
2401 if (mem
.offset
.exp
.X_op
!= O_constant
)
2403 if (mem
.offset
.exp
.X_add_number
< 0
2404 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
))
2407 as_bad (_("offset in operand %u of '%.*s' out of range"),
2408 opno
+ 1, opc_len
, str
);
2412 value
= mem
.offset
.exp
.X_add_number
;
2416 case tic6x_coding_mem_mode
:
2417 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
2418 && operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2420 mem
= operands
[opno
].value
.mem
;
2421 tic6x_default_mem_ref (&mem
);
2424 case tic6x_mem_mod_plus
:
2428 case tic6x_mem_mod_minus
:
2432 case tic6x_mem_mod_preinc
:
2436 case tic6x_mem_mod_predec
:
2440 case tic6x_mem_mod_postinc
:
2444 case tic6x_mem_mod_postdec
:
2451 value
+= (mem
.offset_is_reg
? 4 : 0);
2454 case tic6x_coding_scaled
:
2455 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2457 mem
= operands
[opno
].value
.mem
;
2458 tic6x_default_mem_ref (&mem
);
2461 case tic6x_offset_unscaled
:
2465 case tic6x_offset_scaled
:
2474 case tic6x_coding_spmask
:
2475 /* The position of such a field is hardcoded in the handling
2477 if (fldd
->low_pos
!= 18)
2480 for (opno
= 0; opno
< num_operands
; opno
++)
2484 v
= tic6x_encode_spmask (operands
[opno
].value
.func_unit
.base
,
2485 operands
[opno
].value
.func_unit
.side
);
2489 as_bad (_("functional unit already masked for operand "
2490 "%u of '%.*s'"), opno
+ 1, opc_len
, str
);
2498 case tic6x_coding_reg_unused
:
2499 /* This is a placeholder; correct handling goes along with
2500 resource constraint checks. */
2504 case tic6x_coding_fstg
:
2505 case tic6x_coding_fcyc
:
2506 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2508 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2513 as_bad (_("'%.*s' instruction not in a software "
2522 else if (sploop_ii
<= 2)
2524 else if (sploop_ii
<= 4)
2526 else if (sploop_ii
<= 8)
2528 else if (sploop_ii
<= 14)
2532 if (fcyc_bits
> fldd
->width
)
2535 if (opct
->variable_fields
[fld
].coding_method
== tic6x_coding_fstg
)
2538 if (operands
[opno
].value
.exp
.X_add_number
< 0
2539 || (operands
[opno
].value
.exp
.X_add_number
2540 >= (1 << (fldd
->width
- fcyc_bits
))))
2543 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2548 value
= operands
[opno
].value
.exp
.X_add_number
;
2549 for (t
= 0, i
= fcyc_bits
; i
< fldd
->width
; i
++)
2551 t
= (t
<< 1) | (value
& 1);
2554 value
= t
<< fcyc_bits
;
2558 if (operands
[opno
].value
.exp
.X_add_number
< 0
2559 || (operands
[opno
].value
.exp
.X_add_number
>= sploop_ii
))
2562 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2567 value
= operands
[opno
].value
.exp
.X_add_number
;
2571 case tic6x_coding_fu
:
2572 value
= func_unit_side
== 2 ? 1 : 0;
2575 case tic6x_coding_data_fu
:
2576 value
= func_unit_data_side
== 2 ? 1 : 0;
2579 case tic6x_coding_xpath
:
2580 value
= func_unit_cross
;
2587 for (ffld
= 0; ffld
< opct
->num_fixed_fields
; ffld
++)
2588 if ((opct
->fixed_fields
[ffld
].field_id
2589 == opct
->variable_fields
[fld
].field_id
)
2590 && (value
< opct
->fixed_fields
[ffld
].min_val
2591 || value
> opct
->fixed_fields
[ffld
].max_val
))
2594 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2600 opcode_value
|= value
<< fldd
->low_pos
;
2605 const tic6x_insn_field
*creg
;
2606 const tic6x_insn_field
*z
;
2608 creg
= tic6x_field_from_fmt (fmt
, tic6x_field_creg
);
2612 as_bad (_("instruction '%.*s' cannot be predicated"),
2617 z
= tic6x_field_from_fmt (fmt
, tic6x_field_z
);
2618 /* If there is a creg field, there must be a z field; otherwise
2619 there is an error in the format table. */
2623 opcode_value
|= this_line_creg
<< creg
->low_pos
;
2624 opcode_value
|= this_line_z
<< z
->low_pos
;
2628 return opcode_value
;
2631 /* Convert the target integer stored in N bytes in BUF to a host
2632 integer, returning that value. */
2635 md_chars_to_number (char *buf
, int n
)
2638 unsigned char *p
= (unsigned char *) buf
;
2640 if (target_big_endian
)
2645 result
|= (*p
++ & 0xff);
2653 result
|= (p
[n
] & 0xff);
2660 /* Assemble the instruction starting at STR (an opcode, with the
2661 opcode name all-lowercase). */
2664 md_assemble (char *str
)
2668 bfd_boolean this_line_parallel
;
2669 bfd_boolean this_line_spmask
;
2670 unsigned int this_line_creg
;
2671 unsigned int this_line_z
;
2672 tic6x_label_list
*this_insn_label_list
;
2673 segment_info_type
*seginfo
;
2674 tic6x_opcode_list
*opc_list
, *opc
;
2675 tic6x_func_unit_base func_unit_base
= tic6x_func_unit_nfu
;
2676 unsigned int func_unit_side
= 0;
2677 unsigned int func_unit_cross
= 0;
2678 unsigned int cross_side
= 0;
2679 unsigned int func_unit_data_side
= 0;
2680 unsigned int max_matching_opcodes
, num_matching_opcodes
;
2681 tic6x_opcode_id
*opcm
= NULL
;
2682 unsigned int opc_rank
[TIC6X_NUM_PREFER
];
2683 const tic6x_opcode
*opct
= NULL
;
2684 int min_rank
, try_rank
, max_rank
;
2685 bfd_boolean num_operands_permitted
[TIC6X_MAX_SOURCE_OPERANDS
+ 1]
2687 unsigned int operand_forms
[TIC6X_MAX_SOURCE_OPERANDS
] = { 0 };
2688 tic6x_operand operands
[TIC6X_MAX_SOURCE_OPERANDS
];
2689 unsigned int max_num_operands
;
2690 unsigned int num_operands_read
;
2691 bfd_boolean ok_this_arch
, ok_this_fu
, ok_this_arch_fu
;
2692 bfd_boolean bad_operands
= FALSE
;
2693 unsigned int opcode_value
;
2694 bfd_boolean encoded_ok
;
2695 bfd_boolean fix_needed
= FALSE
;
2696 expressionS
*fix_exp
= NULL
;
2698 bfd_reloc_code_real_type fx_r_type
= BFD_RELOC_UNUSED
;
2699 bfd_boolean fix_adda
= FALSE
;
2704 while (*p
&& !is_end_of_line
[(unsigned char) *p
] && *p
!= ' ')
2707 /* This function should only have been called when there is actually
2708 an instruction to assemble. */
2712 /* Now an instruction has been seen, architecture attributes from
2713 .arch directives merge with rather than overriding the previous
2715 tic6x_seen_insns
= TRUE
;
2716 /* If no .arch directives or -march options have been seen, we are
2717 assessing instruction validity based on the C674X default, so set
2718 the attribute accordingly. */
2719 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
2720 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
2722 /* Reset global settings for parallel bars and predicates now to
2723 avoid extra errors if there are problems with this opcode. */
2724 this_line_parallel
= tic6x_line_parallel
;
2725 this_line_spmask
= tic6x_line_spmask
;
2726 this_line_creg
= tic6x_line_creg
;
2727 this_line_z
= tic6x_line_z
;
2728 tic6x_line_parallel
= FALSE
;
2729 tic6x_line_spmask
= FALSE
;
2730 tic6x_line_creg
= 0;
2732 seginfo
= seg_info (now_seg
);
2733 this_insn_label_list
= seginfo
->tc_segment_info_data
.label_list
;
2734 seginfo
->tc_segment_info_data
.label_list
= NULL
;
2736 opc_list
= hash_find_n (opcode_hash
, str
, p
- str
);
2737 if (opc_list
== NULL
)
2741 as_bad (_("unknown opcode '%s'"), str
);
2747 skip_whitespace (p
);
2749 /* See if there is something that looks like a functional unit
2753 bfd_boolean good_func_unit
;
2754 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
2755 unsigned int maybe_side
= 0;
2756 unsigned int maybe_cross
= 0;
2757 unsigned int maybe_data_side
= 0;
2759 good_func_unit
= tic6x_parse_func_unit_base (p
+ 1, &maybe_base
,
2764 if (p
[3] == ' ' || is_end_of_line
[(unsigned char) p
[3]])
2766 else if ((p
[3] == 'x' || p
[3] == 'X')
2767 && (p
[4] == ' ' || is_end_of_line
[(unsigned char) p
[4]]))
2772 else if (maybe_base
== tic6x_func_unit_d
2773 && (p
[3] == 't' || p
[3] == 'T')
2774 && (p
[4] == '1' || p
[4] == '2')
2775 && (p
[5] == ' ' || is_end_of_line
[(unsigned char) p
[5]]))
2777 maybe_data_side
= p
[4] - '0';
2781 good_func_unit
= FALSE
;
2786 func_unit_base
= maybe_base
;
2787 func_unit_side
= maybe_side
;
2788 func_unit_cross
= maybe_cross
;
2789 cross_side
= (func_unit_cross
? 3 - func_unit_side
: func_unit_side
);
2790 func_unit_data_side
= maybe_data_side
;
2793 skip_whitespace (p
);
2796 /* Determine which entries in the opcode table match, and the
2797 associated permitted forms of operands. */
2798 max_matching_opcodes
= 0;
2799 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2800 max_matching_opcodes
++;
2801 num_matching_opcodes
= 0;
2802 opcm
= xmalloc (max_matching_opcodes
* sizeof (*opcm
));
2803 max_num_operands
= 0;
2804 ok_this_arch
= FALSE
;
2806 ok_this_arch_fu
= FALSE
;
2807 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2809 unsigned int num_operands
;
2811 bfd_boolean this_opc_arch_ok
= TRUE
;
2812 bfd_boolean this_opc_fu_ok
= TRUE
;
2814 if (tic6x_insn_format_table
[tic6x_opcode_table
[opc
->id
].format
].num_bits
2817 if (!(tic6x_opcode_table
[opc
->id
].isa_variants
& tic6x_features
))
2818 this_opc_arch_ok
= FALSE
;
2819 if (tic6x_opcode_table
[opc
->id
].func_unit
!= func_unit_base
)
2820 this_opc_fu_ok
= FALSE
;
2821 if (func_unit_side
== 1
2822 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_B_ONLY
))
2823 this_opc_fu_ok
= FALSE
;
2825 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_NO_CROSS
))
2826 this_opc_fu_ok
= FALSE
;
2827 if (!func_unit_data_side
2828 && (tic6x_opcode_table
[opc
->id
].flags
2829 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2830 this_opc_fu_ok
= FALSE
;
2831 if (func_unit_data_side
2832 && !(tic6x_opcode_table
[opc
->id
].flags
2833 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2834 this_opc_fu_ok
= FALSE
;
2835 if (func_unit_data_side
== 1
2836 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_T2_ONLY
))
2837 this_opc_fu_ok
= FALSE
;
2838 if (this_opc_arch_ok
)
2839 ok_this_arch
= TRUE
;
2842 if (!this_opc_arch_ok
|| !this_opc_fu_ok
)
2844 ok_this_arch_fu
= TRUE
;
2845 opcm
[num_matching_opcodes
] = opc
->id
;
2846 num_matching_opcodes
++;
2847 num_operands
= tic6x_opcode_table
[opc
->id
].num_operands
;
2849 if (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SPMASK
)
2851 if (num_operands
!= 1
2852 || (tic6x_opcode_table
[opc
->id
].operand_info
[0].form
2853 != tic6x_operand_func_unit
))
2856 for (i
= 0; i
< num_operands
; i
++)
2859 |= tic6x_coarse_operand_form (tic6x_operand_func_unit
);
2860 num_operands_permitted
[i
] = TRUE
;
2865 for (i
= 0; i
< num_operands
; i
++)
2867 tic6x_operand_form f
2868 = tic6x_opcode_table
[opc
->id
].operand_info
[i
].form
;
2870 operand_forms
[i
] |= tic6x_coarse_operand_form (f
);
2873 num_operands_permitted
[num_operands
] = TRUE
;
2874 if (num_operands
> max_num_operands
)
2875 max_num_operands
= num_operands
;
2880 as_bad (_("'%.*s' instruction not supported on this architecture"),
2888 as_bad (_("'%.*s' instruction not supported on this functional unit"),
2894 if (!ok_this_arch_fu
)
2896 as_bad (_("'%.*s' instruction not supported on this functional unit"
2897 " for this architecture"),
2903 /* If there were no instructions matching the above availability
2904 checks, we should now have given an error and returned. */
2905 if (num_matching_opcodes
== 0)
2908 num_operands_read
= 0;
2911 skip_whitespace (p
);
2912 if (is_end_of_line
[(unsigned char) *p
])
2914 if (num_operands_read
> 0)
2916 as_bad (_("missing operand after comma"));
2917 bad_operands
= TRUE
;
2922 if (max_num_operands
== 0)
2924 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2925 bad_operands
= TRUE
;
2929 if (!tic6x_parse_operand (&p
, &operands
[num_operands_read
],
2930 operand_forms
[num_operands_read
], str
, opc_len
,
2931 num_operands_read
+ 1))
2932 bad_operands
= TRUE
;
2933 num_operands_read
++;
2935 if (is_end_of_line
[(unsigned char) *p
])
2940 if (num_operands_read
== max_num_operands
)
2942 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2943 bad_operands
= TRUE
;
2949 /* Operand parsing should consume whole operands. */
2953 if (!bad_operands
&& !num_operands_permitted
[num_operands_read
])
2955 as_bad (_("bad number of operands to '%.*s'"), opc_len
, str
);
2956 bad_operands
= TRUE
;
2961 /* Each operand is of the right syntactic form for some opcode
2962 choice, and the number of operands is valid. Check that each
2963 operand is OK in detail for some opcode choice with the right
2964 number of operands. */
2967 for (i
= 0; i
< num_operands_read
; i
++)
2969 bfd_boolean coarse_ok
= FALSE
;
2970 bfd_boolean fine_ok
= FALSE
;
2971 tic6x_operand_match fine_failure
= tic6x_match_matches
;
2974 for (j
= 0; j
< num_matching_opcodes
; j
++)
2976 tic6x_operand_form f
;
2979 tic6x_operand_match this_fine_failure
;
2981 if (tic6x_opcode_table
[opcm
[j
]].flags
& TIC6X_FLAG_SPMASK
)
2983 f
= tic6x_operand_func_unit
;
2988 if (tic6x_opcode_table
[opcm
[j
]].num_operands
2989 != num_operands_read
)
2992 f
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].form
;
2993 rw
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].rw
;
2995 cf
= tic6x_coarse_operand_form (f
);
2997 if (operands
[i
].form
!= cf
)
3002 = tic6x_operand_matches_form (&operands
[i
], f
, rw
,
3005 func_unit_data_side
);
3006 if (this_fine_failure
== tic6x_match_matches
)
3011 if (fine_failure
== tic6x_match_matches
3012 || fine_failure
> this_fine_failure
)
3013 fine_failure
= this_fine_failure
;
3016 /* No instructions should have operand syntactic forms only
3017 acceptable with certain numbers of operands, so no
3018 diagnostic for this case. */
3024 switch (fine_failure
)
3026 case tic6x_match_non_const
:
3027 as_bad (_("operand %u of '%.*s' not constant"),
3028 i
+ 1, opc_len
, str
);
3031 case tic6x_match_wrong_side
:
3032 as_bad (_("operand %u of '%.*s' on wrong side"),
3033 i
+ 1, opc_len
, str
);
3036 case tic6x_match_bad_return
:
3037 as_bad (_("operand %u of '%.*s' not a valid return "
3038 "address register"),
3039 i
+ 1, opc_len
, str
);
3042 case tic6x_match_ctrl_write_only
:
3043 as_bad (_("operand %u of '%.*s' is write-only"),
3044 i
+ 1, opc_len
, str
);
3047 case tic6x_match_ctrl_read_only
:
3048 as_bad (_("operand %u of '%.*s' is read-only"),
3049 i
+ 1, opc_len
, str
);
3052 case tic6x_match_bad_mem
:
3053 as_bad (_("operand %u of '%.*s' not a valid memory "
3055 i
+ 1, opc_len
, str
);
3058 case tic6x_match_bad_address
:
3059 as_bad (_("operand %u of '%.*s' not a valid base "
3060 "address register"),
3061 i
+ 1, opc_len
, str
);
3067 bad_operands
= TRUE
;
3075 /* Each operand is OK for some opcode choice, and the number of
3076 operands is valid. Check whether there is an opcode choice
3077 for which all operands are simultaneously valid. */
3079 bfd_boolean found_match
= FALSE
;
3081 for (i
= 0; i
< TIC6X_NUM_PREFER
; i
++)
3082 opc_rank
[i
] = (unsigned int) -1;
3084 min_rank
= TIC6X_NUM_PREFER
- 1;
3087 for (i
= 0; i
< num_matching_opcodes
; i
++)
3090 bfd_boolean this_matches
= TRUE
;
3092 if (!(tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3093 && tic6x_opcode_table
[opcm
[i
]].num_operands
!= num_operands_read
)
3096 for (j
= 0; j
< num_operands_read
; j
++)
3098 tic6x_operand_form f
;
3101 if (tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3103 f
= tic6x_operand_func_unit
;
3108 f
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].form
;
3109 rw
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].rw
;
3111 if (tic6x_operand_matches_form (&operands
[j
], f
, rw
,
3114 func_unit_data_side
)
3115 != tic6x_match_matches
)
3117 this_matches
= FALSE
;
3124 int rank
= TIC6X_PREFER_VAL (tic6x_opcode_table
[opcm
[i
]].flags
);
3126 if (rank
< min_rank
)
3128 if (rank
> max_rank
)
3131 if (opc_rank
[rank
] == (unsigned int) -1)
3134 /* The opcode table should provide a total ordering
3135 for all cases where multiple matches may get
3145 as_bad (_("bad operand combination for '%.*s'"), opc_len
, str
);
3146 bad_operands
= TRUE
;
3158 for (try_rank
= max_rank
; try_rank
>= min_rank
; try_rank
--)
3162 if (opc_rank
[try_rank
] == (unsigned int) -1)
3165 opcode_value
= tic6x_try_encode (opcm
[opc_rank
[try_rank
]], operands
,
3166 num_operands_read
, this_line_creg
,
3167 this_line_z
, func_unit_side
,
3168 func_unit_cross
, func_unit_data_side
,
3169 seginfo
->tc_segment_info_data
.sploop_ii
,
3170 &fix_exp
, &fix_pcrel
, &fx_r_type
,
3171 &fix_adda
, &fix_needed
, &encoded_ok
,
3172 (try_rank
== min_rank
? TRUE
: FALSE
),
3176 opct
= &tic6x_opcode_table
[opcm
[opc_rank
[try_rank
]]];
3186 if (this_line_parallel
)
3188 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
;
3189 if (insn_frag
== NULL
)
3191 as_bad (_("parallel instruction not following another instruction"));
3195 if (insn_frag
->fr_fix
>= 32)
3197 as_bad (_("too many instructions in execute packet"));
3201 if (this_insn_label_list
!= NULL
)
3202 as_bad (_("label not at start of execute packet"));
3204 if (opct
->flags
& TIC6X_FLAG_FIRST
)
3205 as_bad (_("'%.*s' instruction not at start of execute packet"),
3208 *seginfo
->tc_segment_info_data
.last_insn_lsb
|= 0x1;
3209 output
= insn_frag
->fr_literal
+ insn_frag
->fr_fix
;
3213 tic6x_label_list
*l
;
3215 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
3216 seginfo
->tc_segment_info_data
.func_units_used
= 0;
3218 /* Start a new frag for this execute packet. */
3219 if (frag_now_fix () != 0)
3221 if (frag_now
->fr_type
!= rs_machine_dependent
)
3222 frag_wane (frag_now
);
3227 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
= frag_now
;
3228 for (l
= this_insn_label_list
; l
; l
= l
->next
)
3230 symbol_set_frag (l
->label
, frag_now
);
3231 S_SET_VALUE (l
->label
, 0);
3232 S_SET_SEGMENT (l
->label
, now_seg
);
3234 tic6x_free_label_list (this_insn_label_list
);
3235 dwarf2_emit_insn (0);
3236 output
= frag_var (rs_machine_dependent
, 32, 32, 0, NULL
, 0, NULL
);
3237 /* This must be the same as the frag to which a pointer was just
3239 if (output
!= insn_frag
->fr_literal
)
3241 insn_frag
->tc_frag_data
.is_insns
= TRUE
;
3242 insn_frag
->tc_frag_data
.can_cross_fp_boundary
3243 = tic6x_can_cross_fp_boundary
;
3246 if (func_unit_base
!= tic6x_func_unit_nfu
)
3248 unsigned int func_unit_enc
;
3250 func_unit_enc
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3252 if (seginfo
->tc_segment_info_data
.func_units_used
& func_unit_enc
)
3253 as_bad (_("functional unit already used in this execute packet"));
3255 seginfo
->tc_segment_info_data
.func_units_used
|= func_unit_enc
;
3258 if (opct
->flags
& TIC6X_FLAG_SPLOOP
)
3260 if (seginfo
->tc_segment_info_data
.sploop_ii
)
3261 as_bad (_("nested software pipelined loop"));
3262 if (num_operands_read
!= 1
3263 || operands
[0].form
!= TIC6X_OP_EXP
3264 || operands
[0].value
.exp
.X_op
!= O_constant
)
3266 seginfo
->tc_segment_info_data
.sploop_ii
3267 = operands
[0].value
.exp
.X_add_number
;
3269 else if (opct
->flags
& TIC6X_FLAG_SPKERNEL
)
3271 if (!seginfo
->tc_segment_info_data
.sploop_ii
)
3272 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3274 seginfo
->tc_segment_info_data
.sploop_ii
= 0;
3277 if (this_line_spmask
)
3279 if (seginfo
->tc_segment_info_data
.spmask_addr
== NULL
)
3280 as_bad (_("'||^' without previous SPMASK"));
3281 else if (func_unit_base
== tic6x_func_unit_nfu
)
3282 as_bad (_("cannot mask instruction using no functional unit"));
3285 unsigned int spmask_opcode
;
3286 unsigned int mask_bit
;
3289 = md_chars_to_number (seginfo
->tc_segment_info_data
.spmask_addr
,
3291 mask_bit
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3293 if (spmask_opcode
& mask_bit
)
3294 as_bad (_("functional unit already masked"));
3295 spmask_opcode
|= mask_bit
;
3296 md_number_to_chars (seginfo
->tc_segment_info_data
.spmask_addr
,
3301 record_alignment (now_seg
, 5);
3302 md_number_to_chars (output
, opcode_value
, 4);
3304 tic6x_fix_new_exp (insn_frag
, output
- insn_frag
->fr_literal
, 4, fix_exp
,
3305 fix_pcrel
, fx_r_type
, fix_adda
);
3306 insn_frag
->fr_fix
+= 4;
3307 insn_frag
->fr_var
-= 4;
3308 seginfo
->tc_segment_info_data
.last_insn_lsb
3309 = (target_big_endian
? output
+ 3 : output
);
3310 if (opct
->flags
& TIC6X_FLAG_SPMASK
)
3311 seginfo
->tc_segment_info_data
.spmask_addr
= output
;
3314 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3315 and the least significant BITS bits taken, at position POS. */
3316 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3318 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3319 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3322 /* Apply a fixup to the object file. */
3325 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3327 offsetT value
= *valP
;
3328 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3330 value
= SEXT (value
);
3333 fixP
->fx_offset
= SEXT (fixP
->fx_offset
);
3335 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3338 /* We do our own overflow checks. */
3339 fixP
->fx_no_overflow
= 1;
3341 switch (fixP
->fx_r_type
)
3343 case BFD_RELOC_NONE
:
3344 /* Force output to the object file. */
3349 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3350 md_number_to_chars (buf
, value
, 4);
3354 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3356 if (value
< -0x8000 || value
> 0xffff)
3357 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3358 _("value too large for 2-byte field"));
3359 md_number_to_chars (buf
, value
, 2);
3364 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3366 if (value
< -0x80 || value
> 0xff)
3367 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3368 _("value too large for 1-byte field"));
3369 md_number_to_chars (buf
, value
, 1);
3373 case BFD_RELOC_C6000_ABS_S16
:
3374 case BFD_RELOC_C6000_ABS_L16
:
3375 case BFD_RELOC_C6000_SBR_S16
:
3376 case BFD_RELOC_C6000_SBR_L16_B
:
3377 case BFD_RELOC_C6000_SBR_L16_H
:
3378 case BFD_RELOC_C6000_SBR_L16_W
:
3379 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3380 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3382 offsetT newval
= md_chars_to_number (buf
, 4);
3385 switch (fixP
->fx_r_type
)
3387 case BFD_RELOC_C6000_SBR_L16_H
:
3391 case BFD_RELOC_C6000_SBR_L16_W
:
3392 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3401 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3402 if ((value
< -0x8000 || value
> 0x7fff)
3403 && (fixP
->fx_r_type
== BFD_RELOC_C6000_ABS_S16
3404 || fixP
->fx_r_type
== BFD_RELOC_C6000_SBR_S16
))
3405 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3406 _("immediate offset out of range"));
3408 md_number_to_chars (buf
, newval
, 4);
3411 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_S16
3412 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_L16
)
3416 case BFD_RELOC_C6000_ABS_H16
:
3417 case BFD_RELOC_C6000_SBR_H16_B
:
3418 case BFD_RELOC_C6000_SBR_H16_H
:
3419 case BFD_RELOC_C6000_SBR_H16_W
:
3420 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3421 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3423 offsetT newval
= md_chars_to_number (buf
, 4);
3426 switch (fixP
->fx_r_type
)
3428 case BFD_RELOC_C6000_SBR_H16_H
:
3432 case BFD_RELOC_C6000_SBR_H16_W
:
3433 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3442 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3444 md_number_to_chars (buf
, newval
, 4);
3446 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_H16
)
3450 case BFD_RELOC_C6000_SBR_U15_B
:
3451 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3453 offsetT newval
= md_chars_to_number (buf
, 4);
3455 MODIFY_VALUE (newval
, value
, 0, 8, 15);
3456 if (value
< 0 || value
> 0x7fff)
3457 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3458 _("immediate offset out of range"));
3460 md_number_to_chars (buf
, newval
, 4);
3464 case BFD_RELOC_C6000_SBR_U15_H
:
3465 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3467 offsetT newval
= md_chars_to_number (buf
, 4);
3469 /* Constant ADDA operands, processed as constant when the
3470 instruction is parsed, are encoded as-is rather than
3471 shifted. If the operand of an ADDA instruction is now
3472 constant (for example, the difference between two labels
3473 found after the instruction), ensure it is encoded the
3474 same way it would have been if the constant value had
3475 been known when the instruction was parsed. */
3476 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3479 MODIFY_VALUE (newval
, value
, 1, 8, 15);
3481 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3482 _("immediate offset not 2-byte-aligned"));
3483 if (value
< 0 || value
> 0xfffe)
3484 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3485 _("immediate offset out of range"));
3487 md_number_to_chars (buf
, newval
, 4);
3491 case BFD_RELOC_C6000_SBR_U15_W
:
3492 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
3493 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3495 offsetT newval
= md_chars_to_number (buf
, 4);
3497 /* Constant ADDA operands, processed as constant when the
3498 instruction is parsed, are encoded as-is rather than
3499 shifted. If the operand of an ADDA instruction is now
3500 constant (for example, the difference between two labels
3501 found after the instruction), ensure it is encoded the
3502 same way it would have been if the constant value had
3503 been known when the instruction was parsed. */
3504 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3507 MODIFY_VALUE (newval
, value
, 2, 8, 15);
3509 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3510 _("immediate offset not 4-byte-aligned"));
3511 if (value
< 0 || value
> 0x1fffc)
3512 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3513 _("immediate offset out of range"));
3515 md_number_to_chars (buf
, newval
, 4);
3517 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_SBR_U15_W
)
3521 case BFD_RELOC_C6000_DSBT_INDEX
:
3523 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3524 _("addend used with $DSBT_INDEX"));
3529 case BFD_RELOC_C6000_PCR_S21
:
3530 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3532 offsetT newval
= md_chars_to_number (buf
, 4);
3534 MODIFY_VALUE (newval
, value
, 2, 7, 21);
3537 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3538 _("PC-relative offset not 4-byte-aligned"));
3539 if (value
< -0x400000 || value
> 0x3ffffc)
3540 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3541 _("PC-relative offset out of range"));
3543 md_number_to_chars (buf
, newval
, 4);
3547 case BFD_RELOC_C6000_PCR_S12
:
3548 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3550 offsetT newval
= md_chars_to_number (buf
, 4);
3552 MODIFY_VALUE (newval
, value
, 2, 16, 12);
3555 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3556 _("PC-relative offset not 4-byte-aligned"));
3557 if (value
< -0x2000 || value
> 0x1ffc)
3558 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3559 _("PC-relative offset out of range"));
3561 md_number_to_chars (buf
, newval
, 4);
3565 case BFD_RELOC_C6000_PCR_S10
:
3566 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3568 offsetT newval
= md_chars_to_number (buf
, 4);
3570 MODIFY_VALUE (newval
, value
, 2, 13, 10);
3573 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3574 _("PC-relative offset not 4-byte-aligned"));
3575 if (value
< -0x800 || value
> 0x7fc)
3576 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3577 _("PC-relative offset out of range"));
3579 md_number_to_chars (buf
, newval
, 4);
3583 case BFD_RELOC_C6000_PCR_S7
:
3584 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3586 offsetT newval
= md_chars_to_number (buf
, 4);
3588 MODIFY_VALUE (newval
, value
, 2, 16, 7);
3591 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3592 _("PC-relative offset not 4-byte-aligned"));
3593 if (value
< -0x100 || value
> 0xfc)
3594 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3595 _("PC-relative offset out of range"));
3597 md_number_to_chars (buf
, newval
, 4);
3606 /* Convert a floating-point number to target (IEEE) format. */
3609 md_atof (int type
, char *litP
, int *sizeP
)
3611 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3614 /* Adjust the frags in SECTION (see tic6x_end). */
3617 tic6x_adjust_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT section
,
3618 void *dummy ATTRIBUTE_UNUSED
)
3620 segment_info_type
*info
;
3623 bfd_boolean have_code
= FALSE
;
3624 bfd_boolean have_non_code
= FALSE
;
3626 info
= seg_info (section
);
3630 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3631 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3632 switch (fragp
->fr_type
)
3634 case rs_machine_dependent
:
3635 if (fragp
->tc_frag_data
.is_insns
)
3641 if (fragp
->fr_fix
> 0)
3642 have_non_code
= TRUE
;
3646 have_non_code
= TRUE
;
3650 /* Process alignment requirements in a code-only section. */
3651 if (have_code
&& !have_non_code
)
3653 /* If we need to insert an odd number of instructions to meet an
3654 alignment requirement, there must have been an odd number of
3655 instructions since the last 8-byte-aligned execute packet
3656 boundary. So there must have been an execute packet with an
3657 odd number (and so a number fewer than 8) of instructions
3658 into which we can insert a NOP without breaking any previous
3661 If then we need to insert a number 2 mod 4 of instructions,
3662 the number of instructions since the last 16-byte-aligned
3663 execute packet boundary must be 2 mod 4. So between that
3664 boundary and the following 8-byte-aligned boundary there must
3665 either be at least one execute packet with 2-mod-4
3666 instructions, or at least two with an odd number of
3667 instructions; again, greedily inserting NOPs as soon as
3668 possible suffices to meet the alignment requirement.
3670 If then we need to insert 4 instructions, we look between the
3671 last 32-byte-aligned boundary and the following
3672 16-byte-aligned boundary. The sizes of the execute packets
3673 in this range total 4 instructions mod 8, so again there is
3674 room for greedy insertion of NOPs to meet the alignment
3675 requirement, and before any intermediate point with 8-byte
3676 (2-instruction) alignment requirement the sizes of execute
3677 packets (and so the room for NOPs) will total 2 instructions
3678 mod 4 so greedy insertion will not break such alignments.
3680 So we can always meet these alignment requirements by
3681 inserting NOPs in parallel with existing execute packets, and
3682 by induction the approach described above inserts the minimum
3683 number of such NOPs. */
3685 /* The number of NOPs we are currently looking to insert, if we
3686 have gone back to insert NOPs. */
3687 unsigned int want_insert
= 0;
3689 /* Out of that number, the number inserted so far in the current
3690 stage of the above algorithm. */
3691 unsigned int want_insert_done_so_far
= 0;
3693 /* The position mod 32 at the start of the current frag. */
3694 unsigned int pos
= 0;
3696 /* The locations in the frag chain of the most recent frags at
3697 the start of which there is the given alignment. */
3698 frchainS
*frchp_last32
, *frchp_last16
, *frchp_last8
;
3699 fragS
*fragp_last32
, *fragp_last16
, *fragp_last8
;
3700 unsigned int pos_last32
, pos_last16
, pos_last8
;
3702 frchp_last32
= frchp_last16
= frchp_last8
= info
->frchainP
;
3703 fragp_last32
= fragp_last16
= fragp_last8
= info
->frchainP
->frch_root
;
3704 pos_last32
= pos_last16
= pos_last8
= 0;
3706 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3707 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3710 bfd_boolean go_back
= FALSE
;
3711 frchainS
*frchp_next
;
3714 if (fragp
->fr_type
!= rs_machine_dependent
)
3717 if (fragp
->tc_frag_data
.is_insns
3718 && pos
+ fragp
->fr_fix
> 32
3719 && !fragp
->tc_frag_data
.can_cross_fp_boundary
)
3721 /* As described above, we should always have met an
3722 alignment requirement by the time we come back to
3729 want_insert
= (32 - pos
) >> 2;
3730 if (want_insert
> 7)
3732 want_insert_done_so_far
= 0;
3736 if (!fragp
->tc_frag_data
.is_insns
)
3738 unsigned int would_insert_bytes
;
3740 if (!(pos
& ((1 << fragp
->fr_offset
) - 1)))
3741 /* This alignment requirement is already met. */
3744 /* As described above, we should always have met an
3745 alignment requirement by the time we come back to
3750 /* We may not be able to meet this requirement within
3751 the given number of characters. */
3753 = ((1 << fragp
->fr_offset
)
3754 - (pos
& ((1 << fragp
->fr_offset
) - 1)));
3756 if (fragp
->fr_subtype
!= 0
3757 && would_insert_bytes
> fragp
->fr_subtype
)
3760 /* An unmet alignment must be 8, 16 or 32 bytes;
3761 smaller ones must always be met within code-only
3762 sections and larger ones cause the section not to
3764 if (fragp
->fr_offset
!= 3
3765 && fragp
->fr_offset
!= 4
3766 && fragp
->fr_offset
!= 5)
3769 if (would_insert_bytes
& 3)
3771 want_insert
= would_insert_bytes
>> 2;
3772 if (want_insert
> 7)
3774 want_insert_done_so_far
= 0;
3777 else if (want_insert
&& !go_back
)
3779 unsigned int num_insns
= fragp
->fr_fix
>> 2;
3780 unsigned int max_poss_nops
= 8 - num_insns
;
3784 unsigned int cur_want_nops
, max_want_nops
, do_nops
, i
;
3786 if (want_insert
& 1)
3788 else if (want_insert
& 2)
3790 else if (want_insert
& 4)
3795 max_want_nops
= cur_want_nops
- want_insert_done_so_far
;
3797 do_nops
= (max_poss_nops
< max_want_nops
3800 for (i
= 0; i
< do_nops
; i
++)
3802 md_number_to_chars (fragp
->fr_literal
+ fragp
->fr_fix
,
3804 if (target_big_endian
)
3805 fragp
->fr_literal
[fragp
->fr_fix
- 1] |= 0x1;
3807 fragp
->fr_literal
[fragp
->fr_fix
- 4] |= 0x1;
3811 want_insert_done_so_far
+= do_nops
;
3812 if (want_insert_done_so_far
== cur_want_nops
)
3814 want_insert
-= want_insert_done_so_far
;
3815 want_insert_done_so_far
= 0;
3823 if (want_insert
& 1)
3825 frchp
= frchp_last8
;
3826 fragp
= fragp_last8
;
3829 else if (want_insert
& 2)
3831 frchp
= frchp_last8
= frchp_last16
;
3832 fragp
= fragp_last8
= fragp_last16
;
3833 pos
= pos_last8
= pos_last16
;
3835 else if (want_insert
& 4)
3837 frchp
= frchp_last8
= frchp_last16
= frchp_last32
;
3838 fragp
= fragp_last8
= fragp_last16
= fragp_last32
;
3839 pos
= pos_last8
= pos_last16
= pos_last32
;
3847 /* Update current position for moving past a code
3849 pos
+= fragp
->fr_fix
;
3852 fragp_next
= fragp
->fr_next
;
3853 if (fragp_next
== NULL
)
3855 frchp_next
= frchp
->frch_next
;
3856 if (frchp_next
!= NULL
)
3857 fragp_next
= frchp_next
->frch_root
;
3861 frchp_last8
= frchp_next
;
3862 fragp_last8
= fragp_next
;
3867 frchp_last16
= frchp_next
;
3868 fragp_last16
= fragp_next
;
3873 frchp_last32
= frchp_next
;
3874 fragp_last32
= fragp_next
;
3880 /* Now convert the machine-dependent frags to machine-independent
3882 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3883 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3885 if (fragp
->fr_type
== rs_machine_dependent
)
3887 if (fragp
->tc_frag_data
.is_insns
)
3891 fragp
->fr_type
= rs_align_code
;
3893 *fragp
->fr_literal
= 0;
3899 /* Initialize the machine-dependent parts of a frag. */
3902 tic6x_frag_init (fragS
*fragp
)
3904 fragp
->tc_frag_data
.is_insns
= FALSE
;
3905 fragp
->tc_frag_data
.can_cross_fp_boundary
= FALSE
;
3908 /* Set an attribute if it has not already been set by the user. */
3911 tic6x_set_attribute_int (int tag
, int value
)
3914 || tag
>= NUM_KNOWN_OBJ_ATTRIBUTES
)
3916 if (!tic6x_attributes_set_explicitly
[tag
])
3917 bfd_elf_add_proc_attr_int (stdoutput
, tag
, value
);
3920 /* Set object attributes deduced from the input file and command line
3921 rather than given explicitly. */
3923 tic6x_set_attributes (void)
3925 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
3926 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
3928 tic6x_set_attribute_int (Tag_ISA
, tic6x_arch_attribute
);
3929 tic6x_set_attribute_int (Tag_ABI_DSBT
, tic6x_dsbt
);
3930 tic6x_set_attribute_int (Tag_ABI_PID
, tic6x_pid
);
3931 tic6x_set_attribute_int (Tag_ABI_PIC
, tic6x_pic
);
3934 /* Do machine-dependent manipulations of the frag chains after all
3935 input has been read and before the machine-independent sizing and
3941 /* Set object attributes at this point if not explicitly set. */
3942 tic6x_set_attributes ();
3944 /* Meeting alignment requirements may require inserting NOPs in
3945 parallel in execute packets earlier in the segment. Future
3946 16-bit instruction generation involves whole-segment optimization
3947 to determine the best choice and ordering of 32-bit or 16-bit
3948 instructions. This doesn't fit will in the general relaxation
3949 framework, so handle alignment and 16-bit instruction generation
3951 bfd_map_over_sections (stdoutput
, tic6x_adjust_section
, NULL
);
3954 /* No machine-dependent frags at this stage; all converted in
3958 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT asec ATTRIBUTE_UNUSED
,
3959 fragS
*fragp ATTRIBUTE_UNUSED
)
3964 /* No machine-dependent frags at this stage; all converted in
3968 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
3969 segT seg ATTRIBUTE_UNUSED
)
3974 /* Put a number into target byte order. */
3977 md_number_to_chars (char *buf
, valueT val
, int n
)
3979 if (target_big_endian
)
3980 number_to_chars_bigendian (buf
, val
, n
);
3982 number_to_chars_littleendian (buf
, val
, n
);
3985 /* Machine-dependent operand parsing not currently needed. */
3988 md_operand (expressionS
*op ATTRIBUTE_UNUSED
)
3992 /* PC-relative operands are relative to the start of the fetch
3996 tic6x_pcrel_from_section (fixS
*fixp
, segT sec
)
3998 if (fixp
->fx_addsy
!= NULL
3999 && (!S_IS_DEFINED (fixp
->fx_addsy
)
4000 || S_GET_SEGMENT (fixp
->fx_addsy
) != sec
))
4002 return (fixp
->fx_where
+ fixp
->fx_frag
->fr_address
) & ~(long) 0x1f;
4005 /* Round up a section size to the appropriate boundary. */
4008 md_section_align (segT segment ATTRIBUTE_UNUSED
,
4011 /* Round up section sizes to ensure that text sections consist of
4012 whole fetch packets. */
4013 int align
= bfd_get_section_alignment (stdoutput
, segment
);
4014 return ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4017 /* No special undefined symbol handling needed for now. */
4020 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4025 /* Translate internal representation of relocation info to BFD target
4029 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4032 bfd_reloc_code_real_type r_type
;
4034 reloc
= xmalloc (sizeof (arelent
));
4035 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
4036 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4037 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4038 reloc
->addend
= (tic6x_generate_rela
? fixp
->fx_offset
: 0);
4039 r_type
= fixp
->fx_r_type
;
4040 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4042 if (reloc
->howto
== NULL
)
4044 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4045 _("Cannot represent relocation type %s"),
4046 bfd_get_reloc_code_name (r_type
));
4050 /* Correct for adjustments bfd_install_relocation will make. */
4051 if (reloc
->howto
->pcrel_offset
&& reloc
->howto
->partial_inplace
)
4052 reloc
->addend
+= reloc
->address
;