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Add support for DragonFlyBSD target.
[binutils.git] / gas / config / tc-ppc.c
blob4396e144c983e4d911d74e2d01e796aecb822f41
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "dw2gencfi.h"
27 #include "opcode/ppc.h"
28
29 #ifdef OBJ_ELF
30 #include "elf/ppc.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40 /* Tell the main code what the endianness is. */
41 extern int target_big_endian;
42
43 /* Whether or not, we've set target_big_endian. */
44 static int set_target_endian = 0;
45
46 /* Whether to use user friendly register names. */
47 #ifndef TARGET_REG_NAMES_P
48 #ifdef TE_PE
49 #define TARGET_REG_NAMES_P TRUE
50 #else
51 #define TARGET_REG_NAMES_P FALSE
52 #endif
53 #endif
54
55 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58 /* #lo(value) denotes the least significant 16 bits of the indicated. */
59 #define PPC_LO(v) ((v) & 0xffff)
60
61 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
62 #define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
67 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
68
69 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
70 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
71
72 /* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
74 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
75
76 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
77 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
78
79 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
80 compensating for #lo being treated as a signed number. */
81 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
82
83 #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
85 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
86
87 static void ppc_macro (char *, const struct powerpc_macro *);
88 static void ppc_byte (int);
89
90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
91 static void ppc_tc (int);
92 static void ppc_machine (int);
93 #endif
94
95 #ifdef OBJ_XCOFF
96 static void ppc_comm (int);
97 static void ppc_bb (int);
98 static void ppc_bc (int);
99 static void ppc_bf (int);
100 static void ppc_biei (int);
101 static void ppc_bs (int);
102 static void ppc_eb (int);
103 static void ppc_ec (int);
104 static void ppc_ef (int);
105 static void ppc_es (int);
106 static void ppc_csect (int);
107 static void ppc_change_csect (symbolS *, offsetT);
108 static void ppc_function (int);
109 static void ppc_extern (int);
110 static void ppc_lglobl (int);
111 static void ppc_ref (int);
112 static void ppc_section (int);
113 static void ppc_named_section (int);
114 static void ppc_stabx (int);
115 static void ppc_rename (int);
116 static void ppc_toc (int);
117 static void ppc_xcoff_cons (int);
118 static void ppc_vbyte (int);
119 #endif
120
121 #ifdef OBJ_ELF
122 static void ppc_elf_cons (int);
123 static void ppc_elf_rdata (int);
124 static void ppc_elf_lcomm (int);
125 #endif
126
127 #ifdef TE_PE
128 static void ppc_previous (int);
129 static void ppc_pdata (int);
130 static void ppc_ydata (int);
131 static void ppc_reldata (int);
132 static void ppc_rdata (int);
133 static void ppc_ualong (int);
134 static void ppc_znop (int);
135 static void ppc_pe_comm (int);
136 static void ppc_pe_section (int);
137 static void ppc_pe_function (int);
138 static void ppc_pe_tocd (int);
139 #endif
140 \f
141 /* Generic assembler global variables which must be defined by all
142 targets. */
143
144 #ifdef OBJ_ELF
145 /* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149 static const char ppc_solaris_comment_chars[] = "#!";
150 static const char ppc_eabi_comment_chars[] = "#";
151
152 #ifdef TARGET_SOLARIS_COMMENT
153 const char *ppc_comment_chars = ppc_solaris_comment_chars;
154 #else
155 const char *ppc_comment_chars = ppc_eabi_comment_chars;
156 #endif
157 #else
158 const char comment_chars[] = "#";
159 #endif
160
161 /* Characters which start a comment at the beginning of a line. */
162 const char line_comment_chars[] = "#";
163
164 /* Characters which may be used to separate multiple commands on a
165 single line. */
166 const char line_separator_chars[] = ";";
167
168 /* Characters which are used to indicate an exponent in a floating
169 point number. */
170 const char EXP_CHARS[] = "eE";
171
172 /* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174 const char FLT_CHARS[] = "dD";
175
176 /* Anything that can start an operand needs to be mentioned here,
177 to stop the input scrubber eating whitespace. */
178 const char ppc_symbol_chars[] = "%[";
179
180 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181 int ppc_cie_data_alignment;
182
183 /* More than this number of nops in an alignment op gets a branch
184 instead. */
185 unsigned long nop_limit = 4;
186
187 /* The type of processor we are assembling for. This is one or more
188 of the PPC_OPCODE flags defined in opcode/ppc.h. */
189 ppc_cpu_t ppc_cpu = 0;
190
191 /* Flags set on encountering toc relocs. */
192 enum {
193 has_large_toc_reloc = 1,
194 has_small_toc_reloc = 2
195 } toc_reloc_types;
196 \f
197 /* The target specific pseudo-ops which we support. */
198
199 const pseudo_typeS md_pseudo_table[] =
200 {
201 /* Pseudo-ops which must be overridden. */
202 { "byte", ppc_byte, 0 },
203
204 #ifdef OBJ_XCOFF
205 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
206 legitimately belong in the obj-*.c file. However, XCOFF is based
207 on COFF, and is only implemented for the RS/6000. We just use
208 obj-coff.c, and add what we need here. */
209 { "comm", ppc_comm, 0 },
210 { "lcomm", ppc_comm, 1 },
211 { "bb", ppc_bb, 0 },
212 { "bc", ppc_bc, 0 },
213 { "bf", ppc_bf, 0 },
214 { "bi", ppc_biei, 0 },
215 { "bs", ppc_bs, 0 },
216 { "csect", ppc_csect, 0 },
217 { "data", ppc_section, 'd' },
218 { "eb", ppc_eb, 0 },
219 { "ec", ppc_ec, 0 },
220 { "ef", ppc_ef, 0 },
221 { "ei", ppc_biei, 1 },
222 { "es", ppc_es, 0 },
223 { "extern", ppc_extern, 0 },
224 { "function", ppc_function, 0 },
225 { "lglobl", ppc_lglobl, 0 },
226 { "ref", ppc_ref, 0 },
227 { "rename", ppc_rename, 0 },
228 { "section", ppc_named_section, 0 },
229 { "stabx", ppc_stabx, 0 },
230 { "text", ppc_section, 't' },
231 { "toc", ppc_toc, 0 },
232 { "long", ppc_xcoff_cons, 2 },
233 { "llong", ppc_xcoff_cons, 3 },
234 { "word", ppc_xcoff_cons, 1 },
235 { "short", ppc_xcoff_cons, 1 },
236 { "vbyte", ppc_vbyte, 0 },
237 #endif
238
239 #ifdef OBJ_ELF
240 { "llong", ppc_elf_cons, 8 },
241 { "quad", ppc_elf_cons, 8 },
242 { "long", ppc_elf_cons, 4 },
243 { "word", ppc_elf_cons, 2 },
244 { "short", ppc_elf_cons, 2 },
245 { "rdata", ppc_elf_rdata, 0 },
246 { "rodata", ppc_elf_rdata, 0 },
247 { "lcomm", ppc_elf_lcomm, 0 },
248 #endif
249
250 #ifdef TE_PE
251 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252 { "previous", ppc_previous, 0 },
253 { "pdata", ppc_pdata, 0 },
254 { "ydata", ppc_ydata, 0 },
255 { "reldata", ppc_reldata, 0 },
256 { "rdata", ppc_rdata, 0 },
257 { "ualong", ppc_ualong, 0 },
258 { "znop", ppc_znop, 0 },
259 { "comm", ppc_pe_comm, 0 },
260 { "lcomm", ppc_pe_comm, 1 },
261 { "section", ppc_pe_section, 0 },
262 { "function", ppc_pe_function,0 },
263 { "tocd", ppc_pe_tocd, 0 },
264 #endif
265
266 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
267 { "tc", ppc_tc, 0 },
268 { "machine", ppc_machine, 0 },
269 #endif
270
271 { NULL, NULL, 0 }
272 };
273
274 \f
275 /* Predefined register names if -mregnames (or default for Windows NT).
276 In general, there are lots of them, in an attempt to be compatible
277 with a number of other Windows NT assemblers. */
278
279 /* Structure to hold information about predefined registers. */
280 struct pd_reg
281 {
282 char *name;
283 int value;
284 };
285
286 /* List of registers that are pre-defined:
287
288 Each general register has predefined names of the form:
289 1. r<reg_num> which has the value <reg_num>.
290 2. r.<reg_num> which has the value <reg_num>.
291
292 Each floating point register has predefined names of the form:
293 1. f<reg_num> which has the value <reg_num>.
294 2. f.<reg_num> which has the value <reg_num>.
295
296 Each vector unit register has predefined names of the form:
297 1. v<reg_num> which has the value <reg_num>.
298 2. v.<reg_num> which has the value <reg_num>.
299
300 Each condition register has predefined names of the form:
301 1. cr<reg_num> which has the value <reg_num>.
302 2. cr.<reg_num> which has the value <reg_num>.
303
304 There are individual registers as well:
305 sp or r.sp has the value 1
306 rtoc or r.toc has the value 2
307 fpscr has the value 0
308 xer has the value 1
309 lr has the value 8
310 ctr has the value 9
311 pmr has the value 0
312 dar has the value 19
313 dsisr has the value 18
314 dec has the value 22
315 sdr1 has the value 25
316 srr0 has the value 26
317 srr1 has the value 27
318
319 The table is sorted. Suitable for searching by a binary search. */
320
321 static const struct pd_reg pre_defined_registers[] =
322 {
323 { "cr.0", 0 }, /* Condition Registers */
324 { "cr.1", 1 },
325 { "cr.2", 2 },
326 { "cr.3", 3 },
327 { "cr.4", 4 },
328 { "cr.5", 5 },
329 { "cr.6", 6 },
330 { "cr.7", 7 },
331
332 { "cr0", 0 },
333 { "cr1", 1 },
334 { "cr2", 2 },
335 { "cr3", 3 },
336 { "cr4", 4 },
337 { "cr5", 5 },
338 { "cr6", 6 },
339 { "cr7", 7 },
340
341 { "ctr", 9 },
342
343 { "dar", 19 }, /* Data Access Register */
344 { "dec", 22 }, /* Decrementer */
345 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
346
347 { "f.0", 0 }, /* Floating point registers */
348 { "f.1", 1 },
349 { "f.10", 10 },
350 { "f.11", 11 },
351 { "f.12", 12 },
352 { "f.13", 13 },
353 { "f.14", 14 },
354 { "f.15", 15 },
355 { "f.16", 16 },
356 { "f.17", 17 },
357 { "f.18", 18 },
358 { "f.19", 19 },
359 { "f.2", 2 },
360 { "f.20", 20 },
361 { "f.21", 21 },
362 { "f.22", 22 },
363 { "f.23", 23 },
364 { "f.24", 24 },
365 { "f.25", 25 },
366 { "f.26", 26 },
367 { "f.27", 27 },
368 { "f.28", 28 },
369 { "f.29", 29 },
370 { "f.3", 3 },
371 { "f.30", 30 },
372 { "f.31", 31 },
373
374 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
375 { "f.33", 33 },
376 { "f.34", 34 },
377 { "f.35", 35 },
378 { "f.36", 36 },
379 { "f.37", 37 },
380 { "f.38", 38 },
381 { "f.39", 39 },
382 { "f.4", 4 },
383 { "f.40", 40 },
384 { "f.41", 41 },
385 { "f.42", 42 },
386 { "f.43", 43 },
387 { "f.44", 44 },
388 { "f.45", 45 },
389 { "f.46", 46 },
390 { "f.47", 47 },
391 { "f.48", 48 },
392 { "f.49", 49 },
393 { "f.5", 5 },
394 { "f.50", 50 },
395 { "f.51", 51 },
396 { "f.52", 52 },
397 { "f.53", 53 },
398 { "f.54", 54 },
399 { "f.55", 55 },
400 { "f.56", 56 },
401 { "f.57", 57 },
402 { "f.58", 58 },
403 { "f.59", 59 },
404 { "f.6", 6 },
405 { "f.60", 60 },
406 { "f.61", 61 },
407 { "f.62", 62 },
408 { "f.63", 63 },
409 { "f.7", 7 },
410 { "f.8", 8 },
411 { "f.9", 9 },
412
413 { "f0", 0 },
414 { "f1", 1 },
415 { "f10", 10 },
416 { "f11", 11 },
417 { "f12", 12 },
418 { "f13", 13 },
419 { "f14", 14 },
420 { "f15", 15 },
421 { "f16", 16 },
422 { "f17", 17 },
423 { "f18", 18 },
424 { "f19", 19 },
425 { "f2", 2 },
426 { "f20", 20 },
427 { "f21", 21 },
428 { "f22", 22 },
429 { "f23", 23 },
430 { "f24", 24 },
431 { "f25", 25 },
432 { "f26", 26 },
433 { "f27", 27 },
434 { "f28", 28 },
435 { "f29", 29 },
436 { "f3", 3 },
437 { "f30", 30 },
438 { "f31", 31 },
439
440 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
441 { "f33", 33 },
442 { "f34", 34 },
443 { "f35", 35 },
444 { "f36", 36 },
445 { "f37", 37 },
446 { "f38", 38 },
447 { "f39", 39 },
448 { "f4", 4 },
449 { "f40", 40 },
450 { "f41", 41 },
451 { "f42", 42 },
452 { "f43", 43 },
453 { "f44", 44 },
454 { "f45", 45 },
455 { "f46", 46 },
456 { "f47", 47 },
457 { "f48", 48 },
458 { "f49", 49 },
459 { "f5", 5 },
460 { "f50", 50 },
461 { "f51", 51 },
462 { "f52", 52 },
463 { "f53", 53 },
464 { "f54", 54 },
465 { "f55", 55 },
466 { "f56", 56 },
467 { "f57", 57 },
468 { "f58", 58 },
469 { "f59", 59 },
470 { "f6", 6 },
471 { "f60", 60 },
472 { "f61", 61 },
473 { "f62", 62 },
474 { "f63", 63 },
475 { "f7", 7 },
476 { "f8", 8 },
477 { "f9", 9 },
478
479 { "fpscr", 0 },
480
481 /* Quantization registers used with pair single instructions. */
482 { "gqr.0", 0 },
483 { "gqr.1", 1 },
484 { "gqr.2", 2 },
485 { "gqr.3", 3 },
486 { "gqr.4", 4 },
487 { "gqr.5", 5 },
488 { "gqr.6", 6 },
489 { "gqr.7", 7 },
490 { "gqr0", 0 },
491 { "gqr1", 1 },
492 { "gqr2", 2 },
493 { "gqr3", 3 },
494 { "gqr4", 4 },
495 { "gqr5", 5 },
496 { "gqr6", 6 },
497 { "gqr7", 7 },
498
499 { "lr", 8 }, /* Link Register */
500
501 { "pmr", 0 },
502
503 { "r.0", 0 }, /* General Purpose Registers */
504 { "r.1", 1 },
505 { "r.10", 10 },
506 { "r.11", 11 },
507 { "r.12", 12 },
508 { "r.13", 13 },
509 { "r.14", 14 },
510 { "r.15", 15 },
511 { "r.16", 16 },
512 { "r.17", 17 },
513 { "r.18", 18 },
514 { "r.19", 19 },
515 { "r.2", 2 },
516 { "r.20", 20 },
517 { "r.21", 21 },
518 { "r.22", 22 },
519 { "r.23", 23 },
520 { "r.24", 24 },
521 { "r.25", 25 },
522 { "r.26", 26 },
523 { "r.27", 27 },
524 { "r.28", 28 },
525 { "r.29", 29 },
526 { "r.3", 3 },
527 { "r.30", 30 },
528 { "r.31", 31 },
529 { "r.4", 4 },
530 { "r.5", 5 },
531 { "r.6", 6 },
532 { "r.7", 7 },
533 { "r.8", 8 },
534 { "r.9", 9 },
535
536 { "r.sp", 1 }, /* Stack Pointer */
537
538 { "r.toc", 2 }, /* Pointer to the table of contents */
539
540 { "r0", 0 }, /* More general purpose registers */
541 { "r1", 1 },
542 { "r10", 10 },
543 { "r11", 11 },
544 { "r12", 12 },
545 { "r13", 13 },
546 { "r14", 14 },
547 { "r15", 15 },
548 { "r16", 16 },
549 { "r17", 17 },
550 { "r18", 18 },
551 { "r19", 19 },
552 { "r2", 2 },
553 { "r20", 20 },
554 { "r21", 21 },
555 { "r22", 22 },
556 { "r23", 23 },
557 { "r24", 24 },
558 { "r25", 25 },
559 { "r26", 26 },
560 { "r27", 27 },
561 { "r28", 28 },
562 { "r29", 29 },
563 { "r3", 3 },
564 { "r30", 30 },
565 { "r31", 31 },
566 { "r4", 4 },
567 { "r5", 5 },
568 { "r6", 6 },
569 { "r7", 7 },
570 { "r8", 8 },
571 { "r9", 9 },
572
573 { "rtoc", 2 }, /* Table of contents */
574
575 { "sdr1", 25 }, /* Storage Description Register 1 */
576
577 { "sp", 1 },
578
579 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
580 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
581
582 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
583 { "v.1", 1 },
584 { "v.10", 10 },
585 { "v.11", 11 },
586 { "v.12", 12 },
587 { "v.13", 13 },
588 { "v.14", 14 },
589 { "v.15", 15 },
590 { "v.16", 16 },
591 { "v.17", 17 },
592 { "v.18", 18 },
593 { "v.19", 19 },
594 { "v.2", 2 },
595 { "v.20", 20 },
596 { "v.21", 21 },
597 { "v.22", 22 },
598 { "v.23", 23 },
599 { "v.24", 24 },
600 { "v.25", 25 },
601 { "v.26", 26 },
602 { "v.27", 27 },
603 { "v.28", 28 },
604 { "v.29", 29 },
605 { "v.3", 3 },
606 { "v.30", 30 },
607 { "v.31", 31 },
608 { "v.4", 4 },
609 { "v.5", 5 },
610 { "v.6", 6 },
611 { "v.7", 7 },
612 { "v.8", 8 },
613 { "v.9", 9 },
614
615 { "v0", 0 },
616 { "v1", 1 },
617 { "v10", 10 },
618 { "v11", 11 },
619 { "v12", 12 },
620 { "v13", 13 },
621 { "v14", 14 },
622 { "v15", 15 },
623 { "v16", 16 },
624 { "v17", 17 },
625 { "v18", 18 },
626 { "v19", 19 },
627 { "v2", 2 },
628 { "v20", 20 },
629 { "v21", 21 },
630 { "v22", 22 },
631 { "v23", 23 },
632 { "v24", 24 },
633 { "v25", 25 },
634 { "v26", 26 },
635 { "v27", 27 },
636 { "v28", 28 },
637 { "v29", 29 },
638 { "v3", 3 },
639 { "v30", 30 },
640 { "v31", 31 },
641 { "v4", 4 },
642 { "v5", 5 },
643 { "v6", 6 },
644 { "v7", 7 },
645 { "v8", 8 },
646 { "v9", 9 },
647
648 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
649 { "vs.1", 1 },
650 { "vs.10", 10 },
651 { "vs.11", 11 },
652 { "vs.12", 12 },
653 { "vs.13", 13 },
654 { "vs.14", 14 },
655 { "vs.15", 15 },
656 { "vs.16", 16 },
657 { "vs.17", 17 },
658 { "vs.18", 18 },
659 { "vs.19", 19 },
660 { "vs.2", 2 },
661 { "vs.20", 20 },
662 { "vs.21", 21 },
663 { "vs.22", 22 },
664 { "vs.23", 23 },
665 { "vs.24", 24 },
666 { "vs.25", 25 },
667 { "vs.26", 26 },
668 { "vs.27", 27 },
669 { "vs.28", 28 },
670 { "vs.29", 29 },
671 { "vs.3", 3 },
672 { "vs.30", 30 },
673 { "vs.31", 31 },
674 { "vs.32", 32 },
675 { "vs.33", 33 },
676 { "vs.34", 34 },
677 { "vs.35", 35 },
678 { "vs.36", 36 },
679 { "vs.37", 37 },
680 { "vs.38", 38 },
681 { "vs.39", 39 },
682 { "vs.4", 4 },
683 { "vs.40", 40 },
684 { "vs.41", 41 },
685 { "vs.42", 42 },
686 { "vs.43", 43 },
687 { "vs.44", 44 },
688 { "vs.45", 45 },
689 { "vs.46", 46 },
690 { "vs.47", 47 },
691 { "vs.48", 48 },
692 { "vs.49", 49 },
693 { "vs.5", 5 },
694 { "vs.50", 50 },
695 { "vs.51", 51 },
696 { "vs.52", 52 },
697 { "vs.53", 53 },
698 { "vs.54", 54 },
699 { "vs.55", 55 },
700 { "vs.56", 56 },
701 { "vs.57", 57 },
702 { "vs.58", 58 },
703 { "vs.59", 59 },
704 { "vs.6", 6 },
705 { "vs.60", 60 },
706 { "vs.61", 61 },
707 { "vs.62", 62 },
708 { "vs.63", 63 },
709 { "vs.7", 7 },
710 { "vs.8", 8 },
711 { "vs.9", 9 },
712
713 { "vs0", 0 },
714 { "vs1", 1 },
715 { "vs10", 10 },
716 { "vs11", 11 },
717 { "vs12", 12 },
718 { "vs13", 13 },
719 { "vs14", 14 },
720 { "vs15", 15 },
721 { "vs16", 16 },
722 { "vs17", 17 },
723 { "vs18", 18 },
724 { "vs19", 19 },
725 { "vs2", 2 },
726 { "vs20", 20 },
727 { "vs21", 21 },
728 { "vs22", 22 },
729 { "vs23", 23 },
730 { "vs24", 24 },
731 { "vs25", 25 },
732 { "vs26", 26 },
733 { "vs27", 27 },
734 { "vs28", 28 },
735 { "vs29", 29 },
736 { "vs3", 3 },
737 { "vs30", 30 },
738 { "vs31", 31 },
739 { "vs32", 32 },
740 { "vs33", 33 },
741 { "vs34", 34 },
742 { "vs35", 35 },
743 { "vs36", 36 },
744 { "vs37", 37 },
745 { "vs38", 38 },
746 { "vs39", 39 },
747 { "vs4", 4 },
748 { "vs40", 40 },
749 { "vs41", 41 },
750 { "vs42", 42 },
751 { "vs43", 43 },
752 { "vs44", 44 },
753 { "vs45", 45 },
754 { "vs46", 46 },
755 { "vs47", 47 },
756 { "vs48", 48 },
757 { "vs49", 49 },
758 { "vs5", 5 },
759 { "vs50", 50 },
760 { "vs51", 51 },
761 { "vs52", 52 },
762 { "vs53", 53 },
763 { "vs54", 54 },
764 { "vs55", 55 },
765 { "vs56", 56 },
766 { "vs57", 57 },
767 { "vs58", 58 },
768 { "vs59", 59 },
769 { "vs6", 6 },
770 { "vs60", 60 },
771 { "vs61", 61 },
772 { "vs62", 62 },
773 { "vs63", 63 },
774 { "vs7", 7 },
775 { "vs8", 8 },
776 { "vs9", 9 },
777
778 { "xer", 1 },
779
780 };
781
782 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
783
784 /* Given NAME, find the register number associated with that name, return
785 the integer value associated with the given name or -1 on failure. */
786
787 static int
788 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
789 {
790 int middle, low, high;
791 int cmp;
792
793 low = 0;
794 high = regcount - 1;
795
796 do
797 {
798 middle = (low + high) / 2;
799 cmp = strcasecmp (name, regs[middle].name);
800 if (cmp < 0)
801 high = middle - 1;
802 else if (cmp > 0)
803 low = middle + 1;
804 else
805 return regs[middle].value;
806 }
807 while (low <= high);
808
809 return -1;
810 }
811
812 /*
813 * Summary of register_name.
814 *
815 * in: Input_line_pointer points to 1st char of operand.
816 *
817 * out: A expressionS.
818 * The operand may have been a register: in this case, X_op == O_register,
819 * X_add_number is set to the register number, and truth is returned.
820 * Input_line_pointer->(next non-blank) char after operand, or is in its
821 * original state.
822 */
823
824 static bfd_boolean
825 register_name (expressionS *expressionP)
826 {
827 int reg_number;
828 char *name;
829 char *start;
830 char c;
831
832 /* Find the spelling of the operand. */
833 start = name = input_line_pointer;
834 if (name[0] == '%' && ISALPHA (name[1]))
835 name = ++input_line_pointer;
836
837 else if (!reg_names_p || !ISALPHA (name[0]))
838 return FALSE;
839
840 c = get_symbol_end ();
841 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
842
843 /* Put back the delimiting char. */
844 *input_line_pointer = c;
845
846 /* Look to see if it's in the register table. */
847 if (reg_number >= 0)
848 {
849 expressionP->X_op = O_register;
850 expressionP->X_add_number = reg_number;
851
852 /* Make the rest nice. */
853 expressionP->X_add_symbol = NULL;
854 expressionP->X_op_symbol = NULL;
855 return TRUE;
856 }
857
858 /* Reset the line as if we had not done anything. */
859 input_line_pointer = start;
860 return FALSE;
861 }
862 \f
863 /* This function is called for each symbol seen in an expression. It
864 handles the special parsing which PowerPC assemblers are supposed
865 to use for condition codes. */
866
867 /* Whether to do the special parsing. */
868 static bfd_boolean cr_operand;
869
870 /* Names to recognize in a condition code. This table is sorted. */
871 static const struct pd_reg cr_names[] =
872 {
873 { "cr0", 0 },
874 { "cr1", 1 },
875 { "cr2", 2 },
876 { "cr3", 3 },
877 { "cr4", 4 },
878 { "cr5", 5 },
879 { "cr6", 6 },
880 { "cr7", 7 },
881 { "eq", 2 },
882 { "gt", 1 },
883 { "lt", 0 },
884 { "so", 3 },
885 { "un", 3 }
886 };
887
888 /* Parsing function. This returns non-zero if it recognized an
889 expression. */
890
891 int
892 ppc_parse_name (const char *name, expressionS *exp)
893 {
894 int val;
895
896 if (! cr_operand)
897 return 0;
898
899 if (*name == '%')
900 ++name;
901 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
902 name);
903 if (val < 0)
904 return 0;
905
906 exp->X_op = O_constant;
907 exp->X_add_number = val;
908
909 return 1;
910 }
911 \f
912 /* Local variables. */
913
914 /* Whether to target xcoff64/elf64. */
915 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
916
917 /* Opcode hash table. */
918 static struct hash_control *ppc_hash;
919
920 /* Macro hash table. */
921 static struct hash_control *ppc_macro_hash;
922
923 #ifdef OBJ_ELF
924 /* What type of shared library support to use. */
925 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
926
927 /* Flags to set in the elf header. */
928 static flagword ppc_flags = 0;
929
930 /* Whether this is Solaris or not. */
931 #ifdef TARGET_SOLARIS_COMMENT
932 #define SOLARIS_P TRUE
933 #else
934 #define SOLARIS_P FALSE
935 #endif
936
937 static bfd_boolean msolaris = SOLARIS_P;
938 #endif
939
940 #ifdef OBJ_XCOFF
941
942 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
943 using a bunch of different sections. These assembler sections,
944 however, are all encompassed within the .text or .data sections of
945 the final output file. We handle this by using different
946 subsegments within these main segments. */
947
948 /* Next subsegment to allocate within the .text segment. */
949 static subsegT ppc_text_subsegment = 2;
950
951 /* Linked list of csects in the text section. */
952 static symbolS *ppc_text_csects;
953
954 /* Next subsegment to allocate within the .data segment. */
955 static subsegT ppc_data_subsegment = 2;
956
957 /* Linked list of csects in the data section. */
958 static symbolS *ppc_data_csects;
959
960 /* The current csect. */
961 static symbolS *ppc_current_csect;
962
963 /* The RS/6000 assembler uses a TOC which holds addresses of functions
964 and variables. Symbols are put in the TOC with the .tc pseudo-op.
965 A special relocation is used when accessing TOC entries. We handle
966 the TOC as a subsegment within the .data segment. We set it up if
967 we see a .toc pseudo-op, and save the csect symbol here. */
968 static symbolS *ppc_toc_csect;
969
970 /* The first frag in the TOC subsegment. */
971 static fragS *ppc_toc_frag;
972
973 /* The first frag in the first subsegment after the TOC in the .data
974 segment. NULL if there are no subsegments after the TOC. */
975 static fragS *ppc_after_toc_frag;
976
977 /* The current static block. */
978 static symbolS *ppc_current_block;
979
980 /* The COFF debugging section; set by md_begin. This is not the
981 .debug section, but is instead the secret BFD section which will
982 cause BFD to set the section number of a symbol to N_DEBUG. */
983 static asection *ppc_coff_debug_section;
984
985 #endif /* OBJ_XCOFF */
986
987 #ifdef TE_PE
988
989 /* Various sections that we need for PE coff support. */
990 static segT ydata_section;
991 static segT pdata_section;
992 static segT reldata_section;
993 static segT rdata_section;
994 static segT tocdata_section;
995
996 /* The current section and the previous section. See ppc_previous. */
997 static segT ppc_previous_section;
998 static segT ppc_current_section;
999
1000 #endif /* TE_PE */
1001
1002 #ifdef OBJ_ELF
1003 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1004 #define PPC_APUINFO_ISEL 0x40
1005 #define PPC_APUINFO_PMR 0x41
1006 #define PPC_APUINFO_RFMCI 0x42
1007 #define PPC_APUINFO_CACHELCK 0x43
1008 #define PPC_APUINFO_SPE 0x100
1009 #define PPC_APUINFO_EFS 0x101
1010 #define PPC_APUINFO_BRLOCK 0x102
1011
1012 /*
1013 * We keep a list of APUinfo
1014 */
1015 unsigned long *ppc_apuinfo_list;
1016 unsigned int ppc_apuinfo_num;
1017 unsigned int ppc_apuinfo_num_alloc;
1018 #endif /* OBJ_ELF */
1019 \f
1020 #ifdef OBJ_ELF
1021 const char *const md_shortopts = "b:l:usm:K:VQ:";
1022 #else
1023 const char *const md_shortopts = "um:";
1024 #endif
1025 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1026 const struct option md_longopts[] = {
1027 {"nops", required_argument, NULL, OPTION_NOPS},
1028 {NULL, no_argument, NULL, 0}
1029 };
1030 const size_t md_longopts_size = sizeof (md_longopts);
1031
1032 int
1033 md_parse_option (int c, char *arg)
1034 {
1035 ppc_cpu_t new_cpu;
1036
1037 switch (c)
1038 {
1039 case 'u':
1040 /* -u means that any undefined symbols should be treated as
1041 external, which is the default for gas anyhow. */
1042 break;
1043
1044 #ifdef OBJ_ELF
1045 case 'l':
1046 /* Solaris as takes -le (presumably for little endian). For completeness
1047 sake, recognize -be also. */
1048 if (strcmp (arg, "e") == 0)
1049 {
1050 target_big_endian = 0;
1051 set_target_endian = 1;
1052 }
1053 else
1054 return 0;
1055
1056 break;
1057
1058 case 'b':
1059 if (strcmp (arg, "e") == 0)
1060 {
1061 target_big_endian = 1;
1062 set_target_endian = 1;
1063 }
1064 else
1065 return 0;
1066
1067 break;
1068
1069 case 'K':
1070 /* Recognize -K PIC. */
1071 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1072 {
1073 shlib = SHLIB_PIC;
1074 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1075 }
1076 else
1077 return 0;
1078
1079 break;
1080 #endif
1081
1082 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1083 case 'a':
1084 if (strcmp (arg, "64") == 0)
1085 {
1086 #ifdef BFD64
1087 ppc_obj64 = 1;
1088 #else
1089 as_fatal (_("%s unsupported"), "-a64");
1090 #endif
1091 }
1092 else if (strcmp (arg, "32") == 0)
1093 ppc_obj64 = 0;
1094 else
1095 return 0;
1096 break;
1097
1098 case 'm':
1099 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1100 ppc_cpu = new_cpu;
1101
1102 else if (strcmp (arg, "regnames") == 0)
1103 reg_names_p = TRUE;
1104
1105 else if (strcmp (arg, "no-regnames") == 0)
1106 reg_names_p = FALSE;
1107
1108 #ifdef OBJ_ELF
1109 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1110 that require relocation. */
1111 else if (strcmp (arg, "relocatable") == 0)
1112 {
1113 shlib = SHLIB_MRELOCATABLE;
1114 ppc_flags |= EF_PPC_RELOCATABLE;
1115 }
1116
1117 else if (strcmp (arg, "relocatable-lib") == 0)
1118 {
1119 shlib = SHLIB_MRELOCATABLE;
1120 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1121 }
1122
1123 /* -memb, set embedded bit. */
1124 else if (strcmp (arg, "emb") == 0)
1125 ppc_flags |= EF_PPC_EMB;
1126
1127 /* -mlittle/-mbig set the endianess. */
1128 else if (strcmp (arg, "little") == 0
1129 || strcmp (arg, "little-endian") == 0)
1130 {
1131 target_big_endian = 0;
1132 set_target_endian = 1;
1133 }
1134
1135 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1136 {
1137 target_big_endian = 1;
1138 set_target_endian = 1;
1139 }
1140
1141 else if (strcmp (arg, "solaris") == 0)
1142 {
1143 msolaris = TRUE;
1144 ppc_comment_chars = ppc_solaris_comment_chars;
1145 }
1146
1147 else if (strcmp (arg, "no-solaris") == 0)
1148 {
1149 msolaris = FALSE;
1150 ppc_comment_chars = ppc_eabi_comment_chars;
1151 }
1152 #endif
1153 else
1154 {
1155 as_bad (_("invalid switch -m%s"), arg);
1156 return 0;
1157 }
1158 break;
1159
1160 #ifdef OBJ_ELF
1161 /* -V: SVR4 argument to print version ID. */
1162 case 'V':
1163 print_version_id ();
1164 break;
1165
1166 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1167 should be emitted or not. FIXME: Not implemented. */
1168 case 'Q':
1169 break;
1170
1171 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1172 rather than .stabs.excl, which is ignored by the linker.
1173 FIXME: Not implemented. */
1174 case 's':
1175 if (arg)
1176 return 0;
1177
1178 break;
1179 #endif
1180
1181 case OPTION_NOPS:
1182 {
1183 char *end;
1184 nop_limit = strtoul (optarg, &end, 0);
1185 if (*end)
1186 as_bad (_("--nops needs a numeric argument"));
1187 }
1188 break;
1189
1190 default:
1191 return 0;
1192 }
1193
1194 return 1;
1195 }
1196
1197 void
1198 md_show_usage (FILE *stream)
1199 {
1200 fprintf (stream, _("\
1201 PowerPC options:\n\
1202 -a32 generate ELF32/XCOFF32\n\
1203 -a64 generate ELF64/XCOFF64\n\
1204 -u ignored\n\
1205 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1206 -mpwr generate code for POWER (RIOS1)\n\
1207 -m601 generate code for PowerPC 601\n\
1208 -mppc, -mppc32, -m603, -m604\n\
1209 generate code for PowerPC 603/604\n\
1210 -m403 generate code for PowerPC 403\n\
1211 -m405 generate code for PowerPC 405\n\
1212 -m440 generate code for PowerPC 440\n\
1213 -m464 generate code for PowerPC 464\n\
1214 -m476 generate code for PowerPC 476\n\
1215 -m7400, -m7410, -m7450, -m7455\n\
1216 generate code for PowerPC 7400/7410/7450/7455\n\
1217 -m750cl generate code for PowerPC 750cl\n"));
1218 fprintf (stream, _("\
1219 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1220 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1221 -mbooke generate code for 32-bit PowerPC BookE\n\
1222 -ma2 generate code for A2 architecture\n\
1223 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1224 -mpower5, -mpwr5, -mpwr5x\n\
1225 generate code for Power5 architecture\n\
1226 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1227 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1228 -mcell generate code for Cell Broadband Engine architecture\n\
1229 -mcom generate code Power/PowerPC common instructions\n\
1230 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1231 fprintf (stream, _("\
1232 -maltivec generate code for AltiVec\n\
1233 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1234 -me300 generate code for PowerPC e300 family\n\
1235 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1236 -me500mc, generate code for Freescale e500mc core complex\n\
1237 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1238 -mspe generate code for Motorola SPE instructions\n\
1239 -mtitan generate code for AppliedMicro Titan core complex\n\
1240 -mregnames Allow symbolic names for registers\n\
1241 -mno-regnames Do not allow symbolic names for registers\n"));
1242 #ifdef OBJ_ELF
1243 fprintf (stream, _("\
1244 -mrelocatable support for GCC's -mrelocatble option\n\
1245 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1246 -memb set PPC_EMB bit in ELF flags\n\
1247 -mlittle, -mlittle-endian, -le\n\
1248 generate code for a little endian machine\n\
1249 -mbig, -mbig-endian, -be\n\
1250 generate code for a big endian machine\n\
1251 -msolaris generate code for Solaris\n\
1252 -mno-solaris do not generate code for Solaris\n\
1253 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1254 -V print assembler version number\n\
1255 -Qy, -Qn ignored\n"));
1256 #endif
1257 fprintf (stream, _("\
1258 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1259 }
1260 \f
1261 /* Set ppc_cpu if it is not already set. */
1262
1263 static void
1264 ppc_set_cpu (void)
1265 {
1266 const char *default_os = TARGET_OS;
1267 const char *default_cpu = TARGET_CPU;
1268
1269 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1270 {
1271 if (ppc_obj64)
1272 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1273 else if (strncmp (default_os, "aix", 3) == 0
1274 && default_os[3] >= '4' && default_os[3] <= '9')
1275 ppc_cpu |= PPC_OPCODE_COMMON;
1276 else if (strncmp (default_os, "aix3", 4) == 0)
1277 ppc_cpu |= PPC_OPCODE_POWER;
1278 else if (strcmp (default_cpu, "rs6000") == 0)
1279 ppc_cpu |= PPC_OPCODE_POWER;
1280 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1281 ppc_cpu |= PPC_OPCODE_PPC;
1282 else
1283 as_fatal (_("Unknown default cpu = %s, os = %s"),
1284 default_cpu, default_os);
1285 }
1286 }
1287
1288 /* Figure out the BFD architecture to use. This function and ppc_mach
1289 are called well before md_begin, when the output file is opened. */
1290
1291 enum bfd_architecture
1292 ppc_arch (void)
1293 {
1294 const char *default_cpu = TARGET_CPU;
1295 ppc_set_cpu ();
1296
1297 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1298 return bfd_arch_powerpc;
1299 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1300 return bfd_arch_rs6000;
1301 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1302 {
1303 if (strcmp (default_cpu, "rs6000") == 0)
1304 return bfd_arch_rs6000;
1305 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1306 return bfd_arch_powerpc;
1307 }
1308
1309 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1310 return bfd_arch_unknown;
1311 }
1312
1313 unsigned long
1314 ppc_mach (void)
1315 {
1316 if (ppc_obj64)
1317 return bfd_mach_ppc64;
1318 else if (ppc_arch () == bfd_arch_rs6000)
1319 return bfd_mach_rs6k;
1320 else if (ppc_cpu & PPC_OPCODE_TITAN)
1321 return bfd_mach_ppc_titan;
1322 else
1323 return bfd_mach_ppc;
1324 }
1325
1326 extern char*
1327 ppc_target_format (void)
1328 {
1329 #ifdef OBJ_COFF
1330 #ifdef TE_PE
1331 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1332 #elif TE_POWERMAC
1333 return "xcoff-powermac";
1334 #else
1335 # ifdef TE_AIX5
1336 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1337 # else
1338 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1339 # endif
1340 #endif
1341 #endif
1342 #ifdef OBJ_ELF
1343 # ifdef TE_VXWORKS
1344 return "elf32-powerpc-vxworks";
1345 # else
1346 return (target_big_endian
1347 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1348 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1349 # endif
1350 #endif
1351 }
1352
1353 /* Insert opcodes and macros into hash tables. Called at startup and
1354 for .cpu pseudo. */
1355
1356 static void
1357 ppc_setup_opcodes (void)
1358 {
1359 const struct powerpc_opcode *op;
1360 const struct powerpc_opcode *op_end;
1361 const struct powerpc_macro *macro;
1362 const struct powerpc_macro *macro_end;
1363 bfd_boolean bad_insn = FALSE;
1364
1365 if (ppc_hash != NULL)
1366 hash_die (ppc_hash);
1367 if (ppc_macro_hash != NULL)
1368 hash_die (ppc_macro_hash);
1369
1370 /* Insert the opcodes into a hash table. */
1371 ppc_hash = hash_new ();
1372
1373 if (ENABLE_CHECKING)
1374 {
1375 unsigned int i;
1376
1377 /* Check operand masks. Code here and in the disassembler assumes
1378 all the 1's in the mask are contiguous. */
1379 for (i = 0; i < num_powerpc_operands; ++i)
1380 {
1381 unsigned long mask = powerpc_operands[i].bitm;
1382 unsigned long right_bit;
1383 unsigned int j;
1384
1385 right_bit = mask & -mask;
1386 mask += right_bit;
1387 right_bit = mask & -mask;
1388 if (mask != right_bit)
1389 {
1390 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1391 bad_insn = TRUE;
1392 }
1393 for (j = i + 1; j < num_powerpc_operands; ++j)
1394 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1395 sizeof (powerpc_operands[0])) == 0)
1396 {
1397 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1398 j, i);
1399 bad_insn = TRUE;
1400 }
1401 }
1402 }
1403
1404 op_end = powerpc_opcodes + powerpc_num_opcodes;
1405 for (op = powerpc_opcodes; op < op_end; op++)
1406 {
1407 if (ENABLE_CHECKING)
1408 {
1409 const unsigned char *o;
1410 unsigned long omask = op->mask;
1411
1412 if (op != powerpc_opcodes)
1413 {
1414 /* The major opcodes had better be sorted. Code in the
1415 disassembler assumes the insns are sorted according to
1416 major opcode. */
1417 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1418 {
1419 as_bad (_("major opcode is not sorted for %s"),
1420 op->name);
1421 bad_insn = TRUE;
1422 }
1423
1424 /* Warn if the table isn't more strictly ordered.
1425 Unfortunately it doesn't seem possible to order the
1426 table on much more than the major opcode, which makes
1427 it difficult to implement a binary search in the
1428 disassembler. The problem is that we have multiple
1429 ways to disassemble instructions, and we usually want
1430 to choose a more specific form (with more bits set in
1431 the opcode) than a more general form. eg. all of the
1432 following are equivalent:
1433 bne label # opcode = 0x40820000, mask = 0xff830003
1434 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1435 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1436
1437 There are also cases where the table needs to be out
1438 of order to disassemble the correct instruction for
1439 processor variants. */
1440 else if (0)
1441 {
1442 unsigned long t1 = op[0].opcode;
1443 unsigned long t2 = op[-1].opcode;
1444
1445 if (((t1 ^ t2) & 0xfc0007ff) == 0
1446 && (t1 & 0xfc0006df) == 0x7c000286)
1447 {
1448 /* spr field is split. */
1449 t1 = ((t1 & ~0x1ff800)
1450 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1451 t2 = ((t2 & ~0x1ff800)
1452 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1453 }
1454 if (t1 < t2)
1455 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1456 op[0].name, op[0].opcode, op[0].mask,
1457 op[-1].name, op[-1].opcode, op[-1].mask);
1458 }
1459 }
1460
1461 /* The mask had better not trim off opcode bits. */
1462 if ((op->opcode & omask) != op->opcode)
1463 {
1464 as_bad (_("mask trims opcode bits for %s"),
1465 op->name);
1466 bad_insn = TRUE;
1467 }
1468
1469 /* The operands must not overlap the opcode or each other. */
1470 for (o = op->operands; *o; ++o)
1471 if (*o >= num_powerpc_operands)
1472 {
1473 as_bad (_("operand index error for %s"),
1474 op->name);
1475 bad_insn = TRUE;
1476 }
1477 else
1478 {
1479 const struct powerpc_operand *operand = &powerpc_operands[*o];
1480 if (operand->shift >= 0)
1481 {
1482 unsigned long mask = operand->bitm << operand->shift;
1483 if (omask & mask)
1484 {
1485 as_bad (_("operand %d overlap in %s"),
1486 (int) (o - op->operands), op->name);
1487 bad_insn = TRUE;
1488 }
1489 omask |= mask;
1490 }
1491 }
1492 }
1493
1494 if ((ppc_cpu & op->flags) != 0
1495 && !(ppc_cpu & op->deprecated))
1496 {
1497 const char *retval;
1498
1499 retval = hash_insert (ppc_hash, op->name, (void *) op);
1500 if (retval != NULL)
1501 {
1502 as_bad (_("duplicate instruction %s"),
1503 op->name);
1504 bad_insn = TRUE;
1505 }
1506 }
1507 }
1508
1509 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1510 for (op = powerpc_opcodes; op < op_end; op++)
1511 hash_insert (ppc_hash, op->name, (void *) op);
1512
1513 /* Insert the macros into a hash table. */
1514 ppc_macro_hash = hash_new ();
1515
1516 macro_end = powerpc_macros + powerpc_num_macros;
1517 for (macro = powerpc_macros; macro < macro_end; macro++)
1518 {
1519 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1520 {
1521 const char *retval;
1522
1523 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1524 if (retval != (const char *) NULL)
1525 {
1526 as_bad (_("duplicate macro %s"), macro->name);
1527 bad_insn = TRUE;
1528 }
1529 }
1530 }
1531
1532 if (bad_insn)
1533 abort ();
1534 }
1535
1536 /* This function is called when the assembler starts up. It is called
1537 after the options have been parsed and the output file has been
1538 opened. */
1539
1540 void
1541 md_begin (void)
1542 {
1543 ppc_set_cpu ();
1544
1545 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1546
1547 #ifdef OBJ_ELF
1548 /* Set the ELF flags if desired. */
1549 if (ppc_flags && !msolaris)
1550 bfd_set_private_flags (stdoutput, ppc_flags);
1551 #endif
1552
1553 ppc_setup_opcodes ();
1554
1555 /* Tell the main code what the endianness is if it is not overridden
1556 by the user. */
1557 if (!set_target_endian)
1558 {
1559 set_target_endian = 1;
1560 target_big_endian = PPC_BIG_ENDIAN;
1561 }
1562
1563 #ifdef OBJ_XCOFF
1564 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1565
1566 /* Create dummy symbols to serve as initial csects. This forces the
1567 text csects to precede the data csects. These symbols will not
1568 be output. */
1569 ppc_text_csects = symbol_make ("dummy\001");
1570 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1571 ppc_data_csects = symbol_make ("dummy\001");
1572 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1573 #endif
1574
1575 #ifdef TE_PE
1576
1577 ppc_current_section = text_section;
1578 ppc_previous_section = 0;
1579
1580 #endif
1581 }
1582
1583 void
1584 ppc_cleanup (void)
1585 {
1586 #ifdef OBJ_ELF
1587 if (ppc_apuinfo_list == NULL)
1588 return;
1589
1590 /* Ok, so write the section info out. We have this layout:
1591
1592 byte data what
1593 ---- ---- ----
1594 0 8 length of "APUinfo\0"
1595 4 (n*4) number of APU's (4 bytes each)
1596 8 2 note type 2
1597 12 "APUinfo\0" name
1598 20 APU#1 first APU's info
1599 24 APU#2 second APU's info
1600 ... ...
1601 */
1602 {
1603 char *p;
1604 asection *seg = now_seg;
1605 subsegT subseg = now_subseg;
1606 asection *apuinfo_secp = (asection *) NULL;
1607 unsigned int i;
1608
1609 /* Create the .PPC.EMB.apuinfo section. */
1610 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1611 bfd_set_section_flags (stdoutput,
1612 apuinfo_secp,
1613 SEC_HAS_CONTENTS | SEC_READONLY);
1614
1615 p = frag_more (4);
1616 md_number_to_chars (p, (valueT) 8, 4);
1617
1618 p = frag_more (4);
1619 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1620
1621 p = frag_more (4);
1622 md_number_to_chars (p, (valueT) 2, 4);
1623
1624 p = frag_more (8);
1625 strcpy (p, "APUinfo");
1626
1627 for (i = 0; i < ppc_apuinfo_num; i++)
1628 {
1629 p = frag_more (4);
1630 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1631 }
1632
1633 frag_align (2, 0, 0);
1634
1635 /* We probably can't restore the current segment, for there likely
1636 isn't one yet... */
1637 if (seg && subseg)
1638 subseg_set (seg, subseg);
1639 }
1640 #endif
1641 }
1642
1643 /* Insert an operand value into an instruction. */
1644
1645 static unsigned long
1646 ppc_insert_operand (unsigned long insn,
1647 const struct powerpc_operand *operand,
1648 offsetT val,
1649 ppc_cpu_t cpu,
1650 char *file,
1651 unsigned int line)
1652 {
1653 long min, max, right;
1654
1655 max = operand->bitm;
1656 right = max & -max;
1657 min = 0;
1658
1659 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1660 {
1661 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
1662 max = (max >> 1) & -right;
1663 min = ~max & -right;
1664 }
1665
1666 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1667 max++;
1668
1669 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1670 {
1671 long tmp = min;
1672 min = -max;
1673 max = -tmp;
1674 }
1675
1676 if (min <= max)
1677 {
1678 /* Some people write constants with the sign extension done by
1679 hand but only up to 32 bits. This shouldn't really be valid,
1680 but, to permit this code to assemble on a 64-bit host, we
1681 sign extend the 32-bit value to 64 bits if so doing makes the
1682 value valid. */
1683 if (val > max
1684 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1685 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1686 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1687 val = val - 0x80000000 - 0x80000000;
1688
1689 /* Similarly, people write expressions like ~(1<<15), and expect
1690 this to be OK for a 32-bit unsigned value. */
1691 else if (val < min
1692 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1693 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1694 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1695 val = val + 0x80000000 + 0x80000000;
1696
1697 else if (val < min
1698 || val > max
1699 || (val & (right - 1)) != 0)
1700 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1701 }
1702
1703 if (operand->insert)
1704 {
1705 const char *errmsg;
1706
1707 errmsg = NULL;
1708 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1709 if (errmsg != (const char *) NULL)
1710 as_bad_where (file, line, "%s", errmsg);
1711 }
1712 else
1713 insn |= ((long) val & operand->bitm) << operand->shift;
1714
1715 return insn;
1716 }
1717
1718 \f
1719 #ifdef OBJ_ELF
1720 /* Parse @got, etc. and return the desired relocation. */
1721 static bfd_reloc_code_real_type
1722 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1723 {
1724 struct map_bfd {
1725 char *string;
1726 unsigned int length : 8;
1727 unsigned int valid32 : 1;
1728 unsigned int valid64 : 1;
1729 unsigned int reloc;
1730 };
1731
1732 char ident[20];
1733 char *str = *str_p;
1734 char *str2;
1735 int ch;
1736 int len;
1737 const struct map_bfd *ptr;
1738
1739 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1740 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1741 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1742
1743 static const struct map_bfd mapping[] = {
1744 MAP ("l", BFD_RELOC_LO16),
1745 MAP ("h", BFD_RELOC_HI16),
1746 MAP ("ha", BFD_RELOC_HI16_S),
1747 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1748 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1749 MAP ("got", BFD_RELOC_16_GOTOFF),
1750 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1751 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1752 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1753 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1754 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1755 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1756 MAP ("copy", BFD_RELOC_PPC_COPY),
1757 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1758 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1759 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1760 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1761 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1762 MAP ("tls", BFD_RELOC_PPC_TLS),
1763 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1764 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1765 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1766 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1767 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1768 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1769 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1770 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1771 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1772 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1773 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1774 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1775 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1776 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1777 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1778 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1779 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1780 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1781 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1782 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1783 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1784 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1785 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1786 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1787 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1788 MAP32 ("fixup", BFD_RELOC_CTOR),
1789 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1790 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1791 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1792 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1793 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1794 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1795 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1796 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1797 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1798 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1799 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1800 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1801 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1802 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1803 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1804 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1805 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1806 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1807 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1808 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1809 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1810 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1811 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1812 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1813 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1814 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1815 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1816 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1817 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1818 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1819 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1820 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1821 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1822 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1823 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1824 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1825 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1826 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1827 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1828 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1829 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
1830 };
1831
1832 if (*str++ != '@')
1833 return BFD_RELOC_UNUSED;
1834
1835 for (ch = *str, str2 = ident;
1836 (str2 < ident + sizeof (ident) - 1
1837 && (ISALNUM (ch) || ch == '@'));
1838 ch = *++str)
1839 {
1840 *str2++ = TOLOWER (ch);
1841 }
1842
1843 *str2 = '\0';
1844 len = str2 - ident;
1845
1846 ch = ident[0];
1847 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1848 if (ch == ptr->string[0]
1849 && len == ptr->length
1850 && memcmp (ident, ptr->string, ptr->length) == 0
1851 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
1852 {
1853 int reloc = ptr->reloc;
1854
1855 if (!ppc_obj64 && exp_p->X_add_number != 0)
1856 {
1857 switch (reloc)
1858 {
1859 case BFD_RELOC_16_GOTOFF:
1860 case BFD_RELOC_LO16_GOTOFF:
1861 case BFD_RELOC_HI16_GOTOFF:
1862 case BFD_RELOC_HI16_S_GOTOFF:
1863 as_warn (_("identifier+constant@got means "
1864 "identifier@got+constant"));
1865 break;
1866
1867 case BFD_RELOC_PPC_GOT_TLSGD16:
1868 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1869 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1870 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1871 case BFD_RELOC_PPC_GOT_TLSLD16:
1872 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1873 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1874 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1875 case BFD_RELOC_PPC_GOT_DTPREL16:
1876 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1877 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1878 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1879 case BFD_RELOC_PPC_GOT_TPREL16:
1880 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1881 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1882 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1883 as_bad (_("symbol+offset not supported for got tls"));
1884 break;
1885 }
1886 }
1887
1888 /* Now check for identifier@suffix+constant. */
1889 if (*str == '-' || *str == '+')
1890 {
1891 char *orig_line = input_line_pointer;
1892 expressionS new_exp;
1893
1894 input_line_pointer = str;
1895 expression (&new_exp);
1896 if (new_exp.X_op == O_constant)
1897 {
1898 exp_p->X_add_number += new_exp.X_add_number;
1899 str = input_line_pointer;
1900 }
1901
1902 if (&input_line_pointer != str_p)
1903 input_line_pointer = orig_line;
1904 }
1905 *str_p = str;
1906
1907 if (reloc == (int) BFD_RELOC_PPC64_TOC
1908 && exp_p->X_op == O_symbol
1909 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
1910 {
1911 /* Change the symbol so that the dummy .TOC. symbol can be
1912 omitted from the object file. */
1913 exp_p->X_add_symbol = &abs_symbol;
1914 }
1915
1916 return (bfd_reloc_code_real_type) reloc;
1917 }
1918
1919 return BFD_RELOC_UNUSED;
1920 }
1921
1922 /* Like normal .long/.short/.word, except support @got, etc.
1923 Clobbers input_line_pointer, checks end-of-line. */
1924 static void
1925 ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
1926 {
1927 expressionS exp;
1928 bfd_reloc_code_real_type reloc;
1929
1930 if (is_it_end_of_statement ())
1931 {
1932 demand_empty_rest_of_line ();
1933 return;
1934 }
1935
1936 do
1937 {
1938 expression (&exp);
1939 if (exp.X_op == O_symbol
1940 && *input_line_pointer == '@'
1941 && (reloc = ppc_elf_suffix (&input_line_pointer,
1942 &exp)) != BFD_RELOC_UNUSED)
1943 {
1944 reloc_howto_type *reloc_howto;
1945 int size;
1946
1947 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1948 size = bfd_get_reloc_size (reloc_howto);
1949
1950 if (size > nbytes)
1951 {
1952 as_bad (_("%s relocations do not fit in %d bytes\n"),
1953 reloc_howto->name, nbytes);
1954 }
1955 else
1956 {
1957 char *p;
1958 int offset;
1959
1960 p = frag_more (nbytes);
1961 memset (p, 0, nbytes);
1962 offset = 0;
1963 if (target_big_endian)
1964 offset = nbytes - size;
1965 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1966 &exp, 0, reloc);
1967 }
1968 }
1969 else
1970 emit_expr (&exp, (unsigned int) nbytes);
1971 }
1972 while (*input_line_pointer++ == ',');
1973
1974 /* Put terminator back into stream. */
1975 input_line_pointer--;
1976 demand_empty_rest_of_line ();
1977 }
1978
1979 /* Solaris pseduo op to change to the .rodata section. */
1980 static void
1981 ppc_elf_rdata (int xxx)
1982 {
1983 char *save_line = input_line_pointer;
1984 static char section[] = ".rodata\n";
1985
1986 /* Just pretend this is .section .rodata */
1987 input_line_pointer = section;
1988 obj_elf_section (xxx);
1989
1990 input_line_pointer = save_line;
1991 }
1992
1993 /* Pseudo op to make file scope bss items. */
1994 static void
1995 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
1996 {
1997 char *name;
1998 char c;
1999 char *p;
2000 offsetT size;
2001 symbolS *symbolP;
2002 offsetT align;
2003 segT old_sec;
2004 int old_subsec;
2005 char *pfrag;
2006 int align2;
2007
2008 name = input_line_pointer;
2009 c = get_symbol_end ();
2010
2011 /* just after name is now '\0'. */
2012 p = input_line_pointer;
2013 *p = c;
2014 SKIP_WHITESPACE ();
2015 if (*input_line_pointer != ',')
2016 {
2017 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2018 ignore_rest_of_line ();
2019 return;
2020 }
2021
2022 input_line_pointer++; /* skip ',' */
2023 if ((size = get_absolute_expression ()) < 0)
2024 {
2025 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2026 ignore_rest_of_line ();
2027 return;
2028 }
2029
2030 /* The third argument to .lcomm is the alignment. */
2031 if (*input_line_pointer != ',')
2032 align = 8;
2033 else
2034 {
2035 ++input_line_pointer;
2036 align = get_absolute_expression ();
2037 if (align <= 0)
2038 {
2039 as_warn (_("ignoring bad alignment"));
2040 align = 8;
2041 }
2042 }
2043
2044 *p = 0;
2045 symbolP = symbol_find_or_make (name);
2046 *p = c;
2047
2048 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2049 {
2050 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2051 S_GET_NAME (symbolP));
2052 ignore_rest_of_line ();
2053 return;
2054 }
2055
2056 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2057 {
2058 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2059 S_GET_NAME (symbolP),
2060 (long) S_GET_VALUE (symbolP),
2061 (long) size);
2062
2063 ignore_rest_of_line ();
2064 return;
2065 }
2066
2067 /* Allocate_bss. */
2068 old_sec = now_seg;
2069 old_subsec = now_subseg;
2070 if (align)
2071 {
2072 /* Convert to a power of 2 alignment. */
2073 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2074 if (align != 1)
2075 {
2076 as_bad (_("Common alignment not a power of 2"));
2077 ignore_rest_of_line ();
2078 return;
2079 }
2080 }
2081 else
2082 align2 = 0;
2083
2084 record_alignment (bss_section, align2);
2085 subseg_set (bss_section, 0);
2086 if (align2)
2087 frag_align (align2, 0, 0);
2088 if (S_GET_SEGMENT (symbolP) == bss_section)
2089 symbol_get_frag (symbolP)->fr_symbol = 0;
2090 symbol_set_frag (symbolP, frag_now);
2091 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2092 (char *) 0);
2093 *pfrag = 0;
2094 S_SET_SIZE (symbolP, size);
2095 S_SET_SEGMENT (symbolP, bss_section);
2096 subseg_set (old_sec, old_subsec);
2097 demand_empty_rest_of_line ();
2098 }
2099
2100 /* Validate any relocations emitted for -mrelocatable, possibly adding
2101 fixups for word relocations in writable segments, so we can adjust
2102 them at runtime. */
2103 static void
2104 ppc_elf_validate_fix (fixS *fixp, segT seg)
2105 {
2106 if (fixp->fx_done || fixp->fx_pcrel)
2107 return;
2108
2109 switch (shlib)
2110 {
2111 case SHLIB_NONE:
2112 case SHLIB_PIC:
2113 return;
2114
2115 case SHLIB_MRELOCATABLE:
2116 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2117 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2118 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2119 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2120 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2121 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2122 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2123 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2124 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2125 && (seg->flags & SEC_LOAD) != 0
2126 && strcmp (segment_name (seg), ".got2") != 0
2127 && strcmp (segment_name (seg), ".dtors") != 0
2128 && strcmp (segment_name (seg), ".ctors") != 0
2129 && strcmp (segment_name (seg), ".fixup") != 0
2130 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2131 && strcmp (segment_name (seg), ".eh_frame") != 0
2132 && strcmp (segment_name (seg), ".ex_shared") != 0)
2133 {
2134 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2135 || fixp->fx_r_type != BFD_RELOC_CTOR)
2136 {
2137 as_bad_where (fixp->fx_file, fixp->fx_line,
2138 _("Relocation cannot be done when using -mrelocatable"));
2139 }
2140 }
2141 return;
2142 }
2143 }
2144
2145 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2146 function descriptor sym if the corresponding code sym is used. */
2147
2148 void
2149 ppc_frob_file_before_adjust (void)
2150 {
2151 symbolS *symp;
2152 asection *toc;
2153
2154 if (!ppc_obj64)
2155 return;
2156
2157 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2158 {
2159 const char *name;
2160 char *dotname;
2161 symbolS *dotsym;
2162 size_t len;
2163
2164 name = S_GET_NAME (symp);
2165 if (name[0] == '.')
2166 continue;
2167
2168 if (! S_IS_WEAK (symp)
2169 || S_IS_DEFINED (symp))
2170 continue;
2171
2172 len = strlen (name) + 1;
2173 dotname = xmalloc (len + 1);
2174 dotname[0] = '.';
2175 memcpy (dotname + 1, name, len);
2176 dotsym = symbol_find_noref (dotname, 1);
2177 free (dotname);
2178 if (dotsym != NULL && (symbol_used_p (dotsym)
2179 || symbol_used_in_reloc_p (dotsym)))
2180 symbol_mark_used (symp);
2181
2182 }
2183
2184 toc = bfd_get_section_by_name (stdoutput, ".toc");
2185 if (toc != NULL
2186 && toc_reloc_types != has_large_toc_reloc
2187 && bfd_section_size (stdoutput, toc) > 0x10000)
2188 as_warn (_("TOC section size exceeds 64k"));
2189
2190 /* Don't emit .TOC. symbol. */
2191 symp = symbol_find (".TOC.");
2192 if (symp != NULL)
2193 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2194 }
2195 #endif /* OBJ_ELF */
2196 \f
2197 #ifdef TE_PE
2198
2199 /*
2200 * Summary of parse_toc_entry.
2201 *
2202 * in: Input_line_pointer points to the '[' in one of:
2203 *
2204 * [toc] [tocv] [toc32] [toc64]
2205 *
2206 * Anything else is an error of one kind or another.
2207 *
2208 * out:
2209 * return value: success or failure
2210 * toc_kind: kind of toc reference
2211 * input_line_pointer:
2212 * success: first char after the ']'
2213 * failure: unchanged
2214 *
2215 * settings:
2216 *
2217 * [toc] - rv == success, toc_kind = default_toc
2218 * [tocv] - rv == success, toc_kind = data_in_toc
2219 * [toc32] - rv == success, toc_kind = must_be_32
2220 * [toc64] - rv == success, toc_kind = must_be_64
2221 *
2222 */
2223
2224 enum toc_size_qualifier
2225 {
2226 default_toc, /* The toc cell constructed should be the system default size */
2227 data_in_toc, /* This is a direct reference to a toc cell */
2228 must_be_32, /* The toc cell constructed must be 32 bits wide */
2229 must_be_64 /* The toc cell constructed must be 64 bits wide */
2230 };
2231
2232 static int
2233 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2234 {
2235 char *start;
2236 char *toc_spec;
2237 char c;
2238 enum toc_size_qualifier t;
2239
2240 /* Save the input_line_pointer. */
2241 start = input_line_pointer;
2242
2243 /* Skip over the '[' , and whitespace. */
2244 ++input_line_pointer;
2245 SKIP_WHITESPACE ();
2246
2247 /* Find the spelling of the operand. */
2248 toc_spec = input_line_pointer;
2249 c = get_symbol_end ();
2250
2251 if (strcmp (toc_spec, "toc") == 0)
2252 {
2253 t = default_toc;
2254 }
2255 else if (strcmp (toc_spec, "tocv") == 0)
2256 {
2257 t = data_in_toc;
2258 }
2259 else if (strcmp (toc_spec, "toc32") == 0)
2260 {
2261 t = must_be_32;
2262 }
2263 else if (strcmp (toc_spec, "toc64") == 0)
2264 {
2265 t = must_be_64;
2266 }
2267 else
2268 {
2269 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2270 *input_line_pointer = c;
2271 input_line_pointer = start;
2272 return 0;
2273 }
2274
2275 /* Now find the ']'. */
2276 *input_line_pointer = c;
2277
2278 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2279 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2280
2281 if (c != ']')
2282 {
2283 as_bad (_("syntax error: expected `]', found `%c'"), c);
2284 input_line_pointer = start;
2285 return 0;
2286 }
2287
2288 *toc_kind = t;
2289 return 1;
2290 }
2291 #endif
2292 \f
2293
2294 #ifdef OBJ_ELF
2295 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2296 static void
2297 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2298 {
2299 unsigned int i;
2300
2301 /* Check we don't already exist. */
2302 for (i = 0; i < ppc_apuinfo_num; i++)
2303 if (ppc_apuinfo_list[i] == APUID (apu, version))
2304 return;
2305
2306 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2307 {
2308 if (ppc_apuinfo_num_alloc == 0)
2309 {
2310 ppc_apuinfo_num_alloc = 4;
2311 ppc_apuinfo_list = (unsigned long *)
2312 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2313 }
2314 else
2315 {
2316 ppc_apuinfo_num_alloc += 4;
2317 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2318 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2319 }
2320 }
2321 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2322 }
2323 #undef APUID
2324 #endif
2325 \f
2326
2327 /* We need to keep a list of fixups. We can't simply generate them as
2328 we go, because that would require us to first create the frag, and
2329 that would screw up references to ``.''. */
2330
2331 struct ppc_fixup
2332 {
2333 expressionS exp;
2334 int opindex;
2335 bfd_reloc_code_real_type reloc;
2336 };
2337
2338 #define MAX_INSN_FIXUPS (5)
2339
2340 /* This routine is called for each instruction to be assembled. */
2341
2342 void
2343 md_assemble (char *str)
2344 {
2345 char *s;
2346 const struct powerpc_opcode *opcode;
2347 unsigned long insn;
2348 const unsigned char *opindex_ptr;
2349 int skip_optional;
2350 int need_paren;
2351 int next_opindex;
2352 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2353 int fc;
2354 char *f;
2355 int addr_mod;
2356 int i;
2357 #ifdef OBJ_ELF
2358 bfd_reloc_code_real_type reloc;
2359 #endif
2360
2361 /* Get the opcode. */
2362 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2363 ;
2364 if (*s != '\0')
2365 *s++ = '\0';
2366
2367 /* Look up the opcode in the hash table. */
2368 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2369 if (opcode == (const struct powerpc_opcode *) NULL)
2370 {
2371 const struct powerpc_macro *macro;
2372
2373 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2374 if (macro == (const struct powerpc_macro *) NULL)
2375 as_bad (_("Unrecognized opcode: `%s'"), str);
2376 else
2377 ppc_macro (s, macro);
2378
2379 return;
2380 }
2381
2382 insn = opcode->opcode;
2383
2384 str = s;
2385 while (ISSPACE (*str))
2386 ++str;
2387
2388 /* PowerPC operands are just expressions. The only real issue is
2389 that a few operand types are optional. All cases which might use
2390 an optional operand separate the operands only with commas (in some
2391 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2392 have optional operands). Most instructions with optional operands
2393 have only one. Those that have more than one optional operand can
2394 take either all their operands or none. So, before we start seriously
2395 parsing the operands, we check to see if we have optional operands,
2396 and if we do, we count the number of commas to see which operands
2397 have been omitted. */
2398 skip_optional = 0;
2399 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2400 {
2401 const struct powerpc_operand *operand;
2402
2403 operand = &powerpc_operands[*opindex_ptr];
2404 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2405 {
2406 unsigned int opcount;
2407 unsigned int num_operands_expected;
2408
2409 /* There is an optional operand. Count the number of
2410 commas in the input line. */
2411 if (*str == '\0')
2412 opcount = 0;
2413 else
2414 {
2415 opcount = 1;
2416 s = str;
2417 while ((s = strchr (s, ',')) != (char *) NULL)
2418 {
2419 ++opcount;
2420 ++s;
2421 }
2422 }
2423
2424 /* Compute the number of expected operands.
2425 Do not count fake operands. */
2426 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2427 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2428 ++ num_operands_expected;
2429
2430 /* If there are fewer operands in the line then are called
2431 for by the instruction, we want to skip the optional
2432 operands. */
2433 if (opcount < num_operands_expected)
2434 skip_optional = 1;
2435
2436 break;
2437 }
2438 }
2439
2440 /* Gather the operands. */
2441 need_paren = 0;
2442 next_opindex = 0;
2443 fc = 0;
2444 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2445 {
2446 const struct powerpc_operand *operand;
2447 const char *errmsg;
2448 char *hold;
2449 expressionS ex;
2450 char endc;
2451
2452 if (next_opindex == 0)
2453 operand = &powerpc_operands[*opindex_ptr];
2454 else
2455 {
2456 operand = &powerpc_operands[next_opindex];
2457 next_opindex = 0;
2458 }
2459 errmsg = NULL;
2460
2461 /* If this is a fake operand, then we do not expect anything
2462 from the input. */
2463 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2464 {
2465 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2466 if (errmsg != (const char *) NULL)
2467 as_bad ("%s", errmsg);
2468 continue;
2469 }
2470
2471 /* If this is an optional operand, and we are skipping it, just
2472 insert a zero. */
2473 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2474 && skip_optional)
2475 {
2476 if (operand->insert)
2477 {
2478 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2479 if (errmsg != (const char *) NULL)
2480 as_bad ("%s", errmsg);
2481 }
2482 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2483 next_opindex = *opindex_ptr + 1;
2484 continue;
2485 }
2486
2487 /* Gather the operand. */
2488 hold = input_line_pointer;
2489 input_line_pointer = str;
2490
2491 #ifdef TE_PE
2492 if (*input_line_pointer == '[')
2493 {
2494 /* We are expecting something like the second argument here:
2495 *
2496 * lwz r4,[toc].GS.0.static_int(rtoc)
2497 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2498 * The argument following the `]' must be a symbol name, and the
2499 * register must be the toc register: 'rtoc' or '2'
2500 *
2501 * The effect is to 0 as the displacement field
2502 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2503 * the appropriate variation) reloc against it based on the symbol.
2504 * The linker will build the toc, and insert the resolved toc offset.
2505 *
2506 * Note:
2507 * o The size of the toc entry is currently assumed to be
2508 * 32 bits. This should not be assumed to be a hard coded
2509 * number.
2510 * o In an effort to cope with a change from 32 to 64 bits,
2511 * there are also toc entries that are specified to be
2512 * either 32 or 64 bits:
2513 * lwz r4,[toc32].GS.0.static_int(rtoc)
2514 * lwz r4,[toc64].GS.0.static_int(rtoc)
2515 * These demand toc entries of the specified size, and the
2516 * instruction probably requires it.
2517 */
2518
2519 int valid_toc;
2520 enum toc_size_qualifier toc_kind;
2521 bfd_reloc_code_real_type toc_reloc;
2522
2523 /* Go parse off the [tocXX] part. */
2524 valid_toc = parse_toc_entry (&toc_kind);
2525
2526 if (!valid_toc)
2527 {
2528 /* Note: message has already been issued.
2529 FIXME: what sort of recovery should we do?
2530 demand_rest_of_line (); return; ? */
2531 }
2532
2533 /* Now get the symbol following the ']'. */
2534 expression (&ex);
2535
2536 switch (toc_kind)
2537 {
2538 case default_toc:
2539 /* In this case, we may not have seen the symbol yet,
2540 since it is allowed to appear on a .extern or .globl
2541 or just be a label in the .data section. */
2542 toc_reloc = BFD_RELOC_PPC_TOC16;
2543 break;
2544 case data_in_toc:
2545 /* 1. The symbol must be defined and either in the toc
2546 section, or a global.
2547 2. The reloc generated must have the TOCDEFN flag set
2548 in upper bit mess of the reloc type.
2549 FIXME: It's a little confusing what the tocv
2550 qualifier can be used for. At the very least, I've
2551 seen three uses, only one of which I'm sure I can
2552 explain. */
2553 if (ex.X_op == O_symbol)
2554 {
2555 gas_assert (ex.X_add_symbol != NULL);
2556 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2557 != tocdata_section)
2558 {
2559 as_bad (_("[tocv] symbol is not a toc symbol"));
2560 }
2561 }
2562
2563 toc_reloc = BFD_RELOC_PPC_TOC16;
2564 break;
2565 case must_be_32:
2566 /* FIXME: these next two specifically specify 32/64 bit
2567 toc entries. We don't support them today. Is this
2568 the right way to say that? */
2569 toc_reloc = BFD_RELOC_UNUSED;
2570 as_bad (_("Unimplemented toc32 expression modifier"));
2571 break;
2572 case must_be_64:
2573 /* FIXME: see above. */
2574 toc_reloc = BFD_RELOC_UNUSED;
2575 as_bad (_("Unimplemented toc64 expression modifier"));
2576 break;
2577 default:
2578 fprintf (stderr,
2579 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2580 toc_kind);
2581 abort ();
2582 break;
2583 }
2584
2585 /* We need to generate a fixup for this expression. */
2586 if (fc >= MAX_INSN_FIXUPS)
2587 as_fatal (_("too many fixups"));
2588
2589 fixups[fc].reloc = toc_reloc;
2590 fixups[fc].exp = ex;
2591 fixups[fc].opindex = *opindex_ptr;
2592 ++fc;
2593
2594 /* Ok. We've set up the fixup for the instruction. Now make it
2595 look like the constant 0 was found here. */
2596 ex.X_unsigned = 1;
2597 ex.X_op = O_constant;
2598 ex.X_add_number = 0;
2599 ex.X_add_symbol = NULL;
2600 ex.X_op_symbol = NULL;
2601 }
2602
2603 else
2604 #endif /* TE_PE */
2605 {
2606 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2607 || !register_name (&ex))
2608 {
2609 char save_lex = lex_type['%'];
2610
2611 if ((operand->flags & PPC_OPERAND_CR) != 0)
2612 {
2613 cr_operand = TRUE;
2614 lex_type['%'] |= LEX_BEGIN_NAME;
2615 }
2616 expression (&ex);
2617 cr_operand = FALSE;
2618 lex_type['%'] = save_lex;
2619 }
2620 }
2621
2622 str = input_line_pointer;
2623 input_line_pointer = hold;
2624
2625 if (ex.X_op == O_illegal)
2626 as_bad (_("illegal operand"));
2627 else if (ex.X_op == O_absent)
2628 as_bad (_("missing operand"));
2629 else if (ex.X_op == O_register)
2630 {
2631 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2632 ppc_cpu, (char *) NULL, 0);
2633 }
2634 else if (ex.X_op == O_constant)
2635 {
2636 #ifdef OBJ_ELF
2637 /* Allow @HA, @L, @H on constants. */
2638 char *orig_str = str;
2639
2640 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2641 switch (reloc)
2642 {
2643 default:
2644 str = orig_str;
2645 break;
2646
2647 case BFD_RELOC_LO16:
2648 /* X_unsigned is the default, so if the user has done
2649 something which cleared it, we always produce a
2650 signed value. */
2651 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2652 ex.X_add_number &= 0xffff;
2653 else
2654 ex.X_add_number = SEX16 (ex.X_add_number);
2655 break;
2656
2657 case BFD_RELOC_HI16:
2658 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2659 ex.X_add_number = PPC_HI (ex.X_add_number);
2660 else
2661 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
2662 break;
2663
2664 case BFD_RELOC_HI16_S:
2665 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2666 ex.X_add_number = PPC_HA (ex.X_add_number);
2667 else
2668 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2669 break;
2670
2671 case BFD_RELOC_PPC64_HIGHER:
2672 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2673 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2674 else
2675 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2676 break;
2677
2678 case BFD_RELOC_PPC64_HIGHER_S:
2679 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2680 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2681 else
2682 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
2683 break;
2684
2685 case BFD_RELOC_PPC64_HIGHEST:
2686 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2687 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2688 else
2689 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2690 break;
2691
2692 case BFD_RELOC_PPC64_HIGHEST_S:
2693 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2694 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2695 else
2696 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2697 break;
2698 }
2699 #endif /* OBJ_ELF */
2700 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2701 ppc_cpu, (char *) NULL, 0);
2702 }
2703 #ifdef OBJ_ELF
2704 else
2705 {
2706 if (ex.X_op == O_symbol && str[0] == '(')
2707 {
2708 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2709 if (sym_name[0] == '.')
2710 ++sym_name;
2711
2712 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
2713 {
2714 expressionS tls_exp;
2715
2716 hold = input_line_pointer;
2717 input_line_pointer = str + 1;
2718 expression (&tls_exp);
2719 if (tls_exp.X_op == O_symbol)
2720 {
2721 reloc = BFD_RELOC_UNUSED;
2722 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2723 {
2724 reloc = BFD_RELOC_PPC_TLSGD;
2725 input_line_pointer += 7;
2726 }
2727 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2728 {
2729 reloc = BFD_RELOC_PPC_TLSLD;
2730 input_line_pointer += 7;
2731 }
2732 if (reloc != BFD_RELOC_UNUSED)
2733 {
2734 SKIP_WHITESPACE ();
2735 str = input_line_pointer;
2736
2737 if (fc >= MAX_INSN_FIXUPS)
2738 as_fatal (_("too many fixups"));
2739 fixups[fc].exp = tls_exp;
2740 fixups[fc].opindex = *opindex_ptr;
2741 fixups[fc].reloc = reloc;
2742 ++fc;
2743 }
2744 }
2745 input_line_pointer = hold;
2746 }
2747 }
2748
2749 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2750 {
2751 /* Some TLS tweaks. */
2752 switch (reloc)
2753 {
2754 default:
2755 break;
2756
2757 case BFD_RELOC_PPC_TLS:
2758 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2759 as_bad (_("@tls may not be used with \"%s\" operands"),
2760 opcode->name);
2761 else if (operand->shift != 11)
2762 as_bad (_("@tls may only be used in last operand"));
2763 else
2764 insn = ppc_insert_operand (insn, operand,
2765 ppc_obj64 ? 13 : 2,
2766 ppc_cpu, (char *) NULL, 0);
2767 break;
2768
2769 /* We'll only use the 32 (or 64) bit form of these relocations
2770 in constants. Instructions get the 16 bit form. */
2771 case BFD_RELOC_PPC_DTPREL:
2772 reloc = BFD_RELOC_PPC_DTPREL16;
2773 break;
2774 case BFD_RELOC_PPC_TPREL:
2775 reloc = BFD_RELOC_PPC_TPREL16;
2776 break;
2777 }
2778
2779 /* For the absolute forms of branches, convert the PC
2780 relative form back into the absolute. */
2781 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2782 {
2783 switch (reloc)
2784 {
2785 case BFD_RELOC_PPC_B26:
2786 reloc = BFD_RELOC_PPC_BA26;
2787 break;
2788 case BFD_RELOC_PPC_B16:
2789 reloc = BFD_RELOC_PPC_BA16;
2790 break;
2791 case BFD_RELOC_PPC_B16_BRTAKEN:
2792 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2793 break;
2794 case BFD_RELOC_PPC_B16_BRNTAKEN:
2795 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2796 break;
2797 default:
2798 break;
2799 }
2800 }
2801
2802 switch (reloc)
2803 {
2804 case BFD_RELOC_PPC_TOC16:
2805 toc_reloc_types |= has_small_toc_reloc;
2806 break;
2807 case BFD_RELOC_PPC64_TOC16_LO:
2808 case BFD_RELOC_PPC64_TOC16_HI:
2809 case BFD_RELOC_PPC64_TOC16_HA:
2810 toc_reloc_types |= has_large_toc_reloc;
2811 break;
2812 default:
2813 break;
2814 }
2815
2816 if (ppc_obj64
2817 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2818 {
2819 switch (reloc)
2820 {
2821 case BFD_RELOC_16:
2822 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2823 break;
2824 case BFD_RELOC_LO16:
2825 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2826 break;
2827 case BFD_RELOC_16_GOTOFF:
2828 reloc = BFD_RELOC_PPC64_GOT16_DS;
2829 break;
2830 case BFD_RELOC_LO16_GOTOFF:
2831 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2832 break;
2833 case BFD_RELOC_LO16_PLTOFF:
2834 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2835 break;
2836 case BFD_RELOC_16_BASEREL:
2837 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2838 break;
2839 case BFD_RELOC_LO16_BASEREL:
2840 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2841 break;
2842 case BFD_RELOC_PPC_TOC16:
2843 reloc = BFD_RELOC_PPC64_TOC16_DS;
2844 break;
2845 case BFD_RELOC_PPC64_TOC16_LO:
2846 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2847 break;
2848 case BFD_RELOC_PPC64_PLTGOT16:
2849 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2850 break;
2851 case BFD_RELOC_PPC64_PLTGOT16_LO:
2852 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2853 break;
2854 case BFD_RELOC_PPC_DTPREL16:
2855 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2856 break;
2857 case BFD_RELOC_PPC_DTPREL16_LO:
2858 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2859 break;
2860 case BFD_RELOC_PPC_TPREL16:
2861 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2862 break;
2863 case BFD_RELOC_PPC_TPREL16_LO:
2864 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2865 break;
2866 case BFD_RELOC_PPC_GOT_DTPREL16:
2867 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2868 case BFD_RELOC_PPC_GOT_TPREL16:
2869 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2870 break;
2871 default:
2872 as_bad (_("unsupported relocation for DS offset field"));
2873 break;
2874 }
2875 }
2876 }
2877
2878 /* We need to generate a fixup for this expression. */
2879 if (fc >= MAX_INSN_FIXUPS)
2880 as_fatal (_("too many fixups"));
2881 fixups[fc].exp = ex;
2882 fixups[fc].opindex = *opindex_ptr;
2883 fixups[fc].reloc = reloc;
2884 ++fc;
2885 }
2886 #else /* OBJ_ELF */
2887 else
2888 {
2889 /* We need to generate a fixup for this expression. */
2890 if (fc >= MAX_INSN_FIXUPS)
2891 as_fatal (_("too many fixups"));
2892 fixups[fc].exp = ex;
2893 fixups[fc].opindex = *opindex_ptr;
2894 fixups[fc].reloc = BFD_RELOC_UNUSED;
2895 ++fc;
2896 }
2897 #endif /* OBJ_ELF */
2898
2899 if (need_paren)
2900 {
2901 endc = ')';
2902 need_paren = 0;
2903 /* If expecting more operands, then we want to see "),". */
2904 if (*str == endc && opindex_ptr[1] != 0)
2905 {
2906 do
2907 ++str;
2908 while (ISSPACE (*str));
2909 endc = ',';
2910 }
2911 }
2912 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2913 {
2914 endc = '(';
2915 need_paren = 1;
2916 }
2917 else
2918 endc = ',';
2919
2920 /* The call to expression should have advanced str past any
2921 whitespace. */
2922 if (*str != endc
2923 && (endc != ',' || *str != '\0'))
2924 {
2925 if (*str == '\0')
2926 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2927 else
2928 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
2929 break;
2930 }
2931
2932 if (*str != '\0')
2933 ++str;
2934 }
2935
2936 while (ISSPACE (*str))
2937 ++str;
2938
2939 if (*str != '\0')
2940 as_bad (_("junk at end of line: `%s'"), str);
2941
2942 #ifdef OBJ_ELF
2943 /* Do we need/want a APUinfo section? */
2944 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
2945 {
2946 /* These are all version "1". */
2947 if (opcode->flags & PPC_OPCODE_SPE)
2948 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
2949 if (opcode->flags & PPC_OPCODE_ISEL)
2950 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
2951 if (opcode->flags & PPC_OPCODE_EFS)
2952 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
2953 if (opcode->flags & PPC_OPCODE_BRLOCK)
2954 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
2955 if (opcode->flags & PPC_OPCODE_PMR)
2956 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
2957 if (opcode->flags & PPC_OPCODE_CACHELCK)
2958 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
2959 if (opcode->flags & PPC_OPCODE_RFMCI)
2960 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
2961 }
2962 #endif
2963
2964 /* Write out the instruction. */
2965 f = frag_more (4);
2966 addr_mod = frag_now_fix () & 3;
2967 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2968 as_bad (_("instruction address is not a multiple of 4"));
2969 frag_now->insn_addr = addr_mod;
2970 frag_now->has_code = 1;
2971 md_number_to_chars (f, insn, 4);
2972
2973 #ifdef OBJ_ELF
2974 dwarf2_emit_insn (4);
2975 #endif
2976
2977 /* Create any fixups. At this point we do not use a
2978 bfd_reloc_code_real_type, but instead just use the
2979 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2980 handle fixups for any operand type, although that is admittedly
2981 not a very exciting feature. We pick a BFD reloc type in
2982 md_apply_fix. */
2983 for (i = 0; i < fc; i++)
2984 {
2985 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2986 {
2987 reloc_howto_type *reloc_howto;
2988 int size;
2989 int offset;
2990 fixS *fixP;
2991
2992 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
2993 if (!reloc_howto)
2994 abort ();
2995
2996 size = bfd_get_reloc_size (reloc_howto);
2997 offset = target_big_endian ? (4 - size) : 0;
2998
2999 if (size < 1 || size > 4)
3000 abort ();
3001
3002 fixP = fix_new_exp (frag_now,
3003 f - frag_now->fr_literal + offset,
3004 size,
3005 &fixups[i].exp,
3006 reloc_howto->pc_relative,
3007 fixups[i].reloc);
3008
3009 /* Turn off complaints that the addend is too large for things like
3010 foo+100000@ha. */
3011 switch (fixups[i].reloc)
3012 {
3013 case BFD_RELOC_16_GOTOFF:
3014 case BFD_RELOC_PPC_TOC16:
3015 case BFD_RELOC_LO16:
3016 case BFD_RELOC_HI16:
3017 case BFD_RELOC_HI16_S:
3018 #ifdef OBJ_ELF
3019 case BFD_RELOC_PPC64_HIGHER:
3020 case BFD_RELOC_PPC64_HIGHER_S:
3021 case BFD_RELOC_PPC64_HIGHEST:
3022 case BFD_RELOC_PPC64_HIGHEST_S:
3023 #endif
3024 fixP->fx_no_overflow = 1;
3025 break;
3026 default:
3027 break;
3028 }
3029 }
3030 else
3031 {
3032 const struct powerpc_operand *operand;
3033
3034 operand = &powerpc_operands[fixups[i].opindex];
3035 fix_new_exp (frag_now,
3036 f - frag_now->fr_literal,
3037 4,
3038 &fixups[i].exp,
3039 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3040 ((bfd_reloc_code_real_type)
3041 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3042 }
3043 }
3044 }
3045
3046 /* Handle a macro. Gather all the operands, transform them as
3047 described by the macro, and call md_assemble recursively. All the
3048 operands are separated by commas; we don't accept parentheses
3049 around operands here. */
3050
3051 static void
3052 ppc_macro (char *str, const struct powerpc_macro *macro)
3053 {
3054 char *operands[10];
3055 unsigned int count;
3056 char *s;
3057 unsigned int len;
3058 const char *format;
3059 unsigned int arg;
3060 char *send;
3061 char *complete;
3062
3063 /* Gather the users operands into the operands array. */
3064 count = 0;
3065 s = str;
3066 while (1)
3067 {
3068 if (count >= sizeof operands / sizeof operands[0])
3069 break;
3070 operands[count++] = s;
3071 s = strchr (s, ',');
3072 if (s == (char *) NULL)
3073 break;
3074 *s++ = '\0';
3075 }
3076
3077 if (count != macro->operands)
3078 {
3079 as_bad (_("wrong number of operands"));
3080 return;
3081 }
3082
3083 /* Work out how large the string must be (the size is unbounded
3084 because it includes user input). */
3085 len = 0;
3086 format = macro->format;
3087 while (*format != '\0')
3088 {
3089 if (*format != '%')
3090 {
3091 ++len;
3092 ++format;
3093 }
3094 else
3095 {
3096 arg = strtol (format + 1, &send, 10);
3097 know (send != format && arg < count);
3098 len += strlen (operands[arg]);
3099 format = send;
3100 }
3101 }
3102
3103 /* Put the string together. */
3104 complete = s = (char *) alloca (len + 1);
3105 format = macro->format;
3106 while (*format != '\0')
3107 {
3108 if (*format != '%')
3109 *s++ = *format++;
3110 else
3111 {
3112 arg = strtol (format + 1, &send, 10);
3113 strcpy (s, operands[arg]);
3114 s += strlen (s);
3115 format = send;
3116 }
3117 }
3118 *s = '\0';
3119
3120 /* Assemble the constructed instruction. */
3121 md_assemble (complete);
3122 }
3123 \f
3124 #ifdef OBJ_ELF
3125 /* For ELF, add support for SHT_ORDERED. */
3126
3127 int
3128 ppc_section_type (char *str, size_t len)
3129 {
3130 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3131 return SHT_ORDERED;
3132
3133 return -1;
3134 }
3135
3136 int
3137 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3138 {
3139 if (type == SHT_ORDERED)
3140 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3141
3142 return flags;
3143 }
3144 #endif /* OBJ_ELF */
3145
3146 \f
3147 /* Pseudo-op handling. */
3148
3149 /* The .byte pseudo-op. This is similar to the normal .byte
3150 pseudo-op, but it can also take a single ASCII string. */
3151
3152 static void
3153 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3154 {
3155 if (*input_line_pointer != '\"')
3156 {
3157 cons (1);
3158 return;
3159 }
3160
3161 /* Gather characters. A real double quote is doubled. Unusual
3162 characters are not permitted. */
3163 ++input_line_pointer;
3164 while (1)
3165 {
3166 char c;
3167
3168 c = *input_line_pointer++;
3169
3170 if (c == '\"')
3171 {
3172 if (*input_line_pointer != '\"')
3173 break;
3174 ++input_line_pointer;
3175 }
3176
3177 FRAG_APPEND_1_CHAR (c);
3178 }
3179
3180 demand_empty_rest_of_line ();
3181 }
3182 \f
3183 #ifdef OBJ_XCOFF
3184
3185 /* XCOFF specific pseudo-op handling. */
3186
3187 /* This is set if we are creating a .stabx symbol, since we don't want
3188 to handle symbol suffixes for such symbols. */
3189 static bfd_boolean ppc_stab_symbol;
3190
3191 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3192 symbols in the .bss segment as though they were local common
3193 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3194 aligns .comm and .lcomm to 4 bytes. */
3195
3196 static void
3197 ppc_comm (int lcomm)
3198 {
3199 asection *current_seg = now_seg;
3200 subsegT current_subseg = now_subseg;
3201 char *name;
3202 char endc;
3203 char *end_name;
3204 offsetT size;
3205 offsetT align;
3206 symbolS *lcomm_sym = NULL;
3207 symbolS *sym;
3208 char *pfrag;
3209
3210 name = input_line_pointer;
3211 endc = get_symbol_end ();
3212 end_name = input_line_pointer;
3213 *end_name = endc;
3214
3215 if (*input_line_pointer != ',')
3216 {
3217 as_bad (_("missing size"));
3218 ignore_rest_of_line ();
3219 return;
3220 }
3221 ++input_line_pointer;
3222
3223 size = get_absolute_expression ();
3224 if (size < 0)
3225 {
3226 as_bad (_("negative size"));
3227 ignore_rest_of_line ();
3228 return;
3229 }
3230
3231 if (! lcomm)
3232 {
3233 /* The third argument to .comm is the alignment. */
3234 if (*input_line_pointer != ',')
3235 align = 2;
3236 else
3237 {
3238 ++input_line_pointer;
3239 align = get_absolute_expression ();
3240 if (align <= 0)
3241 {
3242 as_warn (_("ignoring bad alignment"));
3243 align = 2;
3244 }
3245 }
3246 }
3247 else
3248 {
3249 char *lcomm_name;
3250 char lcomm_endc;
3251
3252 if (size <= 4)
3253 align = 2;
3254 else
3255 align = 3;
3256
3257 /* The third argument to .lcomm appears to be the real local
3258 common symbol to create. References to the symbol named in
3259 the first argument are turned into references to the third
3260 argument. */
3261 if (*input_line_pointer != ',')
3262 {
3263 as_bad (_("missing real symbol name"));
3264 ignore_rest_of_line ();
3265 return;
3266 }
3267 ++input_line_pointer;
3268
3269 lcomm_name = input_line_pointer;
3270 lcomm_endc = get_symbol_end ();
3271
3272 lcomm_sym = symbol_find_or_make (lcomm_name);
3273
3274 *input_line_pointer = lcomm_endc;
3275 }
3276
3277 *end_name = '\0';
3278 sym = symbol_find_or_make (name);
3279 *end_name = endc;
3280
3281 if (S_IS_DEFINED (sym)
3282 || S_GET_VALUE (sym) != 0)
3283 {
3284 as_bad (_("attempt to redefine symbol"));
3285 ignore_rest_of_line ();
3286 return;
3287 }
3288
3289 record_alignment (bss_section, align);
3290
3291 if (! lcomm
3292 || ! S_IS_DEFINED (lcomm_sym))
3293 {
3294 symbolS *def_sym;
3295 offsetT def_size;
3296
3297 if (! lcomm)
3298 {
3299 def_sym = sym;
3300 def_size = size;
3301 S_SET_EXTERNAL (sym);
3302 }
3303 else
3304 {
3305 symbol_get_tc (lcomm_sym)->output = 1;
3306 def_sym = lcomm_sym;
3307 def_size = 0;
3308 }
3309
3310 subseg_set (bss_section, 1);
3311 frag_align (align, 0, 0);
3312
3313 symbol_set_frag (def_sym, frag_now);
3314 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3315 def_size, (char *) NULL);
3316 *pfrag = 0;
3317 S_SET_SEGMENT (def_sym, bss_section);
3318 symbol_get_tc (def_sym)->align = align;
3319 }
3320 else if (lcomm)
3321 {
3322 /* Align the size of lcomm_sym. */
3323 symbol_get_frag (lcomm_sym)->fr_offset =
3324 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3325 &~ ((1 << align) - 1));
3326 if (align > symbol_get_tc (lcomm_sym)->align)
3327 symbol_get_tc (lcomm_sym)->align = align;
3328 }
3329
3330 if (lcomm)
3331 {
3332 /* Make sym an offset from lcomm_sym. */
3333 S_SET_SEGMENT (sym, bss_section);
3334 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3335 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3336 symbol_get_frag (lcomm_sym)->fr_offset += size;
3337 }
3338
3339 subseg_set (current_seg, current_subseg);
3340
3341 demand_empty_rest_of_line ();
3342 }
3343
3344 /* The .csect pseudo-op. This switches us into a different
3345 subsegment. The first argument is a symbol whose value is the
3346 start of the .csect. In COFF, csect symbols get special aux
3347 entries defined by the x_csect field of union internal_auxent. The
3348 optional second argument is the alignment (the default is 2). */
3349
3350 static void
3351 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3352 {
3353 char *name;
3354 char endc;
3355 symbolS *sym;
3356 offsetT align;
3357
3358 name = input_line_pointer;
3359 endc = get_symbol_end ();
3360
3361 sym = symbol_find_or_make (name);
3362
3363 *input_line_pointer = endc;
3364
3365 if (S_GET_NAME (sym)[0] == '\0')
3366 {
3367 /* An unnamed csect is assumed to be [PR]. */
3368 symbol_get_tc (sym)->symbol_class = XMC_PR;
3369 }
3370
3371 align = 2;
3372 if (*input_line_pointer == ',')
3373 {
3374 ++input_line_pointer;
3375 align = get_absolute_expression ();
3376 }
3377
3378 ppc_change_csect (sym, align);
3379
3380 demand_empty_rest_of_line ();
3381 }
3382
3383 /* Change to a different csect. */
3384
3385 static void
3386 ppc_change_csect (symbolS *sym, offsetT align)
3387 {
3388 if (S_IS_DEFINED (sym))
3389 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3390 else
3391 {
3392 symbolS **list_ptr;
3393 int after_toc;
3394 int hold_chunksize;
3395 symbolS *list;
3396 int is_code;
3397 segT sec;
3398
3399 /* This is a new csect. We need to look at the symbol class to
3400 figure out whether it should go in the text section or the
3401 data section. */
3402 after_toc = 0;
3403 is_code = 0;
3404 switch (symbol_get_tc (sym)->symbol_class)
3405 {
3406 case XMC_PR:
3407 case XMC_RO:
3408 case XMC_DB:
3409 case XMC_GL:
3410 case XMC_XO:
3411 case XMC_SV:
3412 case XMC_TI:
3413 case XMC_TB:
3414 S_SET_SEGMENT (sym, text_section);
3415 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3416 ++ppc_text_subsegment;
3417 list_ptr = &ppc_text_csects;
3418 is_code = 1;
3419 break;
3420 case XMC_RW:
3421 case XMC_TC0:
3422 case XMC_TC:
3423 case XMC_DS:
3424 case XMC_UA:
3425 case XMC_BS:
3426 case XMC_UC:
3427 if (ppc_toc_csect != NULL
3428 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3429 == ppc_data_subsegment))
3430 after_toc = 1;
3431 S_SET_SEGMENT (sym, data_section);
3432 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3433 ++ppc_data_subsegment;
3434 list_ptr = &ppc_data_csects;
3435 break;
3436 default:
3437 abort ();
3438 }
3439
3440 /* We set the obstack chunk size to a small value before
3441 changing subsegments, so that we don't use a lot of memory
3442 space for what may be a small section. */
3443 hold_chunksize = chunksize;
3444 chunksize = 64;
3445
3446 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3447 symbol_get_tc (sym)->subseg);
3448
3449 chunksize = hold_chunksize;
3450
3451 if (after_toc)
3452 ppc_after_toc_frag = frag_now;
3453
3454 record_alignment (sec, align);
3455 if (is_code)
3456 frag_align_code (align, 0);
3457 else
3458 frag_align (align, 0, 0);
3459
3460 symbol_set_frag (sym, frag_now);
3461 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3462
3463 symbol_get_tc (sym)->align = align;
3464 symbol_get_tc (sym)->output = 1;
3465 symbol_get_tc (sym)->within = sym;
3466
3467 for (list = *list_ptr;
3468 symbol_get_tc (list)->next != (symbolS *) NULL;
3469 list = symbol_get_tc (list)->next)
3470 ;
3471 symbol_get_tc (list)->next = sym;
3472
3473 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3474 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3475 &symbol_lastP);
3476 }
3477
3478 ppc_current_csect = sym;
3479 }
3480
3481 /* This function handles the .text and .data pseudo-ops. These
3482 pseudo-ops aren't really used by XCOFF; we implement them for the
3483 convenience of people who aren't used to XCOFF. */
3484
3485 static void
3486 ppc_section (int type)
3487 {
3488 const char *name;
3489 symbolS *sym;
3490
3491 if (type == 't')
3492 name = ".text[PR]";
3493 else if (type == 'd')
3494 name = ".data[RW]";
3495 else
3496 abort ();
3497
3498 sym = symbol_find_or_make (name);
3499
3500 ppc_change_csect (sym, 2);
3501
3502 demand_empty_rest_of_line ();
3503 }
3504
3505 /* This function handles the .section pseudo-op. This is mostly to
3506 give an error, since XCOFF only supports .text, .data and .bss, but
3507 we do permit the user to name the text or data section. */
3508
3509 static void
3510 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
3511 {
3512 char *user_name;
3513 const char *real_name;
3514 char c;
3515 symbolS *sym;
3516
3517 user_name = input_line_pointer;
3518 c = get_symbol_end ();
3519
3520 if (strcmp (user_name, ".text") == 0)
3521 real_name = ".text[PR]";
3522 else if (strcmp (user_name, ".data") == 0)
3523 real_name = ".data[RW]";
3524 else
3525 {
3526 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3527 *input_line_pointer = c;
3528 ignore_rest_of_line ();
3529 return;
3530 }
3531
3532 *input_line_pointer = c;
3533
3534 sym = symbol_find_or_make (real_name);
3535
3536 ppc_change_csect (sym, 2);
3537
3538 demand_empty_rest_of_line ();
3539 }
3540
3541 /* The .extern pseudo-op. We create an undefined symbol. */
3542
3543 static void
3544 ppc_extern (int ignore ATTRIBUTE_UNUSED)
3545 {
3546 char *name;
3547 char endc;
3548
3549 name = input_line_pointer;
3550 endc = get_symbol_end ();
3551
3552 (void) symbol_find_or_make (name);
3553
3554 *input_line_pointer = endc;
3555
3556 demand_empty_rest_of_line ();
3557 }
3558
3559 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3560
3561 static void
3562 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
3563 {
3564 char *name;
3565 char endc;
3566 symbolS *sym;
3567
3568 name = input_line_pointer;
3569 endc = get_symbol_end ();
3570
3571 sym = symbol_find_or_make (name);
3572
3573 *input_line_pointer = endc;
3574
3575 symbol_get_tc (sym)->output = 1;
3576
3577 demand_empty_rest_of_line ();
3578 }
3579
3580 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3581 relocations at the beginning of the current csect.
3582
3583 (In principle, there's no reason why the relocations _have_ to be at
3584 the beginning. Anywhere in the csect would do. However, inserting
3585 at the beginning is what the native assmebler does, and it helps to
3586 deal with cases where the .ref statements follow the section contents.)
3587
3588 ??? .refs don't work for empty .csects. However, the native assembler
3589 doesn't report an error in this case, and neither yet do we. */
3590
3591 static void
3592 ppc_ref (int ignore ATTRIBUTE_UNUSED)
3593 {
3594 char *name;
3595 char c;
3596
3597 if (ppc_current_csect == NULL)
3598 {
3599 as_bad (_(".ref outside .csect"));
3600 ignore_rest_of_line ();
3601 return;
3602 }
3603
3604 do
3605 {
3606 name = input_line_pointer;
3607 c = get_symbol_end ();
3608
3609 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3610 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3611
3612 *input_line_pointer = c;
3613 SKIP_WHITESPACE ();
3614 c = *input_line_pointer;
3615 if (c == ',')
3616 {
3617 input_line_pointer++;
3618 SKIP_WHITESPACE ();
3619 if (is_end_of_line[(unsigned char) *input_line_pointer])
3620 {
3621 as_bad (_("missing symbol name"));
3622 ignore_rest_of_line ();
3623 return;
3624 }
3625 }
3626 }
3627 while (c == ',');
3628
3629 demand_empty_rest_of_line ();
3630 }
3631
3632 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3633 although I don't know why it bothers. */
3634
3635 static void
3636 ppc_rename (int ignore ATTRIBUTE_UNUSED)
3637 {
3638 char *name;
3639 char endc;
3640 symbolS *sym;
3641 int len;
3642
3643 name = input_line_pointer;
3644 endc = get_symbol_end ();
3645
3646 sym = symbol_find_or_make (name);
3647
3648 *input_line_pointer = endc;
3649
3650 if (*input_line_pointer != ',')
3651 {
3652 as_bad (_("missing rename string"));
3653 ignore_rest_of_line ();
3654 return;
3655 }
3656 ++input_line_pointer;
3657
3658 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
3659
3660 demand_empty_rest_of_line ();
3661 }
3662
3663 /* The .stabx pseudo-op. This is similar to a normal .stabs
3664 pseudo-op, but slightly different. A sample is
3665 .stabx "main:F-1",.main,142,0
3666 The first argument is the symbol name to create. The second is the
3667 value, and the third is the storage class. The fourth seems to be
3668 always zero, and I am assuming it is the type. */
3669
3670 static void
3671 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
3672 {
3673 char *name;
3674 int len;
3675 symbolS *sym;
3676 expressionS exp;
3677
3678 name = demand_copy_C_string (&len);
3679
3680 if (*input_line_pointer != ',')
3681 {
3682 as_bad (_("missing value"));
3683 return;
3684 }
3685 ++input_line_pointer;
3686
3687 ppc_stab_symbol = TRUE;
3688 sym = symbol_make (name);
3689 ppc_stab_symbol = FALSE;
3690
3691 symbol_get_tc (sym)->real_name = name;
3692
3693 (void) expression (&exp);
3694
3695 switch (exp.X_op)
3696 {
3697 case O_illegal:
3698 case O_absent:
3699 case O_big:
3700 as_bad (_("illegal .stabx expression; zero assumed"));
3701 exp.X_add_number = 0;
3702 /* Fall through. */
3703 case O_constant:
3704 S_SET_VALUE (sym, (valueT) exp.X_add_number);
3705 symbol_set_frag (sym, &zero_address_frag);
3706 break;
3707
3708 case O_symbol:
3709 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
3710 symbol_set_value_expression (sym, &exp);
3711 else
3712 {
3713 S_SET_VALUE (sym,
3714 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
3715 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
3716 }
3717 break;
3718
3719 default:
3720 /* The value is some complex expression. This will probably
3721 fail at some later point, but this is probably the right
3722 thing to do here. */
3723 symbol_set_value_expression (sym, &exp);
3724 break;
3725 }
3726
3727 S_SET_SEGMENT (sym, ppc_coff_debug_section);
3728 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3729
3730 if (*input_line_pointer != ',')
3731 {
3732 as_bad (_("missing class"));
3733 return;
3734 }
3735 ++input_line_pointer;
3736
3737 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3738
3739 if (*input_line_pointer != ',')
3740 {
3741 as_bad (_("missing type"));
3742 return;
3743 }
3744 ++input_line_pointer;
3745
3746 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3747
3748 symbol_get_tc (sym)->output = 1;
3749
3750 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
3751
3752 symbol_get_tc (sym)->within = ppc_current_block;
3753
3754 /* In this case :
3755
3756 .bs name
3757 .stabx "z",arrays_,133,0
3758 .es
3759
3760 .comm arrays_,13768,3
3761
3762 resolve_symbol_value will copy the exp's "within" into sym's when the
3763 offset is 0. Since this seems to be corner case problem,
3764 only do the correction for storage class C_STSYM. A better solution
3765 would be to have the tc field updated in ppc_symbol_new_hook. */
3766
3767 if (exp.X_op == O_symbol)
3768 {
3769 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3770 }
3771 }
3772
3773 if (exp.X_op != O_symbol
3774 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3775 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3776 ppc_frob_label (sym);
3777 else
3778 {
3779 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3780 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
3781 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3782 symbol_get_tc (ppc_current_csect)->within = sym;
3783 }
3784
3785 demand_empty_rest_of_line ();
3786 }
3787
3788 /* The .function pseudo-op. This takes several arguments. The first
3789 argument seems to be the external name of the symbol. The second
3790 argument seems to be the label for the start of the function. gcc
3791 uses the same name for both. I have no idea what the third and
3792 fourth arguments are meant to be. The optional fifth argument is
3793 an expression for the size of the function. In COFF this symbol
3794 gets an aux entry like that used for a csect. */
3795
3796 static void
3797 ppc_function (int ignore ATTRIBUTE_UNUSED)
3798 {
3799 char *name;
3800 char endc;
3801 char *s;
3802 symbolS *ext_sym;
3803 symbolS *lab_sym;
3804
3805 name = input_line_pointer;
3806 endc = get_symbol_end ();
3807
3808 /* Ignore any [PR] suffix. */
3809 name = ppc_canonicalize_symbol_name (name);
3810 s = strchr (name, '[');
3811 if (s != (char *) NULL
3812 && strcmp (s + 1, "PR]") == 0)
3813 *s = '\0';
3814
3815 ext_sym = symbol_find_or_make (name);
3816
3817 *input_line_pointer = endc;
3818
3819 if (*input_line_pointer != ',')
3820 {
3821 as_bad (_("missing symbol name"));
3822 ignore_rest_of_line ();
3823 return;
3824 }
3825 ++input_line_pointer;
3826
3827 name = input_line_pointer;
3828 endc = get_symbol_end ();
3829
3830 lab_sym = symbol_find_or_make (name);
3831
3832 *input_line_pointer = endc;
3833
3834 if (ext_sym != lab_sym)
3835 {
3836 expressionS exp;
3837
3838 exp.X_op = O_symbol;
3839 exp.X_add_symbol = lab_sym;
3840 exp.X_op_symbol = NULL;
3841 exp.X_add_number = 0;
3842 exp.X_unsigned = 0;
3843 symbol_set_value_expression (ext_sym, &exp);
3844 }
3845
3846 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3847 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
3848 symbol_get_tc (ext_sym)->output = 1;
3849
3850 if (*input_line_pointer == ',')
3851 {
3852 expressionS exp;
3853
3854 /* Ignore the third argument. */
3855 ++input_line_pointer;
3856 expression (& exp);
3857 if (*input_line_pointer == ',')
3858 {
3859 /* Ignore the fourth argument. */
3860 ++input_line_pointer;
3861 expression (& exp);
3862 if (*input_line_pointer == ',')
3863 {
3864 /* The fifth argument is the function size. */
3865 ++input_line_pointer;
3866 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3867 absolute_section,
3868 (valueT) 0,
3869 &zero_address_frag);
3870 pseudo_set (symbol_get_tc (ext_sym)->size);
3871 }
3872 }
3873 }
3874
3875 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3876 SF_SET_FUNCTION (ext_sym);
3877 SF_SET_PROCESS (ext_sym);
3878 coff_add_linesym (ext_sym);
3879
3880 demand_empty_rest_of_line ();
3881 }
3882
3883 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
3884 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3885 with the correct line number */
3886
3887 static symbolS *saved_bi_sym = 0;
3888
3889 static void
3890 ppc_bf (int ignore ATTRIBUTE_UNUSED)
3891 {
3892 symbolS *sym;
3893
3894 sym = symbol_make (".bf");
3895 S_SET_SEGMENT (sym, text_section);
3896 symbol_set_frag (sym, frag_now);
3897 S_SET_VALUE (sym, frag_now_fix ());
3898 S_SET_STORAGE_CLASS (sym, C_FCN);
3899
3900 coff_line_base = get_absolute_expression ();
3901
3902 S_SET_NUMBER_AUXILIARY (sym, 1);
3903 SA_SET_SYM_LNNO (sym, coff_line_base);
3904
3905 /* Line number for bi. */
3906 if (saved_bi_sym)
3907 {
3908 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3909 saved_bi_sym = 0;
3910 }
3911
3912
3913 symbol_get_tc (sym)->output = 1;
3914
3915 ppc_frob_label (sym);
3916
3917 demand_empty_rest_of_line ();
3918 }
3919
3920 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3921 ".ef", except that the line number is absolute, not relative to the
3922 most recent ".bf" symbol. */
3923
3924 static void
3925 ppc_ef (int ignore ATTRIBUTE_UNUSED)
3926 {
3927 symbolS *sym;
3928
3929 sym = symbol_make (".ef");
3930 S_SET_SEGMENT (sym, text_section);
3931 symbol_set_frag (sym, frag_now);
3932 S_SET_VALUE (sym, frag_now_fix ());
3933 S_SET_STORAGE_CLASS (sym, C_FCN);
3934 S_SET_NUMBER_AUXILIARY (sym, 1);
3935 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3936 symbol_get_tc (sym)->output = 1;
3937
3938 ppc_frob_label (sym);
3939
3940 demand_empty_rest_of_line ();
3941 }
3942
3943 /* The .bi and .ei pseudo-ops. These take a string argument and
3944 generates a C_BINCL or C_EINCL symbol, which goes at the start of
3945 the symbol list. The value of .bi will be know when the next .bf
3946 is encountered. */
3947
3948 static void
3949 ppc_biei (int ei)
3950 {
3951 static symbolS *last_biei;
3952
3953 char *name;
3954 int len;
3955 symbolS *sym;
3956 symbolS *look;
3957
3958 name = demand_copy_C_string (&len);
3959
3960 /* The value of these symbols is actually file offset. Here we set
3961 the value to the index into the line number entries. In
3962 ppc_frob_symbols we set the fix_line field, which will cause BFD
3963 to do the right thing. */
3964
3965 sym = symbol_make (name);
3966 /* obj-coff.c currently only handles line numbers correctly in the
3967 .text section. */
3968 S_SET_SEGMENT (sym, text_section);
3969 S_SET_VALUE (sym, coff_n_line_nos);
3970 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3971
3972 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
3973 symbol_get_tc (sym)->output = 1;
3974
3975 /* Save bi. */
3976 if (ei)
3977 saved_bi_sym = 0;
3978 else
3979 saved_bi_sym = sym;
3980
3981 for (look = last_biei ? last_biei : symbol_rootP;
3982 (look != (symbolS *) NULL
3983 && (S_GET_STORAGE_CLASS (look) == C_FILE
3984 || S_GET_STORAGE_CLASS (look) == C_BINCL
3985 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3986 look = symbol_next (look))
3987 ;
3988 if (look != (symbolS *) NULL)
3989 {
3990 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3991 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3992 last_biei = sym;
3993 }
3994
3995 demand_empty_rest_of_line ();
3996 }
3997
3998 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3999 There is one argument, which is a csect symbol. The value of the
4000 .bs symbol is the index of this csect symbol. */
4001
4002 static void
4003 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4004 {
4005 char *name;
4006 char endc;
4007 symbolS *csect;
4008 symbolS *sym;
4009
4010 if (ppc_current_block != NULL)
4011 as_bad (_("nested .bs blocks"));
4012
4013 name = input_line_pointer;
4014 endc = get_symbol_end ();
4015
4016 csect = symbol_find_or_make (name);
4017
4018 *input_line_pointer = endc;
4019
4020 sym = symbol_make (".bs");
4021 S_SET_SEGMENT (sym, now_seg);
4022 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4023 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4024 symbol_get_tc (sym)->output = 1;
4025
4026 symbol_get_tc (sym)->within = csect;
4027
4028 ppc_frob_label (sym);
4029
4030 ppc_current_block = sym;
4031
4032 demand_empty_rest_of_line ();
4033 }
4034
4035 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4036
4037 static void
4038 ppc_es (int ignore ATTRIBUTE_UNUSED)
4039 {
4040 symbolS *sym;
4041
4042 if (ppc_current_block == NULL)
4043 as_bad (_(".es without preceding .bs"));
4044
4045 sym = symbol_make (".es");
4046 S_SET_SEGMENT (sym, now_seg);
4047 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4048 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4049 symbol_get_tc (sym)->output = 1;
4050
4051 ppc_frob_label (sym);
4052
4053 ppc_current_block = NULL;
4054
4055 demand_empty_rest_of_line ();
4056 }
4057
4058 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4059 line number. */
4060
4061 static void
4062 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4063 {
4064 symbolS *sym;
4065
4066 sym = symbol_make (".bb");
4067 S_SET_SEGMENT (sym, text_section);
4068 symbol_set_frag (sym, frag_now);
4069 S_SET_VALUE (sym, frag_now_fix ());
4070 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4071
4072 S_SET_NUMBER_AUXILIARY (sym, 1);
4073 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4074
4075 symbol_get_tc (sym)->output = 1;
4076
4077 SF_SET_PROCESS (sym);
4078
4079 ppc_frob_label (sym);
4080
4081 demand_empty_rest_of_line ();
4082 }
4083
4084 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4085 line number. */
4086
4087 static void
4088 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4089 {
4090 symbolS *sym;
4091
4092 sym = symbol_make (".eb");
4093 S_SET_SEGMENT (sym, text_section);
4094 symbol_set_frag (sym, frag_now);
4095 S_SET_VALUE (sym, frag_now_fix ());
4096 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4097 S_SET_NUMBER_AUXILIARY (sym, 1);
4098 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4099 symbol_get_tc (sym)->output = 1;
4100
4101 SF_SET_PROCESS (sym);
4102
4103 ppc_frob_label (sym);
4104
4105 demand_empty_rest_of_line ();
4106 }
4107
4108 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4109 specified name. */
4110
4111 static void
4112 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4113 {
4114 char *name;
4115 int len;
4116 symbolS *sym;
4117
4118 name = demand_copy_C_string (&len);
4119 sym = symbol_make (name);
4120 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4121 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4122 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4123 S_SET_VALUE (sym, 0);
4124 symbol_get_tc (sym)->output = 1;
4125
4126 ppc_frob_label (sym);
4127
4128 demand_empty_rest_of_line ();
4129 }
4130
4131 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4132
4133 static void
4134 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4135 {
4136 symbolS *sym;
4137
4138 sym = symbol_make (".ec");
4139 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4140 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4141 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4142 S_SET_VALUE (sym, 0);
4143 symbol_get_tc (sym)->output = 1;
4144
4145 ppc_frob_label (sym);
4146
4147 demand_empty_rest_of_line ();
4148 }
4149
4150 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4151
4152 static void
4153 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4154 {
4155 if (ppc_toc_csect != (symbolS *) NULL)
4156 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4157 else
4158 {
4159 subsegT subseg;
4160 symbolS *sym;
4161 symbolS *list;
4162
4163 subseg = ppc_data_subsegment;
4164 ++ppc_data_subsegment;
4165
4166 subseg_new (segment_name (data_section), subseg);
4167 ppc_toc_frag = frag_now;
4168
4169 sym = symbol_find_or_make ("TOC[TC0]");
4170 symbol_set_frag (sym, frag_now);
4171 S_SET_SEGMENT (sym, data_section);
4172 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4173 symbol_get_tc (sym)->subseg = subseg;
4174 symbol_get_tc (sym)->output = 1;
4175 symbol_get_tc (sym)->within = sym;
4176
4177 ppc_toc_csect = sym;
4178
4179 for (list = ppc_data_csects;
4180 symbol_get_tc (list)->next != (symbolS *) NULL;
4181 list = symbol_get_tc (list)->next)
4182 ;
4183 symbol_get_tc (list)->next = sym;
4184
4185 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4186 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4187 &symbol_lastP);
4188 }
4189
4190 ppc_current_csect = ppc_toc_csect;
4191
4192 demand_empty_rest_of_line ();
4193 }
4194
4195 /* The AIX assembler automatically aligns the operands of a .long or
4196 .short pseudo-op, and we want to be compatible. */
4197
4198 static void
4199 ppc_xcoff_cons (int log_size)
4200 {
4201 frag_align (log_size, 0, 0);
4202 record_alignment (now_seg, log_size);
4203 cons (1 << log_size);
4204 }
4205
4206 static void
4207 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4208 {
4209 expressionS exp;
4210 int byte_count;
4211
4212 (void) expression (&exp);
4213
4214 if (exp.X_op != O_constant)
4215 {
4216 as_bad (_("non-constant byte count"));
4217 return;
4218 }
4219
4220 byte_count = exp.X_add_number;
4221
4222 if (*input_line_pointer != ',')
4223 {
4224 as_bad (_("missing value"));
4225 return;
4226 }
4227
4228 ++input_line_pointer;
4229 cons (byte_count);
4230 }
4231
4232 #endif /* OBJ_XCOFF */
4233 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4234 \f
4235 /* The .tc pseudo-op. This is used when generating either XCOFF or
4236 ELF. This takes two or more arguments.
4237
4238 When generating XCOFF output, the first argument is the name to
4239 give to this location in the toc; this will be a symbol with class
4240 TC. The rest of the arguments are N-byte values to actually put at
4241 this location in the TOC; often there is just one more argument, a
4242 relocatable symbol reference. The size of the value to store
4243 depends on target word size. A 32-bit target uses 4-byte values, a
4244 64-bit target uses 8-byte values.
4245
4246 When not generating XCOFF output, the arguments are the same, but
4247 the first argument is simply ignored. */
4248
4249 static void
4250 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4251 {
4252 #ifdef OBJ_XCOFF
4253
4254 /* Define the TOC symbol name. */
4255 {
4256 char *name;
4257 char endc;
4258 symbolS *sym;
4259
4260 if (ppc_toc_csect == (symbolS *) NULL
4261 || ppc_toc_csect != ppc_current_csect)
4262 {
4263 as_bad (_(".tc not in .toc section"));
4264 ignore_rest_of_line ();
4265 return;
4266 }
4267
4268 name = input_line_pointer;
4269 endc = get_symbol_end ();
4270
4271 sym = symbol_find_or_make (name);
4272
4273 *input_line_pointer = endc;
4274
4275 if (S_IS_DEFINED (sym))
4276 {
4277 symbolS *label;
4278
4279 label = symbol_get_tc (ppc_current_csect)->within;
4280 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4281 {
4282 as_bad (_(".tc with no label"));
4283 ignore_rest_of_line ();
4284 return;
4285 }
4286
4287 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4288 symbol_set_frag (label, symbol_get_frag (sym));
4289 S_SET_VALUE (label, S_GET_VALUE (sym));
4290
4291 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4292 ++input_line_pointer;
4293
4294 return;
4295 }
4296
4297 S_SET_SEGMENT (sym, now_seg);
4298 symbol_set_frag (sym, frag_now);
4299 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4300 symbol_get_tc (sym)->symbol_class = XMC_TC;
4301 symbol_get_tc (sym)->output = 1;
4302
4303 ppc_frob_label (sym);
4304 }
4305
4306 #endif /* OBJ_XCOFF */
4307 #ifdef OBJ_ELF
4308 int align;
4309
4310 /* Skip the TOC symbol name. */
4311 while (is_part_of_name (*input_line_pointer)
4312 || *input_line_pointer == ' '
4313 || *input_line_pointer == '['
4314 || *input_line_pointer == ']'
4315 || *input_line_pointer == '{'
4316 || *input_line_pointer == '}')
4317 ++input_line_pointer;
4318
4319 /* Align to a four/eight byte boundary. */
4320 align = ppc_obj64 ? 3 : 2;
4321 frag_align (align, 0, 0);
4322 record_alignment (now_seg, align);
4323 #endif /* OBJ_ELF */
4324
4325 if (*input_line_pointer != ',')
4326 demand_empty_rest_of_line ();
4327 else
4328 {
4329 ++input_line_pointer;
4330 cons (ppc_obj64 ? 8 : 4);
4331 }
4332 }
4333
4334 /* Pseudo-op .machine. */
4335
4336 static void
4337 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4338 {
4339 char *cpu_string;
4340 #define MAX_HISTORY 100
4341 static ppc_cpu_t *cpu_history;
4342 static int curr_hist;
4343
4344 SKIP_WHITESPACE ();
4345
4346 if (*input_line_pointer == '"')
4347 {
4348 int len;
4349 cpu_string = demand_copy_C_string (&len);
4350 }
4351 else
4352 {
4353 char c;
4354 cpu_string = input_line_pointer;
4355 c = get_symbol_end ();
4356 cpu_string = xstrdup (cpu_string);
4357 *input_line_pointer = c;
4358 }
4359
4360 if (cpu_string != NULL)
4361 {
4362 ppc_cpu_t old_cpu = ppc_cpu;
4363 ppc_cpu_t new_cpu;
4364 char *p;
4365
4366 for (p = cpu_string; *p != 0; p++)
4367 *p = TOLOWER (*p);
4368
4369 if (strcmp (cpu_string, "push") == 0)
4370 {
4371 if (cpu_history == NULL)
4372 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4373
4374 if (curr_hist >= MAX_HISTORY)
4375 as_bad (_(".machine stack overflow"));
4376 else
4377 cpu_history[curr_hist++] = ppc_cpu;
4378 }
4379 else if (strcmp (cpu_string, "pop") == 0)
4380 {
4381 if (curr_hist <= 0)
4382 as_bad (_(".machine stack underflow"));
4383 else
4384 ppc_cpu = cpu_history[--curr_hist];
4385 }
4386 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4387 ppc_cpu = new_cpu;
4388 else
4389 as_bad (_("invalid machine `%s'"), cpu_string);
4390
4391 if (ppc_cpu != old_cpu)
4392 ppc_setup_opcodes ();
4393 }
4394
4395 demand_empty_rest_of_line ();
4396 }
4397
4398 /* See whether a symbol is in the TOC section. */
4399
4400 static int
4401 ppc_is_toc_sym (symbolS *sym)
4402 {
4403 #ifdef OBJ_XCOFF
4404 return symbol_get_tc (sym)->symbol_class == XMC_TC;
4405 #endif
4406 #ifdef OBJ_ELF
4407 const char *sname = segment_name (S_GET_SEGMENT (sym));
4408 if (ppc_obj64)
4409 return strcmp (sname, ".toc") == 0;
4410 else
4411 return strcmp (sname, ".got") == 0;
4412 #endif
4413 }
4414 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4415 \f
4416 #ifdef TE_PE
4417
4418 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4419
4420 /* Set the current section. */
4421 static void
4422 ppc_set_current_section (segT new)
4423 {
4424 ppc_previous_section = ppc_current_section;
4425 ppc_current_section = new;
4426 }
4427
4428 /* pseudo-op: .previous
4429 behaviour: toggles the current section with the previous section.
4430 errors: None
4431 warnings: "No previous section" */
4432
4433 static void
4434 ppc_previous (int ignore ATTRIBUTE_UNUSED)
4435 {
4436 symbolS *tmp;
4437
4438 if (ppc_previous_section == NULL)
4439 {
4440 as_warn (_("No previous section to return to. Directive ignored."));
4441 return;
4442 }
4443
4444 subseg_set (ppc_previous_section, 0);
4445
4446 ppc_set_current_section (ppc_previous_section);
4447 }
4448
4449 /* pseudo-op: .pdata
4450 behaviour: predefined read only data section
4451 double word aligned
4452 errors: None
4453 warnings: None
4454 initial: .section .pdata "adr3"
4455 a - don't know -- maybe a misprint
4456 d - initialized data
4457 r - readable
4458 3 - double word aligned (that would be 4 byte boundary)
4459
4460 commentary:
4461 Tag index tables (also known as the function table) for exception
4462 handling, debugging, etc. */
4463
4464 static void
4465 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
4466 {
4467 if (pdata_section == 0)
4468 {
4469 pdata_section = subseg_new (".pdata", 0);
4470
4471 bfd_set_section_flags (stdoutput, pdata_section,
4472 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4473 | SEC_READONLY | SEC_DATA ));
4474
4475 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4476 }
4477 else
4478 {
4479 pdata_section = subseg_new (".pdata", 0);
4480 }
4481 ppc_set_current_section (pdata_section);
4482 }
4483
4484 /* pseudo-op: .ydata
4485 behaviour: predefined read only data section
4486 double word aligned
4487 errors: None
4488 warnings: None
4489 initial: .section .ydata "drw3"
4490 a - don't know -- maybe a misprint
4491 d - initialized data
4492 r - readable
4493 3 - double word aligned (that would be 4 byte boundary)
4494 commentary:
4495 Tag tables (also known as the scope table) for exception handling,
4496 debugging, etc. */
4497
4498 static void
4499 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
4500 {
4501 if (ydata_section == 0)
4502 {
4503 ydata_section = subseg_new (".ydata", 0);
4504 bfd_set_section_flags (stdoutput, ydata_section,
4505 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4506 | SEC_READONLY | SEC_DATA ));
4507
4508 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4509 }
4510 else
4511 {
4512 ydata_section = subseg_new (".ydata", 0);
4513 }
4514 ppc_set_current_section (ydata_section);
4515 }
4516
4517 /* pseudo-op: .reldata
4518 behaviour: predefined read write data section
4519 double word aligned (4-byte)
4520 FIXME: relocation is applied to it
4521 FIXME: what's the difference between this and .data?
4522 errors: None
4523 warnings: None
4524 initial: .section .reldata "drw3"
4525 d - initialized data
4526 r - readable
4527 w - writeable
4528 3 - double word aligned (that would be 8 byte boundary)
4529
4530 commentary:
4531 Like .data, but intended to hold data subject to relocation, such as
4532 function descriptors, etc. */
4533
4534 static void
4535 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
4536 {
4537 if (reldata_section == 0)
4538 {
4539 reldata_section = subseg_new (".reldata", 0);
4540
4541 bfd_set_section_flags (stdoutput, reldata_section,
4542 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4543 | SEC_DATA));
4544
4545 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4546 }
4547 else
4548 {
4549 reldata_section = subseg_new (".reldata", 0);
4550 }
4551 ppc_set_current_section (reldata_section);
4552 }
4553
4554 /* pseudo-op: .rdata
4555 behaviour: predefined read only data section
4556 double word aligned
4557 errors: None
4558 warnings: None
4559 initial: .section .rdata "dr3"
4560 d - initialized data
4561 r - readable
4562 3 - double word aligned (that would be 4 byte boundary) */
4563
4564 static void
4565 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
4566 {
4567 if (rdata_section == 0)
4568 {
4569 rdata_section = subseg_new (".rdata", 0);
4570 bfd_set_section_flags (stdoutput, rdata_section,
4571 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4572 | SEC_READONLY | SEC_DATA ));
4573
4574 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4575 }
4576 else
4577 {
4578 rdata_section = subseg_new (".rdata", 0);
4579 }
4580 ppc_set_current_section (rdata_section);
4581 }
4582
4583 /* pseudo-op: .ualong
4584 behaviour: much like .int, with the exception that no alignment is
4585 performed.
4586 FIXME: test the alignment statement
4587 errors: None
4588 warnings: None */
4589
4590 static void
4591 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
4592 {
4593 /* Try for long. */
4594 cons (4);
4595 }
4596
4597 /* pseudo-op: .znop <symbol name>
4598 behaviour: Issue a nop instruction
4599 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
4600 the supplied symbol name.
4601 errors: None
4602 warnings: Missing symbol name */
4603
4604 static void
4605 ppc_znop (int ignore ATTRIBUTE_UNUSED)
4606 {
4607 unsigned long insn;
4608 const struct powerpc_opcode *opcode;
4609 expressionS ex;
4610 char *f;
4611 symbolS *sym;
4612 char *symbol_name;
4613 char c;
4614 char *name;
4615 unsigned int exp;
4616 flagword flags;
4617 asection *sec;
4618
4619 /* Strip out the symbol name. */
4620 symbol_name = input_line_pointer;
4621 c = get_symbol_end ();
4622
4623 name = xmalloc (input_line_pointer - symbol_name + 1);
4624 strcpy (name, symbol_name);
4625
4626 sym = symbol_find_or_make (name);
4627
4628 *input_line_pointer = c;
4629
4630 SKIP_WHITESPACE ();
4631
4632 /* Look up the opcode in the hash table. */
4633 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4634
4635 /* Stick in the nop. */
4636 insn = opcode->opcode;
4637
4638 /* Write out the instruction. */
4639 f = frag_more (4);
4640 md_number_to_chars (f, insn, 4);
4641 fix_new (frag_now,
4642 f - frag_now->fr_literal,
4643 4,
4644 sym,
4645 0,
4646 0,
4647 BFD_RELOC_16_GOT_PCREL);
4648
4649 }
4650
4651 /* pseudo-op:
4652 behaviour:
4653 errors:
4654 warnings: */
4655
4656 static void
4657 ppc_pe_comm (int lcomm)
4658 {
4659 char *name;
4660 char c;
4661 char *p;
4662 offsetT temp;
4663 symbolS *symbolP;
4664 offsetT align;
4665
4666 name = input_line_pointer;
4667 c = get_symbol_end ();
4668
4669 /* just after name is now '\0'. */
4670 p = input_line_pointer;
4671 *p = c;
4672 SKIP_WHITESPACE ();
4673 if (*input_line_pointer != ',')
4674 {
4675 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4676 ignore_rest_of_line ();
4677 return;
4678 }
4679
4680 input_line_pointer++; /* skip ',' */
4681 if ((temp = get_absolute_expression ()) < 0)
4682 {
4683 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4684 ignore_rest_of_line ();
4685 return;
4686 }
4687
4688 if (! lcomm)
4689 {
4690 /* The third argument to .comm is the alignment. */
4691 if (*input_line_pointer != ',')
4692 align = 3;
4693 else
4694 {
4695 ++input_line_pointer;
4696 align = get_absolute_expression ();
4697 if (align <= 0)
4698 {
4699 as_warn (_("ignoring bad alignment"));
4700 align = 3;
4701 }
4702 }
4703 }
4704
4705 *p = 0;
4706 symbolP = symbol_find_or_make (name);
4707
4708 *p = c;
4709 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4710 {
4711 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4712 S_GET_NAME (symbolP));
4713 ignore_rest_of_line ();
4714 return;
4715 }
4716
4717 if (S_GET_VALUE (symbolP))
4718 {
4719 if (S_GET_VALUE (symbolP) != (valueT) temp)
4720 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4721 S_GET_NAME (symbolP),
4722 (long) S_GET_VALUE (symbolP),
4723 (long) temp);
4724 }
4725 else
4726 {
4727 S_SET_VALUE (symbolP, (valueT) temp);
4728 S_SET_EXTERNAL (symbolP);
4729 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
4730 }
4731
4732 demand_empty_rest_of_line ();
4733 }
4734
4735 /*
4736 * implement the .section pseudo op:
4737 * .section name {, "flags"}
4738 * ^ ^
4739 * | +--- optional flags: 'b' for bss
4740 * | 'i' for info
4741 * +-- section name 'l' for lib
4742 * 'n' for noload
4743 * 'o' for over
4744 * 'w' for data
4745 * 'd' (apparently m88k for data)
4746 * 'x' for text
4747 * But if the argument is not a quoted string, treat it as a
4748 * subsegment number.
4749 *
4750 * FIXME: this is a copy of the section processing from obj-coff.c, with
4751 * additions/changes for the moto-pas assembler support. There are three
4752 * categories:
4753 *
4754 * FIXME: I just noticed this. This doesn't work at all really. It it
4755 * setting bits that bfd probably neither understands or uses. The
4756 * correct approach (?) will have to incorporate extra fields attached
4757 * to the section to hold the system specific stuff. (krk)
4758 *
4759 * Section Contents:
4760 * 'a' - unknown - referred to in documentation, but no definition supplied
4761 * 'c' - section has code
4762 * 'd' - section has initialized data
4763 * 'u' - section has uninitialized data
4764 * 'i' - section contains directives (info)
4765 * 'n' - section can be discarded
4766 * 'R' - remove section at link time
4767 *
4768 * Section Protection:
4769 * 'r' - section is readable
4770 * 'w' - section is writeable
4771 * 'x' - section is executable
4772 * 's' - section is sharable
4773 *
4774 * Section Alignment:
4775 * '0' - align to byte boundary
4776 * '1' - align to halfword undary
4777 * '2' - align to word boundary
4778 * '3' - align to doubleword boundary
4779 * '4' - align to quadword boundary
4780 * '5' - align to 32 byte boundary
4781 * '6' - align to 64 byte boundary
4782 *
4783 */
4784
4785 void
4786 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
4787 {
4788 /* Strip out the section name. */
4789 char *section_name;
4790 char c;
4791 char *name;
4792 unsigned int exp;
4793 flagword flags;
4794 segT sec;
4795 int align;
4796
4797 section_name = input_line_pointer;
4798 c = get_symbol_end ();
4799
4800 name = xmalloc (input_line_pointer - section_name + 1);
4801 strcpy (name, section_name);
4802
4803 *input_line_pointer = c;
4804
4805 SKIP_WHITESPACE ();
4806
4807 exp = 0;
4808 flags = SEC_NO_FLAGS;
4809
4810 if (strcmp (name, ".idata$2") == 0)
4811 {
4812 align = 0;
4813 }
4814 else if (strcmp (name, ".idata$3") == 0)
4815 {
4816 align = 0;
4817 }
4818 else if (strcmp (name, ".idata$4") == 0)
4819 {
4820 align = 2;
4821 }
4822 else if (strcmp (name, ".idata$5") == 0)
4823 {
4824 align = 2;
4825 }
4826 else if (strcmp (name, ".idata$6") == 0)
4827 {
4828 align = 1;
4829 }
4830 else
4831 /* Default alignment to 16 byte boundary. */
4832 align = 4;
4833
4834 if (*input_line_pointer == ',')
4835 {
4836 ++input_line_pointer;
4837 SKIP_WHITESPACE ();
4838 if (*input_line_pointer != '"')
4839 exp = get_absolute_expression ();
4840 else
4841 {
4842 ++input_line_pointer;
4843 while (*input_line_pointer != '"'
4844 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4845 {
4846 switch (*input_line_pointer)
4847 {
4848 /* Section Contents */
4849 case 'a': /* unknown */
4850 as_bad (_("Unsupported section attribute -- 'a'"));
4851 break;
4852 case 'c': /* code section */
4853 flags |= SEC_CODE;
4854 break;
4855 case 'd': /* section has initialized data */
4856 flags |= SEC_DATA;
4857 break;
4858 case 'u': /* section has uninitialized data */
4859 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4860 in winnt.h */
4861 flags |= SEC_ROM;
4862 break;
4863 case 'i': /* section contains directives (info) */
4864 /* FIXME: This is IMAGE_SCN_LNK_INFO
4865 in winnt.h */
4866 flags |= SEC_HAS_CONTENTS;
4867 break;
4868 case 'n': /* section can be discarded */
4869 flags &=~ SEC_LOAD;
4870 break;
4871 case 'R': /* Remove section at link time */
4872 flags |= SEC_NEVER_LOAD;
4873 break;
4874 #if IFLICT_BRAIN_DAMAGE
4875 /* Section Protection */
4876 case 'r': /* section is readable */
4877 flags |= IMAGE_SCN_MEM_READ;
4878 break;
4879 case 'w': /* section is writeable */
4880 flags |= IMAGE_SCN_MEM_WRITE;
4881 break;
4882 case 'x': /* section is executable */
4883 flags |= IMAGE_SCN_MEM_EXECUTE;
4884 break;
4885 case 's': /* section is sharable */
4886 flags |= IMAGE_SCN_MEM_SHARED;
4887 break;
4888
4889 /* Section Alignment */
4890 case '0': /* align to byte boundary */
4891 flags |= IMAGE_SCN_ALIGN_1BYTES;
4892 align = 0;
4893 break;
4894 case '1': /* align to halfword boundary */
4895 flags |= IMAGE_SCN_ALIGN_2BYTES;
4896 align = 1;
4897 break;
4898 case '2': /* align to word boundary */
4899 flags |= IMAGE_SCN_ALIGN_4BYTES;
4900 align = 2;
4901 break;
4902 case '3': /* align to doubleword boundary */
4903 flags |= IMAGE_SCN_ALIGN_8BYTES;
4904 align = 3;
4905 break;
4906 case '4': /* align to quadword boundary */
4907 flags |= IMAGE_SCN_ALIGN_16BYTES;
4908 align = 4;
4909 break;
4910 case '5': /* align to 32 byte boundary */
4911 flags |= IMAGE_SCN_ALIGN_32BYTES;
4912 align = 5;
4913 break;
4914 case '6': /* align to 64 byte boundary */
4915 flags |= IMAGE_SCN_ALIGN_64BYTES;
4916 align = 6;
4917 break;
4918 #endif
4919 default:
4920 as_bad (_("unknown section attribute '%c'"),
4921 *input_line_pointer);
4922 break;
4923 }
4924 ++input_line_pointer;
4925 }
4926 if (*input_line_pointer == '"')
4927 ++input_line_pointer;
4928 }
4929 }
4930
4931 sec = subseg_new (name, (subsegT) exp);
4932
4933 ppc_set_current_section (sec);
4934
4935 if (flags != SEC_NO_FLAGS)
4936 {
4937 if (! bfd_set_section_flags (stdoutput, sec, flags))
4938 as_bad (_("error setting flags for \"%s\": %s"),
4939 bfd_section_name (stdoutput, sec),
4940 bfd_errmsg (bfd_get_error ()));
4941 }
4942
4943 bfd_set_section_alignment (stdoutput, sec, align);
4944 }
4945
4946 static void
4947 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
4948 {
4949 char *name;
4950 char endc;
4951 symbolS *ext_sym;
4952
4953 name = input_line_pointer;
4954 endc = get_symbol_end ();
4955
4956 ext_sym = symbol_find_or_make (name);
4957
4958 *input_line_pointer = endc;
4959
4960 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4961 SF_SET_FUNCTION (ext_sym);
4962 SF_SET_PROCESS (ext_sym);
4963 coff_add_linesym (ext_sym);
4964
4965 demand_empty_rest_of_line ();
4966 }
4967
4968 static void
4969 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
4970 {
4971 if (tocdata_section == 0)
4972 {
4973 tocdata_section = subseg_new (".tocd", 0);
4974 /* FIXME: section flags won't work. */
4975 bfd_set_section_flags (stdoutput, tocdata_section,
4976 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4977 | SEC_READONLY | SEC_DATA));
4978
4979 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4980 }
4981 else
4982 {
4983 rdata_section = subseg_new (".tocd", 0);
4984 }
4985
4986 ppc_set_current_section (tocdata_section);
4987
4988 demand_empty_rest_of_line ();
4989 }
4990
4991 /* Don't adjust TOC relocs to use the section symbol. */
4992
4993 int
4994 ppc_pe_fix_adjustable (fixS *fix)
4995 {
4996 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4997 }
4998
4999 #endif
5000 \f
5001 #ifdef OBJ_XCOFF
5002
5003 /* XCOFF specific symbol and file handling. */
5004
5005 /* Canonicalize the symbol name. We use the to force the suffix, if
5006 any, to use square brackets, and to be in upper case. */
5007
5008 char *
5009 ppc_canonicalize_symbol_name (char *name)
5010 {
5011 char *s;
5012
5013 if (ppc_stab_symbol)
5014 return name;
5015
5016 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5017 ;
5018 if (*s != '\0')
5019 {
5020 char brac;
5021
5022 if (*s == '[')
5023 brac = ']';
5024 else
5025 {
5026 *s = '[';
5027 brac = '}';
5028 }
5029
5030 for (s++; *s != '\0' && *s != brac; s++)
5031 *s = TOUPPER (*s);
5032
5033 if (*s == '\0' || s[1] != '\0')
5034 as_bad (_("bad symbol suffix"));
5035
5036 *s = ']';
5037 }
5038
5039 return name;
5040 }
5041
5042 /* Set the class of a symbol based on the suffix, if any. This is
5043 called whenever a new symbol is created. */
5044
5045 void
5046 ppc_symbol_new_hook (symbolS *sym)
5047 {
5048 struct ppc_tc_sy *tc;
5049 const char *s;
5050
5051 tc = symbol_get_tc (sym);
5052 tc->next = NULL;
5053 tc->output = 0;
5054 tc->symbol_class = -1;
5055 tc->real_name = NULL;
5056 tc->subseg = 0;
5057 tc->align = 0;
5058 tc->size = NULL;
5059 tc->within = NULL;
5060
5061 if (ppc_stab_symbol)
5062 return;
5063
5064 s = strchr (S_GET_NAME (sym), '[');
5065 if (s == (const char *) NULL)
5066 {
5067 /* There is no suffix. */
5068 return;
5069 }
5070
5071 ++s;
5072
5073 switch (s[0])
5074 {
5075 case 'B':
5076 if (strcmp (s, "BS]") == 0)
5077 tc->symbol_class = XMC_BS;
5078 break;
5079 case 'D':
5080 if (strcmp (s, "DB]") == 0)
5081 tc->symbol_class = XMC_DB;
5082 else if (strcmp (s, "DS]") == 0)
5083 tc->symbol_class = XMC_DS;
5084 break;
5085 case 'G':
5086 if (strcmp (s, "GL]") == 0)
5087 tc->symbol_class = XMC_GL;
5088 break;
5089 case 'P':
5090 if (strcmp (s, "PR]") == 0)
5091 tc->symbol_class = XMC_PR;
5092 break;
5093 case 'R':
5094 if (strcmp (s, "RO]") == 0)
5095 tc->symbol_class = XMC_RO;
5096 else if (strcmp (s, "RW]") == 0)
5097 tc->symbol_class = XMC_RW;
5098 break;
5099 case 'S':
5100 if (strcmp (s, "SV]") == 0)
5101 tc->symbol_class = XMC_SV;
5102 break;
5103 case 'T':
5104 if (strcmp (s, "TC]") == 0)
5105 tc->symbol_class = XMC_TC;
5106 else if (strcmp (s, "TI]") == 0)
5107 tc->symbol_class = XMC_TI;
5108 else if (strcmp (s, "TB]") == 0)
5109 tc->symbol_class = XMC_TB;
5110 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5111 tc->symbol_class = XMC_TC0;
5112 break;
5113 case 'U':
5114 if (strcmp (s, "UA]") == 0)
5115 tc->symbol_class = XMC_UA;
5116 else if (strcmp (s, "UC]") == 0)
5117 tc->symbol_class = XMC_UC;
5118 break;
5119 case 'X':
5120 if (strcmp (s, "XO]") == 0)
5121 tc->symbol_class = XMC_XO;
5122 break;
5123 }
5124
5125 if (tc->symbol_class == -1)
5126 as_bad (_("Unrecognized symbol suffix"));
5127 }
5128
5129 /* Set the class of a label based on where it is defined. This
5130 handles symbols without suffixes. Also, move the symbol so that it
5131 follows the csect symbol. */
5132
5133 void
5134 ppc_frob_label (symbolS *sym)
5135 {
5136 if (ppc_current_csect != (symbolS *) NULL)
5137 {
5138 if (symbol_get_tc (sym)->symbol_class == -1)
5139 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5140
5141 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5142 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5143 &symbol_rootP, &symbol_lastP);
5144 symbol_get_tc (ppc_current_csect)->within = sym;
5145 }
5146
5147 #ifdef OBJ_ELF
5148 dwarf2_emit_label (sym);
5149 #endif
5150 }
5151
5152 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5153 seen. It tells ppc_adjust_symtab whether it needs to look through
5154 the symbols. */
5155
5156 static bfd_boolean ppc_saw_abs;
5157
5158 /* Change the name of a symbol just before writing it out. Set the
5159 real name if the .rename pseudo-op was used. Otherwise, remove any
5160 class suffix. Return 1 if the symbol should not be included in the
5161 symbol table. */
5162
5163 int
5164 ppc_frob_symbol (symbolS *sym)
5165 {
5166 static symbolS *ppc_last_function;
5167 static symbolS *set_end;
5168
5169 /* Discard symbols that should not be included in the output symbol
5170 table. */
5171 if (! symbol_used_in_reloc_p (sym)
5172 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5173 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5174 && ! symbol_get_tc (sym)->output
5175 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5176 return 1;
5177
5178 /* This one will disappear anyway. Don't make a csect sym for it. */
5179 if (sym == abs_section_sym)
5180 return 1;
5181
5182 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5183 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5184 else
5185 {
5186 const char *name;
5187 const char *s;
5188
5189 name = S_GET_NAME (sym);
5190 s = strchr (name, '[');
5191 if (s != (char *) NULL)
5192 {
5193 unsigned int len;
5194 char *snew;
5195
5196 len = s - name;
5197 snew = xmalloc (len + 1);
5198 memcpy (snew, name, len);
5199 snew[len] = '\0';
5200
5201 S_SET_NAME (sym, snew);
5202 }
5203 }
5204
5205 if (set_end != (symbolS *) NULL)
5206 {
5207 SA_SET_SYM_ENDNDX (set_end, sym);
5208 set_end = NULL;
5209 }
5210
5211 if (SF_GET_FUNCTION (sym))
5212 {
5213 if (ppc_last_function != (symbolS *) NULL)
5214 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5215 ppc_last_function = sym;
5216 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
5217 {
5218 resolve_symbol_value (symbol_get_tc (sym)->size);
5219 SA_SET_SYM_FSIZE (sym,
5220 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
5221 }
5222 }
5223 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5224 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5225 {
5226 if (ppc_last_function == (symbolS *) NULL)
5227 as_bad (_(".ef with no preceding .function"));
5228 else
5229 {
5230 set_end = ppc_last_function;
5231 ppc_last_function = NULL;
5232
5233 /* We don't have a C_EFCN symbol, but we need to force the
5234 COFF backend to believe that it has seen one. */
5235 coff_last_function = NULL;
5236 }
5237 }
5238
5239 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5240 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5241 && S_GET_STORAGE_CLASS (sym) != C_FILE
5242 && S_GET_STORAGE_CLASS (sym) != C_FCN
5243 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5244 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5245 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5246 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5247 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5248 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5249 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5250
5251 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5252 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5253 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5254 {
5255 int i;
5256 union internal_auxent *a;
5257
5258 /* Create a csect aux. */
5259 i = S_GET_NUMBER_AUXILIARY (sym);
5260 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5261 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5262 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5263 {
5264 /* This is the TOC table. */
5265 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5266 a->x_csect.x_scnlen.l = 0;
5267 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5268 }
5269 else if (symbol_get_tc (sym)->subseg != 0)
5270 {
5271 /* This is a csect symbol. x_scnlen is the size of the
5272 csect. */
5273 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5274 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5275 S_GET_SEGMENT (sym))
5276 - S_GET_VALUE (sym));
5277 else
5278 {
5279 resolve_symbol_value (symbol_get_tc (sym)->next);
5280 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5281 - S_GET_VALUE (sym));
5282 }
5283 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5284 }
5285 else if (S_GET_SEGMENT (sym) == bss_section)
5286 {
5287 /* This is a common symbol. */
5288 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5289 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5290 if (S_IS_EXTERNAL (sym))
5291 symbol_get_tc (sym)->symbol_class = XMC_RW;
5292 else
5293 symbol_get_tc (sym)->symbol_class = XMC_BS;
5294 }
5295 else if (S_GET_SEGMENT (sym) == absolute_section)
5296 {
5297 /* This is an absolute symbol. The csect will be created by
5298 ppc_adjust_symtab. */
5299 ppc_saw_abs = TRUE;
5300 a->x_csect.x_smtyp = XTY_LD;
5301 if (symbol_get_tc (sym)->symbol_class == -1)
5302 symbol_get_tc (sym)->symbol_class = XMC_XO;
5303 }
5304 else if (! S_IS_DEFINED (sym))
5305 {
5306 /* This is an external symbol. */
5307 a->x_csect.x_scnlen.l = 0;
5308 a->x_csect.x_smtyp = XTY_ER;
5309 }
5310 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5311 {
5312 symbolS *next;
5313
5314 /* This is a TOC definition. x_scnlen is the size of the
5315 TOC entry. */
5316 next = symbol_next (sym);
5317 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5318 next = symbol_next (next);
5319 if (next == (symbolS *) NULL
5320 || symbol_get_tc (next)->symbol_class != XMC_TC)
5321 {
5322 if (ppc_after_toc_frag == (fragS *) NULL)
5323 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5324 data_section)
5325 - S_GET_VALUE (sym));
5326 else
5327 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5328 - S_GET_VALUE (sym));
5329 }
5330 else
5331 {
5332 resolve_symbol_value (next);
5333 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5334 - S_GET_VALUE (sym));
5335 }
5336 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5337 }
5338 else
5339 {
5340 symbolS *csect;
5341
5342 /* This is a normal symbol definition. x_scnlen is the
5343 symbol index of the containing csect. */
5344 if (S_GET_SEGMENT (sym) == text_section)
5345 csect = ppc_text_csects;
5346 else if (S_GET_SEGMENT (sym) == data_section)
5347 csect = ppc_data_csects;
5348 else
5349 abort ();
5350
5351 /* Skip the initial dummy symbol. */
5352 csect = symbol_get_tc (csect)->next;
5353
5354 if (csect == (symbolS *) NULL)
5355 {
5356 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5357 a->x_csect.x_scnlen.l = 0;
5358 }
5359 else
5360 {
5361 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5362 {
5363 resolve_symbol_value (symbol_get_tc (csect)->next);
5364 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5365 > S_GET_VALUE (sym))
5366 break;
5367 csect = symbol_get_tc (csect)->next;
5368 }
5369
5370 a->x_csect.x_scnlen.p =
5371 coffsymbol (symbol_get_bfdsym (csect))->native;
5372 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5373 1;
5374 }
5375 a->x_csect.x_smtyp = XTY_LD;
5376 }
5377
5378 a->x_csect.x_parmhash = 0;
5379 a->x_csect.x_snhash = 0;
5380 if (symbol_get_tc (sym)->symbol_class == -1)
5381 a->x_csect.x_smclas = XMC_PR;
5382 else
5383 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5384 a->x_csect.x_stab = 0;
5385 a->x_csect.x_snstab = 0;
5386
5387 /* Don't let the COFF backend resort these symbols. */
5388 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5389 }
5390 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5391 {
5392 /* We want the value to be the symbol index of the referenced
5393 csect symbol. BFD will do that for us if we set the right
5394 flags. */
5395 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5396 combined_entry_type *c = coffsymbol (bsym)->native;
5397
5398 S_SET_VALUE (sym, (valueT) (size_t) c);
5399 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5400 }
5401 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5402 {
5403 symbolS *block;
5404 symbolS *csect;
5405
5406 /* The value is the offset from the enclosing csect. */
5407 block = symbol_get_tc (sym)->within;
5408 csect = symbol_get_tc (block)->within;
5409 resolve_symbol_value (csect);
5410 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5411 }
5412 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5413 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5414 {
5415 /* We want the value to be a file offset into the line numbers.
5416 BFD will do that for us if we set the right flags. We have
5417 already set the value correctly. */
5418 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5419 }
5420
5421 return 0;
5422 }
5423
5424 /* Adjust the symbol table. This creates csect symbols for all
5425 absolute symbols. */
5426
5427 void
5428 ppc_adjust_symtab (void)
5429 {
5430 symbolS *sym;
5431
5432 if (! ppc_saw_abs)
5433 return;
5434
5435 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5436 {
5437 symbolS *csect;
5438 int i;
5439 union internal_auxent *a;
5440
5441 if (S_GET_SEGMENT (sym) != absolute_section)
5442 continue;
5443
5444 csect = symbol_create (".abs[XO]", absolute_section,
5445 S_GET_VALUE (sym), &zero_address_frag);
5446 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
5447 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5448 i = S_GET_NUMBER_AUXILIARY (csect);
5449 S_SET_NUMBER_AUXILIARY (csect, i + 1);
5450 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
5451 a->x_csect.x_scnlen.l = 0;
5452 a->x_csect.x_smtyp = XTY_SD;
5453 a->x_csect.x_parmhash = 0;
5454 a->x_csect.x_snhash = 0;
5455 a->x_csect.x_smclas = XMC_XO;
5456 a->x_csect.x_stab = 0;
5457 a->x_csect.x_snstab = 0;
5458
5459 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5460
5461 i = S_GET_NUMBER_AUXILIARY (sym);
5462 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5463 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5464 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
5465 }
5466
5467 ppc_saw_abs = FALSE;
5468 }
5469
5470 /* Set the VMA for a section. This is called on all the sections in
5471 turn. */
5472
5473 void
5474 ppc_frob_section (asection *sec)
5475 {
5476 static bfd_vma vma = 0;
5477
5478 vma = md_section_align (sec, vma);
5479 bfd_set_section_vma (stdoutput, sec, vma);
5480 vma += bfd_section_size (stdoutput, sec);
5481 }
5482
5483 #endif /* OBJ_XCOFF */
5484 \f
5485 char *
5486 md_atof (int type, char *litp, int *sizep)
5487 {
5488 return ieee_md_atof (type, litp, sizep, target_big_endian);
5489 }
5490
5491 /* Write a value out to the object file, using the appropriate
5492 endianness. */
5493
5494 void
5495 md_number_to_chars (char *buf, valueT val, int n)
5496 {
5497 if (target_big_endian)
5498 number_to_chars_bigendian (buf, val, n);
5499 else
5500 number_to_chars_littleendian (buf, val, n);
5501 }
5502
5503 /* Align a section (I don't know why this is machine dependent). */
5504
5505 valueT
5506 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
5507 {
5508 #ifdef OBJ_ELF
5509 return addr;
5510 #else
5511 int align = bfd_get_section_alignment (stdoutput, seg);
5512
5513 return ((addr + (1 << align) - 1) & (-1 << align));
5514 #endif
5515 }
5516
5517 /* We don't have any form of relaxing. */
5518
5519 int
5520 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5521 asection *seg ATTRIBUTE_UNUSED)
5522 {
5523 abort ();
5524 return 0;
5525 }
5526
5527 /* Convert a machine dependent frag. We never generate these. */
5528
5529 void
5530 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5531 asection *sec ATTRIBUTE_UNUSED,
5532 fragS *fragp ATTRIBUTE_UNUSED)
5533 {
5534 abort ();
5535 }
5536
5537 /* We have no need to default values of symbols. */
5538
5539 symbolS *
5540 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
5541 {
5542 return 0;
5543 }
5544 \f
5545 /* Functions concerning relocs. */
5546
5547 /* The location from which a PC relative jump should be calculated,
5548 given a PC relative reloc. */
5549
5550 long
5551 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
5552 {
5553 return fixp->fx_frag->fr_address + fixp->fx_where;
5554 }
5555
5556 #ifdef OBJ_XCOFF
5557
5558 /* This is called to see whether a fixup should be adjusted to use a
5559 section symbol. We take the opportunity to change a fixup against
5560 a symbol in the TOC subsegment into a reloc against the
5561 corresponding .tc symbol. */
5562
5563 int
5564 ppc_fix_adjustable (fixS *fix)
5565 {
5566 valueT val = resolve_symbol_value (fix->fx_addsy);
5567 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5568 TC_SYMFIELD_TYPE *tc;
5569
5570 if (symseg == absolute_section)
5571 return 0;
5572
5573 if (ppc_toc_csect != (symbolS *) NULL
5574 && fix->fx_addsy != ppc_toc_csect
5575 && symseg == data_section
5576 && val >= ppc_toc_frag->fr_address
5577 && (ppc_after_toc_frag == (fragS *) NULL
5578 || val < ppc_after_toc_frag->fr_address))
5579 {
5580 symbolS *sy;
5581
5582 for (sy = symbol_next (ppc_toc_csect);
5583 sy != (symbolS *) NULL;
5584 sy = symbol_next (sy))
5585 {
5586 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5587
5588 if (sy_tc->symbol_class == XMC_TC0)
5589 continue;
5590 if (sy_tc->symbol_class != XMC_TC)
5591 break;
5592 if (val == resolve_symbol_value (sy))
5593 {
5594 fix->fx_addsy = sy;
5595 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5596 return 0;
5597 }
5598 }
5599
5600 as_bad_where (fix->fx_file, fix->fx_line,
5601 _("symbol in .toc does not match any .tc"));
5602 }
5603
5604 /* Possibly adjust the reloc to be against the csect. */
5605 tc = symbol_get_tc (fix->fx_addsy);
5606 if (tc->subseg == 0
5607 && tc->symbol_class != XMC_TC0
5608 && tc->symbol_class != XMC_TC
5609 && symseg != bss_section
5610 /* Don't adjust if this is a reloc in the toc section. */
5611 && (symseg != data_section
5612 || ppc_toc_csect == NULL
5613 || val < ppc_toc_frag->fr_address
5614 || (ppc_after_toc_frag != NULL
5615 && val >= ppc_after_toc_frag->fr_address)))
5616 {
5617 symbolS *csect;
5618 symbolS *next_csect;
5619
5620 if (symseg == text_section)
5621 csect = ppc_text_csects;
5622 else if (symseg == data_section)
5623 csect = ppc_data_csects;
5624 else
5625 abort ();
5626
5627 /* Skip the initial dummy symbol. */
5628 csect = symbol_get_tc (csect)->next;
5629
5630 if (csect != (symbolS *) NULL)
5631 {
5632 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5633 && (symbol_get_frag (next_csect)->fr_address <= val))
5634 {
5635 /* If the csect address equals the symbol value, then we
5636 have to look through the full symbol table to see
5637 whether this is the csect we want. Note that we will
5638 only get here if the csect has zero length. */
5639 if (symbol_get_frag (csect)->fr_address == val
5640 && S_GET_VALUE (csect) == val)
5641 {
5642 symbolS *scan;
5643
5644 for (scan = symbol_next (csect);
5645 scan != NULL;
5646 scan = symbol_next (scan))
5647 {
5648 if (symbol_get_tc (scan)->subseg != 0)
5649 break;
5650 if (scan == fix->fx_addsy)
5651 break;
5652 }
5653
5654 /* If we found the symbol before the next csect
5655 symbol, then this is the csect we want. */
5656 if (scan == fix->fx_addsy)
5657 break;
5658 }
5659
5660 csect = next_csect;
5661 }
5662
5663 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5664 fix->fx_addsy = csect;
5665 }
5666 return 0;
5667 }
5668
5669 /* Adjust a reloc against a .lcomm symbol to be against the base
5670 .lcomm. */
5671 if (symseg == bss_section
5672 && ! S_IS_EXTERNAL (fix->fx_addsy))
5673 {
5674 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5675
5676 fix->fx_offset += val - resolve_symbol_value (sy);
5677 fix->fx_addsy = sy;
5678 }
5679
5680 return 0;
5681 }
5682
5683 /* A reloc from one csect to another must be kept. The assembler
5684 will, of course, keep relocs between sections, and it will keep
5685 absolute relocs, but we need to force it to keep PC relative relocs
5686 between two csects in the same section. */
5687
5688 int
5689 ppc_force_relocation (fixS *fix)
5690 {
5691 /* At this point fix->fx_addsy should already have been converted to
5692 a csect symbol. If the csect does not include the fragment, then
5693 we need to force the relocation. */
5694 if (fix->fx_pcrel
5695 && fix->fx_addsy != NULL
5696 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5697 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5698 > fix->fx_frag->fr_address)
5699 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5700 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
5701 <= fix->fx_frag->fr_address))))
5702 return 1;
5703
5704 return generic_force_reloc (fix);
5705 }
5706
5707 #endif /* OBJ_XCOFF */
5708
5709 #ifdef OBJ_ELF
5710 /* If this function returns non-zero, it guarantees that a relocation
5711 will be emitted for a fixup. */
5712
5713 int
5714 ppc_force_relocation (fixS *fix)
5715 {
5716 /* Branch prediction relocations must force a relocation, as must
5717 the vtable description relocs. */
5718 switch (fix->fx_r_type)
5719 {
5720 case BFD_RELOC_PPC_B16_BRTAKEN:
5721 case BFD_RELOC_PPC_B16_BRNTAKEN:
5722 case BFD_RELOC_PPC_BA16_BRTAKEN:
5723 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5724 case BFD_RELOC_24_PLT_PCREL:
5725 case BFD_RELOC_PPC64_TOC:
5726 return 1;
5727 default:
5728 break;
5729 }
5730
5731 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5732 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5733 return 1;
5734
5735 return generic_force_reloc (fix);
5736 }
5737
5738 int
5739 ppc_fix_adjustable (fixS *fix)
5740 {
5741 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5742 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5743 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5744 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5745 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
5746 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
5747 && fix->fx_r_type != BFD_RELOC_GPREL16
5748 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5749 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
5750 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5751 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
5752 }
5753 #endif
5754
5755 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5756 rs_align_code frag. */
5757
5758 void
5759 ppc_handle_align (struct frag *fragP)
5760 {
5761 valueT count = (fragP->fr_next->fr_address
5762 - (fragP->fr_address + fragP->fr_fix));
5763
5764 if (count != 0 && (count & 3) == 0)
5765 {
5766 char *dest = fragP->fr_literal + fragP->fr_fix;
5767
5768 fragP->fr_var = 4;
5769
5770 if (count > 4 * nop_limit && count < 0x2000000)
5771 {
5772 struct frag *rest;
5773
5774 /* Make a branch, then follow with nops. Insert another
5775 frag to handle the nops. */
5776 md_number_to_chars (dest, 0x48000000 + count, 4);
5777 count -= 4;
5778 if (count == 0)
5779 return;
5780
5781 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5782 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
5783 fragP->fr_next = rest;
5784 fragP = rest;
5785 rest->fr_address += rest->fr_fix + 4;
5786 rest->fr_fix = 0;
5787 /* If we leave the next frag as rs_align_code we'll come here
5788 again, resulting in a bunch of branches rather than a
5789 branch followed by nops. */
5790 rest->fr_type = rs_align;
5791 dest = rest->fr_literal;
5792 }
5793
5794 md_number_to_chars (dest, 0x60000000, 4);
5795
5796 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5797 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
5798 {
5799 /* For power6 and power7, we want the last nop to be a group
5800 terminating one. Do this by inserting an rs_fill frag immediately
5801 after this one, with its address set to the last nop location.
5802 This will automatically reduce the number of nops in the current
5803 frag by one. */
5804 if (count > 4)
5805 {
5806 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5807
5808 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5809 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5810 group_nop->fr_fix = 0;
5811 group_nop->fr_offset = 1;
5812 group_nop->fr_type = rs_fill;
5813 fragP->fr_next = group_nop;
5814 dest = group_nop->fr_literal;
5815 }
5816
5817 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5818 /* power7 group terminating nop: "ori 2,2,0". */
5819 md_number_to_chars (dest, 0x60420000, 4);
5820 else
5821 /* power6 group terminating nop: "ori 1,1,0". */
5822 md_number_to_chars (dest, 0x60210000, 4);
5823 }
5824 }
5825 }
5826
5827 /* Apply a fixup to the object code. This is called for all the
5828 fixups we generated by the call to fix_new_exp, above. In the call
5829 above we used a reloc code which was the largest legal reloc code
5830 plus the operand index. Here we undo that to recover the operand
5831 index. At this point all symbol values should be fully resolved,
5832 and we attempt to completely resolve the reloc. If we can not do
5833 that, we determine the correct reloc code and put it back in the
5834 fixup. */
5835
5836 void
5837 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
5838 {
5839 valueT value = * valP;
5840
5841 #ifdef OBJ_ELF
5842 if (fixP->fx_addsy != NULL)
5843 {
5844 /* Hack around bfd_install_relocation brain damage. */
5845 if (fixP->fx_pcrel)
5846 value += fixP->fx_frag->fr_address + fixP->fx_where;
5847 }
5848 else
5849 fixP->fx_done = 1;
5850 #else
5851 /* FIXME FIXME FIXME: The value we are passed in *valP includes
5852 the symbol values. If we are doing this relocation the code in
5853 write.c is going to call bfd_install_relocation, which is also
5854 going to use the symbol value. That means that if the reloc is
5855 fully resolved we want to use *valP since bfd_install_relocation is
5856 not being used.
5857 However, if the reloc is not fully resolved we do not want to
5858 use *valP, and must use fx_offset instead. If the relocation
5859 is PC-relative, we then need to re-apply md_pcrel_from_section
5860 to this new relocation value. */
5861 if (fixP->fx_addsy == (symbolS *) NULL)
5862 fixP->fx_done = 1;
5863
5864 else
5865 {
5866 value = fixP->fx_offset;
5867 if (fixP->fx_pcrel)
5868 value -= md_pcrel_from_section (fixP, seg);
5869 }
5870 #endif
5871
5872 if (fixP->fx_subsy != (symbolS *) NULL)
5873 {
5874 /* We can't actually support subtracting a symbol. */
5875 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
5876 }
5877
5878 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
5879 {
5880 int opindex;
5881 const struct powerpc_operand *operand;
5882 char *where;
5883 unsigned long insn;
5884
5885 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
5886
5887 operand = &powerpc_operands[opindex];
5888
5889 #ifdef OBJ_XCOFF
5890 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5891 does not generate a reloc. It uses the offset of `sym' within its
5892 csect. Other usages, such as `.long sym', generate relocs. This
5893 is the documented behaviour of non-TOC symbols. */
5894 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5895 && (operand->bitm & 0xfff0) == 0xfff0
5896 && operand->shift == 0
5897 && (operand->insert == NULL || ppc_obj64)
5898 && fixP->fx_addsy != NULL
5899 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5900 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5901 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
5902 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
5903 {
5904 value = fixP->fx_offset;
5905 fixP->fx_done = 1;
5906 }
5907 #endif
5908
5909 /* Fetch the instruction, insert the fully resolved operand
5910 value, and stuff the instruction back again. */
5911 where = fixP->fx_frag->fr_literal + fixP->fx_where;
5912 if (target_big_endian)
5913 insn = bfd_getb32 ((unsigned char *) where);
5914 else
5915 insn = bfd_getl32 ((unsigned char *) where);
5916 insn = ppc_insert_operand (insn, operand, (offsetT) value,
5917 fixP->tc_fix_data.ppc_cpu,
5918 fixP->fx_file, fixP->fx_line);
5919 if (target_big_endian)
5920 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5921 else
5922 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5923
5924 if (fixP->fx_done)
5925 /* Nothing else to do here. */
5926 return;
5927
5928 gas_assert (fixP->fx_addsy != NULL);
5929
5930 /* Determine a BFD reloc value based on the operand information.
5931 We are only prepared to turn a few of the operands into
5932 relocs. */
5933 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5934 && operand->bitm == 0x3fffffc
5935 && operand->shift == 0)
5936 fixP->fx_r_type = BFD_RELOC_PPC_B26;
5937 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5938 && operand->bitm == 0xfffc
5939 && operand->shift == 0)
5940 {
5941 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5942 #ifdef OBJ_XCOFF
5943 fixP->fx_size = 2;
5944 if (target_big_endian)
5945 fixP->fx_where += 2;
5946 #endif
5947 }
5948 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5949 && operand->bitm == 0x3fffffc
5950 && operand->shift == 0)
5951 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
5952 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5953 && operand->bitm == 0xfffc
5954 && operand->shift == 0)
5955 {
5956 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5957 #ifdef OBJ_XCOFF
5958 fixP->fx_size = 2;
5959 if (target_big_endian)
5960 fixP->fx_where += 2;
5961 #endif
5962 }
5963 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5964 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5965 && (operand->bitm & 0xfff0) == 0xfff0
5966 && operand->shift == 0)
5967 {
5968 if (ppc_is_toc_sym (fixP->fx_addsy))
5969 {
5970 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
5971 #ifdef OBJ_ELF
5972 if (ppc_obj64
5973 && (operand->flags & PPC_OPERAND_DS) != 0)
5974 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5975 #endif
5976 }
5977 else
5978 {
5979 fixP->fx_r_type = BFD_RELOC_16;
5980 #ifdef OBJ_ELF
5981 if (ppc_obj64
5982 && (operand->flags & PPC_OPERAND_DS) != 0)
5983 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
5984 #endif
5985 }
5986 fixP->fx_size = 2;
5987 if (target_big_endian)
5988 fixP->fx_where += 2;
5989 }
5990 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5991 else
5992 {
5993 char *sfile;
5994 unsigned int sline;
5995
5996 /* Use expr_symbol_where to see if this is an expression
5997 symbol. */
5998 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5999 as_bad_where (fixP->fx_file, fixP->fx_line,
6000 _("unresolved expression that must be resolved"));
6001 else
6002 as_bad_where (fixP->fx_file, fixP->fx_line,
6003 _("unsupported relocation against %s"),
6004 S_GET_NAME (fixP->fx_addsy));
6005 fixP->fx_done = 1;
6006 return;
6007 }
6008 }
6009 else
6010 {
6011 #ifdef OBJ_ELF
6012 ppc_elf_validate_fix (fixP, seg);
6013 #endif
6014 switch (fixP->fx_r_type)
6015 {
6016 case BFD_RELOC_CTOR:
6017 if (ppc_obj64)
6018 goto ctor64;
6019 /* fall through */
6020
6021 case BFD_RELOC_32:
6022 if (fixP->fx_pcrel)
6023 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6024 /* fall through */
6025
6026 case BFD_RELOC_RVA:
6027 case BFD_RELOC_32_PCREL:
6028 case BFD_RELOC_PPC_EMB_NADDR32:
6029 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6030 value, 4);
6031 break;
6032
6033 case BFD_RELOC_64:
6034 ctor64:
6035 if (fixP->fx_pcrel)
6036 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6037 /* fall through */
6038
6039 case BFD_RELOC_64_PCREL:
6040 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6041 value, 8);
6042 break;
6043
6044 case BFD_RELOC_GPREL16:
6045 case BFD_RELOC_16_GOT_PCREL:
6046 case BFD_RELOC_16_GOTOFF:
6047 case BFD_RELOC_LO16_GOTOFF:
6048 case BFD_RELOC_HI16_GOTOFF:
6049 case BFD_RELOC_HI16_S_GOTOFF:
6050 case BFD_RELOC_16_BASEREL:
6051 case BFD_RELOC_LO16_BASEREL:
6052 case BFD_RELOC_HI16_BASEREL:
6053 case BFD_RELOC_HI16_S_BASEREL:
6054 case BFD_RELOC_PPC_EMB_NADDR16:
6055 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6056 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6057 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6058 case BFD_RELOC_PPC_EMB_SDAI16:
6059 case BFD_RELOC_PPC_EMB_SDA2REL:
6060 case BFD_RELOC_PPC_EMB_SDA2I16:
6061 case BFD_RELOC_PPC_EMB_RELSEC16:
6062 case BFD_RELOC_PPC_EMB_RELST_LO:
6063 case BFD_RELOC_PPC_EMB_RELST_HI:
6064 case BFD_RELOC_PPC_EMB_RELST_HA:
6065 case BFD_RELOC_PPC_EMB_RELSDA:
6066 case BFD_RELOC_PPC_TOC16:
6067 #ifdef OBJ_ELF
6068 case BFD_RELOC_PPC64_TOC16_LO:
6069 case BFD_RELOC_PPC64_TOC16_HI:
6070 case BFD_RELOC_PPC64_TOC16_HA:
6071 #endif
6072 if (fixP->fx_pcrel)
6073 {
6074 if (fixP->fx_addsy != NULL)
6075 as_bad_where (fixP->fx_file, fixP->fx_line,
6076 _("cannot emit PC relative %s relocation against %s"),
6077 bfd_get_reloc_code_name (fixP->fx_r_type),
6078 S_GET_NAME (fixP->fx_addsy));
6079 else
6080 as_bad_where (fixP->fx_file, fixP->fx_line,
6081 _("cannot emit PC relative %s relocation"),
6082 bfd_get_reloc_code_name (fixP->fx_r_type));
6083 }
6084
6085 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6086 value, 2);
6087 break;
6088
6089 case BFD_RELOC_16:
6090 if (fixP->fx_pcrel)
6091 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6092 /* fall through */
6093
6094 case BFD_RELOC_16_PCREL:
6095 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6096 value, 2);
6097 break;
6098
6099 case BFD_RELOC_LO16:
6100 if (fixP->fx_pcrel)
6101 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6102 /* fall through */
6103
6104 case BFD_RELOC_LO16_PCREL:
6105 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6106 value, 2);
6107 break;
6108
6109 /* This case happens when you write, for example,
6110 lis %r3,(L1-L2)@ha
6111 where L1 and L2 are defined later. */
6112 case BFD_RELOC_HI16:
6113 if (fixP->fx_pcrel)
6114 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6115 /* fall through */
6116
6117 case BFD_RELOC_HI16_PCREL:
6118 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6119 PPC_HI (value), 2);
6120 break;
6121
6122 case BFD_RELOC_HI16_S:
6123 if (fixP->fx_pcrel)
6124 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6125 /* fall through */
6126
6127 case BFD_RELOC_HI16_S_PCREL:
6128 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6129 PPC_HA (value), 2);
6130 break;
6131
6132 #ifdef OBJ_XCOFF
6133 case BFD_RELOC_NONE:
6134 break;
6135 #endif
6136
6137 #ifdef OBJ_ELF
6138 case BFD_RELOC_PPC64_HIGHER:
6139 if (fixP->fx_pcrel)
6140 abort ();
6141 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6142 PPC_HIGHER (value), 2);
6143 break;
6144
6145 case BFD_RELOC_PPC64_HIGHER_S:
6146 if (fixP->fx_pcrel)
6147 abort ();
6148 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6149 PPC_HIGHERA (value), 2);
6150 break;
6151
6152 case BFD_RELOC_PPC64_HIGHEST:
6153 if (fixP->fx_pcrel)
6154 abort ();
6155 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6156 PPC_HIGHEST (value), 2);
6157 break;
6158
6159 case BFD_RELOC_PPC64_HIGHEST_S:
6160 if (fixP->fx_pcrel)
6161 abort ();
6162 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6163 PPC_HIGHESTA (value), 2);
6164 break;
6165
6166 case BFD_RELOC_PPC64_ADDR16_DS:
6167 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6168 case BFD_RELOC_PPC64_GOT16_DS:
6169 case BFD_RELOC_PPC64_GOT16_LO_DS:
6170 case BFD_RELOC_PPC64_PLT16_LO_DS:
6171 case BFD_RELOC_PPC64_SECTOFF_DS:
6172 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6173 case BFD_RELOC_PPC64_TOC16_DS:
6174 case BFD_RELOC_PPC64_TOC16_LO_DS:
6175 case BFD_RELOC_PPC64_PLTGOT16_DS:
6176 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6177 if (fixP->fx_pcrel)
6178 abort ();
6179 {
6180 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
6181 unsigned long val, mask;
6182
6183 if (target_big_endian)
6184 val = bfd_getb32 (where - 2);
6185 else
6186 val = bfd_getl32 (where);
6187 mask = 0xfffc;
6188 /* lq insns reserve the four lsbs. */
6189 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
6190 && (val & (0x3f << 26)) == (56u << 26))
6191 mask = 0xfff0;
6192 val |= value & mask;
6193 if (target_big_endian)
6194 bfd_putb16 ((bfd_vma) val, where);
6195 else
6196 bfd_putl16 ((bfd_vma) val, where);
6197 }
6198 break;
6199
6200 case BFD_RELOC_PPC_B16_BRTAKEN:
6201 case BFD_RELOC_PPC_B16_BRNTAKEN:
6202 case BFD_RELOC_PPC_BA16_BRTAKEN:
6203 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6204 break;
6205
6206 case BFD_RELOC_PPC_TLS:
6207 case BFD_RELOC_PPC_TLSGD:
6208 case BFD_RELOC_PPC_TLSLD:
6209 break;
6210
6211 case BFD_RELOC_PPC_DTPMOD:
6212 case BFD_RELOC_PPC_TPREL16:
6213 case BFD_RELOC_PPC_TPREL16_LO:
6214 case BFD_RELOC_PPC_TPREL16_HI:
6215 case BFD_RELOC_PPC_TPREL16_HA:
6216 case BFD_RELOC_PPC_TPREL:
6217 case BFD_RELOC_PPC_DTPREL16:
6218 case BFD_RELOC_PPC_DTPREL16_LO:
6219 case BFD_RELOC_PPC_DTPREL16_HI:
6220 case BFD_RELOC_PPC_DTPREL16_HA:
6221 case BFD_RELOC_PPC_DTPREL:
6222 case BFD_RELOC_PPC_GOT_TLSGD16:
6223 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6224 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6225 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6226 case BFD_RELOC_PPC_GOT_TLSLD16:
6227 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6228 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6229 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6230 case BFD_RELOC_PPC_GOT_TPREL16:
6231 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6232 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6233 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6234 case BFD_RELOC_PPC_GOT_DTPREL16:
6235 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6236 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6237 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6238 case BFD_RELOC_PPC64_TPREL16_DS:
6239 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6240 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6241 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6242 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6243 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6244 case BFD_RELOC_PPC64_DTPREL16_DS:
6245 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6246 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6247 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6248 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6249 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6250 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6251 break;
6252 #endif
6253 /* Because SDA21 modifies the register field, the size is set to 4
6254 bytes, rather than 2, so offset it here appropriately. */
6255 case BFD_RELOC_PPC_EMB_SDA21:
6256 if (fixP->fx_pcrel)
6257 abort ();
6258
6259 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
6260 + ((target_big_endian) ? 2 : 0),
6261 value, 2);
6262 break;
6263
6264 case BFD_RELOC_8:
6265 if (fixP->fx_pcrel)
6266 {
6267 /* This can occur if there is a bug in the input assembler, eg:
6268 ".byte <undefined_symbol> - ." */
6269 if (fixP->fx_addsy)
6270 as_bad (_("Unable to handle reference to symbol %s"),
6271 S_GET_NAME (fixP->fx_addsy));
6272 else
6273 as_bad (_("Unable to resolve expression"));
6274 fixP->fx_done = 1;
6275 }
6276 else
6277 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6278 value, 1);
6279 break;
6280
6281 case BFD_RELOC_24_PLT_PCREL:
6282 case BFD_RELOC_PPC_LOCAL24PC:
6283 if (!fixP->fx_pcrel && !fixP->fx_done)
6284 abort ();
6285
6286 if (fixP->fx_done)
6287 {
6288 char *where;
6289 unsigned long insn;
6290
6291 /* Fetch the instruction, insert the fully resolved operand
6292 value, and stuff the instruction back again. */
6293 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6294 if (target_big_endian)
6295 insn = bfd_getb32 ((unsigned char *) where);
6296 else
6297 insn = bfd_getl32 ((unsigned char *) where);
6298 if ((value & 3) != 0)
6299 as_bad_where (fixP->fx_file, fixP->fx_line,
6300 _("must branch to an address a multiple of 4"));
6301 if ((offsetT) value < -0x40000000
6302 || (offsetT) value >= 0x40000000)
6303 as_bad_where (fixP->fx_file, fixP->fx_line,
6304 _("@local or @plt branch destination is too far away, %ld bytes"),
6305 (long) value);
6306 insn = insn | (value & 0x03fffffc);
6307 if (target_big_endian)
6308 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6309 else
6310 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6311 }
6312 break;
6313
6314 case BFD_RELOC_VTABLE_INHERIT:
6315 fixP->fx_done = 0;
6316 if (fixP->fx_addsy
6317 && !S_IS_DEFINED (fixP->fx_addsy)
6318 && !S_IS_WEAK (fixP->fx_addsy))
6319 S_SET_WEAK (fixP->fx_addsy);
6320 break;
6321
6322 case BFD_RELOC_VTABLE_ENTRY:
6323 fixP->fx_done = 0;
6324 break;
6325
6326 #ifdef OBJ_ELF
6327 /* Generated by reference to `sym@tocbase'. The sym is
6328 ignored by the linker. */
6329 case BFD_RELOC_PPC64_TOC:
6330 fixP->fx_done = 0;
6331 break;
6332 #endif
6333 default:
6334 fprintf (stderr,
6335 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6336 fflush (stderr);
6337 abort ();
6338 }
6339 }
6340
6341 #ifdef OBJ_ELF
6342 fixP->fx_addnumber = value;
6343
6344 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6345 from the section contents. If we are going to be emitting a reloc
6346 then the section contents are immaterial, so don't warn if they
6347 happen to overflow. Leave such warnings to ld. */
6348 if (!fixP->fx_done)
6349 fixP->fx_no_overflow = 1;
6350 #else
6351 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6352 fixP->fx_addnumber = 0;
6353 else
6354 {
6355 #ifdef TE_PE
6356 fixP->fx_addnumber = 0;
6357 #else
6358 /* We want to use the offset within the toc, not the actual VMA
6359 of the symbol. */
6360 fixP->fx_addnumber =
6361 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6362 - S_GET_VALUE (ppc_toc_csect);
6363 #endif
6364 }
6365 #endif
6366 }
6367
6368 /* Generate a reloc for a fixup. */
6369
6370 arelent *
6371 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
6372 {
6373 arelent *reloc;
6374
6375 reloc = (arelent *) xmalloc (sizeof (arelent));
6376
6377 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6378 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
6379 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6380 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6381 if (reloc->howto == (reloc_howto_type *) NULL)
6382 {
6383 as_bad_where (fixp->fx_file, fixp->fx_line,
6384 _("reloc %d not supported by object file format"),
6385 (int) fixp->fx_r_type);
6386 return NULL;
6387 }
6388 reloc->addend = fixp->fx_addnumber;
6389
6390 return reloc;
6391 }
6392
6393 void
6394 ppc_cfi_frame_initial_instructions (void)
6395 {
6396 cfi_add_CFA_def_cfa (1, 0);
6397 }
6398
6399 int
6400 tc_ppc_regname_to_dw2regnum (char *regname)
6401 {
6402 unsigned int regnum = -1;
6403 unsigned int i;
6404 const char *p;
6405 char *q;
6406 static struct { char *name; int dw2regnum; } regnames[] =
6407 {
6408 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6409 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6410 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6411 { "spe_acc", 111 }, { "spefscr", 112 }
6412 };
6413
6414 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6415 if (strcmp (regnames[i].name, regname) == 0)
6416 return regnames[i].dw2regnum;
6417
6418 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6419 {
6420 p = regname + 1 + (regname[1] == '.');
6421 regnum = strtoul (p, &q, 10);
6422 if (p == q || *q || regnum >= 32)
6423 return -1;
6424 if (regname[0] == 'f')
6425 regnum += 32;
6426 else if (regname[0] == 'v')
6427 regnum += 77;
6428 }
6429 else if (regname[0] == 'c' && regname[1] == 'r')
6430 {
6431 p = regname + 2 + (regname[2] == '.');
6432 if (p[0] < '0' || p[0] > '7' || p[1])
6433 return -1;
6434 regnum = p[0] - '0' + 68;
6435 }
6436 return regnum;
6437 }
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