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[binutils.git] / opcodes / rx-dis.c
blob1cdb710047f002a206c7c2f33abebf1b4396c164
1 /* Disassembler code for Renesas RX.
2 Copyright 2008, 2009 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4 Written by DJ Delorie.
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
23 #include <stdio.h>
25 #include "bfd.h"
26 #include "dis-asm.h"
27 #include "opcode/rx.h"
29 typedef struct
31 bfd_vma pc;
32 disassemble_info * dis;
33 } RX_Data;
35 static int
36 rx_get_byte (void * vdata)
38 bfd_byte buf[1];
39 RX_Data *rx_data = (RX_Data *) vdata;
41 rx_data->dis->read_memory_func (rx_data->pc,
42 buf,
44 rx_data->dis);
46 rx_data->pc ++;
47 return buf[0];
50 static char const * size_names[] =
52 "", ".b", ".ub", ".b", ".w", ".uw", ".w", ".a", ".l"
55 static char const * opsize_names[] =
57 "", ".b", ".b", ".b", ".w", ".w", ".w", ".a", ".l"
60 static char const * register_names[] =
62 /* general registers */
63 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
64 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
65 /* control register */
66 "psw", "pc", "usp", "fpsw", "", "", "", "wr",
67 "bpsw", "bpc", "isp", "fintv", "intb", "", "", "",
68 "pbp", "pben", "", "", "", "", "", "",
69 "bbpsw", "bbpc", "", "", "", "", "", ""
72 static char const * condition_names[] =
74 /* condition codes */
75 "eq", "ne", "c", "nc", "gtu", "leu", "pz", "n",
76 "ge", "lt", "gt", "le", "o", "no", "always", "never"
79 static const char * flag_names[] =
81 "c", "z", "s", "o", "", "", "", "",
82 "", "", "", "", "", "", "", "",
83 "i", "u", "", "", "", "", "", ""
84 "", "", "", "", "", "", "", "",
87 int
88 print_insn_rx (bfd_vma addr, disassemble_info * dis)
90 int rv;
91 RX_Data rx_data;
92 RX_Opcode_Decoded opcode;
93 const char * s;
95 rx_data.pc = addr;
96 rx_data.dis = dis;
98 rv = rx_decode_opcode (addr, &opcode, rx_get_byte, &rx_data);
100 dis->bytes_per_line = 10;
102 #define PR (dis->fprintf_func)
103 #define PS (dis->stream)
104 #define PC(c) PR (PS, "%c", c)
106 for (s = opcode.syntax; *s; s++)
108 if (*s != '%')
110 PC (*s);
112 else
114 RX_Opcode_Operand * oper;
115 int do_size = 0;
116 int do_hex = 0;
117 int do_addr = 0;
119 s ++;
121 if (*s == 'S')
123 do_size = 1;
124 s++;
126 if (*s == 'x')
128 do_hex = 1;
129 s++;
131 if (*s == 'a')
133 do_addr = 1;
134 s++;
137 switch (*s)
139 case '%':
140 PC ('%');
141 break;
143 case 's':
144 PR (PS, "%s", opsize_names[opcode.size]);
145 break;
147 case '0':
148 case '1':
149 case '2':
150 oper = opcode.op + *s - '0';
151 if (do_size)
153 if (oper->type == RX_Operand_Indirect)
154 PR (PS, "%s", size_names[oper->size]);
156 else
157 switch (oper->type)
159 case RX_Operand_Immediate:
160 if (do_addr)
161 dis->print_address_func (oper->addend, dis);
162 else if (do_hex
163 || oper->addend > 999
164 || oper->addend < -999)
165 PR (PS, "%#x", oper->addend);
166 else
167 PR (PS, "%d", oper->addend);
168 break;
169 case RX_Operand_Register:
170 case RX_Operand_TwoReg:
171 PR (PS, "%s", register_names[oper->reg]);
172 break;
173 case RX_Operand_Indirect:
174 if (oper->addend)
175 PR (PS, "%d[%s]", oper->addend, register_names[oper->reg]);
176 else
177 PR (PS, "[%s]", register_names[oper->reg]);
178 break;
179 case RX_Operand_Postinc:
180 PR (PS, "[%s+]", register_names[oper->reg]);
181 break;
182 case RX_Operand_Predec:
183 PR (PS, "[-%s]", register_names[oper->reg]);
184 break;
185 case RX_Operand_Condition:
186 PR (PS, "%s", condition_names[oper->reg]);
187 break;
188 case RX_Operand_Flag:
189 PR (PS, "%s", flag_names[oper->reg]);
190 break;
191 default:
192 PR (PS, "[???]");
193 break;
199 return rv;