1 #PIII SIMD instructions
13 cmpps $
0x2,%xmm1
,%xmm0
14 cmpps $
0x3,(%edx
),%xmm1
15 cmpss $
0x4,%xmm2
,%xmm2
16 cmpss $
0x5,(%esp
,1),%xmm3
17 cmpps $
0x6,%xmm5
,%xmm4
18 cmpps $
0x7,(%esi
),%xmm5
19 cmpss $
0x0,%xmm7
,%xmm6
20 cmpss $
0x1,(%eax
),%xmm7
24 cmpeqss
(%esp
,1),%xmm3
33 cmpunordps
0x0(%ebp
),%xmm4
34 cmpunordps
%xmm6
,%xmm5
35 cmpunordss
(%edi
),%xmm6
36 cmpunordss
%xmm0
,%xmm7
40 cmpneqss
(%esp
,1),%xmm3
49 cmpordps
0x0(%ebp
),%xmm4
56 cvtpi2ps
(%esp
,1),%xmm3
65 cvttss2si
0x0(%ebp
),%esp
94 movups
0x0(%ebp
),%xmm4
110 rsqrtss
0x0(%ebp
),%xmm4
112 shufps $
0x2,(%edi
),%xmm6
113 shufps $
0x3,%xmm0
,%xmm7
117 sqrtss
(%esp
,1),%xmm3
124 unpckhps
(%ebx
),%xmm2
126 unpcklps
0x0(%ebp
),%xmm4
134 pextrw $
0x0,%mm1
,%eax
135 pinsrw $
0x1,(%ecx
),%mm1
136 pinsrw $
0x2,%edx
,%mm2
150 pshufw $
0x1,%mm2
,%mm3
151 pshufw $
0x4,0x0(%ebp
),%mm6
156 prefetcht0
(%eax
,%ebx
,4)
160 # A SIMD instruction with a bad extension byte
161 .byte 0x2E,0x0F,0xC2,0x0A,0x08
164 # A bad sfence modrm byte
165 .byte 0x65,0x0F,0xAE,0xff
166 # Pad out to good alignment