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PR binutils/11742
[binutils.git] / bfd / elf32-arm.c
blobf6115bd24e37ea698234457a7b2fbaee21a5c3a7
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22 #include "sysdep.h"
23 #include <limits.h>
24
25 #include "bfd.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-vxworks.h"
30 #include "elf/arm.h"
31
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
58 #define elf_info_to_howto 0
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
64 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
69 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
73 static reloc_howto_type elf32_arm_howto_table_1[] =
74 {
75 /* No relocation. */
76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
135 HOWTO (R_ARM_LDR_PC_G0, /* type */
136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
138 32, /* bitsize */
139 TRUE, /* pc_relative */
140 0, /* bitpos */
141 complain_overflow_dont,/* complain_on_overflow */
142 bfd_elf_generic_reloc, /* special_function */
143 "R_ARM_LDR_PC_G0", /* name */
144 FALSE, /* partial_inplace */
145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
222 HOWTO (R_ARM_THM_CALL, /* type */
223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
225 24, /* bitsize */
226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
230 "R_ARM_THM_CALL", /* name */
231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
250 HOWTO (R_ARM_BREL_ADJ, /* type */
251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
253 32, /* bitsize */
254 FALSE, /* pc_relative */
255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
258 "R_ARM_BREL_ADJ", /* name */
259 FALSE, /* partial_inplace */
260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
322 /* Dynamic TLS relocations. */
323
324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
337
338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
424 HOWTO (R_ARM_GOTOFF32, /* type */
425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
432 "R_ARM_GOTOFF32", /* name */
433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
469 24, /* bitsize */
470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
475 FALSE, /* partial_inplace */
476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
513 0, /* bitpos */
514 complain_overflow_signed,/* complain_on_overflow */
515 bfd_elf_generic_reloc, /* special_function */
516 "R_ARM_THM_JUMP24", /* name */
517 FALSE, /* partial_inplace */
518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
521
522 HOWTO (R_ARM_BASE_ABS, /* type */
523 0, /* rightshift */
524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
530 "R_ARM_BASE_ABS", /* name */
531 FALSE, /* partial_inplace */
532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
839 complain_overflow_dont,/* complain_on_overflow */
840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
853 complain_overflow_dont,/* complain_on_overflow */
854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
888
889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
1270
1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
1355 EMPTY_HOWTO (90), /* Unallocated. */
1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
1436 0, /* bitsize */
1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
1489
1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
1503 FALSE), /* pcrel_offset */
1504
1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
1517 FALSE), /* pcrel_offset */
1518
1519 HOWTO (R_ARM_TLS_LDO32, /* type */
1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
1527 "R_ARM_TLS_LDO32", /* name */
1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
1531 FALSE), /* pcrel_offset */
1532
1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
1545 FALSE), /* pcrel_offset */
1546
1547 HOWTO (R_ARM_TLS_LE32, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 32, /* bitsize */
1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
1560
1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
1566 0, /* bitpos */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDO12", /* name */
1570 FALSE, /* partial_inplace */
1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
1574
1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
1580 0, /* bitpos */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LE12", /* name */
1584 FALSE, /* partial_inplace */
1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
1588
1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
1594 0, /* bitpos */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 bfd_elf_generic_reloc, /* special_function */
1597 "R_ARM_TLS_IE12GP", /* name */
1598 FALSE, /* partial_inplace */
1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602 };
1603
1604 /* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
1607
1608 249-255 extended, currently unused, relocations: */
1609
1610 static reloc_howto_type elf32_arm_howto_table_2[4] =
1611 {
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667 };
1668
1669 static reloc_howto_type *
1670 elf32_arm_howto_from_type (unsigned int r_type)
1671 {
1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1673 return &elf32_arm_howto_table_1[r_type];
1674
1675 if (r_type >= R_ARM_RREL32
1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
1678
1679 return NULL;
1680 }
1681
1682 static void
1683 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685 {
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690 }
1691
1692 struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698 /* All entries in this list must also be present in elf32_arm_howto_table. */
1699 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1780 };
1781
1782 static reloc_howto_type *
1783 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1784 bfd_reloc_code_real_type code)
1785 {
1786 unsigned int i;
1787
1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1791
1792 return NULL;
1793 }
1794
1795 static reloc_howto_type *
1796 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1797 const char *r_name)
1798 {
1799 unsigned int i;
1800
1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1807 if (elf32_arm_howto_table_2[i].name != NULL
1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1809 return &elf32_arm_howto_table_2[i];
1810
1811 return NULL;
1812 }
1813
1814 /* Support for core dump NOTE sections. */
1815
1816 static bfd_boolean
1817 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1818 {
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
1827 case 148: /* Linux/ARM 32-bit. */
1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
1832 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844 }
1845
1846 static bfd_boolean
1847 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1848 {
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
1854 case 124: /* Linux/ARM elf_prpsinfo. */
1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
1864 {
1865 char *command = elf_tdata (abfd)->core_command;
1866 int n = strlen (command);
1867
1868 if (0 < n && command[n - 1] == ' ')
1869 command[n - 1] = '\0';
1870 }
1871
1872 return TRUE;
1873 }
1874
1875 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1876 #define TARGET_LITTLE_NAME "elf32-littlearm"
1877 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1878 #define TARGET_BIG_NAME "elf32-bigarm"
1879
1880 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1881 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1882
1883 typedef unsigned long int insn32;
1884 typedef unsigned short int insn16;
1885
1886 /* In lieu of proper flags, assume all EABIv4 or later objects are
1887 interworkable. */
1888 #define INTERWORK_FLAG(abfd) \
1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1891 || ((abfd)->flags & BFD_LINKER_CREATED))
1892
1893 /* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
1896 name can be changed. The only requirement is the %s be present. */
1897 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
1903 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
1906 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1907 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1908
1909 #define STUB_ENTRY_NAME "__%s_veneer"
1910
1911 /* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
1915 #ifdef FOUR_WORD_PLT
1916
1917 /* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
1919 called before the relocation has been set up calls the dynamic
1920 linker first. */
1921 static const bfd_vma elf32_arm_plt0_entry [] =
1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929 /* Subsequent entries in a procedure linkage table look like
1930 this. */
1931 static const bfd_vma elf32_arm_plt_entry [] =
1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939 #else
1940
1941 /* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
1945 static const bfd_vma elf32_arm_plt0_entry [] =
1946 {
1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
1952 };
1953
1954 /* Subsequent entries in a procedure linkage table look like
1955 this. */
1956 static const bfd_vma elf32_arm_plt_entry [] =
1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963 #endif
1964
1965 /* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975 /* The format of subsequent entries in a VxWorks executable. */
1976 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986 /* The format of entries in a VxWorks shared library. */
1987 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
1997 /* An initial stub used if the PLT entry is referenced from Thumb code. */
1998 #define PLT_THUMB_STUB_SIZE 4
1999 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
2005 /* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
2007 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2008 {
2009 0xe51ff004, /* ldr pc, [pc, #-4] */
2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
2013 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2014 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2015 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2016 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2017 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2018 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2019
2020 enum stub_insn_type
2021 {
2022 THUMB16_TYPE = 1,
2023 THUMB32_TYPE,
2024 ARM_TYPE,
2025 DATA_TYPE
2026 };
2027
2028 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2029 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2030 is inserted in arm_build_one_stub(). */
2031 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2032 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2033 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2034 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2035 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2036 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2037
2038 typedef struct
2039 {
2040 bfd_vma data;
2041 enum stub_insn_type type;
2042 unsigned int r_type;
2043 int reloc_addend;
2044 } insn_sequence;
2045
2046 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2047 to reach the stub if necessary. */
2048 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2049 {
2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2052 };
2053
2054 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2055 available. */
2056 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2057 {
2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2059 ARM_INSN(0xe12fff1c), /* bx ip */
2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2061 };
2062
2063 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2064 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2065 {
2066 THUMB16_INSN(0xb401), /* push {r0} */
2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2068 THUMB16_INSN(0x4684), /* mov ip, r0 */
2069 THUMB16_INSN(0xbc01), /* pop {r0} */
2070 THUMB16_INSN(0x4760), /* bx ip */
2071 THUMB16_INSN(0xbf00), /* nop */
2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2073 };
2074
2075 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2076 allowed. */
2077 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2078 {
2079 THUMB16_INSN(0x4778), /* bx pc */
2080 THUMB16_INSN(0x46c0), /* nop */
2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2082 ARM_INSN(0xe12fff1c), /* bx ip */
2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2084 };
2085
2086 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2087 available. */
2088 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2089 {
2090 THUMB16_INSN(0x4778), /* bx pc */
2091 THUMB16_INSN(0x46c0), /* nop */
2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2094 };
2095
2096 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2097 one, when the destination is close enough. */
2098 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2099 {
2100 THUMB16_INSN(0x4778), /* bx pc */
2101 THUMB16_INSN(0x46c0), /* nop */
2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
2103 };
2104
2105 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2106 blx to reach the stub if necessary. */
2107 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2108 {
2109 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2112 };
2113
2114 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2115 blx to reach the stub if necessary. We can not add into pc;
2116 it is not guaranteed to mode switch (different in ARMv6 and
2117 ARMv7). */
2118 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2119 {
2120 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2122 ARM_INSN(0xe12fff1c), /* bx ip */
2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2124 };
2125
2126 /* V4T ARM -> ARM long branch stub, PIC. */
2127 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2128 {
2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2131 ARM_INSN(0xe12fff1c), /* bx ip */
2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2133 };
2134
2135 /* V4T Thumb -> ARM long branch stub, PIC. */
2136 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2137 {
2138 THUMB16_INSN(0x4778), /* bx pc */
2139 THUMB16_INSN(0x46c0), /* nop */
2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2143 };
2144
2145 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2146 architectures. */
2147 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2148 {
2149 THUMB16_INSN(0xb401), /* push {r0} */
2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2151 THUMB16_INSN(0x46fc), /* mov ip, pc */
2152 THUMB16_INSN(0x4484), /* add ip, r0 */
2153 THUMB16_INSN(0xbc01), /* pop {r0} */
2154 THUMB16_INSN(0x4760), /* bx ip */
2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2156 };
2157
2158 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2159 allowed. */
2160 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2161 {
2162 THUMB16_INSN(0x4778), /* bx pc */
2163 THUMB16_INSN(0x46c0), /* nop */
2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2166 ARM_INSN(0xe12fff1c), /* bx ip */
2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2168 };
2169
2170 /* Cortex-A8 erratum-workaround stubs. */
2171
2172 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2173 can't use a conditional branch to reach this stub). */
2174
2175 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2176 {
2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2180 };
2181
2182 /* Stub used for b.w and bl.w instructions. */
2183
2184 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2185 {
2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2187 };
2188
2189 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2190 {
2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2192 };
2193
2194 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2195 instruction (which switches to ARM mode) to point to this stub. Jump to the
2196 real destination using an ARM-mode branch. */
2197
2198 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2199 {
2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2201 };
2202
2203 /* Section name for stubs is the associated section name plus this
2204 string. */
2205 #define STUB_SUFFIX ".stub"
2206
2207 /* One entry per long/short branch stub defined above. */
2208 #define DEF_STUBS \
2209 DEF_STUB(long_branch_any_any) \
2210 DEF_STUB(long_branch_v4t_arm_thumb) \
2211 DEF_STUB(long_branch_thumb_only) \
2212 DEF_STUB(long_branch_v4t_thumb_thumb) \
2213 DEF_STUB(long_branch_v4t_thumb_arm) \
2214 DEF_STUB(short_branch_v4t_thumb_arm) \
2215 DEF_STUB(long_branch_any_arm_pic) \
2216 DEF_STUB(long_branch_any_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2220 DEF_STUB(long_branch_thumb_only_pic) \
2221 DEF_STUB(a8_veneer_b_cond) \
2222 DEF_STUB(a8_veneer_b) \
2223 DEF_STUB(a8_veneer_bl) \
2224 DEF_STUB(a8_veneer_blx)
2225
2226 #define DEF_STUB(x) arm_stub_##x,
2227 enum elf32_arm_stub_type {
2228 arm_stub_none,
2229 DEF_STUBS
2230 /* Note the first a8_veneer type */
2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2232 };
2233 #undef DEF_STUB
2234
2235 typedef struct
2236 {
2237 const insn_sequence* template_sequence;
2238 int template_size;
2239 } stub_def;
2240
2241 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2242 static const stub_def stub_definitions[] = {
2243 {NULL, 0},
2244 DEF_STUBS
2245 };
2246
2247 struct elf32_arm_stub_hash_entry
2248 {
2249 /* Base hash table entry structure. */
2250 struct bfd_hash_entry root;
2251
2252 /* The stub section. */
2253 asection *stub_sec;
2254
2255 /* Offset within stub_sec of the beginning of this stub. */
2256 bfd_vma stub_offset;
2257
2258 /* Given the symbol's value and its section we can determine its final
2259 value when building the stubs (so the stub knows where to jump). */
2260 bfd_vma target_value;
2261 asection *target_section;
2262
2263 /* Offset to apply to relocation referencing target_value. */
2264 bfd_vma target_addend;
2265
2266 /* The instruction which caused this stub to be generated (only valid for
2267 Cortex-A8 erratum workaround stubs at present). */
2268 unsigned long orig_insn;
2269
2270 /* The stub type. */
2271 enum elf32_arm_stub_type stub_type;
2272 /* Its encoding size in bytes. */
2273 int stub_size;
2274 /* Its template. */
2275 const insn_sequence *stub_template;
2276 /* The size of the template (number of entries). */
2277 int stub_template_size;
2278
2279 /* The symbol table entry, if any, that this was derived from. */
2280 struct elf32_arm_link_hash_entry *h;
2281
2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2283 unsigned char st_type;
2284
2285 /* Where this stub is being called from, or, in the case of combined
2286 stub sections, the first input section in the group. */
2287 asection *id_sec;
2288
2289 /* The name for the local symbol at the start of this stub. The
2290 stub name in the hash table has to be unique; this does not, so
2291 it can be friendlier. */
2292 char *output_name;
2293 };
2294
2295 /* Used to build a map of a section. This is required for mixed-endian
2296 code/data. */
2297
2298 typedef struct elf32_elf_section_map
2299 {
2300 bfd_vma vma;
2301 char type;
2302 }
2303 elf32_arm_section_map;
2304
2305 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2306
2307 typedef enum
2308 {
2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2311 VFP11_ERRATUM_ARM_VENEER,
2312 VFP11_ERRATUM_THUMB_VENEER
2313 }
2314 elf32_vfp11_erratum_type;
2315
2316 typedef struct elf32_vfp11_erratum_list
2317 {
2318 struct elf32_vfp11_erratum_list *next;
2319 bfd_vma vma;
2320 union
2321 {
2322 struct
2323 {
2324 struct elf32_vfp11_erratum_list *veneer;
2325 unsigned int vfp_insn;
2326 } b;
2327 struct
2328 {
2329 struct elf32_vfp11_erratum_list *branch;
2330 unsigned int id;
2331 } v;
2332 } u;
2333 elf32_vfp11_erratum_type type;
2334 }
2335 elf32_vfp11_erratum_list;
2336
2337 typedef enum
2338 {
2339 DELETE_EXIDX_ENTRY,
2340 INSERT_EXIDX_CANTUNWIND_AT_END
2341 }
2342 arm_unwind_edit_type;
2343
2344 /* A (sorted) list of edits to apply to an unwind table. */
2345 typedef struct arm_unwind_table_edit
2346 {
2347 arm_unwind_edit_type type;
2348 /* Note: we sometimes want to insert an unwind entry corresponding to a
2349 section different from the one we're currently writing out, so record the
2350 (text) section this edit relates to here. */
2351 asection *linked_section;
2352 unsigned int index;
2353 struct arm_unwind_table_edit *next;
2354 }
2355 arm_unwind_table_edit;
2356
2357 typedef struct _arm_elf_section_data
2358 {
2359 /* Information about mapping symbols. */
2360 struct bfd_elf_section_data elf;
2361 unsigned int mapcount;
2362 unsigned int mapsize;
2363 elf32_arm_section_map *map;
2364 /* Information about CPU errata. */
2365 unsigned int erratumcount;
2366 elf32_vfp11_erratum_list *erratumlist;
2367 /* Information about unwind tables. */
2368 union
2369 {
2370 /* Unwind info attached to a text section. */
2371 struct
2372 {
2373 asection *arm_exidx_sec;
2374 } text;
2375
2376 /* Unwind info attached to an .ARM.exidx section. */
2377 struct
2378 {
2379 arm_unwind_table_edit *unwind_edit_list;
2380 arm_unwind_table_edit *unwind_edit_tail;
2381 } exidx;
2382 } u;
2383 }
2384 _arm_elf_section_data;
2385
2386 #define elf32_arm_section_data(sec) \
2387 ((_arm_elf_section_data *) elf_section_data (sec))
2388
2389 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2391 so may be created multiple times: we use an array of these entries whilst
2392 relaxing which we can refresh easily, then create stubs for each potentially
2393 erratum-triggering instruction once we've settled on a solution. */
2394
2395 struct a8_erratum_fix {
2396 bfd *input_bfd;
2397 asection *section;
2398 bfd_vma offset;
2399 bfd_vma addend;
2400 unsigned long orig_insn;
2401 char *stub_name;
2402 enum elf32_arm_stub_type stub_type;
2403 int st_type;
2404 };
2405
2406 /* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409 struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
2412 struct elf32_arm_link_hash_entry *hash;
2413 const char *sym_name;
2414 unsigned int r_type;
2415 unsigned char st_type;
2416 bfd_boolean non_a8_stub;
2417 };
2418
2419 /* The size of the thread control block. */
2420 #define TCB_SIZE 8
2421
2422 struct elf_arm_obj_tdata
2423 {
2424 struct elf_obj_tdata root;
2425
2426 /* tls_type for each local got entry. */
2427 char *local_got_tls_type;
2428
2429 /* Zero to warn when linking objects with incompatible enum sizes. */
2430 int no_enum_size_warning;
2431
2432 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2433 int no_wchar_size_warning;
2434 };
2435
2436 #define elf_arm_tdata(bfd) \
2437 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2438
2439 #define elf32_arm_local_got_tls_type(bfd) \
2440 (elf_arm_tdata (bfd)->local_got_tls_type)
2441
2442 #define is_arm_elf(bfd) \
2443 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2444 && elf_tdata (bfd) != NULL \
2445 && elf_object_id (bfd) == ARM_ELF_DATA)
2446
2447 static bfd_boolean
2448 elf32_arm_mkobject (bfd *abfd)
2449 {
2450 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2451 ARM_ELF_DATA);
2452 }
2453
2454 /* The ARM linker needs to keep track of the number of relocs that it
2455 decides to copy in check_relocs for each symbol. This is so that
2456 it can discard PC relative relocs if it doesn't need them when
2457 linking with -Bsymbolic. We store the information in a field
2458 extending the regular ELF linker hash table. */
2459
2460 /* This structure keeps track of the number of relocs we have copied
2461 for a given symbol. */
2462 struct elf32_arm_relocs_copied
2463 {
2464 /* Next section. */
2465 struct elf32_arm_relocs_copied * next;
2466 /* A section in dynobj. */
2467 asection * section;
2468 /* Number of relocs copied in this section. */
2469 bfd_size_type count;
2470 /* Number of PC-relative relocs copied in this section. */
2471 bfd_size_type pc_count;
2472 };
2473
2474 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2475
2476 /* Arm ELF linker hash entry. */
2477 struct elf32_arm_link_hash_entry
2478 {
2479 struct elf_link_hash_entry root;
2480
2481 /* Number of PC relative relocs copied for this symbol. */
2482 struct elf32_arm_relocs_copied * relocs_copied;
2483
2484 /* We reference count Thumb references to a PLT entry separately,
2485 so that we can emit the Thumb trampoline only if needed. */
2486 bfd_signed_vma plt_thumb_refcount;
2487
2488 /* Some references from Thumb code may be eliminated by BL->BLX
2489 conversion, so record them separately. */
2490 bfd_signed_vma plt_maybe_thumb_refcount;
2491
2492 /* Since PLT entries have variable size if the Thumb prologue is
2493 used, we need to record the index into .got.plt instead of
2494 recomputing it from the PLT offset. */
2495 bfd_signed_vma plt_got_offset;
2496
2497 #define GOT_UNKNOWN 0
2498 #define GOT_NORMAL 1
2499 #define GOT_TLS_GD 2
2500 #define GOT_TLS_IE 4
2501 unsigned char tls_type;
2502
2503 /* The symbol marking the real symbol location for exported thumb
2504 symbols with Arm stubs. */
2505 struct elf_link_hash_entry *export_glue;
2506
2507 /* A pointer to the most recently used stub hash entry against this
2508 symbol. */
2509 struct elf32_arm_stub_hash_entry *stub_cache;
2510 };
2511
2512 /* Traverse an arm ELF linker hash table. */
2513 #define elf32_arm_link_hash_traverse(table, func, info) \
2514 (elf_link_hash_traverse \
2515 (&(table)->root, \
2516 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2517 (info)))
2518
2519 /* Get the ARM elf linker hash table from a link_info structure. */
2520 #define elf32_arm_hash_table(info) \
2521 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2522 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2523
2524 #define arm_stub_hash_lookup(table, string, create, copy) \
2525 ((struct elf32_arm_stub_hash_entry *) \
2526 bfd_hash_lookup ((table), (string), (create), (copy)))
2527
2528 /* Array to keep track of which stub sections have been created, and
2529 information on stub grouping. */
2530 struct map_stub
2531 {
2532 /* This is the section to which stubs in the group will be
2533 attached. */
2534 asection *link_sec;
2535 /* The stub section. */
2536 asection *stub_sec;
2537 };
2538
2539 /* ARM ELF linker hash table. */
2540 struct elf32_arm_link_hash_table
2541 {
2542 /* The main hash table. */
2543 struct elf_link_hash_table root;
2544
2545 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2546 bfd_size_type thumb_glue_size;
2547
2548 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2549 bfd_size_type arm_glue_size;
2550
2551 /* The size in bytes of section containing the ARMv4 BX veneers. */
2552 bfd_size_type bx_glue_size;
2553
2554 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2555 veneer has been populated. */
2556 bfd_vma bx_glue_offset[15];
2557
2558 /* The size in bytes of the section containing glue for VFP11 erratum
2559 veneers. */
2560 bfd_size_type vfp11_erratum_glue_size;
2561
2562 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2563 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2564 elf32_arm_write_section(). */
2565 struct a8_erratum_fix *a8_erratum_fixes;
2566 unsigned int num_a8_erratum_fixes;
2567
2568 /* An arbitrary input BFD chosen to hold the glue sections. */
2569 bfd * bfd_of_glue_owner;
2570
2571 /* Nonzero to output a BE8 image. */
2572 int byteswap_code;
2573
2574 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2575 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2576 int target1_is_rel;
2577
2578 /* The relocation to use for R_ARM_TARGET2 relocations. */
2579 int target2_reloc;
2580
2581 /* 0 = Ignore R_ARM_V4BX.
2582 1 = Convert BX to MOV PC.
2583 2 = Generate v4 interworing stubs. */
2584 int fix_v4bx;
2585
2586 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2587 int fix_cortex_a8;
2588
2589 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2590 int use_blx;
2591
2592 /* What sort of code sequences we should look for which may trigger the
2593 VFP11 denorm erratum. */
2594 bfd_arm_vfp11_fix vfp11_fix;
2595
2596 /* Global counter for the number of fixes we have emitted. */
2597 int num_vfp11_fixes;
2598
2599 /* Nonzero to force PIC branch veneers. */
2600 int pic_veneer;
2601
2602 /* The number of bytes in the initial entry in the PLT. */
2603 bfd_size_type plt_header_size;
2604
2605 /* The number of bytes in the subsequent PLT etries. */
2606 bfd_size_type plt_entry_size;
2607
2608 /* True if the target system is VxWorks. */
2609 int vxworks_p;
2610
2611 /* True if the target system is Symbian OS. */
2612 int symbian_p;
2613
2614 /* True if the target uses REL relocations. */
2615 int use_rel;
2616
2617 /* Short-cuts to get to dynamic linker sections. */
2618 asection *sgot;
2619 asection *sgotplt;
2620 asection *srelgot;
2621 asection *splt;
2622 asection *srelplt;
2623 asection *sdynbss;
2624 asection *srelbss;
2625
2626 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2627 asection *srelplt2;
2628
2629 /* Data for R_ARM_TLS_LDM32 relocations. */
2630 union
2631 {
2632 bfd_signed_vma refcount;
2633 bfd_vma offset;
2634 } tls_ldm_got;
2635
2636 /* Small local sym cache. */
2637 struct sym_cache sym_cache;
2638
2639 /* For convenience in allocate_dynrelocs. */
2640 bfd * obfd;
2641
2642 /* The stub hash table. */
2643 struct bfd_hash_table stub_hash_table;
2644
2645 /* Linker stub bfd. */
2646 bfd *stub_bfd;
2647
2648 /* Linker call-backs. */
2649 asection * (*add_stub_section) (const char *, asection *);
2650 void (*layout_sections_again) (void);
2651
2652 /* Array to keep track of which stub sections have been created, and
2653 information on stub grouping. */
2654 struct map_stub *stub_group;
2655
2656 /* Number of elements in stub_group. */
2657 int top_id;
2658
2659 /* Assorted information used by elf32_arm_size_stubs. */
2660 unsigned int bfd_count;
2661 int top_index;
2662 asection **input_list;
2663 };
2664
2665 /* Create an entry in an ARM ELF linker hash table. */
2666
2667 static struct bfd_hash_entry *
2668 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2669 struct bfd_hash_table * table,
2670 const char * string)
2671 {
2672 struct elf32_arm_link_hash_entry * ret =
2673 (struct elf32_arm_link_hash_entry *) entry;
2674
2675 /* Allocate the structure if it has not already been allocated by a
2676 subclass. */
2677 if (ret == NULL)
2678 ret = (struct elf32_arm_link_hash_entry *)
2679 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2680 if (ret == NULL)
2681 return (struct bfd_hash_entry *) ret;
2682
2683 /* Call the allocation method of the superclass. */
2684 ret = ((struct elf32_arm_link_hash_entry *)
2685 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2686 table, string));
2687 if (ret != NULL)
2688 {
2689 ret->relocs_copied = NULL;
2690 ret->tls_type = GOT_UNKNOWN;
2691 ret->plt_thumb_refcount = 0;
2692 ret->plt_maybe_thumb_refcount = 0;
2693 ret->plt_got_offset = -1;
2694 ret->export_glue = NULL;
2695
2696 ret->stub_cache = NULL;
2697 }
2698
2699 return (struct bfd_hash_entry *) ret;
2700 }
2701
2702 /* Initialize an entry in the stub hash table. */
2703
2704 static struct bfd_hash_entry *
2705 stub_hash_newfunc (struct bfd_hash_entry *entry,
2706 struct bfd_hash_table *table,
2707 const char *string)
2708 {
2709 /* Allocate the structure if it has not already been allocated by a
2710 subclass. */
2711 if (entry == NULL)
2712 {
2713 entry = (struct bfd_hash_entry *)
2714 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
2715 if (entry == NULL)
2716 return entry;
2717 }
2718
2719 /* Call the allocation method of the superclass. */
2720 entry = bfd_hash_newfunc (entry, table, string);
2721 if (entry != NULL)
2722 {
2723 struct elf32_arm_stub_hash_entry *eh;
2724
2725 /* Initialize the local fields. */
2726 eh = (struct elf32_arm_stub_hash_entry *) entry;
2727 eh->stub_sec = NULL;
2728 eh->stub_offset = 0;
2729 eh->target_value = 0;
2730 eh->target_section = NULL;
2731 eh->target_addend = 0;
2732 eh->orig_insn = 0;
2733 eh->stub_type = arm_stub_none;
2734 eh->stub_size = 0;
2735 eh->stub_template = NULL;
2736 eh->stub_template_size = 0;
2737 eh->h = NULL;
2738 eh->id_sec = NULL;
2739 eh->output_name = NULL;
2740 }
2741
2742 return entry;
2743 }
2744
2745 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
2746 shortcuts to them in our hash table. */
2747
2748 static bfd_boolean
2749 create_got_section (bfd *dynobj, struct bfd_link_info *info)
2750 {
2751 struct elf32_arm_link_hash_table *htab;
2752
2753 htab = elf32_arm_hash_table (info);
2754 if (htab == NULL)
2755 return FALSE;
2756
2757 /* BPABI objects never have a GOT, or associated sections. */
2758 if (htab->symbian_p)
2759 return TRUE;
2760
2761 if (! _bfd_elf_create_got_section (dynobj, info))
2762 return FALSE;
2763
2764 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2765 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2766 if (!htab->sgot || !htab->sgotplt)
2767 abort ();
2768
2769 htab->srelgot = bfd_get_section_by_name (dynobj,
2770 RELOC_SECTION (htab, ".got"));
2771 if (htab->srelgot == NULL)
2772 return FALSE;
2773 return TRUE;
2774 }
2775
2776 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2777 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
2778 hash table. */
2779
2780 static bfd_boolean
2781 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
2782 {
2783 struct elf32_arm_link_hash_table *htab;
2784
2785 htab = elf32_arm_hash_table (info);
2786 if (htab == NULL)
2787 return FALSE;
2788
2789 if (!htab->sgot && !create_got_section (dynobj, info))
2790 return FALSE;
2791
2792 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2793 return FALSE;
2794
2795 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
2796 htab->srelplt = bfd_get_section_by_name (dynobj,
2797 RELOC_SECTION (htab, ".plt"));
2798 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2799 if (!info->shared)
2800 htab->srelbss = bfd_get_section_by_name (dynobj,
2801 RELOC_SECTION (htab, ".bss"));
2802
2803 if (htab->vxworks_p)
2804 {
2805 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2806 return FALSE;
2807
2808 if (info->shared)
2809 {
2810 htab->plt_header_size = 0;
2811 htab->plt_entry_size
2812 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2813 }
2814 else
2815 {
2816 htab->plt_header_size
2817 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2818 htab->plt_entry_size
2819 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2820 }
2821 }
2822
2823 if (!htab->splt
2824 || !htab->srelplt
2825 || !htab->sdynbss
2826 || (!info->shared && !htab->srelbss))
2827 abort ();
2828
2829 return TRUE;
2830 }
2831
2832 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2833
2834 static void
2835 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2836 struct elf_link_hash_entry *dir,
2837 struct elf_link_hash_entry *ind)
2838 {
2839 struct elf32_arm_link_hash_entry *edir, *eind;
2840
2841 edir = (struct elf32_arm_link_hash_entry *) dir;
2842 eind = (struct elf32_arm_link_hash_entry *) ind;
2843
2844 if (eind->relocs_copied != NULL)
2845 {
2846 if (edir->relocs_copied != NULL)
2847 {
2848 struct elf32_arm_relocs_copied **pp;
2849 struct elf32_arm_relocs_copied *p;
2850
2851 /* Add reloc counts against the indirect sym to the direct sym
2852 list. Merge any entries against the same section. */
2853 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2854 {
2855 struct elf32_arm_relocs_copied *q;
2856
2857 for (q = edir->relocs_copied; q != NULL; q = q->next)
2858 if (q->section == p->section)
2859 {
2860 q->pc_count += p->pc_count;
2861 q->count += p->count;
2862 *pp = p->next;
2863 break;
2864 }
2865 if (q == NULL)
2866 pp = &p->next;
2867 }
2868 *pp = edir->relocs_copied;
2869 }
2870
2871 edir->relocs_copied = eind->relocs_copied;
2872 eind->relocs_copied = NULL;
2873 }
2874
2875 if (ind->root.type == bfd_link_hash_indirect)
2876 {
2877 /* Copy over PLT info. */
2878 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2879 eind->plt_thumb_refcount = 0;
2880 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2881 eind->plt_maybe_thumb_refcount = 0;
2882
2883 if (dir->got.refcount <= 0)
2884 {
2885 edir->tls_type = eind->tls_type;
2886 eind->tls_type = GOT_UNKNOWN;
2887 }
2888 }
2889
2890 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2891 }
2892
2893 /* Create an ARM elf linker hash table. */
2894
2895 static struct bfd_link_hash_table *
2896 elf32_arm_link_hash_table_create (bfd *abfd)
2897 {
2898 struct elf32_arm_link_hash_table *ret;
2899 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2900
2901 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
2902 if (ret == NULL)
2903 return NULL;
2904
2905 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2906 elf32_arm_link_hash_newfunc,
2907 sizeof (struct elf32_arm_link_hash_entry),
2908 ARM_ELF_DATA))
2909 {
2910 free (ret);
2911 return NULL;
2912 }
2913
2914 ret->sgot = NULL;
2915 ret->sgotplt = NULL;
2916 ret->srelgot = NULL;
2917 ret->splt = NULL;
2918 ret->srelplt = NULL;
2919 ret->sdynbss = NULL;
2920 ret->srelbss = NULL;
2921 ret->srelplt2 = NULL;
2922 ret->thumb_glue_size = 0;
2923 ret->arm_glue_size = 0;
2924 ret->bx_glue_size = 0;
2925 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2926 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2927 ret->vfp11_erratum_glue_size = 0;
2928 ret->num_vfp11_fixes = 0;
2929 ret->fix_cortex_a8 = 0;
2930 ret->bfd_of_glue_owner = NULL;
2931 ret->byteswap_code = 0;
2932 ret->target1_is_rel = 0;
2933 ret->target2_reloc = R_ARM_NONE;
2934 #ifdef FOUR_WORD_PLT
2935 ret->plt_header_size = 16;
2936 ret->plt_entry_size = 16;
2937 #else
2938 ret->plt_header_size = 20;
2939 ret->plt_entry_size = 12;
2940 #endif
2941 ret->fix_v4bx = 0;
2942 ret->use_blx = 0;
2943 ret->vxworks_p = 0;
2944 ret->symbian_p = 0;
2945 ret->use_rel = 1;
2946 ret->sym_cache.abfd = NULL;
2947 ret->obfd = abfd;
2948 ret->tls_ldm_got.refcount = 0;
2949 ret->stub_bfd = NULL;
2950 ret->add_stub_section = NULL;
2951 ret->layout_sections_again = NULL;
2952 ret->stub_group = NULL;
2953 ret->top_id = 0;
2954 ret->bfd_count = 0;
2955 ret->top_index = 0;
2956 ret->input_list = NULL;
2957
2958 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2959 sizeof (struct elf32_arm_stub_hash_entry)))
2960 {
2961 free (ret);
2962 return NULL;
2963 }
2964
2965 return &ret->root.root;
2966 }
2967
2968 /* Free the derived linker hash table. */
2969
2970 static void
2971 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2972 {
2973 struct elf32_arm_link_hash_table *ret
2974 = (struct elf32_arm_link_hash_table *) hash;
2975
2976 bfd_hash_table_free (&ret->stub_hash_table);
2977 _bfd_generic_link_hash_table_free (hash);
2978 }
2979
2980 /* Determine if we're dealing with a Thumb only architecture. */
2981
2982 static bfd_boolean
2983 using_thumb_only (struct elf32_arm_link_hash_table *globals)
2984 {
2985 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2986 Tag_CPU_arch);
2987 int profile;
2988
2989 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
2990 return TRUE;
2991
2992 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
2993 return FALSE;
2994
2995 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2996 Tag_CPU_arch_profile);
2997
2998 return profile == 'M';
2999 }
3000
3001 /* Determine if we're dealing with a Thumb-2 object. */
3002
3003 static bfd_boolean
3004 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3005 {
3006 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3007 Tag_CPU_arch);
3008 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3009 }
3010
3011 /* Determine what kind of NOPs are available. */
3012
3013 static bfd_boolean
3014 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3015 {
3016 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3017 Tag_CPU_arch);
3018 return arch == TAG_CPU_ARCH_V6T2
3019 || arch == TAG_CPU_ARCH_V6K
3020 || arch == TAG_CPU_ARCH_V7
3021 || arch == TAG_CPU_ARCH_V7E_M;
3022 }
3023
3024 static bfd_boolean
3025 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3026 {
3027 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3028 Tag_CPU_arch);
3029 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3030 || arch == TAG_CPU_ARCH_V7E_M);
3031 }
3032
3033 static bfd_boolean
3034 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3035 {
3036 switch (stub_type)
3037 {
3038 case arm_stub_long_branch_thumb_only:
3039 case arm_stub_long_branch_v4t_thumb_arm:
3040 case arm_stub_short_branch_v4t_thumb_arm:
3041 case arm_stub_long_branch_v4t_thumb_arm_pic:
3042 case arm_stub_long_branch_thumb_only_pic:
3043 return TRUE;
3044 case arm_stub_none:
3045 BFD_FAIL ();
3046 return FALSE;
3047 break;
3048 default:
3049 return FALSE;
3050 }
3051 }
3052
3053 /* Determine the type of stub needed, if any, for a call. */
3054
3055 static enum elf32_arm_stub_type
3056 arm_type_of_stub (struct bfd_link_info *info,
3057 asection *input_sec,
3058 const Elf_Internal_Rela *rel,
3059 int *actual_st_type,
3060 struct elf32_arm_link_hash_entry *hash,
3061 bfd_vma destination,
3062 asection *sym_sec,
3063 bfd *input_bfd,
3064 const char *name)
3065 {
3066 bfd_vma location;
3067 bfd_signed_vma branch_offset;
3068 unsigned int r_type;
3069 struct elf32_arm_link_hash_table * globals;
3070 int thumb2;
3071 int thumb_only;
3072 enum elf32_arm_stub_type stub_type = arm_stub_none;
3073 int use_plt = 0;
3074 int st_type = *actual_st_type;
3075
3076 /* We don't know the actual type of destination in case it is of
3077 type STT_SECTION: give up. */
3078 if (st_type == STT_SECTION)
3079 return stub_type;
3080
3081 globals = elf32_arm_hash_table (info);
3082 if (globals == NULL)
3083 return stub_type;
3084
3085 thumb_only = using_thumb_only (globals);
3086
3087 thumb2 = using_thumb2 (globals);
3088
3089 /* Determine where the call point is. */
3090 location = (input_sec->output_offset
3091 + input_sec->output_section->vma
3092 + rel->r_offset);
3093
3094 r_type = ELF32_R_TYPE (rel->r_info);
3095
3096 /* Keep a simpler condition, for the sake of clarity. */
3097 if (globals->splt != NULL
3098 && hash != NULL
3099 && hash->root.plt.offset != (bfd_vma) -1)
3100 {
3101 use_plt = 1;
3102
3103 /* Note when dealing with PLT entries: the main PLT stub is in
3104 ARM mode, so if the branch is in Thumb mode, another
3105 Thumb->ARM stub will be inserted later just before the ARM
3106 PLT stub. We don't take this extra distance into account
3107 here, because if a long branch stub is needed, we'll add a
3108 Thumb->Arm one and branch directly to the ARM PLT entry
3109 because it avoids spreading offset corrections in several
3110 places. */
3111
3112 destination = (globals->splt->output_section->vma
3113 + globals->splt->output_offset
3114 + hash->root.plt.offset);
3115 st_type = STT_FUNC;
3116 }
3117
3118 branch_offset = (bfd_signed_vma)(destination - location);
3119
3120 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3121 {
3122 /* Handle cases where:
3123 - this call goes too far (different Thumb/Thumb2 max
3124 distance)
3125 - it's a Thumb->Arm call and blx is not available, or it's a
3126 Thumb->Arm branch (not bl). A stub is needed in this case,
3127 but only if this call is not through a PLT entry. Indeed,
3128 PLT stubs handle mode switching already.
3129 */
3130 if ((!thumb2
3131 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3132 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3133 || (thumb2
3134 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3135 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3136 || ((st_type != STT_ARM_TFUNC)
3137 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3138 || (r_type == R_ARM_THM_JUMP24))
3139 && !use_plt))
3140 {
3141 if (st_type == STT_ARM_TFUNC)
3142 {
3143 /* Thumb to thumb. */
3144 if (!thumb_only)
3145 {
3146 stub_type = (info->shared | globals->pic_veneer)
3147 /* PIC stubs. */
3148 ? ((globals->use_blx
3149 && (r_type ==R_ARM_THM_CALL))
3150 /* V5T and above. Stub starts with ARM code, so
3151 we must be able to switch mode before
3152 reaching it, which is only possible for 'bl'
3153 (ie R_ARM_THM_CALL relocation). */
3154 ? arm_stub_long_branch_any_thumb_pic
3155 /* On V4T, use Thumb code only. */
3156 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3157
3158 /* non-PIC stubs. */
3159 : ((globals->use_blx
3160 && (r_type ==R_ARM_THM_CALL))
3161 /* V5T and above. */
3162 ? arm_stub_long_branch_any_any
3163 /* V4T. */
3164 : arm_stub_long_branch_v4t_thumb_thumb);
3165 }
3166 else
3167 {
3168 stub_type = (info->shared | globals->pic_veneer)
3169 /* PIC stub. */
3170 ? arm_stub_long_branch_thumb_only_pic
3171 /* non-PIC stub. */
3172 : arm_stub_long_branch_thumb_only;
3173 }
3174 }
3175 else
3176 {
3177 /* Thumb to arm. */
3178 if (sym_sec != NULL
3179 && sym_sec->owner != NULL
3180 && !INTERWORK_FLAG (sym_sec->owner))
3181 {
3182 (*_bfd_error_handler)
3183 (_("%B(%s): warning: interworking not enabled.\n"
3184 " first occurrence: %B: Thumb call to ARM"),
3185 sym_sec->owner, input_bfd, name);
3186 }
3187
3188 stub_type = (info->shared | globals->pic_veneer)
3189 /* PIC stubs. */
3190 ? ((globals->use_blx
3191 && (r_type ==R_ARM_THM_CALL))
3192 /* V5T and above. */
3193 ? arm_stub_long_branch_any_arm_pic
3194 /* V4T PIC stub. */
3195 : arm_stub_long_branch_v4t_thumb_arm_pic)
3196
3197 /* non-PIC stubs. */
3198 : ((globals->use_blx
3199 && (r_type ==R_ARM_THM_CALL))
3200 /* V5T and above. */
3201 ? arm_stub_long_branch_any_any
3202 /* V4T. */
3203 : arm_stub_long_branch_v4t_thumb_arm);
3204
3205 /* Handle v4t short branches. */
3206 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3207 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3208 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3209 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3210 }
3211 }
3212 }
3213 else if (r_type == R_ARM_CALL
3214 || r_type == R_ARM_JUMP24
3215 || r_type == R_ARM_PLT32)
3216 {
3217 if (st_type == STT_ARM_TFUNC)
3218 {
3219 /* Arm to thumb. */
3220
3221 if (sym_sec != NULL
3222 && sym_sec->owner != NULL
3223 && !INTERWORK_FLAG (sym_sec->owner))
3224 {
3225 (*_bfd_error_handler)
3226 (_("%B(%s): warning: interworking not enabled.\n"
3227 " first occurrence: %B: ARM call to Thumb"),
3228 sym_sec->owner, input_bfd, name);
3229 }
3230
3231 /* We have an extra 2-bytes reach because of
3232 the mode change (bit 24 (H) of BLX encoding). */
3233 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3234 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3235 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3236 || (r_type == R_ARM_JUMP24)
3237 || (r_type == R_ARM_PLT32))
3238 {
3239 stub_type = (info->shared | globals->pic_veneer)
3240 /* PIC stubs. */
3241 ? ((globals->use_blx)
3242 /* V5T and above. */
3243 ? arm_stub_long_branch_any_thumb_pic
3244 /* V4T stub. */
3245 : arm_stub_long_branch_v4t_arm_thumb_pic)
3246
3247 /* non-PIC stubs. */
3248 : ((globals->use_blx)
3249 /* V5T and above. */
3250 ? arm_stub_long_branch_any_any
3251 /* V4T. */
3252 : arm_stub_long_branch_v4t_arm_thumb);
3253 }
3254 }
3255 else
3256 {
3257 /* Arm to arm. */
3258 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3259 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3260 {
3261 stub_type = (info->shared | globals->pic_veneer)
3262 /* PIC stubs. */
3263 ? arm_stub_long_branch_any_arm_pic
3264 /* non-PIC stubs. */
3265 : arm_stub_long_branch_any_any;
3266 }
3267 }
3268 }
3269
3270 /* If a stub is needed, record the actual destination type. */
3271 if (stub_type != arm_stub_none)
3272 {
3273 *actual_st_type = st_type;
3274 }
3275
3276 return stub_type;
3277 }
3278
3279 /* Build a name for an entry in the stub hash table. */
3280
3281 static char *
3282 elf32_arm_stub_name (const asection *input_section,
3283 const asection *sym_sec,
3284 const struct elf32_arm_link_hash_entry *hash,
3285 const Elf_Internal_Rela *rel,
3286 enum elf32_arm_stub_type stub_type)
3287 {
3288 char *stub_name;
3289 bfd_size_type len;
3290
3291 if (hash)
3292 {
3293 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3294 stub_name = (char *) bfd_malloc (len);
3295 if (stub_name != NULL)
3296 sprintf (stub_name, "%08x_%s+%x_%d",
3297 input_section->id & 0xffffffff,
3298 hash->root.root.root.string,
3299 (int) rel->r_addend & 0xffffffff,
3300 (int) stub_type);
3301 }
3302 else
3303 {
3304 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3305 stub_name = (char *) bfd_malloc (len);
3306 if (stub_name != NULL)
3307 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3308 input_section->id & 0xffffffff,
3309 sym_sec->id & 0xffffffff,
3310 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3311 (int) rel->r_addend & 0xffffffff,
3312 (int) stub_type);
3313 }
3314
3315 return stub_name;
3316 }
3317
3318 /* Look up an entry in the stub hash. Stub entries are cached because
3319 creating the stub name takes a bit of time. */
3320
3321 static struct elf32_arm_stub_hash_entry *
3322 elf32_arm_get_stub_entry (const asection *input_section,
3323 const asection *sym_sec,
3324 struct elf_link_hash_entry *hash,
3325 const Elf_Internal_Rela *rel,
3326 struct elf32_arm_link_hash_table *htab,
3327 enum elf32_arm_stub_type stub_type)
3328 {
3329 struct elf32_arm_stub_hash_entry *stub_entry;
3330 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3331 const asection *id_sec;
3332
3333 if ((input_section->flags & SEC_CODE) == 0)
3334 return NULL;
3335
3336 /* If this input section is part of a group of sections sharing one
3337 stub section, then use the id of the first section in the group.
3338 Stub names need to include a section id, as there may well be
3339 more than one stub used to reach say, printf, and we need to
3340 distinguish between them. */
3341 id_sec = htab->stub_group[input_section->id].link_sec;
3342
3343 if (h != NULL && h->stub_cache != NULL
3344 && h->stub_cache->h == h
3345 && h->stub_cache->id_sec == id_sec
3346 && h->stub_cache->stub_type == stub_type)
3347 {
3348 stub_entry = h->stub_cache;
3349 }
3350 else
3351 {
3352 char *stub_name;
3353
3354 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3355 if (stub_name == NULL)
3356 return NULL;
3357
3358 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3359 stub_name, FALSE, FALSE);
3360 if (h != NULL)
3361 h->stub_cache = stub_entry;
3362
3363 free (stub_name);
3364 }
3365
3366 return stub_entry;
3367 }
3368
3369 /* Find or create a stub section. Returns a pointer to the stub section, and
3370 the section to which the stub section will be attached (in *LINK_SEC_P).
3371 LINK_SEC_P may be NULL. */
3372
3373 static asection *
3374 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3375 struct elf32_arm_link_hash_table *htab)
3376 {
3377 asection *link_sec;
3378 asection *stub_sec;
3379
3380 link_sec = htab->stub_group[section->id].link_sec;
3381 stub_sec = htab->stub_group[section->id].stub_sec;
3382 if (stub_sec == NULL)
3383 {
3384 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3385 if (stub_sec == NULL)
3386 {
3387 size_t namelen;
3388 bfd_size_type len;
3389 char *s_name;
3390
3391 namelen = strlen (link_sec->name);
3392 len = namelen + sizeof (STUB_SUFFIX);
3393 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3394 if (s_name == NULL)
3395 return NULL;
3396
3397 memcpy (s_name, link_sec->name, namelen);
3398 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3399 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3400 if (stub_sec == NULL)
3401 return NULL;
3402 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3403 }
3404 htab->stub_group[section->id].stub_sec = stub_sec;
3405 }
3406
3407 if (link_sec_p)
3408 *link_sec_p = link_sec;
3409
3410 return stub_sec;
3411 }
3412
3413 /* Add a new stub entry to the stub hash. Not all fields of the new
3414 stub entry are initialised. */
3415
3416 static struct elf32_arm_stub_hash_entry *
3417 elf32_arm_add_stub (const char *stub_name,
3418 asection *section,
3419 struct elf32_arm_link_hash_table *htab)
3420 {
3421 asection *link_sec;
3422 asection *stub_sec;
3423 struct elf32_arm_stub_hash_entry *stub_entry;
3424
3425 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3426 if (stub_sec == NULL)
3427 return NULL;
3428
3429 /* Enter this entry into the linker stub hash table. */
3430 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3431 TRUE, FALSE);
3432 if (stub_entry == NULL)
3433 {
3434 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3435 section->owner,
3436 stub_name);
3437 return NULL;
3438 }
3439
3440 stub_entry->stub_sec = stub_sec;
3441 stub_entry->stub_offset = 0;
3442 stub_entry->id_sec = link_sec;
3443
3444 return stub_entry;
3445 }
3446
3447 /* Store an Arm insn into an output section not processed by
3448 elf32_arm_write_section. */
3449
3450 static void
3451 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3452 bfd * output_bfd, bfd_vma val, void * ptr)
3453 {
3454 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3455 bfd_putl32 (val, ptr);
3456 else
3457 bfd_putb32 (val, ptr);
3458 }
3459
3460 /* Store a 16-bit Thumb insn into an output section not processed by
3461 elf32_arm_write_section. */
3462
3463 static void
3464 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3465 bfd * output_bfd, bfd_vma val, void * ptr)
3466 {
3467 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3468 bfd_putl16 (val, ptr);
3469 else
3470 bfd_putb16 (val, ptr);
3471 }
3472
3473 static bfd_reloc_status_type elf32_arm_final_link_relocate
3474 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3475 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3476 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3477
3478 static bfd_boolean
3479 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3480 void * in_arg)
3481 {
3482 #define MAXRELOCS 2
3483 struct elf32_arm_stub_hash_entry *stub_entry;
3484 struct elf32_arm_link_hash_table *globals;
3485 struct bfd_link_info *info;
3486 asection *stub_sec;
3487 bfd *stub_bfd;
3488 bfd_byte *loc;
3489 bfd_vma sym_value;
3490 int template_size;
3491 int size;
3492 const insn_sequence *template_sequence;
3493 int i;
3494 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3495 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3496 int nrelocs = 0;
3497
3498 /* Massage our args to the form they really have. */
3499 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3500 info = (struct bfd_link_info *) in_arg;
3501
3502 globals = elf32_arm_hash_table (info);
3503 if (globals == NULL)
3504 return FALSE;
3505
3506 stub_sec = stub_entry->stub_sec;
3507
3508 if ((globals->fix_cortex_a8 < 0)
3509 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3510 /* We have to do the a8 fixes last, as they are less aligned than
3511 the other veneers. */
3512 return TRUE;
3513
3514 /* Make a note of the offset within the stubs for this entry. */
3515 stub_entry->stub_offset = stub_sec->size;
3516 loc = stub_sec->contents + stub_entry->stub_offset;
3517
3518 stub_bfd = stub_sec->owner;
3519
3520 /* This is the address of the stub destination. */
3521 sym_value = (stub_entry->target_value
3522 + stub_entry->target_section->output_offset
3523 + stub_entry->target_section->output_section->vma);
3524
3525 template_sequence = stub_entry->stub_template;
3526 template_size = stub_entry->stub_template_size;
3527
3528 size = 0;
3529 for (i = 0; i < template_size; i++)
3530 {
3531 switch (template_sequence[i].type)
3532 {
3533 case THUMB16_TYPE:
3534 {
3535 bfd_vma data = (bfd_vma) template_sequence[i].data;
3536 if (template_sequence[i].reloc_addend != 0)
3537 {
3538 /* We've borrowed the reloc_addend field to mean we should
3539 insert a condition code into this (Thumb-1 branch)
3540 instruction. See THUMB16_BCOND_INSN. */
3541 BFD_ASSERT ((data & 0xff00) == 0xd000);
3542 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3543 }
3544 bfd_put_16 (stub_bfd, data, loc + size);
3545 size += 2;
3546 }
3547 break;
3548
3549 case THUMB32_TYPE:
3550 bfd_put_16 (stub_bfd,
3551 (template_sequence[i].data >> 16) & 0xffff,
3552 loc + size);
3553 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3554 loc + size + 2);
3555 if (template_sequence[i].r_type != R_ARM_NONE)
3556 {
3557 stub_reloc_idx[nrelocs] = i;
3558 stub_reloc_offset[nrelocs++] = size;
3559 }
3560 size += 4;
3561 break;
3562
3563 case ARM_TYPE:
3564 bfd_put_32 (stub_bfd, template_sequence[i].data,
3565 loc + size);
3566 /* Handle cases where the target is encoded within the
3567 instruction. */
3568 if (template_sequence[i].r_type == R_ARM_JUMP24)
3569 {
3570 stub_reloc_idx[nrelocs] = i;
3571 stub_reloc_offset[nrelocs++] = size;
3572 }
3573 size += 4;
3574 break;
3575
3576 case DATA_TYPE:
3577 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
3578 stub_reloc_idx[nrelocs] = i;
3579 stub_reloc_offset[nrelocs++] = size;
3580 size += 4;
3581 break;
3582
3583 default:
3584 BFD_FAIL ();
3585 return FALSE;
3586 }
3587 }
3588
3589 stub_sec->size += size;
3590
3591 /* Stub size has already been computed in arm_size_one_stub. Check
3592 consistency. */
3593 BFD_ASSERT (size == stub_entry->stub_size);
3594
3595 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3596 if (stub_entry->st_type == STT_ARM_TFUNC)
3597 sym_value |= 1;
3598
3599 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3600 in each stub. */
3601 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
3602
3603 for (i = 0; i < nrelocs; i++)
3604 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3605 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3606 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3607 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3608 {
3609 Elf_Internal_Rela rel;
3610 bfd_boolean unresolved_reloc;
3611 char *error_message;
3612 int sym_flags
3613 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3614 ? STT_ARM_TFUNC : 0;
3615 bfd_vma points_to = sym_value + stub_entry->target_addend;
3616
3617 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3618 rel.r_info = ELF32_R_INFO (0,
3619 template_sequence[stub_reloc_idx[i]].r_type);
3620 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
3621
3622 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3623 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3624 template should refer back to the instruction after the original
3625 branch. */
3626 points_to = sym_value;
3627
3628 /* There may be unintended consequences if this is not true. */
3629 BFD_ASSERT (stub_entry->h == NULL);
3630
3631 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3632 properly. We should probably use this function unconditionally,
3633 rather than only for certain relocations listed in the enclosing
3634 conditional, for the sake of consistency. */
3635 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3636 (template_sequence[stub_reloc_idx[i]].r_type),
3637 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3638 points_to, info, stub_entry->target_section, "", sym_flags,
3639 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3640 &error_message);
3641 }
3642 else
3643 {
3644 Elf_Internal_Rela rel;
3645 bfd_boolean unresolved_reloc;
3646 char *error_message;
3647 bfd_vma points_to = sym_value + stub_entry->target_addend
3648 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3649
3650 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3651 rel.r_info = ELF32_R_INFO (0,
3652 template_sequence[stub_reloc_idx[i]].r_type);
3653 rel.r_addend = 0;
3654
3655 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3656 (template_sequence[stub_reloc_idx[i]].r_type),
3657 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3658 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3659 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3660 &error_message);
3661 }
3662
3663 return TRUE;
3664 #undef MAXRELOCS
3665 }
3666
3667 /* Calculate the template, template size and instruction size for a stub.
3668 Return value is the instruction size. */
3669
3670 static unsigned int
3671 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3672 const insn_sequence **stub_template,
3673 int *stub_template_size)
3674 {
3675 const insn_sequence *template_sequence = NULL;
3676 int template_size = 0, i;
3677 unsigned int size;
3678
3679 template_sequence = stub_definitions[stub_type].template_sequence;
3680 template_size = stub_definitions[stub_type].template_size;
3681
3682 size = 0;
3683 for (i = 0; i < template_size; i++)
3684 {
3685 switch (template_sequence[i].type)
3686 {
3687 case THUMB16_TYPE:
3688 size += 2;
3689 break;
3690
3691 case ARM_TYPE:
3692 case THUMB32_TYPE:
3693 case DATA_TYPE:
3694 size += 4;
3695 break;
3696
3697 default:
3698 BFD_FAIL ();
3699 return FALSE;
3700 }
3701 }
3702
3703 if (stub_template)
3704 *stub_template = template_sequence;
3705
3706 if (stub_template_size)
3707 *stub_template_size = template_size;
3708
3709 return size;
3710 }
3711
3712 /* As above, but don't actually build the stub. Just bump offset so
3713 we know stub section sizes. */
3714
3715 static bfd_boolean
3716 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3717 void *in_arg ATTRIBUTE_UNUSED)
3718 {
3719 struct elf32_arm_stub_hash_entry *stub_entry;
3720 const insn_sequence *template_sequence;
3721 int template_size, size;
3722
3723 /* Massage our args to the form they really have. */
3724 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3725
3726 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3727 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3728
3729 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
3730 &template_size);
3731
3732 stub_entry->stub_size = size;
3733 stub_entry->stub_template = template_sequence;
3734 stub_entry->stub_template_size = template_size;
3735
3736 size = (size + 7) & ~7;
3737 stub_entry->stub_sec->size += size;
3738
3739 return TRUE;
3740 }
3741
3742 /* External entry points for sizing and building linker stubs. */
3743
3744 /* Set up various things so that we can make a list of input sections
3745 for each output section included in the link. Returns -1 on error,
3746 0 when no stubs will be needed, and 1 on success. */
3747
3748 int
3749 elf32_arm_setup_section_lists (bfd *output_bfd,
3750 struct bfd_link_info *info)
3751 {
3752 bfd *input_bfd;
3753 unsigned int bfd_count;
3754 int top_id, top_index;
3755 asection *section;
3756 asection **input_list, **list;
3757 bfd_size_type amt;
3758 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3759
3760 if (htab == NULL)
3761 return 0;
3762 if (! is_elf_hash_table (htab))
3763 return 0;
3764
3765 /* Count the number of input BFDs and find the top input section id. */
3766 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3767 input_bfd != NULL;
3768 input_bfd = input_bfd->link_next)
3769 {
3770 bfd_count += 1;
3771 for (section = input_bfd->sections;
3772 section != NULL;
3773 section = section->next)
3774 {
3775 if (top_id < section->id)
3776 top_id = section->id;
3777 }
3778 }
3779 htab->bfd_count = bfd_count;
3780
3781 amt = sizeof (struct map_stub) * (top_id + 1);
3782 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
3783 if (htab->stub_group == NULL)
3784 return -1;
3785 htab->top_id = top_id;
3786
3787 /* We can't use output_bfd->section_count here to find the top output
3788 section index as some sections may have been removed, and
3789 _bfd_strip_section_from_output doesn't renumber the indices. */
3790 for (section = output_bfd->sections, top_index = 0;
3791 section != NULL;
3792 section = section->next)
3793 {
3794 if (top_index < section->index)
3795 top_index = section->index;
3796 }
3797
3798 htab->top_index = top_index;
3799 amt = sizeof (asection *) * (top_index + 1);
3800 input_list = (asection **) bfd_malloc (amt);
3801 htab->input_list = input_list;
3802 if (input_list == NULL)
3803 return -1;
3804
3805 /* For sections we aren't interested in, mark their entries with a
3806 value we can check later. */
3807 list = input_list + top_index;
3808 do
3809 *list = bfd_abs_section_ptr;
3810 while (list-- != input_list);
3811
3812 for (section = output_bfd->sections;
3813 section != NULL;
3814 section = section->next)
3815 {
3816 if ((section->flags & SEC_CODE) != 0)
3817 input_list[section->index] = NULL;
3818 }
3819
3820 return 1;
3821 }
3822
3823 /* The linker repeatedly calls this function for each input section,
3824 in the order that input sections are linked into output sections.
3825 Build lists of input sections to determine groupings between which
3826 we may insert linker stubs. */
3827
3828 void
3829 elf32_arm_next_input_section (struct bfd_link_info *info,
3830 asection *isec)
3831 {
3832 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3833
3834 if (htab == NULL)
3835 return;
3836
3837 if (isec->output_section->index <= htab->top_index)
3838 {
3839 asection **list = htab->input_list + isec->output_section->index;
3840
3841 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
3842 {
3843 /* Steal the link_sec pointer for our list. */
3844 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3845 /* This happens to make the list in reverse order,
3846 which we reverse later. */
3847 PREV_SEC (isec) = *list;
3848 *list = isec;
3849 }
3850 }
3851 }
3852
3853 /* See whether we can group stub sections together. Grouping stub
3854 sections may result in fewer stubs. More importantly, we need to
3855 put all .init* and .fini* stubs at the end of the .init or
3856 .fini output sections respectively, because glibc splits the
3857 _init and _fini functions into multiple parts. Putting a stub in
3858 the middle of a function is not a good idea. */
3859
3860 static void
3861 group_sections (struct elf32_arm_link_hash_table *htab,
3862 bfd_size_type stub_group_size,
3863 bfd_boolean stubs_always_after_branch)
3864 {
3865 asection **list = htab->input_list;
3866
3867 do
3868 {
3869 asection *tail = *list;
3870 asection *head;
3871
3872 if (tail == bfd_abs_section_ptr)
3873 continue;
3874
3875 /* Reverse the list: we must avoid placing stubs at the
3876 beginning of the section because the beginning of the text
3877 section may be required for an interrupt vector in bare metal
3878 code. */
3879 #define NEXT_SEC PREV_SEC
3880 head = NULL;
3881 while (tail != NULL)
3882 {
3883 /* Pop from tail. */
3884 asection *item = tail;
3885 tail = PREV_SEC (item);
3886
3887 /* Push on head. */
3888 NEXT_SEC (item) = head;
3889 head = item;
3890 }
3891
3892 while (head != NULL)
3893 {
3894 asection *curr;
3895 asection *next;
3896 bfd_vma stub_group_start = head->output_offset;
3897 bfd_vma end_of_next;
3898
3899 curr = head;
3900 while (NEXT_SEC (curr) != NULL)
3901 {
3902 next = NEXT_SEC (curr);
3903 end_of_next = next->output_offset + next->size;
3904 if (end_of_next - stub_group_start >= stub_group_size)
3905 /* End of NEXT is too far from start, so stop. */
3906 break;
3907 /* Add NEXT to the group. */
3908 curr = next;
3909 }
3910
3911 /* OK, the size from the start to the start of CURR is less
3912 than stub_group_size and thus can be handled by one stub
3913 section. (Or the head section is itself larger than
3914 stub_group_size, in which case we may be toast.)
3915 We should really be keeping track of the total size of
3916 stubs added here, as stubs contribute to the final output
3917 section size. */
3918 do
3919 {
3920 next = NEXT_SEC (head);
3921 /* Set up this stub group. */
3922 htab->stub_group[head->id].link_sec = curr;
3923 }
3924 while (head != curr && (head = next) != NULL);
3925
3926 /* But wait, there's more! Input sections up to stub_group_size
3927 bytes after the stub section can be handled by it too. */
3928 if (!stubs_always_after_branch)
3929 {
3930 stub_group_start = curr->output_offset + curr->size;
3931
3932 while (next != NULL)
3933 {
3934 end_of_next = next->output_offset + next->size;
3935 if (end_of_next - stub_group_start >= stub_group_size)
3936 /* End of NEXT is too far from stubs, so stop. */
3937 break;
3938 /* Add NEXT to the stub group. */
3939 head = next;
3940 next = NEXT_SEC (head);
3941 htab->stub_group[head->id].link_sec = curr;
3942 }
3943 }
3944 head = next;
3945 }
3946 }
3947 while (list++ != htab->input_list + htab->top_index);
3948
3949 free (htab->input_list);
3950 #undef PREV_SEC
3951 #undef NEXT_SEC
3952 }
3953
3954 /* Comparison function for sorting/searching relocations relating to Cortex-A8
3955 erratum fix. */
3956
3957 static int
3958 a8_reloc_compare (const void *a, const void *b)
3959 {
3960 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3961 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
3962
3963 if (ra->from < rb->from)
3964 return -1;
3965 else if (ra->from > rb->from)
3966 return 1;
3967 else
3968 return 0;
3969 }
3970
3971 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3972 const char *, char **);
3973
3974 /* Helper function to scan code for sequences which might trigger the Cortex-A8
3975 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
3976 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
3977 otherwise. */
3978
3979 static bfd_boolean
3980 cortex_a8_erratum_scan (bfd *input_bfd,
3981 struct bfd_link_info *info,
3982 struct a8_erratum_fix **a8_fixes_p,
3983 unsigned int *num_a8_fixes_p,
3984 unsigned int *a8_fix_table_size_p,
3985 struct a8_erratum_reloc *a8_relocs,
3986 unsigned int num_a8_relocs,
3987 unsigned prev_num_a8_fixes,
3988 bfd_boolean *stub_changed_p)
3989 {
3990 asection *section;
3991 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3992 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3993 unsigned int num_a8_fixes = *num_a8_fixes_p;
3994 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3995
3996 if (htab == NULL)
3997 return FALSE;
3998
3999 for (section = input_bfd->sections;
4000 section != NULL;
4001 section = section->next)
4002 {
4003 bfd_byte *contents = NULL;
4004 struct _arm_elf_section_data *sec_data;
4005 unsigned int span;
4006 bfd_vma base_vma;
4007
4008 if (elf_section_type (section) != SHT_PROGBITS
4009 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4010 || (section->flags & SEC_EXCLUDE) != 0
4011 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4012 || (section->output_section == bfd_abs_section_ptr))
4013 continue;
4014
4015 base_vma = section->output_section->vma + section->output_offset;
4016
4017 if (elf_section_data (section)->this_hdr.contents != NULL)
4018 contents = elf_section_data (section)->this_hdr.contents;
4019 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4020 return TRUE;
4021
4022 sec_data = elf32_arm_section_data (section);
4023
4024 for (span = 0; span < sec_data->mapcount; span++)
4025 {
4026 unsigned int span_start = sec_data->map[span].vma;
4027 unsigned int span_end = (span == sec_data->mapcount - 1)
4028 ? section->size : sec_data->map[span + 1].vma;
4029 unsigned int i;
4030 char span_type = sec_data->map[span].type;
4031 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4032
4033 if (span_type != 't')
4034 continue;
4035
4036 /* Span is entirely within a single 4KB region: skip scanning. */
4037 if (((base_vma + span_start) & ~0xfff)
4038 == ((base_vma + span_end) & ~0xfff))
4039 continue;
4040
4041 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4042
4043 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4044 * The branch target is in the same 4KB region as the
4045 first half of the branch.
4046 * The instruction before the branch is a 32-bit
4047 length non-branch instruction. */
4048 for (i = span_start; i < span_end;)
4049 {
4050 unsigned int insn = bfd_getl16 (&contents[i]);
4051 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4052 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4053
4054 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4055 insn_32bit = TRUE;
4056
4057 if (insn_32bit)
4058 {
4059 /* Load the rest of the insn (in manual-friendly order). */
4060 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4061
4062 /* Encoding T4: B<c>.W. */
4063 is_b = (insn & 0xf800d000) == 0xf0009000;
4064 /* Encoding T1: BL<c>.W. */
4065 is_bl = (insn & 0xf800d000) == 0xf000d000;
4066 /* Encoding T2: BLX<c>.W. */
4067 is_blx = (insn & 0xf800d000) == 0xf000c000;
4068 /* Encoding T3: B<c>.W (not permitted in IT block). */
4069 is_bcc = (insn & 0xf800d000) == 0xf0008000
4070 && (insn & 0x07f00000) != 0x03800000;
4071 }
4072
4073 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4074
4075 if (((base_vma + i) & 0xfff) == 0xffe
4076 && insn_32bit
4077 && is_32bit_branch
4078 && last_was_32bit
4079 && ! last_was_branch)
4080 {
4081 bfd_signed_vma offset = 0;
4082 bfd_boolean force_target_arm = FALSE;
4083 bfd_boolean force_target_thumb = FALSE;
4084 bfd_vma target;
4085 enum elf32_arm_stub_type stub_type = arm_stub_none;
4086 struct a8_erratum_reloc key, *found;
4087
4088 key.from = base_vma + i;
4089 found = (struct a8_erratum_reloc *)
4090 bsearch (&key, a8_relocs, num_a8_relocs,
4091 sizeof (struct a8_erratum_reloc),
4092 &a8_reloc_compare);
4093
4094 if (found)
4095 {
4096 char *error_message = NULL;
4097 struct elf_link_hash_entry *entry;
4098 bfd_boolean use_plt = FALSE;
4099
4100 /* We don't care about the error returned from this
4101 function, only if there is glue or not. */
4102 entry = find_thumb_glue (info, found->sym_name,
4103 &error_message);
4104
4105 if (entry)
4106 found->non_a8_stub = TRUE;
4107
4108 /* Keep a simpler condition, for the sake of clarity. */
4109 if (htab->splt != NULL && found->hash != NULL
4110 && found->hash->root.plt.offset != (bfd_vma) -1)
4111 use_plt = TRUE;
4112
4113 if (found->r_type == R_ARM_THM_CALL)
4114 {
4115 if (found->st_type != STT_ARM_TFUNC || use_plt)
4116 force_target_arm = TRUE;
4117 else
4118 force_target_thumb = TRUE;
4119 }
4120 }
4121
4122 /* Check if we have an offending branch instruction. */
4123
4124 if (found && found->non_a8_stub)
4125 /* We've already made a stub for this instruction, e.g.
4126 it's a long branch or a Thumb->ARM stub. Assume that
4127 stub will suffice to work around the A8 erratum (see
4128 setting of always_after_branch above). */
4129 ;
4130 else if (is_bcc)
4131 {
4132 offset = (insn & 0x7ff) << 1;
4133 offset |= (insn & 0x3f0000) >> 4;
4134 offset |= (insn & 0x2000) ? 0x40000 : 0;
4135 offset |= (insn & 0x800) ? 0x80000 : 0;
4136 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4137 if (offset & 0x100000)
4138 offset |= ~ ((bfd_signed_vma) 0xfffff);
4139 stub_type = arm_stub_a8_veneer_b_cond;
4140 }
4141 else if (is_b || is_bl || is_blx)
4142 {
4143 int s = (insn & 0x4000000) != 0;
4144 int j1 = (insn & 0x2000) != 0;
4145 int j2 = (insn & 0x800) != 0;
4146 int i1 = !(j1 ^ s);
4147 int i2 = !(j2 ^ s);
4148
4149 offset = (insn & 0x7ff) << 1;
4150 offset |= (insn & 0x3ff0000) >> 4;
4151 offset |= i2 << 22;
4152 offset |= i1 << 23;
4153 offset |= s << 24;
4154 if (offset & 0x1000000)
4155 offset |= ~ ((bfd_signed_vma) 0xffffff);
4156
4157 if (is_blx)
4158 offset &= ~ ((bfd_signed_vma) 3);
4159
4160 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4161 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4162 }
4163
4164 if (stub_type != arm_stub_none)
4165 {
4166 bfd_vma pc_for_insn = base_vma + i + 4;
4167
4168 /* The original instruction is a BL, but the target is
4169 an ARM instruction. If we were not making a stub,
4170 the BL would have been converted to a BLX. Use the
4171 BLX stub instead in that case. */
4172 if (htab->use_blx && force_target_arm
4173 && stub_type == arm_stub_a8_veneer_bl)
4174 {
4175 stub_type = arm_stub_a8_veneer_blx;
4176 is_blx = TRUE;
4177 is_bl = FALSE;
4178 }
4179 /* Conversely, if the original instruction was
4180 BLX but the target is Thumb mode, use the BL
4181 stub. */
4182 else if (force_target_thumb
4183 && stub_type == arm_stub_a8_veneer_blx)
4184 {
4185 stub_type = arm_stub_a8_veneer_bl;
4186 is_blx = FALSE;
4187 is_bl = TRUE;
4188 }
4189
4190 if (is_blx)
4191 pc_for_insn &= ~ ((bfd_vma) 3);
4192
4193 /* If we found a relocation, use the proper destination,
4194 not the offset in the (unrelocated) instruction.
4195 Note this is always done if we switched the stub type
4196 above. */
4197 if (found)
4198 offset =
4199 (bfd_signed_vma) (found->destination - pc_for_insn);
4200
4201 target = pc_for_insn + offset;
4202
4203 /* The BLX stub is ARM-mode code. Adjust the offset to
4204 take the different PC value (+8 instead of +4) into
4205 account. */
4206 if (stub_type == arm_stub_a8_veneer_blx)
4207 offset += 4;
4208
4209 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4210 {
4211 char *stub_name = NULL;
4212
4213 if (num_a8_fixes == a8_fix_table_size)
4214 {
4215 a8_fix_table_size *= 2;
4216 a8_fixes = (struct a8_erratum_fix *)
4217 bfd_realloc (a8_fixes,
4218 sizeof (struct a8_erratum_fix)
4219 * a8_fix_table_size);
4220 }
4221
4222 if (num_a8_fixes < prev_num_a8_fixes)
4223 {
4224 /* If we're doing a subsequent scan,
4225 check if we've found the same fix as
4226 before, and try and reuse the stub
4227 name. */
4228 stub_name = a8_fixes[num_a8_fixes].stub_name;
4229 if ((a8_fixes[num_a8_fixes].section != section)
4230 || (a8_fixes[num_a8_fixes].offset != i))
4231 {
4232 free (stub_name);
4233 stub_name = NULL;
4234 *stub_changed_p = TRUE;
4235 }
4236 }
4237
4238 if (!stub_name)
4239 {
4240 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4241 if (stub_name != NULL)
4242 sprintf (stub_name, "%x:%x", section->id, i);
4243 }
4244
4245 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4246 a8_fixes[num_a8_fixes].section = section;
4247 a8_fixes[num_a8_fixes].offset = i;
4248 a8_fixes[num_a8_fixes].addend = offset;
4249 a8_fixes[num_a8_fixes].orig_insn = insn;
4250 a8_fixes[num_a8_fixes].stub_name = stub_name;
4251 a8_fixes[num_a8_fixes].stub_type = stub_type;
4252 a8_fixes[num_a8_fixes].st_type =
4253 is_blx ? STT_FUNC : STT_ARM_TFUNC;
4254
4255 num_a8_fixes++;
4256 }
4257 }
4258 }
4259
4260 i += insn_32bit ? 4 : 2;
4261 last_was_32bit = insn_32bit;
4262 last_was_branch = is_32bit_branch;
4263 }
4264 }
4265
4266 if (elf_section_data (section)->this_hdr.contents == NULL)
4267 free (contents);
4268 }
4269
4270 *a8_fixes_p = a8_fixes;
4271 *num_a8_fixes_p = num_a8_fixes;
4272 *a8_fix_table_size_p = a8_fix_table_size;
4273
4274 return FALSE;
4275 }
4276
4277 /* Determine and set the size of the stub section for a final link.
4278
4279 The basic idea here is to examine all the relocations looking for
4280 PC-relative calls to a target that is unreachable with a "bl"
4281 instruction. */
4282
4283 bfd_boolean
4284 elf32_arm_size_stubs (bfd *output_bfd,
4285 bfd *stub_bfd,
4286 struct bfd_link_info *info,
4287 bfd_signed_vma group_size,
4288 asection * (*add_stub_section) (const char *, asection *),
4289 void (*layout_sections_again) (void))
4290 {
4291 bfd_size_type stub_group_size;
4292 bfd_boolean stubs_always_after_branch;
4293 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4294 struct a8_erratum_fix *a8_fixes = NULL;
4295 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4296 struct a8_erratum_reloc *a8_relocs = NULL;
4297 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4298
4299 if (htab == NULL)
4300 return FALSE;
4301
4302 if (htab->fix_cortex_a8)
4303 {
4304 a8_fixes = (struct a8_erratum_fix *)
4305 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4306 a8_relocs = (struct a8_erratum_reloc *)
4307 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4308 }
4309
4310 /* Propagate mach to stub bfd, because it may not have been
4311 finalized when we created stub_bfd. */
4312 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4313 bfd_get_mach (output_bfd));
4314
4315 /* Stash our params away. */
4316 htab->stub_bfd = stub_bfd;
4317 htab->add_stub_section = add_stub_section;
4318 htab->layout_sections_again = layout_sections_again;
4319 stubs_always_after_branch = group_size < 0;
4320
4321 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4322 as the first half of a 32-bit branch straddling two 4K pages. This is a
4323 crude way of enforcing that. */
4324 if (htab->fix_cortex_a8)
4325 stubs_always_after_branch = 1;
4326
4327 if (group_size < 0)
4328 stub_group_size = -group_size;
4329 else
4330 stub_group_size = group_size;
4331
4332 if (stub_group_size == 1)
4333 {
4334 /* Default values. */
4335 /* Thumb branch range is +-4MB has to be used as the default
4336 maximum size (a given section can contain both ARM and Thumb
4337 code, so the worst case has to be taken into account).
4338
4339 This value is 24K less than that, which allows for 2025
4340 12-byte stubs. If we exceed that, then we will fail to link.
4341 The user will have to relink with an explicit group size
4342 option. */
4343 stub_group_size = 4170000;
4344 }
4345
4346 group_sections (htab, stub_group_size, stubs_always_after_branch);
4347
4348 /* If we're applying the cortex A8 fix, we need to determine the
4349 program header size now, because we cannot change it later --
4350 that could alter section placements. Notice the A8 erratum fix
4351 ends up requiring the section addresses to remain unchanged
4352 modulo the page size. That's something we cannot represent
4353 inside BFD, and we don't want to force the section alignment to
4354 be the page size. */
4355 if (htab->fix_cortex_a8)
4356 (*htab->layout_sections_again) ();
4357
4358 while (1)
4359 {
4360 bfd *input_bfd;
4361 unsigned int bfd_indx;
4362 asection *stub_sec;
4363 bfd_boolean stub_changed = FALSE;
4364 unsigned prev_num_a8_fixes = num_a8_fixes;
4365
4366 num_a8_fixes = 0;
4367 for (input_bfd = info->input_bfds, bfd_indx = 0;
4368 input_bfd != NULL;
4369 input_bfd = input_bfd->link_next, bfd_indx++)
4370 {
4371 Elf_Internal_Shdr *symtab_hdr;
4372 asection *section;
4373 Elf_Internal_Sym *local_syms = NULL;
4374
4375 num_a8_relocs = 0;
4376
4377 /* We'll need the symbol table in a second. */
4378 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4379 if (symtab_hdr->sh_info == 0)
4380 continue;
4381
4382 /* Walk over each section attached to the input bfd. */
4383 for (section = input_bfd->sections;
4384 section != NULL;
4385 section = section->next)
4386 {
4387 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4388
4389 /* If there aren't any relocs, then there's nothing more
4390 to do. */
4391 if ((section->flags & SEC_RELOC) == 0
4392 || section->reloc_count == 0
4393 || (section->flags & SEC_CODE) == 0)
4394 continue;
4395
4396 /* If this section is a link-once section that will be
4397 discarded, then don't create any stubs. */
4398 if (section->output_section == NULL
4399 || section->output_section->owner != output_bfd)
4400 continue;
4401
4402 /* Get the relocs. */
4403 internal_relocs
4404 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4405 NULL, info->keep_memory);
4406 if (internal_relocs == NULL)
4407 goto error_ret_free_local;
4408
4409 /* Now examine each relocation. */
4410 irela = internal_relocs;
4411 irelaend = irela + section->reloc_count;
4412 for (; irela < irelaend; irela++)
4413 {
4414 unsigned int r_type, r_indx;
4415 enum elf32_arm_stub_type stub_type;
4416 struct elf32_arm_stub_hash_entry *stub_entry;
4417 asection *sym_sec;
4418 bfd_vma sym_value;
4419 bfd_vma destination;
4420 struct elf32_arm_link_hash_entry *hash;
4421 const char *sym_name;
4422 char *stub_name;
4423 const asection *id_sec;
4424 int st_type;
4425 bfd_boolean created_stub = FALSE;
4426
4427 r_type = ELF32_R_TYPE (irela->r_info);
4428 r_indx = ELF32_R_SYM (irela->r_info);
4429
4430 if (r_type >= (unsigned int) R_ARM_max)
4431 {
4432 bfd_set_error (bfd_error_bad_value);
4433 error_ret_free_internal:
4434 if (elf_section_data (section)->relocs == NULL)
4435 free (internal_relocs);
4436 goto error_ret_free_local;
4437 }
4438
4439 /* Only look for stubs on branch instructions. */
4440 if ((r_type != (unsigned int) R_ARM_CALL)
4441 && (r_type != (unsigned int) R_ARM_THM_CALL)
4442 && (r_type != (unsigned int) R_ARM_JUMP24)
4443 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4444 && (r_type != (unsigned int) R_ARM_THM_XPC22)
4445 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4446 && (r_type != (unsigned int) R_ARM_PLT32))
4447 continue;
4448
4449 /* Now determine the call target, its name, value,
4450 section. */
4451 sym_sec = NULL;
4452 sym_value = 0;
4453 destination = 0;
4454 hash = NULL;
4455 sym_name = NULL;
4456 if (r_indx < symtab_hdr->sh_info)
4457 {
4458 /* It's a local symbol. */
4459 Elf_Internal_Sym *sym;
4460 Elf_Internal_Shdr *hdr;
4461
4462 if (local_syms == NULL)
4463 {
4464 local_syms
4465 = (Elf_Internal_Sym *) symtab_hdr->contents;
4466 if (local_syms == NULL)
4467 local_syms
4468 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4469 symtab_hdr->sh_info, 0,
4470 NULL, NULL, NULL);
4471 if (local_syms == NULL)
4472 goto error_ret_free_internal;
4473 }
4474
4475 sym = local_syms + r_indx;
4476 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4477 sym_sec = hdr->bfd_section;
4478 if (!sym_sec)
4479 /* This is an undefined symbol. It can never
4480 be resolved. */
4481 continue;
4482
4483 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4484 sym_value = sym->st_value;
4485 destination = (sym_value + irela->r_addend
4486 + sym_sec->output_offset
4487 + sym_sec->output_section->vma);
4488 st_type = ELF_ST_TYPE (sym->st_info);
4489 sym_name
4490 = bfd_elf_string_from_elf_section (input_bfd,
4491 symtab_hdr->sh_link,
4492 sym->st_name);
4493 }
4494 else
4495 {
4496 /* It's an external symbol. */
4497 int e_indx;
4498
4499 e_indx = r_indx - symtab_hdr->sh_info;
4500 hash = ((struct elf32_arm_link_hash_entry *)
4501 elf_sym_hashes (input_bfd)[e_indx]);
4502
4503 while (hash->root.root.type == bfd_link_hash_indirect
4504 || hash->root.root.type == bfd_link_hash_warning)
4505 hash = ((struct elf32_arm_link_hash_entry *)
4506 hash->root.root.u.i.link);
4507
4508 if (hash->root.root.type == bfd_link_hash_defined
4509 || hash->root.root.type == bfd_link_hash_defweak)
4510 {
4511 sym_sec = hash->root.root.u.def.section;
4512 sym_value = hash->root.root.u.def.value;
4513
4514 struct elf32_arm_link_hash_table *globals =
4515 elf32_arm_hash_table (info);
4516
4517 /* For a destination in a shared library,
4518 use the PLT stub as target address to
4519 decide whether a branch stub is
4520 needed. */
4521 if (globals != NULL
4522 && globals->splt != NULL
4523 && hash != NULL
4524 && hash->root.plt.offset != (bfd_vma) -1)
4525 {
4526 sym_sec = globals->splt;
4527 sym_value = hash->root.plt.offset;
4528 if (sym_sec->output_section != NULL)
4529 destination = (sym_value
4530 + sym_sec->output_offset
4531 + sym_sec->output_section->vma);
4532 }
4533 else if (sym_sec->output_section != NULL)
4534 destination = (sym_value + irela->r_addend
4535 + sym_sec->output_offset
4536 + sym_sec->output_section->vma);
4537 }
4538 else if ((hash->root.root.type == bfd_link_hash_undefined)
4539 || (hash->root.root.type == bfd_link_hash_undefweak))
4540 {
4541 /* For a shared library, use the PLT stub as
4542 target address to decide whether a long
4543 branch stub is needed.
4544 For absolute code, they cannot be handled. */
4545 struct elf32_arm_link_hash_table *globals =
4546 elf32_arm_hash_table (info);
4547
4548 if (globals != NULL
4549 && globals->splt != NULL
4550 && hash != NULL
4551 && hash->root.plt.offset != (bfd_vma) -1)
4552 {
4553 sym_sec = globals->splt;
4554 sym_value = hash->root.plt.offset;
4555 if (sym_sec->output_section != NULL)
4556 destination = (sym_value
4557 + sym_sec->output_offset
4558 + sym_sec->output_section->vma);
4559 }
4560 else
4561 continue;
4562 }
4563 else
4564 {
4565 bfd_set_error (bfd_error_bad_value);
4566 goto error_ret_free_internal;
4567 }
4568 st_type = ELF_ST_TYPE (hash->root.type);
4569 sym_name = hash->root.root.root.string;
4570 }
4571
4572 do
4573 {
4574 /* Determine what (if any) linker stub is needed. */
4575 stub_type = arm_type_of_stub (info, section, irela,
4576 &st_type, hash,
4577 destination, sym_sec,
4578 input_bfd, sym_name);
4579 if (stub_type == arm_stub_none)
4580 break;
4581
4582 /* Support for grouping stub sections. */
4583 id_sec = htab->stub_group[section->id].link_sec;
4584
4585 /* Get the name of this stub. */
4586 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4587 irela, stub_type);
4588 if (!stub_name)
4589 goto error_ret_free_internal;
4590
4591 /* We've either created a stub for this reloc already,
4592 or we are about to. */
4593 created_stub = TRUE;
4594
4595 stub_entry = arm_stub_hash_lookup
4596 (&htab->stub_hash_table, stub_name,
4597 FALSE, FALSE);
4598 if (stub_entry != NULL)
4599 {
4600 /* The proper stub has already been created. */
4601 free (stub_name);
4602 stub_entry->target_value = sym_value;
4603 break;
4604 }
4605
4606 stub_entry = elf32_arm_add_stub (stub_name, section,
4607 htab);
4608 if (stub_entry == NULL)
4609 {
4610 free (stub_name);
4611 goto error_ret_free_internal;
4612 }
4613
4614 stub_entry->target_value = sym_value;
4615 stub_entry->target_section = sym_sec;
4616 stub_entry->stub_type = stub_type;
4617 stub_entry->h = hash;
4618 stub_entry->st_type = st_type;
4619
4620 if (sym_name == NULL)
4621 sym_name = "unnamed";
4622 stub_entry->output_name = (char *)
4623 bfd_alloc (htab->stub_bfd,
4624 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4625 + strlen (sym_name));
4626 if (stub_entry->output_name == NULL)
4627 {
4628 free (stub_name);
4629 goto error_ret_free_internal;
4630 }
4631
4632 /* For historical reasons, use the existing names for
4633 ARM-to-Thumb and Thumb-to-ARM stubs. */
4634 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4635 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4636 && st_type != STT_ARM_TFUNC)
4637 sprintf (stub_entry->output_name,
4638 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4639 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4640 || (r_type == (unsigned int) R_ARM_JUMP24))
4641 && st_type == STT_ARM_TFUNC)
4642 sprintf (stub_entry->output_name,
4643 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4644 else
4645 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4646 sym_name);
4647
4648 stub_changed = TRUE;
4649 }
4650 while (0);
4651
4652 /* Look for relocations which might trigger Cortex-A8
4653 erratum. */
4654 if (htab->fix_cortex_a8
4655 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4656 || r_type == (unsigned int) R_ARM_THM_JUMP19
4657 || r_type == (unsigned int) R_ARM_THM_CALL
4658 || r_type == (unsigned int) R_ARM_THM_XPC22))
4659 {
4660 bfd_vma from = section->output_section->vma
4661 + section->output_offset
4662 + irela->r_offset;
4663
4664 if ((from & 0xfff) == 0xffe)
4665 {
4666 /* Found a candidate. Note we haven't checked the
4667 destination is within 4K here: if we do so (and
4668 don't create an entry in a8_relocs) we can't tell
4669 that a branch should have been relocated when
4670 scanning later. */
4671 if (num_a8_relocs == a8_reloc_table_size)
4672 {
4673 a8_reloc_table_size *= 2;
4674 a8_relocs = (struct a8_erratum_reloc *)
4675 bfd_realloc (a8_relocs,
4676 sizeof (struct a8_erratum_reloc)
4677 * a8_reloc_table_size);
4678 }
4679
4680 a8_relocs[num_a8_relocs].from = from;
4681 a8_relocs[num_a8_relocs].destination = destination;
4682 a8_relocs[num_a8_relocs].r_type = r_type;
4683 a8_relocs[num_a8_relocs].st_type = st_type;
4684 a8_relocs[num_a8_relocs].sym_name = sym_name;
4685 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4686 a8_relocs[num_a8_relocs].hash = hash;
4687
4688 num_a8_relocs++;
4689 }
4690 }
4691 }
4692
4693 /* We're done with the internal relocs, free them. */
4694 if (elf_section_data (section)->relocs == NULL)
4695 free (internal_relocs);
4696 }
4697
4698 if (htab->fix_cortex_a8)
4699 {
4700 /* Sort relocs which might apply to Cortex-A8 erratum. */
4701 qsort (a8_relocs, num_a8_relocs,
4702 sizeof (struct a8_erratum_reloc),
4703 &a8_reloc_compare);
4704
4705 /* Scan for branches which might trigger Cortex-A8 erratum. */
4706 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4707 &num_a8_fixes, &a8_fix_table_size,
4708 a8_relocs, num_a8_relocs,
4709 prev_num_a8_fixes, &stub_changed)
4710 != 0)
4711 goto error_ret_free_local;
4712 }
4713 }
4714
4715 if (prev_num_a8_fixes != num_a8_fixes)
4716 stub_changed = TRUE;
4717
4718 if (!stub_changed)
4719 break;
4720
4721 /* OK, we've added some stubs. Find out the new size of the
4722 stub sections. */
4723 for (stub_sec = htab->stub_bfd->sections;
4724 stub_sec != NULL;
4725 stub_sec = stub_sec->next)
4726 {
4727 /* Ignore non-stub sections. */
4728 if (!strstr (stub_sec->name, STUB_SUFFIX))
4729 continue;
4730
4731 stub_sec->size = 0;
4732 }
4733
4734 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4735
4736 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4737 if (htab->fix_cortex_a8)
4738 for (i = 0; i < num_a8_fixes; i++)
4739 {
4740 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4741 a8_fixes[i].section, htab);
4742
4743 if (stub_sec == NULL)
4744 goto error_ret_free_local;
4745
4746 stub_sec->size
4747 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4748 NULL);
4749 }
4750
4751
4752 /* Ask the linker to do its stuff. */
4753 (*htab->layout_sections_again) ();
4754 }
4755
4756 /* Add stubs for Cortex-A8 erratum fixes now. */
4757 if (htab->fix_cortex_a8)
4758 {
4759 for (i = 0; i < num_a8_fixes; i++)
4760 {
4761 struct elf32_arm_stub_hash_entry *stub_entry;
4762 char *stub_name = a8_fixes[i].stub_name;
4763 asection *section = a8_fixes[i].section;
4764 unsigned int section_id = a8_fixes[i].section->id;
4765 asection *link_sec = htab->stub_group[section_id].link_sec;
4766 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4767 const insn_sequence *template_sequence;
4768 int template_size, size = 0;
4769
4770 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4771 TRUE, FALSE);
4772 if (stub_entry == NULL)
4773 {
4774 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4775 section->owner,
4776 stub_name);
4777 return FALSE;
4778 }
4779
4780 stub_entry->stub_sec = stub_sec;
4781 stub_entry->stub_offset = 0;
4782 stub_entry->id_sec = link_sec;
4783 stub_entry->stub_type = a8_fixes[i].stub_type;
4784 stub_entry->target_section = a8_fixes[i].section;
4785 stub_entry->target_value = a8_fixes[i].offset;
4786 stub_entry->target_addend = a8_fixes[i].addend;
4787 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4788 stub_entry->st_type = a8_fixes[i].st_type;
4789
4790 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4791 &template_sequence,
4792 &template_size);
4793
4794 stub_entry->stub_size = size;
4795 stub_entry->stub_template = template_sequence;
4796 stub_entry->stub_template_size = template_size;
4797 }
4798
4799 /* Stash the Cortex-A8 erratum fix array for use later in
4800 elf32_arm_write_section(). */
4801 htab->a8_erratum_fixes = a8_fixes;
4802 htab->num_a8_erratum_fixes = num_a8_fixes;
4803 }
4804 else
4805 {
4806 htab->a8_erratum_fixes = NULL;
4807 htab->num_a8_erratum_fixes = 0;
4808 }
4809 return TRUE;
4810
4811 error_ret_free_local:
4812 return FALSE;
4813 }
4814
4815 /* Build all the stubs associated with the current output file. The
4816 stubs are kept in a hash table attached to the main linker hash
4817 table. We also set up the .plt entries for statically linked PIC
4818 functions here. This function is called via arm_elf_finish in the
4819 linker. */
4820
4821 bfd_boolean
4822 elf32_arm_build_stubs (struct bfd_link_info *info)
4823 {
4824 asection *stub_sec;
4825 struct bfd_hash_table *table;
4826 struct elf32_arm_link_hash_table *htab;
4827
4828 htab = elf32_arm_hash_table (info);
4829 if (htab == NULL)
4830 return FALSE;
4831
4832 for (stub_sec = htab->stub_bfd->sections;
4833 stub_sec != NULL;
4834 stub_sec = stub_sec->next)
4835 {
4836 bfd_size_type size;
4837
4838 /* Ignore non-stub sections. */
4839 if (!strstr (stub_sec->name, STUB_SUFFIX))
4840 continue;
4841
4842 /* Allocate memory to hold the linker stubs. */
4843 size = stub_sec->size;
4844 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
4845 if (stub_sec->contents == NULL && size != 0)
4846 return FALSE;
4847 stub_sec->size = 0;
4848 }
4849
4850 /* Build the stubs as directed by the stub hash table. */
4851 table = &htab->stub_hash_table;
4852 bfd_hash_traverse (table, arm_build_one_stub, info);
4853 if (htab->fix_cortex_a8)
4854 {
4855 /* Place the cortex a8 stubs last. */
4856 htab->fix_cortex_a8 = -1;
4857 bfd_hash_traverse (table, arm_build_one_stub, info);
4858 }
4859
4860 return TRUE;
4861 }
4862
4863 /* Locate the Thumb encoded calling stub for NAME. */
4864
4865 static struct elf_link_hash_entry *
4866 find_thumb_glue (struct bfd_link_info *link_info,
4867 const char *name,
4868 char **error_message)
4869 {
4870 char *tmp_name;
4871 struct elf_link_hash_entry *hash;
4872 struct elf32_arm_link_hash_table *hash_table;
4873
4874 /* We need a pointer to the armelf specific hash table. */
4875 hash_table = elf32_arm_hash_table (link_info);
4876 if (hash_table == NULL)
4877 return NULL;
4878
4879 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4880 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
4881
4882 BFD_ASSERT (tmp_name);
4883
4884 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4885
4886 hash = elf_link_hash_lookup
4887 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
4888
4889 if (hash == NULL
4890 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4891 tmp_name, name) == -1)
4892 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
4893
4894 free (tmp_name);
4895
4896 return hash;
4897 }
4898
4899 /* Locate the ARM encoded calling stub for NAME. */
4900
4901 static struct elf_link_hash_entry *
4902 find_arm_glue (struct bfd_link_info *link_info,
4903 const char *name,
4904 char **error_message)
4905 {
4906 char *tmp_name;
4907 struct elf_link_hash_entry *myh;
4908 struct elf32_arm_link_hash_table *hash_table;
4909
4910 /* We need a pointer to the elfarm specific hash table. */
4911 hash_table = elf32_arm_hash_table (link_info);
4912 if (hash_table == NULL)
4913 return NULL;
4914
4915 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4916 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
4917
4918 BFD_ASSERT (tmp_name);
4919
4920 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4921
4922 myh = elf_link_hash_lookup
4923 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
4924
4925 if (myh == NULL
4926 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4927 tmp_name, name) == -1)
4928 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
4929
4930 free (tmp_name);
4931
4932 return myh;
4933 }
4934
4935 /* ARM->Thumb glue (static images):
4936
4937 .arm
4938 __func_from_arm:
4939 ldr r12, __func_addr
4940 bx r12
4941 __func_addr:
4942 .word func @ behave as if you saw a ARM_32 reloc.
4943
4944 (v5t static images)
4945 .arm
4946 __func_from_arm:
4947 ldr pc, __func_addr
4948 __func_addr:
4949 .word func @ behave as if you saw a ARM_32 reloc.
4950
4951 (relocatable images)
4952 .arm
4953 __func_from_arm:
4954 ldr r12, __func_offset
4955 add r12, r12, pc
4956 bx r12
4957 __func_offset:
4958 .word func - . */
4959
4960 #define ARM2THUMB_STATIC_GLUE_SIZE 12
4961 static const insn32 a2t1_ldr_insn = 0xe59fc000;
4962 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4963 static const insn32 a2t3_func_addr_insn = 0x00000001;
4964
4965 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4966 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4967 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4968
4969 #define ARM2THUMB_PIC_GLUE_SIZE 16
4970 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4971 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4972 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4973
4974 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
4975
4976 .thumb .thumb
4977 .align 2 .align 2
4978 __func_from_thumb: __func_from_thumb:
4979 bx pc push {r6, lr}
4980 nop ldr r6, __func_addr
4981 .arm mov lr, pc
4982 b func bx r6
4983 .arm
4984 ;; back_to_thumb
4985 ldmia r13! {r6, lr}
4986 bx lr
4987 __func_addr:
4988 .word func */
4989
4990 #define THUMB2ARM_GLUE_SIZE 8
4991 static const insn16 t2a1_bx_pc_insn = 0x4778;
4992 static const insn16 t2a2_noop_insn = 0x46c0;
4993 static const insn32 t2a3_b_insn = 0xea000000;
4994
4995 #define VFP11_ERRATUM_VENEER_SIZE 8
4996
4997 #define ARM_BX_VENEER_SIZE 12
4998 static const insn32 armbx1_tst_insn = 0xe3100001;
4999 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5000 static const insn32 armbx3_bx_insn = 0xe12fff10;
5001
5002 #ifndef ELFARM_NABI_C_INCLUDED
5003 static void
5004 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5005 {
5006 asection * s;
5007 bfd_byte * contents;
5008
5009 if (size == 0)
5010 {
5011 /* Do not include empty glue sections in the output. */
5012 if (abfd != NULL)
5013 {
5014 s = bfd_get_section_by_name (abfd, name);
5015 if (s != NULL)
5016 s->flags |= SEC_EXCLUDE;
5017 }
5018 return;
5019 }
5020
5021 BFD_ASSERT (abfd != NULL);
5022
5023 s = bfd_get_section_by_name (abfd, name);
5024 BFD_ASSERT (s != NULL);
5025
5026 contents = (bfd_byte *) bfd_alloc (abfd, size);
5027
5028 BFD_ASSERT (s->size == size);
5029 s->contents = contents;
5030 }
5031
5032 bfd_boolean
5033 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5034 {
5035 struct elf32_arm_link_hash_table * globals;
5036
5037 globals = elf32_arm_hash_table (info);
5038 BFD_ASSERT (globals != NULL);
5039
5040 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5041 globals->arm_glue_size,
5042 ARM2THUMB_GLUE_SECTION_NAME);
5043
5044 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5045 globals->thumb_glue_size,
5046 THUMB2ARM_GLUE_SECTION_NAME);
5047
5048 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5049 globals->vfp11_erratum_glue_size,
5050 VFP11_ERRATUM_VENEER_SECTION_NAME);
5051
5052 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5053 globals->bx_glue_size,
5054 ARM_BX_GLUE_SECTION_NAME);
5055
5056 return TRUE;
5057 }
5058
5059 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5060 returns the symbol identifying the stub. */
5061
5062 static struct elf_link_hash_entry *
5063 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5064 struct elf_link_hash_entry * h)
5065 {
5066 const char * name = h->root.root.string;
5067 asection * s;
5068 char * tmp_name;
5069 struct elf_link_hash_entry * myh;
5070 struct bfd_link_hash_entry * bh;
5071 struct elf32_arm_link_hash_table * globals;
5072 bfd_vma val;
5073 bfd_size_type size;
5074
5075 globals = elf32_arm_hash_table (link_info);
5076 BFD_ASSERT (globals != NULL);
5077 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5078
5079 s = bfd_get_section_by_name
5080 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5081
5082 BFD_ASSERT (s != NULL);
5083
5084 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5085 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5086
5087 BFD_ASSERT (tmp_name);
5088
5089 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5090
5091 myh = elf_link_hash_lookup
5092 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5093
5094 if (myh != NULL)
5095 {
5096 /* We've already seen this guy. */
5097 free (tmp_name);
5098 return myh;
5099 }
5100
5101 /* The only trick here is using hash_table->arm_glue_size as the value.
5102 Even though the section isn't allocated yet, this is where we will be
5103 putting it. The +1 on the value marks that the stub has not been
5104 output yet - not that it is a Thumb function. */
5105 bh = NULL;
5106 val = globals->arm_glue_size + 1;
5107 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5108 tmp_name, BSF_GLOBAL, s, val,
5109 NULL, TRUE, FALSE, &bh);
5110
5111 myh = (struct elf_link_hash_entry *) bh;
5112 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5113 myh->forced_local = 1;
5114
5115 free (tmp_name);
5116
5117 if (link_info->shared || globals->root.is_relocatable_executable
5118 || globals->pic_veneer)
5119 size = ARM2THUMB_PIC_GLUE_SIZE;
5120 else if (globals->use_blx)
5121 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5122 else
5123 size = ARM2THUMB_STATIC_GLUE_SIZE;
5124
5125 s->size += size;
5126 globals->arm_glue_size += size;
5127
5128 return myh;
5129 }
5130
5131 /* Allocate space for ARMv4 BX veneers. */
5132
5133 static void
5134 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5135 {
5136 asection * s;
5137 struct elf32_arm_link_hash_table *globals;
5138 char *tmp_name;
5139 struct elf_link_hash_entry *myh;
5140 struct bfd_link_hash_entry *bh;
5141 bfd_vma val;
5142
5143 /* BX PC does not need a veneer. */
5144 if (reg == 15)
5145 return;
5146
5147 globals = elf32_arm_hash_table (link_info);
5148 BFD_ASSERT (globals != NULL);
5149 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5150
5151 /* Check if this veneer has already been allocated. */
5152 if (globals->bx_glue_offset[reg])
5153 return;
5154
5155 s = bfd_get_section_by_name
5156 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5157
5158 BFD_ASSERT (s != NULL);
5159
5160 /* Add symbol for veneer. */
5161 tmp_name = (char *)
5162 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5163
5164 BFD_ASSERT (tmp_name);
5165
5166 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5167
5168 myh = elf_link_hash_lookup
5169 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5170
5171 BFD_ASSERT (myh == NULL);
5172
5173 bh = NULL;
5174 val = globals->bx_glue_size;
5175 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5176 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5177 NULL, TRUE, FALSE, &bh);
5178
5179 myh = (struct elf_link_hash_entry *) bh;
5180 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5181 myh->forced_local = 1;
5182
5183 s->size += ARM_BX_VENEER_SIZE;
5184 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5185 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5186 }
5187
5188
5189 /* Add an entry to the code/data map for section SEC. */
5190
5191 static void
5192 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5193 {
5194 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5195 unsigned int newidx;
5196
5197 if (sec_data->map == NULL)
5198 {
5199 sec_data->map = (elf32_arm_section_map *)
5200 bfd_malloc (sizeof (elf32_arm_section_map));
5201 sec_data->mapcount = 0;
5202 sec_data->mapsize = 1;
5203 }
5204
5205 newidx = sec_data->mapcount++;
5206
5207 if (sec_data->mapcount > sec_data->mapsize)
5208 {
5209 sec_data->mapsize *= 2;
5210 sec_data->map = (elf32_arm_section_map *)
5211 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5212 * sizeof (elf32_arm_section_map));
5213 }
5214
5215 if (sec_data->map)
5216 {
5217 sec_data->map[newidx].vma = vma;
5218 sec_data->map[newidx].type = type;
5219 }
5220 }
5221
5222
5223 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5224 veneers are handled for now. */
5225
5226 static bfd_vma
5227 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5228 elf32_vfp11_erratum_list *branch,
5229 bfd *branch_bfd,
5230 asection *branch_sec,
5231 unsigned int offset)
5232 {
5233 asection *s;
5234 struct elf32_arm_link_hash_table *hash_table;
5235 char *tmp_name;
5236 struct elf_link_hash_entry *myh;
5237 struct bfd_link_hash_entry *bh;
5238 bfd_vma val;
5239 struct _arm_elf_section_data *sec_data;
5240 elf32_vfp11_erratum_list *newerr;
5241
5242 hash_table = elf32_arm_hash_table (link_info);
5243 BFD_ASSERT (hash_table != NULL);
5244 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5245
5246 s = bfd_get_section_by_name
5247 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5248
5249 sec_data = elf32_arm_section_data (s);
5250
5251 BFD_ASSERT (s != NULL);
5252
5253 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5254 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5255
5256 BFD_ASSERT (tmp_name);
5257
5258 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5259 hash_table->num_vfp11_fixes);
5260
5261 myh = elf_link_hash_lookup
5262 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5263
5264 BFD_ASSERT (myh == NULL);
5265
5266 bh = NULL;
5267 val = hash_table->vfp11_erratum_glue_size;
5268 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5269 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5270 NULL, TRUE, FALSE, &bh);
5271
5272 myh = (struct elf_link_hash_entry *) bh;
5273 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5274 myh->forced_local = 1;
5275
5276 /* Link veneer back to calling location. */
5277 sec_data->erratumcount += 1;
5278 newerr = (elf32_vfp11_erratum_list *)
5279 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5280
5281 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5282 newerr->vma = -1;
5283 newerr->u.v.branch = branch;
5284 newerr->u.v.id = hash_table->num_vfp11_fixes;
5285 branch->u.b.veneer = newerr;
5286
5287 newerr->next = sec_data->erratumlist;
5288 sec_data->erratumlist = newerr;
5289
5290 /* A symbol for the return from the veneer. */
5291 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5292 hash_table->num_vfp11_fixes);
5293
5294 myh = elf_link_hash_lookup
5295 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5296
5297 if (myh != NULL)
5298 abort ();
5299
5300 bh = NULL;
5301 val = offset + 4;
5302 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5303 branch_sec, val, NULL, TRUE, FALSE, &bh);
5304
5305 myh = (struct elf_link_hash_entry *) bh;
5306 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5307 myh->forced_local = 1;
5308
5309 free (tmp_name);
5310
5311 /* Generate a mapping symbol for the veneer section, and explicitly add an
5312 entry for that symbol to the code/data map for the section. */
5313 if (hash_table->vfp11_erratum_glue_size == 0)
5314 {
5315 bh = NULL;
5316 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5317 ever requires this erratum fix. */
5318 _bfd_generic_link_add_one_symbol (link_info,
5319 hash_table->bfd_of_glue_owner, "$a",
5320 BSF_LOCAL, s, 0, NULL,
5321 TRUE, FALSE, &bh);
5322
5323 myh = (struct elf_link_hash_entry *) bh;
5324 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5325 myh->forced_local = 1;
5326
5327 /* The elf32_arm_init_maps function only cares about symbols from input
5328 BFDs. We must make a note of this generated mapping symbol
5329 ourselves so that code byteswapping works properly in
5330 elf32_arm_write_section. */
5331 elf32_arm_section_map_add (s, 'a', 0);
5332 }
5333
5334 s->size += VFP11_ERRATUM_VENEER_SIZE;
5335 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5336 hash_table->num_vfp11_fixes++;
5337
5338 /* The offset of the veneer. */
5339 return val;
5340 }
5341
5342 #define ARM_GLUE_SECTION_FLAGS \
5343 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5344 | SEC_READONLY | SEC_LINKER_CREATED)
5345
5346 /* Create a fake section for use by the ARM backend of the linker. */
5347
5348 static bfd_boolean
5349 arm_make_glue_section (bfd * abfd, const char * name)
5350 {
5351 asection * sec;
5352
5353 sec = bfd_get_section_by_name (abfd, name);
5354 if (sec != NULL)
5355 /* Already made. */
5356 return TRUE;
5357
5358 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5359
5360 if (sec == NULL
5361 || !bfd_set_section_alignment (abfd, sec, 2))
5362 return FALSE;
5363
5364 /* Set the gc mark to prevent the section from being removed by garbage
5365 collection, despite the fact that no relocs refer to this section. */
5366 sec->gc_mark = 1;
5367
5368 return TRUE;
5369 }
5370
5371 /* Add the glue sections to ABFD. This function is called from the
5372 linker scripts in ld/emultempl/{armelf}.em. */
5373
5374 bfd_boolean
5375 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5376 struct bfd_link_info *info)
5377 {
5378 /* If we are only performing a partial
5379 link do not bother adding the glue. */
5380 if (info->relocatable)
5381 return TRUE;
5382
5383 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5384 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5385 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5386 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
5387 }
5388
5389 /* Select a BFD to be used to hold the sections used by the glue code.
5390 This function is called from the linker scripts in ld/emultempl/
5391 {armelf/pe}.em. */
5392
5393 bfd_boolean
5394 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
5395 {
5396 struct elf32_arm_link_hash_table *globals;
5397
5398 /* If we are only performing a partial link
5399 do not bother getting a bfd to hold the glue. */
5400 if (info->relocatable)
5401 return TRUE;
5402
5403 /* Make sure we don't attach the glue sections to a dynamic object. */
5404 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5405
5406 globals = elf32_arm_hash_table (info);
5407 BFD_ASSERT (globals != NULL);
5408
5409 if (globals->bfd_of_glue_owner != NULL)
5410 return TRUE;
5411
5412 /* Save the bfd for later use. */
5413 globals->bfd_of_glue_owner = abfd;
5414
5415 return TRUE;
5416 }
5417
5418 static void
5419 check_use_blx (struct elf32_arm_link_hash_table *globals)
5420 {
5421 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5422 Tag_CPU_arch) > 2)
5423 globals->use_blx = 1;
5424 }
5425
5426 bfd_boolean
5427 bfd_elf32_arm_process_before_allocation (bfd *abfd,
5428 struct bfd_link_info *link_info)
5429 {
5430 Elf_Internal_Shdr *symtab_hdr;
5431 Elf_Internal_Rela *internal_relocs = NULL;
5432 Elf_Internal_Rela *irel, *irelend;
5433 bfd_byte *contents = NULL;
5434
5435 asection *sec;
5436 struct elf32_arm_link_hash_table *globals;
5437
5438 /* If we are only performing a partial link do not bother
5439 to construct any glue. */
5440 if (link_info->relocatable)
5441 return TRUE;
5442
5443 /* Here we have a bfd that is to be included on the link. We have a
5444 hook to do reloc rummaging, before section sizes are nailed down. */
5445 globals = elf32_arm_hash_table (link_info);
5446 BFD_ASSERT (globals != NULL);
5447
5448 check_use_blx (globals);
5449
5450 if (globals->byteswap_code && !bfd_big_endian (abfd))
5451 {
5452 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5453 abfd);
5454 return FALSE;
5455 }
5456
5457 /* PR 5398: If we have not decided to include any loadable sections in
5458 the output then we will not have a glue owner bfd. This is OK, it
5459 just means that there is nothing else for us to do here. */
5460 if (globals->bfd_of_glue_owner == NULL)
5461 return TRUE;
5462
5463 /* Rummage around all the relocs and map the glue vectors. */
5464 sec = abfd->sections;
5465
5466 if (sec == NULL)
5467 return TRUE;
5468
5469 for (; sec != NULL; sec = sec->next)
5470 {
5471 if (sec->reloc_count == 0)
5472 continue;
5473
5474 if ((sec->flags & SEC_EXCLUDE) != 0)
5475 continue;
5476
5477 symtab_hdr = & elf_symtab_hdr (abfd);
5478
5479 /* Load the relocs. */
5480 internal_relocs
5481 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
5482
5483 if (internal_relocs == NULL)
5484 goto error_return;
5485
5486 irelend = internal_relocs + sec->reloc_count;
5487 for (irel = internal_relocs; irel < irelend; irel++)
5488 {
5489 long r_type;
5490 unsigned long r_index;
5491
5492 struct elf_link_hash_entry *h;
5493
5494 r_type = ELF32_R_TYPE (irel->r_info);
5495 r_index = ELF32_R_SYM (irel->r_info);
5496
5497 /* These are the only relocation types we care about. */
5498 if ( r_type != R_ARM_PC24
5499 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
5500 continue;
5501
5502 /* Get the section contents if we haven't done so already. */
5503 if (contents == NULL)
5504 {
5505 /* Get cached copy if it exists. */
5506 if (elf_section_data (sec)->this_hdr.contents != NULL)
5507 contents = elf_section_data (sec)->this_hdr.contents;
5508 else
5509 {
5510 /* Go get them off disk. */
5511 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5512 goto error_return;
5513 }
5514 }
5515
5516 if (r_type == R_ARM_V4BX)
5517 {
5518 int reg;
5519
5520 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5521 record_arm_bx_glue (link_info, reg);
5522 continue;
5523 }
5524
5525 /* If the relocation is not against a symbol it cannot concern us. */
5526 h = NULL;
5527
5528 /* We don't care about local symbols. */
5529 if (r_index < symtab_hdr->sh_info)
5530 continue;
5531
5532 /* This is an external symbol. */
5533 r_index -= symtab_hdr->sh_info;
5534 h = (struct elf_link_hash_entry *)
5535 elf_sym_hashes (abfd)[r_index];
5536
5537 /* If the relocation is against a static symbol it must be within
5538 the current section and so cannot be a cross ARM/Thumb relocation. */
5539 if (h == NULL)
5540 continue;
5541
5542 /* If the call will go through a PLT entry then we do not need
5543 glue. */
5544 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
5545 continue;
5546
5547 switch (r_type)
5548 {
5549 case R_ARM_PC24:
5550 /* This one is a call from arm code. We need to look up
5551 the target of the call. If it is a thumb target, we
5552 insert glue. */
5553 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
5554 record_arm_to_thumb_glue (link_info, h);
5555 break;
5556
5557 default:
5558 abort ();
5559 }
5560 }
5561
5562 if (contents != NULL
5563 && elf_section_data (sec)->this_hdr.contents != contents)
5564 free (contents);
5565 contents = NULL;
5566
5567 if (internal_relocs != NULL
5568 && elf_section_data (sec)->relocs != internal_relocs)
5569 free (internal_relocs);
5570 internal_relocs = NULL;
5571 }
5572
5573 return TRUE;
5574
5575 error_return:
5576 if (contents != NULL
5577 && elf_section_data (sec)->this_hdr.contents != contents)
5578 free (contents);
5579 if (internal_relocs != NULL
5580 && elf_section_data (sec)->relocs != internal_relocs)
5581 free (internal_relocs);
5582
5583 return FALSE;
5584 }
5585 #endif
5586
5587
5588 /* Initialise maps of ARM/Thumb/data for input BFDs. */
5589
5590 void
5591 bfd_elf32_arm_init_maps (bfd *abfd)
5592 {
5593 Elf_Internal_Sym *isymbuf;
5594 Elf_Internal_Shdr *hdr;
5595 unsigned int i, localsyms;
5596
5597 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5598 if (! is_arm_elf (abfd))
5599 return;
5600
5601 if ((abfd->flags & DYNAMIC) != 0)
5602 return;
5603
5604 hdr = & elf_symtab_hdr (abfd);
5605 localsyms = hdr->sh_info;
5606
5607 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5608 should contain the number of local symbols, which should come before any
5609 global symbols. Mapping symbols are always local. */
5610 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5611 NULL);
5612
5613 /* No internal symbols read? Skip this BFD. */
5614 if (isymbuf == NULL)
5615 return;
5616
5617 for (i = 0; i < localsyms; i++)
5618 {
5619 Elf_Internal_Sym *isym = &isymbuf[i];
5620 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5621 const char *name;
5622
5623 if (sec != NULL
5624 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5625 {
5626 name = bfd_elf_string_from_elf_section (abfd,
5627 hdr->sh_link, isym->st_name);
5628
5629 if (bfd_is_arm_special_symbol_name (name,
5630 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5631 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5632 }
5633 }
5634 }
5635
5636
5637 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5638 say what they wanted. */
5639
5640 void
5641 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5642 {
5643 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5644 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5645
5646 if (globals == NULL)
5647 return;
5648
5649 if (globals->fix_cortex_a8 == -1)
5650 {
5651 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5652 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5653 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5654 || out_attr[Tag_CPU_arch_profile].i == 0))
5655 globals->fix_cortex_a8 = 1;
5656 else
5657 globals->fix_cortex_a8 = 0;
5658 }
5659 }
5660
5661
5662 void
5663 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5664 {
5665 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5666 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5667
5668 if (globals == NULL)
5669 return;
5670 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5671 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5672 {
5673 switch (globals->vfp11_fix)
5674 {
5675 case BFD_ARM_VFP11_FIX_DEFAULT:
5676 case BFD_ARM_VFP11_FIX_NONE:
5677 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5678 break;
5679
5680 default:
5681 /* Give a warning, but do as the user requests anyway. */
5682 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5683 "workaround is not necessary for target architecture"), obfd);
5684 }
5685 }
5686 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5687 /* For earlier architectures, we might need the workaround, but do not
5688 enable it by default. If users is running with broken hardware, they
5689 must enable the erratum fix explicitly. */
5690 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5691 }
5692
5693
5694 enum bfd_arm_vfp11_pipe
5695 {
5696 VFP11_FMAC,
5697 VFP11_LS,
5698 VFP11_DS,
5699 VFP11_BAD
5700 };
5701
5702 /* Return a VFP register number. This is encoded as RX:X for single-precision
5703 registers, or X:RX for double-precision registers, where RX is the group of
5704 four bits in the instruction encoding and X is the single extension bit.
5705 RX and X fields are specified using their lowest (starting) bit. The return
5706 value is:
5707
5708 0...31: single-precision registers s0...s31
5709 32...63: double-precision registers d0...d31.
5710
5711 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5712 encounter VFP3 instructions, so we allow the full range for DP registers. */
5713
5714 static unsigned int
5715 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5716 unsigned int x)
5717 {
5718 if (is_double)
5719 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5720 else
5721 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5722 }
5723
5724 /* Set bits in *WMASK according to a register number REG as encoded by
5725 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5726
5727 static void
5728 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5729 {
5730 if (reg < 32)
5731 *wmask |= 1 << reg;
5732 else if (reg < 48)
5733 *wmask |= 3 << ((reg - 32) * 2);
5734 }
5735
5736 /* Return TRUE if WMASK overwrites anything in REGS. */
5737
5738 static bfd_boolean
5739 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5740 {
5741 int i;
5742
5743 for (i = 0; i < numregs; i++)
5744 {
5745 unsigned int reg = regs[i];
5746
5747 if (reg < 32 && (wmask & (1 << reg)) != 0)
5748 return TRUE;
5749
5750 reg -= 32;
5751
5752 if (reg >= 16)
5753 continue;
5754
5755 if ((wmask & (3 << (reg * 2))) != 0)
5756 return TRUE;
5757 }
5758
5759 return FALSE;
5760 }
5761
5762 /* In this function, we're interested in two things: finding input registers
5763 for VFP data-processing instructions, and finding the set of registers which
5764 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5765 hold the written set, so FLDM etc. are easy to deal with (we're only
5766 interested in 32 SP registers or 16 dp registers, due to the VFP version
5767 implemented by the chip in question). DP registers are marked by setting
5768 both SP registers in the write mask). */
5769
5770 static enum bfd_arm_vfp11_pipe
5771 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5772 int *numregs)
5773 {
5774 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
5775 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5776
5777 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5778 {
5779 unsigned int pqrs;
5780 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5781 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5782
5783 pqrs = ((insn & 0x00800000) >> 20)
5784 | ((insn & 0x00300000) >> 19)
5785 | ((insn & 0x00000040) >> 6);
5786
5787 switch (pqrs)
5788 {
5789 case 0: /* fmac[sd]. */
5790 case 1: /* fnmac[sd]. */
5791 case 2: /* fmsc[sd]. */
5792 case 3: /* fnmsc[sd]. */
5793 vpipe = VFP11_FMAC;
5794 bfd_arm_vfp11_write_mask (destmask, fd);
5795 regs[0] = fd;
5796 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5797 regs[2] = fm;
5798 *numregs = 3;
5799 break;
5800
5801 case 4: /* fmul[sd]. */
5802 case 5: /* fnmul[sd]. */
5803 case 6: /* fadd[sd]. */
5804 case 7: /* fsub[sd]. */
5805 vpipe = VFP11_FMAC;
5806 goto vfp_binop;
5807
5808 case 8: /* fdiv[sd]. */
5809 vpipe = VFP11_DS;
5810 vfp_binop:
5811 bfd_arm_vfp11_write_mask (destmask, fd);
5812 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5813 regs[1] = fm;
5814 *numregs = 2;
5815 break;
5816
5817 case 15: /* extended opcode. */
5818 {
5819 unsigned int extn = ((insn >> 15) & 0x1e)
5820 | ((insn >> 7) & 1);
5821
5822 switch (extn)
5823 {
5824 case 0: /* fcpy[sd]. */
5825 case 1: /* fabs[sd]. */
5826 case 2: /* fneg[sd]. */
5827 case 8: /* fcmp[sd]. */
5828 case 9: /* fcmpe[sd]. */
5829 case 10: /* fcmpz[sd]. */
5830 case 11: /* fcmpez[sd]. */
5831 case 16: /* fuito[sd]. */
5832 case 17: /* fsito[sd]. */
5833 case 24: /* ftoui[sd]. */
5834 case 25: /* ftouiz[sd]. */
5835 case 26: /* ftosi[sd]. */
5836 case 27: /* ftosiz[sd]. */
5837 /* These instructions will not bounce due to underflow. */
5838 *numregs = 0;
5839 vpipe = VFP11_FMAC;
5840 break;
5841
5842 case 3: /* fsqrt[sd]. */
5843 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5844 registers to cause the erratum in previous instructions. */
5845 bfd_arm_vfp11_write_mask (destmask, fd);
5846 vpipe = VFP11_DS;
5847 break;
5848
5849 case 15: /* fcvt{ds,sd}. */
5850 {
5851 int rnum = 0;
5852
5853 bfd_arm_vfp11_write_mask (destmask, fd);
5854
5855 /* Only FCVTSD can underflow. */
5856 if ((insn & 0x100) != 0)
5857 regs[rnum++] = fm;
5858
5859 *numregs = rnum;
5860
5861 vpipe = VFP11_FMAC;
5862 }
5863 break;
5864
5865 default:
5866 return VFP11_BAD;
5867 }
5868 }
5869 break;
5870
5871 default:
5872 return VFP11_BAD;
5873 }
5874 }
5875 /* Two-register transfer. */
5876 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5877 {
5878 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5879
5880 if ((insn & 0x100000) == 0)
5881 {
5882 if (is_double)
5883 bfd_arm_vfp11_write_mask (destmask, fm);
5884 else
5885 {
5886 bfd_arm_vfp11_write_mask (destmask, fm);
5887 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5888 }
5889 }
5890
5891 vpipe = VFP11_LS;
5892 }
5893 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5894 {
5895 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5896 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
5897
5898 switch (puw)
5899 {
5900 case 0: /* Two-reg transfer. We should catch these above. */
5901 abort ();
5902
5903 case 2: /* fldm[sdx]. */
5904 case 3:
5905 case 5:
5906 {
5907 unsigned int i, offset = insn & 0xff;
5908
5909 if (is_double)
5910 offset >>= 1;
5911
5912 for (i = fd; i < fd + offset; i++)
5913 bfd_arm_vfp11_write_mask (destmask, i);
5914 }
5915 break;
5916
5917 case 4: /* fld[sd]. */
5918 case 6:
5919 bfd_arm_vfp11_write_mask (destmask, fd);
5920 break;
5921
5922 default:
5923 return VFP11_BAD;
5924 }
5925
5926 vpipe = VFP11_LS;
5927 }
5928 /* Single-register transfer. Note L==0. */
5929 else if ((insn & 0x0f100e10) == 0x0e000a10)
5930 {
5931 unsigned int opcode = (insn >> 21) & 7;
5932 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5933
5934 switch (opcode)
5935 {
5936 case 0: /* fmsr/fmdlr. */
5937 case 1: /* fmdhr. */
5938 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5939 destination register. I don't know if this is exactly right,
5940 but it is the conservative choice. */
5941 bfd_arm_vfp11_write_mask (destmask, fn);
5942 break;
5943
5944 case 7: /* fmxr. */
5945 break;
5946 }
5947
5948 vpipe = VFP11_LS;
5949 }
5950
5951 return vpipe;
5952 }
5953
5954
5955 static int elf32_arm_compare_mapping (const void * a, const void * b);
5956
5957
5958 /* Look for potentially-troublesome code sequences which might trigger the
5959 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5960 (available from ARM) for details of the erratum. A short version is
5961 described in ld.texinfo. */
5962
5963 bfd_boolean
5964 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5965 {
5966 asection *sec;
5967 bfd_byte *contents = NULL;
5968 int state = 0;
5969 int regs[3], numregs = 0;
5970 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5971 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
5972
5973 if (globals == NULL)
5974 return FALSE;
5975
5976 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5977 The states transition as follows:
5978
5979 0 -> 1 (vector) or 0 -> 2 (scalar)
5980 A VFP FMAC-pipeline instruction has been seen. Fill
5981 regs[0]..regs[numregs-1] with its input operands. Remember this
5982 instruction in 'first_fmac'.
5983
5984 1 -> 2
5985 Any instruction, except for a VFP instruction which overwrites
5986 regs[*].
5987
5988 1 -> 3 [ -> 0 ] or
5989 2 -> 3 [ -> 0 ]
5990 A VFP instruction has been seen which overwrites any of regs[*].
5991 We must make a veneer! Reset state to 0 before examining next
5992 instruction.
5993
5994 2 -> 0
5995 If we fail to match anything in state 2, reset to state 0 and reset
5996 the instruction pointer to the instruction after 'first_fmac'.
5997
5998 If the VFP11 vector mode is in use, there must be at least two unrelated
5999 instructions between anti-dependent VFP11 instructions to properly avoid
6000 triggering the erratum, hence the use of the extra state 1. */
6001
6002 /* If we are only performing a partial link do not bother
6003 to construct any glue. */
6004 if (link_info->relocatable)
6005 return TRUE;
6006
6007 /* Skip if this bfd does not correspond to an ELF image. */
6008 if (! is_arm_elf (abfd))
6009 return TRUE;
6010
6011 /* We should have chosen a fix type by the time we get here. */
6012 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6013
6014 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6015 return TRUE;
6016
6017 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6018 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6019 return TRUE;
6020
6021 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6022 {
6023 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6024 struct _arm_elf_section_data *sec_data;
6025
6026 /* If we don't have executable progbits, we're not interested in this
6027 section. Also skip if section is to be excluded. */
6028 if (elf_section_type (sec) != SHT_PROGBITS
6029 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6030 || (sec->flags & SEC_EXCLUDE) != 0
6031 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6032 || sec->output_section == bfd_abs_section_ptr
6033 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6034 continue;
6035
6036 sec_data = elf32_arm_section_data (sec);
6037
6038 if (sec_data->mapcount == 0)
6039 continue;
6040
6041 if (elf_section_data (sec)->this_hdr.contents != NULL)
6042 contents = elf_section_data (sec)->this_hdr.contents;
6043 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6044 goto error_return;
6045
6046 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6047 elf32_arm_compare_mapping);
6048
6049 for (span = 0; span < sec_data->mapcount; span++)
6050 {
6051 unsigned int span_start = sec_data->map[span].vma;
6052 unsigned int span_end = (span == sec_data->mapcount - 1)
6053 ? sec->size : sec_data->map[span + 1].vma;
6054 char span_type = sec_data->map[span].type;
6055
6056 /* FIXME: Only ARM mode is supported at present. We may need to
6057 support Thumb-2 mode also at some point. */
6058 if (span_type != 'a')
6059 continue;
6060
6061 for (i = span_start; i < span_end;)
6062 {
6063 unsigned int next_i = i + 4;
6064 unsigned int insn = bfd_big_endian (abfd)
6065 ? (contents[i] << 24)
6066 | (contents[i + 1] << 16)
6067 | (contents[i + 2] << 8)
6068 | contents[i + 3]
6069 : (contents[i + 3] << 24)
6070 | (contents[i + 2] << 16)
6071 | (contents[i + 1] << 8)
6072 | contents[i];
6073 unsigned int writemask = 0;
6074 enum bfd_arm_vfp11_pipe vpipe;
6075
6076 switch (state)
6077 {
6078 case 0:
6079 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6080 &numregs);
6081 /* I'm assuming the VFP11 erratum can trigger with denorm
6082 operands on either the FMAC or the DS pipeline. This might
6083 lead to slightly overenthusiastic veneer insertion. */
6084 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6085 {
6086 state = use_vector ? 1 : 2;
6087 first_fmac = i;
6088 veneer_of_insn = insn;
6089 }
6090 break;
6091
6092 case 1:
6093 {
6094 int other_regs[3], other_numregs;
6095 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6096 other_regs,
6097 &other_numregs);
6098 if (vpipe != VFP11_BAD
6099 && bfd_arm_vfp11_antidependency (writemask, regs,
6100 numregs))
6101 state = 3;
6102 else
6103 state = 2;
6104 }
6105 break;
6106
6107 case 2:
6108 {
6109 int other_regs[3], other_numregs;
6110 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6111 other_regs,
6112 &other_numregs);
6113 if (vpipe != VFP11_BAD
6114 && bfd_arm_vfp11_antidependency (writemask, regs,
6115 numregs))
6116 state = 3;
6117 else
6118 {
6119 state = 0;
6120 next_i = first_fmac + 4;
6121 }
6122 }
6123 break;
6124
6125 case 3:
6126 abort (); /* Should be unreachable. */
6127 }
6128
6129 if (state == 3)
6130 {
6131 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6132 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6133
6134 elf32_arm_section_data (sec)->erratumcount += 1;
6135
6136 newerr->u.b.vfp_insn = veneer_of_insn;
6137
6138 switch (span_type)
6139 {
6140 case 'a':
6141 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6142 break;
6143
6144 default:
6145 abort ();
6146 }
6147
6148 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6149 first_fmac);
6150
6151 newerr->vma = -1;
6152
6153 newerr->next = sec_data->erratumlist;
6154 sec_data->erratumlist = newerr;
6155
6156 state = 0;
6157 }
6158
6159 i = next_i;
6160 }
6161 }
6162
6163 if (contents != NULL
6164 && elf_section_data (sec)->this_hdr.contents != contents)
6165 free (contents);
6166 contents = NULL;
6167 }
6168
6169 return TRUE;
6170
6171 error_return:
6172 if (contents != NULL
6173 && elf_section_data (sec)->this_hdr.contents != contents)
6174 free (contents);
6175
6176 return FALSE;
6177 }
6178
6179 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6180 after sections have been laid out, using specially-named symbols. */
6181
6182 void
6183 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6184 struct bfd_link_info *link_info)
6185 {
6186 asection *sec;
6187 struct elf32_arm_link_hash_table *globals;
6188 char *tmp_name;
6189
6190 if (link_info->relocatable)
6191 return;
6192
6193 /* Skip if this bfd does not correspond to an ELF image. */
6194 if (! is_arm_elf (abfd))
6195 return;
6196
6197 globals = elf32_arm_hash_table (link_info);
6198 if (globals == NULL)
6199 return;
6200
6201 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6202 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6203
6204 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6205 {
6206 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6207 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6208
6209 for (; errnode != NULL; errnode = errnode->next)
6210 {
6211 struct elf_link_hash_entry *myh;
6212 bfd_vma vma;
6213
6214 switch (errnode->type)
6215 {
6216 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6217 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6218 /* Find veneer symbol. */
6219 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6220 errnode->u.b.veneer->u.v.id);
6221
6222 myh = elf_link_hash_lookup
6223 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6224
6225 if (myh == NULL)
6226 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6227 "`%s'"), abfd, tmp_name);
6228
6229 vma = myh->root.u.def.section->output_section->vma
6230 + myh->root.u.def.section->output_offset
6231 + myh->root.u.def.value;
6232
6233 errnode->u.b.veneer->vma = vma;
6234 break;
6235
6236 case VFP11_ERRATUM_ARM_VENEER:
6237 case VFP11_ERRATUM_THUMB_VENEER:
6238 /* Find return location. */
6239 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6240 errnode->u.v.id);
6241
6242 myh = elf_link_hash_lookup
6243 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6244
6245 if (myh == NULL)
6246 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6247 "`%s'"), abfd, tmp_name);
6248
6249 vma = myh->root.u.def.section->output_section->vma
6250 + myh->root.u.def.section->output_offset
6251 + myh->root.u.def.value;
6252
6253 errnode->u.v.branch->vma = vma;
6254 break;
6255
6256 default:
6257 abort ();
6258 }
6259 }
6260 }
6261
6262 free (tmp_name);
6263 }
6264
6265
6266 /* Set target relocation values needed during linking. */
6267
6268 void
6269 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6270 struct bfd_link_info *link_info,
6271 int target1_is_rel,
6272 char * target2_type,
6273 int fix_v4bx,
6274 int use_blx,
6275 bfd_arm_vfp11_fix vfp11_fix,
6276 int no_enum_warn, int no_wchar_warn,
6277 int pic_veneer, int fix_cortex_a8)
6278 {
6279 struct elf32_arm_link_hash_table *globals;
6280
6281 globals = elf32_arm_hash_table (link_info);
6282 if (globals == NULL)
6283 return;
6284
6285 globals->target1_is_rel = target1_is_rel;
6286 if (strcmp (target2_type, "rel") == 0)
6287 globals->target2_reloc = R_ARM_REL32;
6288 else if (strcmp (target2_type, "abs") == 0)
6289 globals->target2_reloc = R_ARM_ABS32;
6290 else if (strcmp (target2_type, "got-rel") == 0)
6291 globals->target2_reloc = R_ARM_GOT_PREL;
6292 else
6293 {
6294 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6295 target2_type);
6296 }
6297 globals->fix_v4bx = fix_v4bx;
6298 globals->use_blx |= use_blx;
6299 globals->vfp11_fix = vfp11_fix;
6300 globals->pic_veneer = pic_veneer;
6301 globals->fix_cortex_a8 = fix_cortex_a8;
6302
6303 BFD_ASSERT (is_arm_elf (output_bfd));
6304 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6305 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6306 }
6307
6308 /* Replace the target offset of a Thumb bl or b.w instruction. */
6309
6310 static void
6311 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6312 {
6313 bfd_vma upper;
6314 bfd_vma lower;
6315 int reloc_sign;
6316
6317 BFD_ASSERT ((offset & 1) == 0);
6318
6319 upper = bfd_get_16 (abfd, insn);
6320 lower = bfd_get_16 (abfd, insn + 2);
6321 reloc_sign = (offset < 0) ? 1 : 0;
6322 upper = (upper & ~(bfd_vma) 0x7ff)
6323 | ((offset >> 12) & 0x3ff)
6324 | (reloc_sign << 10);
6325 lower = (lower & ~(bfd_vma) 0x2fff)
6326 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6327 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6328 | ((offset >> 1) & 0x7ff);
6329 bfd_put_16 (abfd, upper, insn);
6330 bfd_put_16 (abfd, lower, insn + 2);
6331 }
6332
6333 /* Thumb code calling an ARM function. */
6334
6335 static int
6336 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6337 const char * name,
6338 bfd * input_bfd,
6339 bfd * output_bfd,
6340 asection * input_section,
6341 bfd_byte * hit_data,
6342 asection * sym_sec,
6343 bfd_vma offset,
6344 bfd_signed_vma addend,
6345 bfd_vma val,
6346 char **error_message)
6347 {
6348 asection * s = 0;
6349 bfd_vma my_offset;
6350 long int ret_offset;
6351 struct elf_link_hash_entry * myh;
6352 struct elf32_arm_link_hash_table * globals;
6353
6354 myh = find_thumb_glue (info, name, error_message);
6355 if (myh == NULL)
6356 return FALSE;
6357
6358 globals = elf32_arm_hash_table (info);
6359 BFD_ASSERT (globals != NULL);
6360 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6361
6362 my_offset = myh->root.u.def.value;
6363
6364 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6365 THUMB2ARM_GLUE_SECTION_NAME);
6366
6367 BFD_ASSERT (s != NULL);
6368 BFD_ASSERT (s->contents != NULL);
6369 BFD_ASSERT (s->output_section != NULL);
6370
6371 if ((my_offset & 0x01) == 0x01)
6372 {
6373 if (sym_sec != NULL
6374 && sym_sec->owner != NULL
6375 && !INTERWORK_FLAG (sym_sec->owner))
6376 {
6377 (*_bfd_error_handler)
6378 (_("%B(%s): warning: interworking not enabled.\n"
6379 " first occurrence: %B: thumb call to arm"),
6380 sym_sec->owner, input_bfd, name);
6381
6382 return FALSE;
6383 }
6384
6385 --my_offset;
6386 myh->root.u.def.value = my_offset;
6387
6388 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6389 s->contents + my_offset);
6390
6391 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6392 s->contents + my_offset + 2);
6393
6394 ret_offset =
6395 /* Address of destination of the stub. */
6396 ((bfd_signed_vma) val)
6397 - ((bfd_signed_vma)
6398 /* Offset from the start of the current section
6399 to the start of the stubs. */
6400 (s->output_offset
6401 /* Offset of the start of this stub from the start of the stubs. */
6402 + my_offset
6403 /* Address of the start of the current section. */
6404 + s->output_section->vma)
6405 /* The branch instruction is 4 bytes into the stub. */
6406 + 4
6407 /* ARM branches work from the pc of the instruction + 8. */
6408 + 8);
6409
6410 put_arm_insn (globals, output_bfd,
6411 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6412 s->contents + my_offset + 4);
6413 }
6414
6415 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6416
6417 /* Now go back and fix up the original BL insn to point to here. */
6418 ret_offset =
6419 /* Address of where the stub is located. */
6420 (s->output_section->vma + s->output_offset + my_offset)
6421 /* Address of where the BL is located. */
6422 - (input_section->output_section->vma + input_section->output_offset
6423 + offset)
6424 /* Addend in the relocation. */
6425 - addend
6426 /* Biassing for PC-relative addressing. */
6427 - 8;
6428
6429 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
6430
6431 return TRUE;
6432 }
6433
6434 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
6435
6436 static struct elf_link_hash_entry *
6437 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6438 const char * name,
6439 bfd * input_bfd,
6440 bfd * output_bfd,
6441 asection * sym_sec,
6442 bfd_vma val,
6443 asection * s,
6444 char ** error_message)
6445 {
6446 bfd_vma my_offset;
6447 long int ret_offset;
6448 struct elf_link_hash_entry * myh;
6449 struct elf32_arm_link_hash_table * globals;
6450
6451 myh = find_arm_glue (info, name, error_message);
6452 if (myh == NULL)
6453 return NULL;
6454
6455 globals = elf32_arm_hash_table (info);
6456 BFD_ASSERT (globals != NULL);
6457 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6458
6459 my_offset = myh->root.u.def.value;
6460
6461 if ((my_offset & 0x01) == 0x01)
6462 {
6463 if (sym_sec != NULL
6464 && sym_sec->owner != NULL
6465 && !INTERWORK_FLAG (sym_sec->owner))
6466 {
6467 (*_bfd_error_handler)
6468 (_("%B(%s): warning: interworking not enabled.\n"
6469 " first occurrence: %B: arm call to thumb"),
6470 sym_sec->owner, input_bfd, name);
6471 }
6472
6473 --my_offset;
6474 myh->root.u.def.value = my_offset;
6475
6476 if (info->shared || globals->root.is_relocatable_executable
6477 || globals->pic_veneer)
6478 {
6479 /* For relocatable objects we can't use absolute addresses,
6480 so construct the address from a relative offset. */
6481 /* TODO: If the offset is small it's probably worth
6482 constructing the address with adds. */
6483 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6484 s->contents + my_offset);
6485 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6486 s->contents + my_offset + 4);
6487 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6488 s->contents + my_offset + 8);
6489 /* Adjust the offset by 4 for the position of the add,
6490 and 8 for the pipeline offset. */
6491 ret_offset = (val - (s->output_offset
6492 + s->output_section->vma
6493 + my_offset + 12))
6494 | 1;
6495 bfd_put_32 (output_bfd, ret_offset,
6496 s->contents + my_offset + 12);
6497 }
6498 else if (globals->use_blx)
6499 {
6500 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6501 s->contents + my_offset);
6502
6503 /* It's a thumb address. Add the low order bit. */
6504 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6505 s->contents + my_offset + 4);
6506 }
6507 else
6508 {
6509 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6510 s->contents + my_offset);
6511
6512 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6513 s->contents + my_offset + 4);
6514
6515 /* It's a thumb address. Add the low order bit. */
6516 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6517 s->contents + my_offset + 8);
6518
6519 my_offset += 12;
6520 }
6521 }
6522
6523 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6524
6525 return myh;
6526 }
6527
6528 /* Arm code calling a Thumb function. */
6529
6530 static int
6531 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6532 const char * name,
6533 bfd * input_bfd,
6534 bfd * output_bfd,
6535 asection * input_section,
6536 bfd_byte * hit_data,
6537 asection * sym_sec,
6538 bfd_vma offset,
6539 bfd_signed_vma addend,
6540 bfd_vma val,
6541 char **error_message)
6542 {
6543 unsigned long int tmp;
6544 bfd_vma my_offset;
6545 asection * s;
6546 long int ret_offset;
6547 struct elf_link_hash_entry * myh;
6548 struct elf32_arm_link_hash_table * globals;
6549
6550 globals = elf32_arm_hash_table (info);
6551 BFD_ASSERT (globals != NULL);
6552 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6553
6554 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6555 ARM2THUMB_GLUE_SECTION_NAME);
6556 BFD_ASSERT (s != NULL);
6557 BFD_ASSERT (s->contents != NULL);
6558 BFD_ASSERT (s->output_section != NULL);
6559
6560 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
6561 sym_sec, val, s, error_message);
6562 if (!myh)
6563 return FALSE;
6564
6565 my_offset = myh->root.u.def.value;
6566 tmp = bfd_get_32 (input_bfd, hit_data);
6567 tmp = tmp & 0xFF000000;
6568
6569 /* Somehow these are both 4 too far, so subtract 8. */
6570 ret_offset = (s->output_offset
6571 + my_offset
6572 + s->output_section->vma
6573 - (input_section->output_offset
6574 + input_section->output_section->vma
6575 + offset + addend)
6576 - 8);
6577
6578 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6579
6580 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
6581
6582 return TRUE;
6583 }
6584
6585 /* Populate Arm stub for an exported Thumb function. */
6586
6587 static bfd_boolean
6588 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6589 {
6590 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6591 asection * s;
6592 struct elf_link_hash_entry * myh;
6593 struct elf32_arm_link_hash_entry *eh;
6594 struct elf32_arm_link_hash_table * globals;
6595 asection *sec;
6596 bfd_vma val;
6597 char *error_message;
6598
6599 eh = elf32_arm_hash_entry (h);
6600 /* Allocate stubs for exported Thumb functions on v4t. */
6601 if (eh->export_glue == NULL)
6602 return TRUE;
6603
6604 globals = elf32_arm_hash_table (info);
6605 BFD_ASSERT (globals != NULL);
6606 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6607
6608 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6609 ARM2THUMB_GLUE_SECTION_NAME);
6610 BFD_ASSERT (s != NULL);
6611 BFD_ASSERT (s->contents != NULL);
6612 BFD_ASSERT (s->output_section != NULL);
6613
6614 sec = eh->export_glue->root.u.def.section;
6615
6616 BFD_ASSERT (sec->output_section != NULL);
6617
6618 val = eh->export_glue->root.u.def.value + sec->output_offset
6619 + sec->output_section->vma;
6620
6621 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6622 h->root.u.def.section->owner,
6623 globals->obfd, sec, val, s,
6624 &error_message);
6625 BFD_ASSERT (myh);
6626 return TRUE;
6627 }
6628
6629 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6630
6631 static bfd_vma
6632 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6633 {
6634 bfd_byte *p;
6635 bfd_vma glue_addr;
6636 asection *s;
6637 struct elf32_arm_link_hash_table *globals;
6638
6639 globals = elf32_arm_hash_table (info);
6640 BFD_ASSERT (globals != NULL);
6641 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6642
6643 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6644 ARM_BX_GLUE_SECTION_NAME);
6645 BFD_ASSERT (s != NULL);
6646 BFD_ASSERT (s->contents != NULL);
6647 BFD_ASSERT (s->output_section != NULL);
6648
6649 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6650
6651 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6652
6653 if ((globals->bx_glue_offset[reg] & 1) == 0)
6654 {
6655 p = s->contents + glue_addr;
6656 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6657 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6658 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6659 globals->bx_glue_offset[reg] |= 1;
6660 }
6661
6662 return glue_addr + s->output_section->vma + s->output_offset;
6663 }
6664
6665 /* Generate Arm stubs for exported Thumb symbols. */
6666 static void
6667 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
6668 struct bfd_link_info *link_info)
6669 {
6670 struct elf32_arm_link_hash_table * globals;
6671
6672 if (link_info == NULL)
6673 /* Ignore this if we are not called by the ELF backend linker. */
6674 return;
6675
6676 globals = elf32_arm_hash_table (link_info);
6677 if (globals == NULL)
6678 return;
6679
6680 /* If blx is available then exported Thumb symbols are OK and there is
6681 nothing to do. */
6682 if (globals->use_blx)
6683 return;
6684
6685 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6686 link_info);
6687 }
6688
6689 /* Some relocations map to different relocations depending on the
6690 target. Return the real relocation. */
6691
6692 static int
6693 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6694 int r_type)
6695 {
6696 switch (r_type)
6697 {
6698 case R_ARM_TARGET1:
6699 if (globals->target1_is_rel)
6700 return R_ARM_REL32;
6701 else
6702 return R_ARM_ABS32;
6703
6704 case R_ARM_TARGET2:
6705 return globals->target2_reloc;
6706
6707 default:
6708 return r_type;
6709 }
6710 }
6711
6712 /* Return the base VMA address which should be subtracted from real addresses
6713 when resolving @dtpoff relocation.
6714 This is PT_TLS segment p_vaddr. */
6715
6716 static bfd_vma
6717 dtpoff_base (struct bfd_link_info *info)
6718 {
6719 /* If tls_sec is NULL, we should have signalled an error already. */
6720 if (elf_hash_table (info)->tls_sec == NULL)
6721 return 0;
6722 return elf_hash_table (info)->tls_sec->vma;
6723 }
6724
6725 /* Return the relocation value for @tpoff relocation
6726 if STT_TLS virtual address is ADDRESS. */
6727
6728 static bfd_vma
6729 tpoff (struct bfd_link_info *info, bfd_vma address)
6730 {
6731 struct elf_link_hash_table *htab = elf_hash_table (info);
6732 bfd_vma base;
6733
6734 /* If tls_sec is NULL, we should have signalled an error already. */
6735 if (htab->tls_sec == NULL)
6736 return 0;
6737 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6738 return address - htab->tls_sec->vma + base;
6739 }
6740
6741 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6742 VALUE is the relocation value. */
6743
6744 static bfd_reloc_status_type
6745 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6746 {
6747 if (value > 0xfff)
6748 return bfd_reloc_overflow;
6749
6750 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6751 bfd_put_32 (abfd, value, data);
6752 return bfd_reloc_ok;
6753 }
6754
6755 /* For a given value of n, calculate the value of G_n as required to
6756 deal with group relocations. We return it in the form of an
6757 encoded constant-and-rotation, together with the final residual. If n is
6758 specified as less than zero, then final_residual is filled with the
6759 input value and no further action is performed. */
6760
6761 static bfd_vma
6762 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6763 {
6764 int current_n;
6765 bfd_vma g_n;
6766 bfd_vma encoded_g_n = 0;
6767 bfd_vma residual = value; /* Also known as Y_n. */
6768
6769 for (current_n = 0; current_n <= n; current_n++)
6770 {
6771 int shift;
6772
6773 /* Calculate which part of the value to mask. */
6774 if (residual == 0)
6775 shift = 0;
6776 else
6777 {
6778 int msb;
6779
6780 /* Determine the most significant bit in the residual and
6781 align the resulting value to a 2-bit boundary. */
6782 for (msb = 30; msb >= 0; msb -= 2)
6783 if (residual & (3 << msb))
6784 break;
6785
6786 /* The desired shift is now (msb - 6), or zero, whichever
6787 is the greater. */
6788 shift = msb - 6;
6789 if (shift < 0)
6790 shift = 0;
6791 }
6792
6793 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6794 g_n = residual & (0xff << shift);
6795 encoded_g_n = (g_n >> shift)
6796 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6797
6798 /* Calculate the residual for the next time around. */
6799 residual &= ~g_n;
6800 }
6801
6802 *final_residual = residual;
6803
6804 return encoded_g_n;
6805 }
6806
6807 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
6808 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
6809
6810 static int
6811 identify_add_or_sub (bfd_vma insn)
6812 {
6813 int opcode = insn & 0x1e00000;
6814
6815 if (opcode == 1 << 23) /* ADD */
6816 return 1;
6817
6818 if (opcode == 1 << 22) /* SUB */
6819 return -1;
6820
6821 return 0;
6822 }
6823
6824 /* Perform a relocation as part of a final link. */
6825
6826 static bfd_reloc_status_type
6827 elf32_arm_final_link_relocate (reloc_howto_type * howto,
6828 bfd * input_bfd,
6829 bfd * output_bfd,
6830 asection * input_section,
6831 bfd_byte * contents,
6832 Elf_Internal_Rela * rel,
6833 bfd_vma value,
6834 struct bfd_link_info * info,
6835 asection * sym_sec,
6836 const char * sym_name,
6837 int sym_flags,
6838 struct elf_link_hash_entry * h,
6839 bfd_boolean * unresolved_reloc_p,
6840 char ** error_message)
6841 {
6842 unsigned long r_type = howto->type;
6843 unsigned long r_symndx;
6844 bfd_byte * hit_data = contents + rel->r_offset;
6845 bfd * dynobj = NULL;
6846 bfd_vma * local_got_offsets;
6847 asection * sgot = NULL;
6848 asection * splt = NULL;
6849 asection * sreloc = NULL;
6850 bfd_vma addend;
6851 bfd_signed_vma signed_addend;
6852 struct elf32_arm_link_hash_table * globals;
6853
6854 globals = elf32_arm_hash_table (info);
6855 if (globals == NULL)
6856 return bfd_reloc_notsupported;
6857
6858 BFD_ASSERT (is_arm_elf (input_bfd));
6859
6860 /* Some relocation types map to different relocations depending on the
6861 target. We pick the right one here. */
6862 r_type = arm_real_reloc_type (globals, r_type);
6863 if (r_type != howto->type)
6864 howto = elf32_arm_howto_from_type (r_type);
6865
6866 /* If the start address has been set, then set the EF_ARM_HASENTRY
6867 flag. Setting this more than once is redundant, but the cost is
6868 not too high, and it keeps the code simple.
6869
6870 The test is done here, rather than somewhere else, because the
6871 start address is only set just before the final link commences.
6872
6873 Note - if the user deliberately sets a start address of 0, the
6874 flag will not be set. */
6875 if (bfd_get_start_address (output_bfd) != 0)
6876 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
6877
6878 dynobj = elf_hash_table (info)->dynobj;
6879 if (dynobj)
6880 {
6881 sgot = bfd_get_section_by_name (dynobj, ".got");
6882 splt = bfd_get_section_by_name (dynobj, ".plt");
6883 }
6884 local_got_offsets = elf_local_got_offsets (input_bfd);
6885 r_symndx = ELF32_R_SYM (rel->r_info);
6886
6887 if (globals->use_rel)
6888 {
6889 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6890
6891 if (addend & ((howto->src_mask + 1) >> 1))
6892 {
6893 signed_addend = -1;
6894 signed_addend &= ~ howto->src_mask;
6895 signed_addend |= addend;
6896 }
6897 else
6898 signed_addend = addend;
6899 }
6900 else
6901 addend = signed_addend = rel->r_addend;
6902
6903 switch (r_type)
6904 {
6905 case R_ARM_NONE:
6906 /* We don't need to find a value for this symbol. It's just a
6907 marker. */
6908 *unresolved_reloc_p = FALSE;
6909 return bfd_reloc_ok;
6910
6911 case R_ARM_ABS12:
6912 if (!globals->vxworks_p)
6913 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6914
6915 case R_ARM_PC24:
6916 case R_ARM_ABS32:
6917 case R_ARM_ABS32_NOI:
6918 case R_ARM_REL32:
6919 case R_ARM_REL32_NOI:
6920 case R_ARM_CALL:
6921 case R_ARM_JUMP24:
6922 case R_ARM_XPC25:
6923 case R_ARM_PREL31:
6924 case R_ARM_PLT32:
6925 /* Handle relocations which should use the PLT entry. ABS32/REL32
6926 will use the symbol's value, which may point to a PLT entry, but we
6927 don't need to handle that here. If we created a PLT entry, all
6928 branches in this object should go to it, except if the PLT is too
6929 far away, in which case a long branch stub should be inserted. */
6930 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
6931 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
6932 && r_type != R_ARM_CALL
6933 && r_type != R_ARM_JUMP24
6934 && r_type != R_ARM_PLT32)
6935 && h != NULL
6936 && splt != NULL
6937 && h->plt.offset != (bfd_vma) -1)
6938 {
6939 /* If we've created a .plt section, and assigned a PLT entry to
6940 this function, it should not be known to bind locally. If
6941 it were, we would have cleared the PLT entry. */
6942 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6943
6944 value = (splt->output_section->vma
6945 + splt->output_offset
6946 + h->plt.offset);
6947 *unresolved_reloc_p = FALSE;
6948 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6949 contents, rel->r_offset, value,
6950 rel->r_addend);
6951 }
6952
6953 /* When generating a shared object or relocatable executable, these
6954 relocations are copied into the output file to be resolved at
6955 run time. */
6956 if ((info->shared || globals->root.is_relocatable_executable)
6957 && (input_section->flags & SEC_ALLOC)
6958 && !(globals->vxworks_p
6959 && strcmp (input_section->output_section->name,
6960 ".tls_vars") == 0)
6961 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
6962 || !SYMBOL_CALLS_LOCAL (info, h))
6963 && (!strstr (input_section->name, STUB_SUFFIX))
6964 && (h == NULL
6965 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6966 || h->root.type != bfd_link_hash_undefweak)
6967 && r_type != R_ARM_PC24
6968 && r_type != R_ARM_CALL
6969 && r_type != R_ARM_JUMP24
6970 && r_type != R_ARM_PREL31
6971 && r_type != R_ARM_PLT32)
6972 {
6973 Elf_Internal_Rela outrel;
6974 bfd_byte *loc;
6975 bfd_boolean skip, relocate;
6976
6977 *unresolved_reloc_p = FALSE;
6978
6979 if (sreloc == NULL)
6980 {
6981 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6982 ! globals->use_rel);
6983
6984 if (sreloc == NULL)
6985 return bfd_reloc_notsupported;
6986 }
6987
6988 skip = FALSE;
6989 relocate = FALSE;
6990
6991 outrel.r_addend = addend;
6992 outrel.r_offset =
6993 _bfd_elf_section_offset (output_bfd, info, input_section,
6994 rel->r_offset);
6995 if (outrel.r_offset == (bfd_vma) -1)
6996 skip = TRUE;
6997 else if (outrel.r_offset == (bfd_vma) -2)
6998 skip = TRUE, relocate = TRUE;
6999 outrel.r_offset += (input_section->output_section->vma
7000 + input_section->output_offset);
7001
7002 if (skip)
7003 memset (&outrel, 0, sizeof outrel);
7004 else if (h != NULL
7005 && h->dynindx != -1
7006 && (!info->shared
7007 || !info->symbolic
7008 || !h->def_regular))
7009 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
7010 else
7011 {
7012 int symbol;
7013
7014 /* This symbol is local, or marked to become local. */
7015 if (sym_flags == STT_ARM_TFUNC)
7016 value |= 1;
7017 if (globals->symbian_p)
7018 {
7019 asection *osec;
7020
7021 /* On Symbian OS, the data segment and text segement
7022 can be relocated independently. Therefore, we
7023 must indicate the segment to which this
7024 relocation is relative. The BPABI allows us to
7025 use any symbol in the right segment; we just use
7026 the section symbol as it is convenient. (We
7027 cannot use the symbol given by "h" directly as it
7028 will not appear in the dynamic symbol table.)
7029
7030 Note that the dynamic linker ignores the section
7031 symbol value, so we don't subtract osec->vma
7032 from the emitted reloc addend. */
7033 if (sym_sec)
7034 osec = sym_sec->output_section;
7035 else
7036 osec = input_section->output_section;
7037 symbol = elf_section_data (osec)->dynindx;
7038 if (symbol == 0)
7039 {
7040 struct elf_link_hash_table *htab = elf_hash_table (info);
7041
7042 if ((osec->flags & SEC_READONLY) == 0
7043 && htab->data_index_section != NULL)
7044 osec = htab->data_index_section;
7045 else
7046 osec = htab->text_index_section;
7047 symbol = elf_section_data (osec)->dynindx;
7048 }
7049 BFD_ASSERT (symbol != 0);
7050 }
7051 else
7052 /* On SVR4-ish systems, the dynamic loader cannot
7053 relocate the text and data segments independently,
7054 so the symbol does not matter. */
7055 symbol = 0;
7056 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
7057 if (globals->use_rel)
7058 relocate = TRUE;
7059 else
7060 outrel.r_addend += value;
7061 }
7062
7063 loc = sreloc->contents;
7064 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7065 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
7066
7067 /* If this reloc is against an external symbol, we do not want to
7068 fiddle with the addend. Otherwise, we need to include the symbol
7069 value so that it becomes an addend for the dynamic reloc. */
7070 if (! relocate)
7071 return bfd_reloc_ok;
7072
7073 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7074 contents, rel->r_offset, value,
7075 (bfd_vma) 0);
7076 }
7077 else switch (r_type)
7078 {
7079 case R_ARM_ABS12:
7080 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7081
7082 case R_ARM_XPC25: /* Arm BLX instruction. */
7083 case R_ARM_CALL:
7084 case R_ARM_JUMP24:
7085 case R_ARM_PC24: /* Arm B/BL instruction. */
7086 case R_ARM_PLT32:
7087 {
7088 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7089
7090 if (r_type == R_ARM_XPC25)
7091 {
7092 /* Check for Arm calling Arm function. */
7093 /* FIXME: Should we translate the instruction into a BL
7094 instruction instead ? */
7095 if (sym_flags != STT_ARM_TFUNC)
7096 (*_bfd_error_handler)
7097 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7098 input_bfd,
7099 h ? h->root.root.string : "(local)");
7100 }
7101 else if (r_type == R_ARM_PC24)
7102 {
7103 /* Check for Arm calling Thumb function. */
7104 if (sym_flags == STT_ARM_TFUNC)
7105 {
7106 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7107 output_bfd, input_section,
7108 hit_data, sym_sec, rel->r_offset,
7109 signed_addend, value,
7110 error_message))
7111 return bfd_reloc_ok;
7112 else
7113 return bfd_reloc_dangerous;
7114 }
7115 }
7116
7117 /* Check if a stub has to be inserted because the
7118 destination is too far or we are changing mode. */
7119 if ( r_type == R_ARM_CALL
7120 || r_type == R_ARM_JUMP24
7121 || r_type == R_ARM_PLT32)
7122 {
7123 enum elf32_arm_stub_type stub_type = arm_stub_none;
7124 struct elf32_arm_link_hash_entry *hash;
7125
7126 hash = (struct elf32_arm_link_hash_entry *) h;
7127 stub_type = arm_type_of_stub (info, input_section, rel,
7128 &sym_flags, hash,
7129 value, sym_sec,
7130 input_bfd, sym_name);
7131
7132 if (stub_type != arm_stub_none)
7133 {
7134 /* The target is out of reach, so redirect the
7135 branch to the local stub for this function. */
7136
7137 stub_entry = elf32_arm_get_stub_entry (input_section,
7138 sym_sec, h,
7139 rel, globals,
7140 stub_type);
7141 if (stub_entry != NULL)
7142 value = (stub_entry->stub_offset
7143 + stub_entry->stub_sec->output_offset
7144 + stub_entry->stub_sec->output_section->vma);
7145 }
7146 else
7147 {
7148 /* If the call goes through a PLT entry, make sure to
7149 check distance to the right destination address. */
7150 if (h != NULL
7151 && splt != NULL
7152 && h->plt.offset != (bfd_vma) -1)
7153 {
7154 value = (splt->output_section->vma
7155 + splt->output_offset
7156 + h->plt.offset);
7157 *unresolved_reloc_p = FALSE;
7158 /* The PLT entry is in ARM mode, regardless of the
7159 target function. */
7160 sym_flags = STT_FUNC;
7161 }
7162 }
7163 }
7164
7165 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7166 where:
7167 S is the address of the symbol in the relocation.
7168 P is address of the instruction being relocated.
7169 A is the addend (extracted from the instruction) in bytes.
7170
7171 S is held in 'value'.
7172 P is the base address of the section containing the
7173 instruction plus the offset of the reloc into that
7174 section, ie:
7175 (input_section->output_section->vma +
7176 input_section->output_offset +
7177 rel->r_offset).
7178 A is the addend, converted into bytes, ie:
7179 (signed_addend * 4)
7180
7181 Note: None of these operations have knowledge of the pipeline
7182 size of the processor, thus it is up to the assembler to
7183 encode this information into the addend. */
7184 value -= (input_section->output_section->vma
7185 + input_section->output_offset);
7186 value -= rel->r_offset;
7187 if (globals->use_rel)
7188 value += (signed_addend << howto->size);
7189 else
7190 /* RELA addends do not have to be adjusted by howto->size. */
7191 value += signed_addend;
7192
7193 signed_addend = value;
7194 signed_addend >>= howto->rightshift;
7195
7196 /* A branch to an undefined weak symbol is turned into a jump to
7197 the next instruction unless a PLT entry will be created.
7198 Do the same for local undefined symbols.
7199 The jump to the next instruction is optimized as a NOP depending
7200 on the architecture. */
7201 if (h ? (h->root.type == bfd_link_hash_undefweak
7202 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7203 : bfd_is_und_section (sym_sec))
7204 {
7205 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7206
7207 if (arch_has_arm_nop (globals))
7208 value |= 0x0320f000;
7209 else
7210 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
7211 }
7212 else
7213 {
7214 /* Perform a signed range check. */
7215 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
7216 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7217 return bfd_reloc_overflow;
7218
7219 addend = (value & 2);
7220
7221 value = (signed_addend & howto->dst_mask)
7222 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
7223
7224 if (r_type == R_ARM_CALL)
7225 {
7226 /* Set the H bit in the BLX instruction. */
7227 if (sym_flags == STT_ARM_TFUNC)
7228 {
7229 if (addend)
7230 value |= (1 << 24);
7231 else
7232 value &= ~(bfd_vma)(1 << 24);
7233 }
7234
7235 /* Select the correct instruction (BL or BLX). */
7236 /* Only if we are not handling a BL to a stub. In this
7237 case, mode switching is performed by the stub. */
7238 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
7239 value |= (1 << 28);
7240 else
7241 {
7242 value &= ~(bfd_vma)(1 << 28);
7243 value |= (1 << 24);
7244 }
7245 }
7246 }
7247 }
7248 break;
7249
7250 case R_ARM_ABS32:
7251 value += addend;
7252 if (sym_flags == STT_ARM_TFUNC)
7253 value |= 1;
7254 break;
7255
7256 case R_ARM_ABS32_NOI:
7257 value += addend;
7258 break;
7259
7260 case R_ARM_REL32:
7261 value += addend;
7262 if (sym_flags == STT_ARM_TFUNC)
7263 value |= 1;
7264 value -= (input_section->output_section->vma
7265 + input_section->output_offset + rel->r_offset);
7266 break;
7267
7268 case R_ARM_REL32_NOI:
7269 value += addend;
7270 value -= (input_section->output_section->vma
7271 + input_section->output_offset + rel->r_offset);
7272 break;
7273
7274 case R_ARM_PREL31:
7275 value -= (input_section->output_section->vma
7276 + input_section->output_offset + rel->r_offset);
7277 value += signed_addend;
7278 if (! h || h->root.type != bfd_link_hash_undefweak)
7279 {
7280 /* Check for overflow. */
7281 if ((value ^ (value >> 1)) & (1 << 30))
7282 return bfd_reloc_overflow;
7283 }
7284 value &= 0x7fffffff;
7285 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7286 if (sym_flags == STT_ARM_TFUNC)
7287 value |= 1;
7288 break;
7289 }
7290
7291 bfd_put_32 (input_bfd, value, hit_data);
7292 return bfd_reloc_ok;
7293
7294 case R_ARM_ABS8:
7295 value += addend;
7296
7297 /* There is no way to tell whether the user intended to use a signed or
7298 unsigned addend. When checking for overflow we accept either,
7299 as specified by the AAELF. */
7300 if ((long) value > 0xff || (long) value < -0x80)
7301 return bfd_reloc_overflow;
7302
7303 bfd_put_8 (input_bfd, value, hit_data);
7304 return bfd_reloc_ok;
7305
7306 case R_ARM_ABS16:
7307 value += addend;
7308
7309 /* See comment for R_ARM_ABS8. */
7310 if ((long) value > 0xffff || (long) value < -0x8000)
7311 return bfd_reloc_overflow;
7312
7313 bfd_put_16 (input_bfd, value, hit_data);
7314 return bfd_reloc_ok;
7315
7316 case R_ARM_THM_ABS5:
7317 /* Support ldr and str instructions for the thumb. */
7318 if (globals->use_rel)
7319 {
7320 /* Need to refetch addend. */
7321 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7322 /* ??? Need to determine shift amount from operand size. */
7323 addend >>= howto->rightshift;
7324 }
7325 value += addend;
7326
7327 /* ??? Isn't value unsigned? */
7328 if ((long) value > 0x1f || (long) value < -0x10)
7329 return bfd_reloc_overflow;
7330
7331 /* ??? Value needs to be properly shifted into place first. */
7332 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7333 bfd_put_16 (input_bfd, value, hit_data);
7334 return bfd_reloc_ok;
7335
7336 case R_ARM_THM_ALU_PREL_11_0:
7337 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7338 {
7339 bfd_vma insn;
7340 bfd_signed_vma relocation;
7341
7342 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7343 | bfd_get_16 (input_bfd, hit_data + 2);
7344
7345 if (globals->use_rel)
7346 {
7347 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7348 | ((insn & (1 << 26)) >> 15);
7349 if (insn & 0xf00000)
7350 signed_addend = -signed_addend;
7351 }
7352
7353 relocation = value + signed_addend;
7354 relocation -= (input_section->output_section->vma
7355 + input_section->output_offset
7356 + rel->r_offset);
7357
7358 value = abs (relocation);
7359
7360 if (value >= 0x1000)
7361 return bfd_reloc_overflow;
7362
7363 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7364 | ((value & 0x700) << 4)
7365 | ((value & 0x800) << 15);
7366 if (relocation < 0)
7367 insn |= 0xa00000;
7368
7369 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7370 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7371
7372 return bfd_reloc_ok;
7373 }
7374
7375 case R_ARM_THM_PC8:
7376 /* PR 10073: This reloc is not generated by the GNU toolchain,
7377 but it is supported for compatibility with third party libraries
7378 generated by other compilers, specifically the ARM/IAR. */
7379 {
7380 bfd_vma insn;
7381 bfd_signed_vma relocation;
7382
7383 insn = bfd_get_16 (input_bfd, hit_data);
7384
7385 if (globals->use_rel)
7386 addend = (insn & 0x00ff) << 2;
7387
7388 relocation = value + addend;
7389 relocation -= (input_section->output_section->vma
7390 + input_section->output_offset
7391 + rel->r_offset);
7392
7393 value = abs (relocation);
7394
7395 /* We do not check for overflow of this reloc. Although strictly
7396 speaking this is incorrect, it appears to be necessary in order
7397 to work with IAR generated relocs. Since GCC and GAS do not
7398 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7399 a problem for them. */
7400 value &= 0x3fc;
7401
7402 insn = (insn & 0xff00) | (value >> 2);
7403
7404 bfd_put_16 (input_bfd, insn, hit_data);
7405
7406 return bfd_reloc_ok;
7407 }
7408
7409 case R_ARM_THM_PC12:
7410 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7411 {
7412 bfd_vma insn;
7413 bfd_signed_vma relocation;
7414
7415 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7416 | bfd_get_16 (input_bfd, hit_data + 2);
7417
7418 if (globals->use_rel)
7419 {
7420 signed_addend = insn & 0xfff;
7421 if (!(insn & (1 << 23)))
7422 signed_addend = -signed_addend;
7423 }
7424
7425 relocation = value + signed_addend;
7426 relocation -= (input_section->output_section->vma
7427 + input_section->output_offset
7428 + rel->r_offset);
7429
7430 value = abs (relocation);
7431
7432 if (value >= 0x1000)
7433 return bfd_reloc_overflow;
7434
7435 insn = (insn & 0xff7ff000) | value;
7436 if (relocation >= 0)
7437 insn |= (1 << 23);
7438
7439 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7440 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7441
7442 return bfd_reloc_ok;
7443 }
7444
7445 case R_ARM_THM_XPC22:
7446 case R_ARM_THM_CALL:
7447 case R_ARM_THM_JUMP24:
7448 /* Thumb BL (branch long instruction). */
7449 {
7450 bfd_vma relocation;
7451 bfd_vma reloc_sign;
7452 bfd_boolean overflow = FALSE;
7453 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7454 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
7455 bfd_signed_vma reloc_signed_max;
7456 bfd_signed_vma reloc_signed_min;
7457 bfd_vma check;
7458 bfd_signed_vma signed_check;
7459 int bitsize;
7460 const int thumb2 = using_thumb2 (globals);
7461
7462 /* A branch to an undefined weak symbol is turned into a jump to
7463 the next instruction unless a PLT entry will be created.
7464 The jump to the next instruction is optimized as a NOP.W for
7465 Thumb-2 enabled architectures. */
7466 if (h && h->root.type == bfd_link_hash_undefweak
7467 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7468 {
7469 if (arch_has_thumb2_nop (globals))
7470 {
7471 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7472 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7473 }
7474 else
7475 {
7476 bfd_put_16 (input_bfd, 0xe000, hit_data);
7477 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7478 }
7479 return bfd_reloc_ok;
7480 }
7481
7482 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7483 with Thumb-1) involving the J1 and J2 bits. */
7484 if (globals->use_rel)
7485 {
7486 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7487 bfd_vma upper = upper_insn & 0x3ff;
7488 bfd_vma lower = lower_insn & 0x7ff;
7489 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7490 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7491 bfd_vma i1 = j1 ^ s ? 0 : 1;
7492 bfd_vma i2 = j2 ^ s ? 0 : 1;
7493
7494 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7495 /* Sign extend. */
7496 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7497
7498 signed_addend = addend;
7499 }
7500
7501 if (r_type == R_ARM_THM_XPC22)
7502 {
7503 /* Check for Thumb to Thumb call. */
7504 /* FIXME: Should we translate the instruction into a BL
7505 instruction instead ? */
7506 if (sym_flags == STT_ARM_TFUNC)
7507 (*_bfd_error_handler)
7508 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7509 input_bfd,
7510 h ? h->root.root.string : "(local)");
7511 }
7512 else
7513 {
7514 /* If it is not a call to Thumb, assume call to Arm.
7515 If it is a call relative to a section name, then it is not a
7516 function call at all, but rather a long jump. Calls through
7517 the PLT do not require stubs. */
7518 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7519 && (h == NULL || splt == NULL
7520 || h->plt.offset == (bfd_vma) -1))
7521 {
7522 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7523 {
7524 /* Convert BL to BLX. */
7525 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7526 }
7527 else if (( r_type != R_ARM_THM_CALL)
7528 && (r_type != R_ARM_THM_JUMP24))
7529 {
7530 if (elf32_thumb_to_arm_stub
7531 (info, sym_name, input_bfd, output_bfd, input_section,
7532 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7533 error_message))
7534 return bfd_reloc_ok;
7535 else
7536 return bfd_reloc_dangerous;
7537 }
7538 }
7539 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7540 && r_type == R_ARM_THM_CALL)
7541 {
7542 /* Make sure this is a BL. */
7543 lower_insn |= 0x1800;
7544 }
7545 }
7546
7547 enum elf32_arm_stub_type stub_type = arm_stub_none;
7548 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
7549 {
7550 /* Check if a stub has to be inserted because the destination
7551 is too far. */
7552 struct elf32_arm_stub_hash_entry *stub_entry;
7553 struct elf32_arm_link_hash_entry *hash;
7554
7555 hash = (struct elf32_arm_link_hash_entry *) h;
7556
7557 stub_type = arm_type_of_stub (info, input_section, rel,
7558 &sym_flags, hash, value, sym_sec,
7559 input_bfd, sym_name);
7560
7561 if (stub_type != arm_stub_none)
7562 {
7563 /* The target is out of reach or we are changing modes, so
7564 redirect the branch to the local stub for this
7565 function. */
7566 stub_entry = elf32_arm_get_stub_entry (input_section,
7567 sym_sec, h,
7568 rel, globals,
7569 stub_type);
7570 if (stub_entry != NULL)
7571 value = (stub_entry->stub_offset
7572 + stub_entry->stub_sec->output_offset
7573 + stub_entry->stub_sec->output_section->vma);
7574
7575 /* If this call becomes a call to Arm, force BLX. */
7576 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
7577 {
7578 if ((stub_entry
7579 && !arm_stub_is_thumb (stub_entry->stub_type))
7580 || (sym_flags != STT_ARM_TFUNC))
7581 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7582 }
7583 }
7584 }
7585
7586 /* Handle calls via the PLT. */
7587 if (stub_type == arm_stub_none
7588 && h != NULL
7589 && splt != NULL
7590 && h->plt.offset != (bfd_vma) -1)
7591 {
7592 value = (splt->output_section->vma
7593 + splt->output_offset
7594 + h->plt.offset);
7595
7596 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7597 {
7598 /* If the Thumb BLX instruction is available, convert
7599 the BL to a BLX instruction to call the ARM-mode
7600 PLT entry. */
7601 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7602 sym_flags = STT_FUNC;
7603 }
7604 else
7605 {
7606 /* Target the Thumb stub before the ARM PLT entry. */
7607 value -= PLT_THUMB_STUB_SIZE;
7608 sym_flags = STT_ARM_TFUNC;
7609 }
7610 *unresolved_reloc_p = FALSE;
7611 }
7612
7613 relocation = value + signed_addend;
7614
7615 relocation -= (input_section->output_section->vma
7616 + input_section->output_offset
7617 + rel->r_offset);
7618
7619 check = relocation >> howto->rightshift;
7620
7621 /* If this is a signed value, the rightshift just dropped
7622 leading 1 bits (assuming twos complement). */
7623 if ((bfd_signed_vma) relocation >= 0)
7624 signed_check = check;
7625 else
7626 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7627
7628 /* Calculate the permissable maximum and minimum values for
7629 this relocation according to whether we're relocating for
7630 Thumb-2 or not. */
7631 bitsize = howto->bitsize;
7632 if (!thumb2)
7633 bitsize -= 2;
7634 reloc_signed_max = (1 << (bitsize - 1)) - 1;
7635 reloc_signed_min = ~reloc_signed_max;
7636
7637 /* Assumes two's complement. */
7638 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7639 overflow = TRUE;
7640
7641 if ((lower_insn & 0x5000) == 0x4000)
7642 /* For a BLX instruction, make sure that the relocation is rounded up
7643 to a word boundary. This follows the semantics of the instruction
7644 which specifies that bit 1 of the target address will come from bit
7645 1 of the base address. */
7646 relocation = (relocation + 2) & ~ 3;
7647
7648 /* Put RELOCATION back into the insn. Assumes two's complement.
7649 We use the Thumb-2 encoding, which is safe even if dealing with
7650 a Thumb-1 instruction by virtue of our overflow check above. */
7651 reloc_sign = (signed_check < 0) ? 1 : 0;
7652 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7653 | ((relocation >> 12) & 0x3ff)
7654 | (reloc_sign << 10);
7655 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
7656 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7657 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7658 | ((relocation >> 1) & 0x7ff);
7659
7660 /* Put the relocated value back in the object file: */
7661 bfd_put_16 (input_bfd, upper_insn, hit_data);
7662 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7663
7664 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7665 }
7666 break;
7667
7668 case R_ARM_THM_JUMP19:
7669 /* Thumb32 conditional branch instruction. */
7670 {
7671 bfd_vma relocation;
7672 bfd_boolean overflow = FALSE;
7673 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7674 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
7675 bfd_signed_vma reloc_signed_max = 0xffffe;
7676 bfd_signed_vma reloc_signed_min = -0x100000;
7677 bfd_signed_vma signed_check;
7678
7679 /* Need to refetch the addend, reconstruct the top three bits,
7680 and squish the two 11 bit pieces together. */
7681 if (globals->use_rel)
7682 {
7683 bfd_vma S = (upper_insn & 0x0400) >> 10;
7684 bfd_vma upper = (upper_insn & 0x003f);
7685 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7686 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7687 bfd_vma lower = (lower_insn & 0x07ff);
7688
7689 upper |= J1 << 6;
7690 upper |= J2 << 7;
7691 upper |= (!S) << 8;
7692 upper -= 0x0100; /* Sign extend. */
7693
7694 addend = (upper << 12) | (lower << 1);
7695 signed_addend = addend;
7696 }
7697
7698 /* Handle calls via the PLT. */
7699 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7700 {
7701 value = (splt->output_section->vma
7702 + splt->output_offset
7703 + h->plt.offset);
7704 /* Target the Thumb stub before the ARM PLT entry. */
7705 value -= PLT_THUMB_STUB_SIZE;
7706 *unresolved_reloc_p = FALSE;
7707 }
7708
7709 /* ??? Should handle interworking? GCC might someday try to
7710 use this for tail calls. */
7711
7712 relocation = value + signed_addend;
7713 relocation -= (input_section->output_section->vma
7714 + input_section->output_offset
7715 + rel->r_offset);
7716 signed_check = (bfd_signed_vma) relocation;
7717
7718 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7719 overflow = TRUE;
7720
7721 /* Put RELOCATION back into the insn. */
7722 {
7723 bfd_vma S = (relocation & 0x00100000) >> 20;
7724 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7725 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7726 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7727 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7728
7729 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
7730 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7731 }
7732
7733 /* Put the relocated value back in the object file: */
7734 bfd_put_16 (input_bfd, upper_insn, hit_data);
7735 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7736
7737 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7738 }
7739
7740 case R_ARM_THM_JUMP11:
7741 case R_ARM_THM_JUMP8:
7742 case R_ARM_THM_JUMP6:
7743 /* Thumb B (branch) instruction). */
7744 {
7745 bfd_signed_vma relocation;
7746 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7747 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
7748 bfd_signed_vma signed_check;
7749
7750 /* CZB cannot jump backward. */
7751 if (r_type == R_ARM_THM_JUMP6)
7752 reloc_signed_min = 0;
7753
7754 if (globals->use_rel)
7755 {
7756 /* Need to refetch addend. */
7757 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7758 if (addend & ((howto->src_mask + 1) >> 1))
7759 {
7760 signed_addend = -1;
7761 signed_addend &= ~ howto->src_mask;
7762 signed_addend |= addend;
7763 }
7764 else
7765 signed_addend = addend;
7766 /* The value in the insn has been right shifted. We need to
7767 undo this, so that we can perform the address calculation
7768 in terms of bytes. */
7769 signed_addend <<= howto->rightshift;
7770 }
7771 relocation = value + signed_addend;
7772
7773 relocation -= (input_section->output_section->vma
7774 + input_section->output_offset
7775 + rel->r_offset);
7776
7777 relocation >>= howto->rightshift;
7778 signed_check = relocation;
7779
7780 if (r_type == R_ARM_THM_JUMP6)
7781 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7782 else
7783 relocation &= howto->dst_mask;
7784 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
7785
7786 bfd_put_16 (input_bfd, relocation, hit_data);
7787
7788 /* Assumes two's complement. */
7789 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7790 return bfd_reloc_overflow;
7791
7792 return bfd_reloc_ok;
7793 }
7794
7795 case R_ARM_ALU_PCREL7_0:
7796 case R_ARM_ALU_PCREL15_8:
7797 case R_ARM_ALU_PCREL23_15:
7798 {
7799 bfd_vma insn;
7800 bfd_vma relocation;
7801
7802 insn = bfd_get_32 (input_bfd, hit_data);
7803 if (globals->use_rel)
7804 {
7805 /* Extract the addend. */
7806 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7807 signed_addend = addend;
7808 }
7809 relocation = value + signed_addend;
7810
7811 relocation -= (input_section->output_section->vma
7812 + input_section->output_offset
7813 + rel->r_offset);
7814 insn = (insn & ~0xfff)
7815 | ((howto->bitpos << 7) & 0xf00)
7816 | ((relocation >> howto->bitpos) & 0xff);
7817 bfd_put_32 (input_bfd, value, hit_data);
7818 }
7819 return bfd_reloc_ok;
7820
7821 case R_ARM_GNU_VTINHERIT:
7822 case R_ARM_GNU_VTENTRY:
7823 return bfd_reloc_ok;
7824
7825 case R_ARM_GOTOFF32:
7826 /* Relocation is relative to the start of the
7827 global offset table. */
7828
7829 BFD_ASSERT (sgot != NULL);
7830 if (sgot == NULL)
7831 return bfd_reloc_notsupported;
7832
7833 /* If we are addressing a Thumb function, we need to adjust the
7834 address by one, so that attempts to call the function pointer will
7835 correctly interpret it as Thumb code. */
7836 if (sym_flags == STT_ARM_TFUNC)
7837 value += 1;
7838
7839 /* Note that sgot->output_offset is not involved in this
7840 calculation. We always want the start of .got. If we
7841 define _GLOBAL_OFFSET_TABLE in a different way, as is
7842 permitted by the ABI, we might have to change this
7843 calculation. */
7844 value -= sgot->output_section->vma;
7845 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7846 contents, rel->r_offset, value,
7847 rel->r_addend);
7848
7849 case R_ARM_GOTPC:
7850 /* Use global offset table as symbol value. */
7851 BFD_ASSERT (sgot != NULL);
7852
7853 if (sgot == NULL)
7854 return bfd_reloc_notsupported;
7855
7856 *unresolved_reloc_p = FALSE;
7857 value = sgot->output_section->vma;
7858 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7859 contents, rel->r_offset, value,
7860 rel->r_addend);
7861
7862 case R_ARM_GOT32:
7863 case R_ARM_GOT_PREL:
7864 /* Relocation is to the entry for this symbol in the
7865 global offset table. */
7866 if (sgot == NULL)
7867 return bfd_reloc_notsupported;
7868
7869 if (h != NULL)
7870 {
7871 bfd_vma off;
7872 bfd_boolean dyn;
7873
7874 off = h->got.offset;
7875 BFD_ASSERT (off != (bfd_vma) -1);
7876 dyn = globals->root.dynamic_sections_created;
7877
7878 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7879 || (info->shared
7880 && SYMBOL_REFERENCES_LOCAL (info, h))
7881 || (ELF_ST_VISIBILITY (h->other)
7882 && h->root.type == bfd_link_hash_undefweak))
7883 {
7884 /* This is actually a static link, or it is a -Bsymbolic link
7885 and the symbol is defined locally. We must initialize this
7886 entry in the global offset table. Since the offset must
7887 always be a multiple of 4, we use the least significant bit
7888 to record whether we have initialized it already.
7889
7890 When doing a dynamic link, we create a .rel(a).got relocation
7891 entry to initialize the value. This is done in the
7892 finish_dynamic_symbol routine. */
7893 if ((off & 1) != 0)
7894 off &= ~1;
7895 else
7896 {
7897 /* If we are addressing a Thumb function, we need to
7898 adjust the address by one, so that attempts to
7899 call the function pointer will correctly
7900 interpret it as Thumb code. */
7901 if (sym_flags == STT_ARM_TFUNC)
7902 value |= 1;
7903
7904 bfd_put_32 (output_bfd, value, sgot->contents + off);
7905 h->got.offset |= 1;
7906 }
7907 }
7908 else
7909 *unresolved_reloc_p = FALSE;
7910
7911 value = sgot->output_offset + off;
7912 }
7913 else
7914 {
7915 bfd_vma off;
7916
7917 BFD_ASSERT (local_got_offsets != NULL &&
7918 local_got_offsets[r_symndx] != (bfd_vma) -1);
7919
7920 off = local_got_offsets[r_symndx];
7921
7922 /* The offset must always be a multiple of 4. We use the
7923 least significant bit to record whether we have already
7924 generated the necessary reloc. */
7925 if ((off & 1) != 0)
7926 off &= ~1;
7927 else
7928 {
7929 /* If we are addressing a Thumb function, we need to
7930 adjust the address by one, so that attempts to
7931 call the function pointer will correctly
7932 interpret it as Thumb code. */
7933 if (sym_flags == STT_ARM_TFUNC)
7934 value |= 1;
7935
7936 if (globals->use_rel)
7937 bfd_put_32 (output_bfd, value, sgot->contents + off);
7938
7939 if (info->shared)
7940 {
7941 asection * srelgot;
7942 Elf_Internal_Rela outrel;
7943 bfd_byte *loc;
7944
7945 srelgot = (bfd_get_section_by_name
7946 (dynobj, RELOC_SECTION (globals, ".got")));
7947 BFD_ASSERT (srelgot != NULL);
7948
7949 outrel.r_addend = addend + value;
7950 outrel.r_offset = (sgot->output_section->vma
7951 + sgot->output_offset
7952 + off);
7953 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
7954 loc = srelgot->contents;
7955 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7956 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
7957 }
7958
7959 local_got_offsets[r_symndx] |= 1;
7960 }
7961
7962 value = sgot->output_offset + off;
7963 }
7964 if (r_type != R_ARM_GOT32)
7965 value += sgot->output_section->vma;
7966
7967 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7968 contents, rel->r_offset, value,
7969 rel->r_addend);
7970
7971 case R_ARM_TLS_LDO32:
7972 value = value - dtpoff_base (info);
7973
7974 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7975 contents, rel->r_offset, value,
7976 rel->r_addend);
7977
7978 case R_ARM_TLS_LDM32:
7979 {
7980 bfd_vma off;
7981
7982 if (globals->sgot == NULL)
7983 abort ();
7984
7985 off = globals->tls_ldm_got.offset;
7986
7987 if ((off & 1) != 0)
7988 off &= ~1;
7989 else
7990 {
7991 /* If we don't know the module number, create a relocation
7992 for it. */
7993 if (info->shared)
7994 {
7995 Elf_Internal_Rela outrel;
7996 bfd_byte *loc;
7997
7998 if (globals->srelgot == NULL)
7999 abort ();
8000
8001 outrel.r_addend = 0;
8002 outrel.r_offset = (globals->sgot->output_section->vma
8003 + globals->sgot->output_offset + off);
8004 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8005
8006 if (globals->use_rel)
8007 bfd_put_32 (output_bfd, outrel.r_addend,
8008 globals->sgot->contents + off);
8009
8010 loc = globals->srelgot->contents;
8011 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
8012 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
8013 }
8014 else
8015 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
8016
8017 globals->tls_ldm_got.offset |= 1;
8018 }
8019
8020 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
8021 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8022
8023 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8024 contents, rel->r_offset, value,
8025 rel->r_addend);
8026 }
8027
8028 case R_ARM_TLS_GD32:
8029 case R_ARM_TLS_IE32:
8030 {
8031 bfd_vma off;
8032 int indx;
8033 char tls_type;
8034
8035 if (globals->sgot == NULL)
8036 abort ();
8037
8038 indx = 0;
8039 if (h != NULL)
8040 {
8041 bfd_boolean dyn;
8042 dyn = globals->root.dynamic_sections_created;
8043 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8044 && (!info->shared
8045 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8046 {
8047 *unresolved_reloc_p = FALSE;
8048 indx = h->dynindx;
8049 }
8050 off = h->got.offset;
8051 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8052 }
8053 else
8054 {
8055 if (local_got_offsets == NULL)
8056 abort ();
8057 off = local_got_offsets[r_symndx];
8058 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8059 }
8060
8061 if (tls_type == GOT_UNKNOWN)
8062 abort ();
8063
8064 if ((off & 1) != 0)
8065 off &= ~1;
8066 else
8067 {
8068 bfd_boolean need_relocs = FALSE;
8069 Elf_Internal_Rela outrel;
8070 bfd_byte *loc = NULL;
8071 int cur_off = off;
8072
8073 /* The GOT entries have not been initialized yet. Do it
8074 now, and emit any relocations. If both an IE GOT and a
8075 GD GOT are necessary, we emit the GD first. */
8076
8077 if ((info->shared || indx != 0)
8078 && (h == NULL
8079 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8080 || h->root.type != bfd_link_hash_undefweak))
8081 {
8082 need_relocs = TRUE;
8083 if (globals->srelgot == NULL)
8084 abort ();
8085 loc = globals->srelgot->contents;
8086 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
8087 }
8088
8089 if (tls_type & GOT_TLS_GD)
8090 {
8091 if (need_relocs)
8092 {
8093 outrel.r_addend = 0;
8094 outrel.r_offset = (globals->sgot->output_section->vma
8095 + globals->sgot->output_offset
8096 + cur_off);
8097 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
8098
8099 if (globals->use_rel)
8100 bfd_put_32 (output_bfd, outrel.r_addend,
8101 globals->sgot->contents + cur_off);
8102
8103 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
8104 globals->srelgot->reloc_count++;
8105 loc += RELOC_SIZE (globals);
8106
8107 if (indx == 0)
8108 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8109 globals->sgot->contents + cur_off + 4);
8110 else
8111 {
8112 outrel.r_addend = 0;
8113 outrel.r_info = ELF32_R_INFO (indx,
8114 R_ARM_TLS_DTPOFF32);
8115 outrel.r_offset += 4;
8116
8117 if (globals->use_rel)
8118 bfd_put_32 (output_bfd, outrel.r_addend,
8119 globals->sgot->contents + cur_off + 4);
8120
8121
8122 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
8123 globals->srelgot->reloc_count++;
8124 loc += RELOC_SIZE (globals);
8125 }
8126 }
8127 else
8128 {
8129 /* If we are not emitting relocations for a
8130 general dynamic reference, then we must be in a
8131 static link or an executable link with the
8132 symbol binding locally. Mark it as belonging
8133 to module 1, the executable. */
8134 bfd_put_32 (output_bfd, 1,
8135 globals->sgot->contents + cur_off);
8136 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8137 globals->sgot->contents + cur_off + 4);
8138 }
8139
8140 cur_off += 8;
8141 }
8142
8143 if (tls_type & GOT_TLS_IE)
8144 {
8145 if (need_relocs)
8146 {
8147 if (indx == 0)
8148 outrel.r_addend = value - dtpoff_base (info);
8149 else
8150 outrel.r_addend = 0;
8151 outrel.r_offset = (globals->sgot->output_section->vma
8152 + globals->sgot->output_offset
8153 + cur_off);
8154 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8155
8156 if (globals->use_rel)
8157 bfd_put_32 (output_bfd, outrel.r_addend,
8158 globals->sgot->contents + cur_off);
8159
8160 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
8161 globals->srelgot->reloc_count++;
8162 loc += RELOC_SIZE (globals);
8163 }
8164 else
8165 bfd_put_32 (output_bfd, tpoff (info, value),
8166 globals->sgot->contents + cur_off);
8167 cur_off += 4;
8168 }
8169
8170 if (h != NULL)
8171 h->got.offset |= 1;
8172 else
8173 local_got_offsets[r_symndx] |= 1;
8174 }
8175
8176 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8177 off += 8;
8178 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
8179 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8180
8181 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8182 contents, rel->r_offset, value,
8183 rel->r_addend);
8184 }
8185
8186 case R_ARM_TLS_LE32:
8187 if (info->shared)
8188 {
8189 (*_bfd_error_handler)
8190 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8191 input_bfd, input_section,
8192 (long) rel->r_offset, howto->name);
8193 return (bfd_reloc_status_type) FALSE;
8194 }
8195 else
8196 value = tpoff (info, value);
8197
8198 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8199 contents, rel->r_offset, value,
8200 rel->r_addend);
8201
8202 case R_ARM_V4BX:
8203 if (globals->fix_v4bx)
8204 {
8205 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8206
8207 /* Ensure that we have a BX instruction. */
8208 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
8209
8210 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8211 {
8212 /* Branch to veneer. */
8213 bfd_vma glue_addr;
8214 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8215 glue_addr -= input_section->output_section->vma
8216 + input_section->output_offset
8217 + rel->r_offset + 8;
8218 insn = (insn & 0xf0000000) | 0x0a000000
8219 | ((glue_addr >> 2) & 0x00ffffff);
8220 }
8221 else
8222 {
8223 /* Preserve Rm (lowest four bits) and the condition code
8224 (highest four bits). Other bits encode MOV PC,Rm. */
8225 insn = (insn & 0xf000000f) | 0x01a0f000;
8226 }
8227
8228 bfd_put_32 (input_bfd, insn, hit_data);
8229 }
8230 return bfd_reloc_ok;
8231
8232 case R_ARM_MOVW_ABS_NC:
8233 case R_ARM_MOVT_ABS:
8234 case R_ARM_MOVW_PREL_NC:
8235 case R_ARM_MOVT_PREL:
8236 /* Until we properly support segment-base-relative addressing then
8237 we assume the segment base to be zero, as for the group relocations.
8238 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8239 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8240 case R_ARM_MOVW_BREL_NC:
8241 case R_ARM_MOVW_BREL:
8242 case R_ARM_MOVT_BREL:
8243 {
8244 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8245
8246 if (globals->use_rel)
8247 {
8248 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
8249 signed_addend = (addend ^ 0x8000) - 0x8000;
8250 }
8251
8252 value += signed_addend;
8253
8254 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8255 value -= (input_section->output_section->vma
8256 + input_section->output_offset + rel->r_offset);
8257
8258 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8259 return bfd_reloc_overflow;
8260
8261 if (sym_flags == STT_ARM_TFUNC)
8262 value |= 1;
8263
8264 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8265 || r_type == R_ARM_MOVT_BREL)
8266 value >>= 16;
8267
8268 insn &= 0xfff0f000;
8269 insn |= value & 0xfff;
8270 insn |= (value & 0xf000) << 4;
8271 bfd_put_32 (input_bfd, insn, hit_data);
8272 }
8273 return bfd_reloc_ok;
8274
8275 case R_ARM_THM_MOVW_ABS_NC:
8276 case R_ARM_THM_MOVT_ABS:
8277 case R_ARM_THM_MOVW_PREL_NC:
8278 case R_ARM_THM_MOVT_PREL:
8279 /* Until we properly support segment-base-relative addressing then
8280 we assume the segment base to be zero, as for the above relocations.
8281 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8282 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8283 as R_ARM_THM_MOVT_ABS. */
8284 case R_ARM_THM_MOVW_BREL_NC:
8285 case R_ARM_THM_MOVW_BREL:
8286 case R_ARM_THM_MOVT_BREL:
8287 {
8288 bfd_vma insn;
8289
8290 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8291 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8292
8293 if (globals->use_rel)
8294 {
8295 addend = ((insn >> 4) & 0xf000)
8296 | ((insn >> 15) & 0x0800)
8297 | ((insn >> 4) & 0x0700)
8298 | (insn & 0x00ff);
8299 signed_addend = (addend ^ 0x8000) - 0x8000;
8300 }
8301
8302 value += signed_addend;
8303
8304 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8305 value -= (input_section->output_section->vma
8306 + input_section->output_offset + rel->r_offset);
8307
8308 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8309 return bfd_reloc_overflow;
8310
8311 if (sym_flags == STT_ARM_TFUNC)
8312 value |= 1;
8313
8314 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8315 || r_type == R_ARM_THM_MOVT_BREL)
8316 value >>= 16;
8317
8318 insn &= 0xfbf08f00;
8319 insn |= (value & 0xf000) << 4;
8320 insn |= (value & 0x0800) << 15;
8321 insn |= (value & 0x0700) << 4;
8322 insn |= (value & 0x00ff);
8323
8324 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8325 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8326 }
8327 return bfd_reloc_ok;
8328
8329 case R_ARM_ALU_PC_G0_NC:
8330 case R_ARM_ALU_PC_G1_NC:
8331 case R_ARM_ALU_PC_G0:
8332 case R_ARM_ALU_PC_G1:
8333 case R_ARM_ALU_PC_G2:
8334 case R_ARM_ALU_SB_G0_NC:
8335 case R_ARM_ALU_SB_G1_NC:
8336 case R_ARM_ALU_SB_G0:
8337 case R_ARM_ALU_SB_G1:
8338 case R_ARM_ALU_SB_G2:
8339 {
8340 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8341 bfd_vma pc = input_section->output_section->vma
8342 + input_section->output_offset + rel->r_offset;
8343 /* sb should be the origin of the *segment* containing the symbol.
8344 It is not clear how to obtain this OS-dependent value, so we
8345 make an arbitrary choice of zero. */
8346 bfd_vma sb = 0;
8347 bfd_vma residual;
8348 bfd_vma g_n;
8349 bfd_signed_vma signed_value;
8350 int group = 0;
8351
8352 /* Determine which group of bits to select. */
8353 switch (r_type)
8354 {
8355 case R_ARM_ALU_PC_G0_NC:
8356 case R_ARM_ALU_PC_G0:
8357 case R_ARM_ALU_SB_G0_NC:
8358 case R_ARM_ALU_SB_G0:
8359 group = 0;
8360 break;
8361
8362 case R_ARM_ALU_PC_G1_NC:
8363 case R_ARM_ALU_PC_G1:
8364 case R_ARM_ALU_SB_G1_NC:
8365 case R_ARM_ALU_SB_G1:
8366 group = 1;
8367 break;
8368
8369 case R_ARM_ALU_PC_G2:
8370 case R_ARM_ALU_SB_G2:
8371 group = 2;
8372 break;
8373
8374 default:
8375 abort ();
8376 }
8377
8378 /* If REL, extract the addend from the insn. If RELA, it will
8379 have already been fetched for us. */
8380 if (globals->use_rel)
8381 {
8382 int negative;
8383 bfd_vma constant = insn & 0xff;
8384 bfd_vma rotation = (insn & 0xf00) >> 8;
8385
8386 if (rotation == 0)
8387 signed_addend = constant;
8388 else
8389 {
8390 /* Compensate for the fact that in the instruction, the
8391 rotation is stored in multiples of 2 bits. */
8392 rotation *= 2;
8393
8394 /* Rotate "constant" right by "rotation" bits. */
8395 signed_addend = (constant >> rotation) |
8396 (constant << (8 * sizeof (bfd_vma) - rotation));
8397 }
8398
8399 /* Determine if the instruction is an ADD or a SUB.
8400 (For REL, this determines the sign of the addend.) */
8401 negative = identify_add_or_sub (insn);
8402 if (negative == 0)
8403 {
8404 (*_bfd_error_handler)
8405 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8406 input_bfd, input_section,
8407 (long) rel->r_offset, howto->name);
8408 return bfd_reloc_overflow;
8409 }
8410
8411 signed_addend *= negative;
8412 }
8413
8414 /* Compute the value (X) to go in the place. */
8415 if (r_type == R_ARM_ALU_PC_G0_NC
8416 || r_type == R_ARM_ALU_PC_G1_NC
8417 || r_type == R_ARM_ALU_PC_G0
8418 || r_type == R_ARM_ALU_PC_G1
8419 || r_type == R_ARM_ALU_PC_G2)
8420 /* PC relative. */
8421 signed_value = value - pc + signed_addend;
8422 else
8423 /* Section base relative. */
8424 signed_value = value - sb + signed_addend;
8425
8426 /* If the target symbol is a Thumb function, then set the
8427 Thumb bit in the address. */
8428 if (sym_flags == STT_ARM_TFUNC)
8429 signed_value |= 1;
8430
8431 /* Calculate the value of the relevant G_n, in encoded
8432 constant-with-rotation format. */
8433 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8434 &residual);
8435
8436 /* Check for overflow if required. */
8437 if ((r_type == R_ARM_ALU_PC_G0
8438 || r_type == R_ARM_ALU_PC_G1
8439 || r_type == R_ARM_ALU_PC_G2
8440 || r_type == R_ARM_ALU_SB_G0
8441 || r_type == R_ARM_ALU_SB_G1
8442 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8443 {
8444 (*_bfd_error_handler)
8445 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8446 input_bfd, input_section,
8447 (long) rel->r_offset, abs (signed_value), howto->name);
8448 return bfd_reloc_overflow;
8449 }
8450
8451 /* Mask out the value and the ADD/SUB part of the opcode; take care
8452 not to destroy the S bit. */
8453 insn &= 0xff1ff000;
8454
8455 /* Set the opcode according to whether the value to go in the
8456 place is negative. */
8457 if (signed_value < 0)
8458 insn |= 1 << 22;
8459 else
8460 insn |= 1 << 23;
8461
8462 /* Encode the offset. */
8463 insn |= g_n;
8464
8465 bfd_put_32 (input_bfd, insn, hit_data);
8466 }
8467 return bfd_reloc_ok;
8468
8469 case R_ARM_LDR_PC_G0:
8470 case R_ARM_LDR_PC_G1:
8471 case R_ARM_LDR_PC_G2:
8472 case R_ARM_LDR_SB_G0:
8473 case R_ARM_LDR_SB_G1:
8474 case R_ARM_LDR_SB_G2:
8475 {
8476 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8477 bfd_vma pc = input_section->output_section->vma
8478 + input_section->output_offset + rel->r_offset;
8479 bfd_vma sb = 0; /* See note above. */
8480 bfd_vma residual;
8481 bfd_signed_vma signed_value;
8482 int group = 0;
8483
8484 /* Determine which groups of bits to calculate. */
8485 switch (r_type)
8486 {
8487 case R_ARM_LDR_PC_G0:
8488 case R_ARM_LDR_SB_G0:
8489 group = 0;
8490 break;
8491
8492 case R_ARM_LDR_PC_G1:
8493 case R_ARM_LDR_SB_G1:
8494 group = 1;
8495 break;
8496
8497 case R_ARM_LDR_PC_G2:
8498 case R_ARM_LDR_SB_G2:
8499 group = 2;
8500 break;
8501
8502 default:
8503 abort ();
8504 }
8505
8506 /* If REL, extract the addend from the insn. If RELA, it will
8507 have already been fetched for us. */
8508 if (globals->use_rel)
8509 {
8510 int negative = (insn & (1 << 23)) ? 1 : -1;
8511 signed_addend = negative * (insn & 0xfff);
8512 }
8513
8514 /* Compute the value (X) to go in the place. */
8515 if (r_type == R_ARM_LDR_PC_G0
8516 || r_type == R_ARM_LDR_PC_G1
8517 || r_type == R_ARM_LDR_PC_G2)
8518 /* PC relative. */
8519 signed_value = value - pc + signed_addend;
8520 else
8521 /* Section base relative. */
8522 signed_value = value - sb + signed_addend;
8523
8524 /* Calculate the value of the relevant G_{n-1} to obtain
8525 the residual at that stage. */
8526 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8527
8528 /* Check for overflow. */
8529 if (residual >= 0x1000)
8530 {
8531 (*_bfd_error_handler)
8532 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8533 input_bfd, input_section,
8534 (long) rel->r_offset, abs (signed_value), howto->name);
8535 return bfd_reloc_overflow;
8536 }
8537
8538 /* Mask out the value and U bit. */
8539 insn &= 0xff7ff000;
8540
8541 /* Set the U bit if the value to go in the place is non-negative. */
8542 if (signed_value >= 0)
8543 insn |= 1 << 23;
8544
8545 /* Encode the offset. */
8546 insn |= residual;
8547
8548 bfd_put_32 (input_bfd, insn, hit_data);
8549 }
8550 return bfd_reloc_ok;
8551
8552 case R_ARM_LDRS_PC_G0:
8553 case R_ARM_LDRS_PC_G1:
8554 case R_ARM_LDRS_PC_G2:
8555 case R_ARM_LDRS_SB_G0:
8556 case R_ARM_LDRS_SB_G1:
8557 case R_ARM_LDRS_SB_G2:
8558 {
8559 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8560 bfd_vma pc = input_section->output_section->vma
8561 + input_section->output_offset + rel->r_offset;
8562 bfd_vma sb = 0; /* See note above. */
8563 bfd_vma residual;
8564 bfd_signed_vma signed_value;
8565 int group = 0;
8566
8567 /* Determine which groups of bits to calculate. */
8568 switch (r_type)
8569 {
8570 case R_ARM_LDRS_PC_G0:
8571 case R_ARM_LDRS_SB_G0:
8572 group = 0;
8573 break;
8574
8575 case R_ARM_LDRS_PC_G1:
8576 case R_ARM_LDRS_SB_G1:
8577 group = 1;
8578 break;
8579
8580 case R_ARM_LDRS_PC_G2:
8581 case R_ARM_LDRS_SB_G2:
8582 group = 2;
8583 break;
8584
8585 default:
8586 abort ();
8587 }
8588
8589 /* If REL, extract the addend from the insn. If RELA, it will
8590 have already been fetched for us. */
8591 if (globals->use_rel)
8592 {
8593 int negative = (insn & (1 << 23)) ? 1 : -1;
8594 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8595 }
8596
8597 /* Compute the value (X) to go in the place. */
8598 if (r_type == R_ARM_LDRS_PC_G0
8599 || r_type == R_ARM_LDRS_PC_G1
8600 || r_type == R_ARM_LDRS_PC_G2)
8601 /* PC relative. */
8602 signed_value = value - pc + signed_addend;
8603 else
8604 /* Section base relative. */
8605 signed_value = value - sb + signed_addend;
8606
8607 /* Calculate the value of the relevant G_{n-1} to obtain
8608 the residual at that stage. */
8609 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8610
8611 /* Check for overflow. */
8612 if (residual >= 0x100)
8613 {
8614 (*_bfd_error_handler)
8615 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8616 input_bfd, input_section,
8617 (long) rel->r_offset, abs (signed_value), howto->name);
8618 return bfd_reloc_overflow;
8619 }
8620
8621 /* Mask out the value and U bit. */
8622 insn &= 0xff7ff0f0;
8623
8624 /* Set the U bit if the value to go in the place is non-negative. */
8625 if (signed_value >= 0)
8626 insn |= 1 << 23;
8627
8628 /* Encode the offset. */
8629 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8630
8631 bfd_put_32 (input_bfd, insn, hit_data);
8632 }
8633 return bfd_reloc_ok;
8634
8635 case R_ARM_LDC_PC_G0:
8636 case R_ARM_LDC_PC_G1:
8637 case R_ARM_LDC_PC_G2:
8638 case R_ARM_LDC_SB_G0:
8639 case R_ARM_LDC_SB_G1:
8640 case R_ARM_LDC_SB_G2:
8641 {
8642 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8643 bfd_vma pc = input_section->output_section->vma
8644 + input_section->output_offset + rel->r_offset;
8645 bfd_vma sb = 0; /* See note above. */
8646 bfd_vma residual;
8647 bfd_signed_vma signed_value;
8648 int group = 0;
8649
8650 /* Determine which groups of bits to calculate. */
8651 switch (r_type)
8652 {
8653 case R_ARM_LDC_PC_G0:
8654 case R_ARM_LDC_SB_G0:
8655 group = 0;
8656 break;
8657
8658 case R_ARM_LDC_PC_G1:
8659 case R_ARM_LDC_SB_G1:
8660 group = 1;
8661 break;
8662
8663 case R_ARM_LDC_PC_G2:
8664 case R_ARM_LDC_SB_G2:
8665 group = 2;
8666 break;
8667
8668 default:
8669 abort ();
8670 }
8671
8672 /* If REL, extract the addend from the insn. If RELA, it will
8673 have already been fetched for us. */
8674 if (globals->use_rel)
8675 {
8676 int negative = (insn & (1 << 23)) ? 1 : -1;
8677 signed_addend = negative * ((insn & 0xff) << 2);
8678 }
8679
8680 /* Compute the value (X) to go in the place. */
8681 if (r_type == R_ARM_LDC_PC_G0
8682 || r_type == R_ARM_LDC_PC_G1
8683 || r_type == R_ARM_LDC_PC_G2)
8684 /* PC relative. */
8685 signed_value = value - pc + signed_addend;
8686 else
8687 /* Section base relative. */
8688 signed_value = value - sb + signed_addend;
8689
8690 /* Calculate the value of the relevant G_{n-1} to obtain
8691 the residual at that stage. */
8692 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8693
8694 /* Check for overflow. (The absolute value to go in the place must be
8695 divisible by four and, after having been divided by four, must
8696 fit in eight bits.) */
8697 if ((residual & 0x3) != 0 || residual >= 0x400)
8698 {
8699 (*_bfd_error_handler)
8700 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8701 input_bfd, input_section,
8702 (long) rel->r_offset, abs (signed_value), howto->name);
8703 return bfd_reloc_overflow;
8704 }
8705
8706 /* Mask out the value and U bit. */
8707 insn &= 0xff7fff00;
8708
8709 /* Set the U bit if the value to go in the place is non-negative. */
8710 if (signed_value >= 0)
8711 insn |= 1 << 23;
8712
8713 /* Encode the offset. */
8714 insn |= residual >> 2;
8715
8716 bfd_put_32 (input_bfd, insn, hit_data);
8717 }
8718 return bfd_reloc_ok;
8719
8720 default:
8721 return bfd_reloc_notsupported;
8722 }
8723 }
8724
8725 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8726 static void
8727 arm_add_to_rel (bfd * abfd,
8728 bfd_byte * address,
8729 reloc_howto_type * howto,
8730 bfd_signed_vma increment)
8731 {
8732 bfd_signed_vma addend;
8733
8734 if (howto->type == R_ARM_THM_CALL
8735 || howto->type == R_ARM_THM_JUMP24)
8736 {
8737 int upper_insn, lower_insn;
8738 int upper, lower;
8739
8740 upper_insn = bfd_get_16 (abfd, address);
8741 lower_insn = bfd_get_16 (abfd, address + 2);
8742 upper = upper_insn & 0x7ff;
8743 lower = lower_insn & 0x7ff;
8744
8745 addend = (upper << 12) | (lower << 1);
8746 addend += increment;
8747 addend >>= 1;
8748
8749 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8750 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8751
8752 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8753 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
8754 }
8755 else
8756 {
8757 bfd_vma contents;
8758
8759 contents = bfd_get_32 (abfd, address);
8760
8761 /* Get the (signed) value from the instruction. */
8762 addend = contents & howto->src_mask;
8763 if (addend & ((howto->src_mask + 1) >> 1))
8764 {
8765 bfd_signed_vma mask;
8766
8767 mask = -1;
8768 mask &= ~ howto->src_mask;
8769 addend |= mask;
8770 }
8771
8772 /* Add in the increment, (which is a byte value). */
8773 switch (howto->type)
8774 {
8775 default:
8776 addend += increment;
8777 break;
8778
8779 case R_ARM_PC24:
8780 case R_ARM_PLT32:
8781 case R_ARM_CALL:
8782 case R_ARM_JUMP24:
8783 addend <<= howto->size;
8784 addend += increment;
8785
8786 /* Should we check for overflow here ? */
8787
8788 /* Drop any undesired bits. */
8789 addend >>= howto->rightshift;
8790 break;
8791 }
8792
8793 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8794
8795 bfd_put_32 (abfd, contents, address);
8796 }
8797 }
8798
8799 #define IS_ARM_TLS_RELOC(R_TYPE) \
8800 ((R_TYPE) == R_ARM_TLS_GD32 \
8801 || (R_TYPE) == R_ARM_TLS_LDO32 \
8802 || (R_TYPE) == R_ARM_TLS_LDM32 \
8803 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8804 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8805 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8806 || (R_TYPE) == R_ARM_TLS_LE32 \
8807 || (R_TYPE) == R_ARM_TLS_IE32)
8808
8809 /* Relocate an ARM ELF section. */
8810
8811 static bfd_boolean
8812 elf32_arm_relocate_section (bfd * output_bfd,
8813 struct bfd_link_info * info,
8814 bfd * input_bfd,
8815 asection * input_section,
8816 bfd_byte * contents,
8817 Elf_Internal_Rela * relocs,
8818 Elf_Internal_Sym * local_syms,
8819 asection ** local_sections)
8820 {
8821 Elf_Internal_Shdr *symtab_hdr;
8822 struct elf_link_hash_entry **sym_hashes;
8823 Elf_Internal_Rela *rel;
8824 Elf_Internal_Rela *relend;
8825 const char *name;
8826 struct elf32_arm_link_hash_table * globals;
8827
8828 globals = elf32_arm_hash_table (info);
8829 if (globals == NULL)
8830 return FALSE;
8831
8832 symtab_hdr = & elf_symtab_hdr (input_bfd);
8833 sym_hashes = elf_sym_hashes (input_bfd);
8834
8835 rel = relocs;
8836 relend = relocs + input_section->reloc_count;
8837 for (; rel < relend; rel++)
8838 {
8839 int r_type;
8840 reloc_howto_type * howto;
8841 unsigned long r_symndx;
8842 Elf_Internal_Sym * sym;
8843 asection * sec;
8844 struct elf_link_hash_entry * h;
8845 bfd_vma relocation;
8846 bfd_reloc_status_type r;
8847 arelent bfd_reloc;
8848 char sym_type;
8849 bfd_boolean unresolved_reloc = FALSE;
8850 char *error_message = NULL;
8851
8852 r_symndx = ELF32_R_SYM (rel->r_info);
8853 r_type = ELF32_R_TYPE (rel->r_info);
8854 r_type = arm_real_reloc_type (globals, r_type);
8855
8856 if ( r_type == R_ARM_GNU_VTENTRY
8857 || r_type == R_ARM_GNU_VTINHERIT)
8858 continue;
8859
8860 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
8861 howto = bfd_reloc.howto;
8862
8863 h = NULL;
8864 sym = NULL;
8865 sec = NULL;
8866
8867 if (r_symndx < symtab_hdr->sh_info)
8868 {
8869 sym = local_syms + r_symndx;
8870 sym_type = ELF32_ST_TYPE (sym->st_info);
8871 sec = local_sections[r_symndx];
8872
8873 /* An object file might have a reference to a local
8874 undefined symbol. This is a daft object file, but we
8875 should at least do something about it. V4BX & NONE
8876 relocations do not use the symbol and are explicitly
8877 allowed to use the undefined symbol, so allow those. */
8878 if (r_type != R_ARM_V4BX
8879 && r_type != R_ARM_NONE
8880 && bfd_is_und_section (sec)
8881 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8882 {
8883 if (!info->callbacks->undefined_symbol
8884 (info, bfd_elf_string_from_elf_section
8885 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8886 input_bfd, input_section,
8887 rel->r_offset, TRUE))
8888 return FALSE;
8889 }
8890
8891 if (globals->use_rel)
8892 {
8893 relocation = (sec->output_section->vma
8894 + sec->output_offset
8895 + sym->st_value);
8896 if (!info->relocatable
8897 && (sec->flags & SEC_MERGE)
8898 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8899 {
8900 asection *msec;
8901 bfd_vma addend, value;
8902
8903 switch (r_type)
8904 {
8905 case R_ARM_MOVW_ABS_NC:
8906 case R_ARM_MOVT_ABS:
8907 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8908 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8909 addend = (addend ^ 0x8000) - 0x8000;
8910 break;
8911
8912 case R_ARM_THM_MOVW_ABS_NC:
8913 case R_ARM_THM_MOVT_ABS:
8914 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8915 << 16;
8916 value |= bfd_get_16 (input_bfd,
8917 contents + rel->r_offset + 2);
8918 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8919 | ((value & 0x04000000) >> 15);
8920 addend = (addend ^ 0x8000) - 0x8000;
8921 break;
8922
8923 default:
8924 if (howto->rightshift
8925 || (howto->src_mask & (howto->src_mask + 1)))
8926 {
8927 (*_bfd_error_handler)
8928 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8929 input_bfd, input_section,
8930 (long) rel->r_offset, howto->name);
8931 return FALSE;
8932 }
8933
8934 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8935
8936 /* Get the (signed) value from the instruction. */
8937 addend = value & howto->src_mask;
8938 if (addend & ((howto->src_mask + 1) >> 1))
8939 {
8940 bfd_signed_vma mask;
8941
8942 mask = -1;
8943 mask &= ~ howto->src_mask;
8944 addend |= mask;
8945 }
8946 break;
8947 }
8948
8949 msec = sec;
8950 addend =
8951 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8952 - relocation;
8953 addend += msec->output_section->vma + msec->output_offset;
8954
8955 /* Cases here must match those in the preceeding
8956 switch statement. */
8957 switch (r_type)
8958 {
8959 case R_ARM_MOVW_ABS_NC:
8960 case R_ARM_MOVT_ABS:
8961 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8962 | (addend & 0xfff);
8963 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8964 break;
8965
8966 case R_ARM_THM_MOVW_ABS_NC:
8967 case R_ARM_THM_MOVT_ABS:
8968 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8969 | (addend & 0xff) | ((addend & 0x0800) << 15);
8970 bfd_put_16 (input_bfd, value >> 16,
8971 contents + rel->r_offset);
8972 bfd_put_16 (input_bfd, value,
8973 contents + rel->r_offset + 2);
8974 break;
8975
8976 default:
8977 value = (value & ~ howto->dst_mask)
8978 | (addend & howto->dst_mask);
8979 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8980 break;
8981 }
8982 }
8983 }
8984 else
8985 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
8986 }
8987 else
8988 {
8989 bfd_boolean warned;
8990
8991 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8992 r_symndx, symtab_hdr, sym_hashes,
8993 h, sec, relocation,
8994 unresolved_reloc, warned);
8995
8996 sym_type = h->type;
8997 }
8998
8999 if (sec != NULL && elf_discarded_section (sec))
9000 {
9001 /* For relocs against symbols from removed linkonce sections,
9002 or sections discarded by a linker script, we just want the
9003 section contents zeroed. Avoid any special processing. */
9004 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
9005 rel->r_info = 0;
9006 rel->r_addend = 0;
9007 continue;
9008 }
9009
9010 if (info->relocatable)
9011 {
9012 /* This is a relocatable link. We don't have to change
9013 anything, unless the reloc is against a section symbol,
9014 in which case we have to adjust according to where the
9015 section symbol winds up in the output section. */
9016 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9017 {
9018 if (globals->use_rel)
9019 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9020 howto, (bfd_signed_vma) sec->output_offset);
9021 else
9022 rel->r_addend += sec->output_offset;
9023 }
9024 continue;
9025 }
9026
9027 if (h != NULL)
9028 name = h->root.root.string;
9029 else
9030 {
9031 name = (bfd_elf_string_from_elf_section
9032 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9033 if (name == NULL || *name == '\0')
9034 name = bfd_section_name (input_bfd, sec);
9035 }
9036
9037 if (r_symndx != 0
9038 && r_type != R_ARM_NONE
9039 && (h == NULL
9040 || h->root.type == bfd_link_hash_defined
9041 || h->root.type == bfd_link_hash_defweak)
9042 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9043 {
9044 (*_bfd_error_handler)
9045 ((sym_type == STT_TLS
9046 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9047 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9048 input_bfd,
9049 input_section,
9050 (long) rel->r_offset,
9051 howto->name,
9052 name);
9053 }
9054
9055 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9056 input_section, contents, rel,
9057 relocation, info, sec, name,
9058 (h ? ELF_ST_TYPE (h->type) :
9059 ELF_ST_TYPE (sym->st_info)), h,
9060 &unresolved_reloc, &error_message);
9061
9062 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9063 because such sections are not SEC_ALLOC and thus ld.so will
9064 not process them. */
9065 if (unresolved_reloc
9066 && !((input_section->flags & SEC_DEBUGGING) != 0
9067 && h->def_dynamic))
9068 {
9069 (*_bfd_error_handler)
9070 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9071 input_bfd,
9072 input_section,
9073 (long) rel->r_offset,
9074 howto->name,
9075 h->root.root.string);
9076 return FALSE;
9077 }
9078
9079 if (r != bfd_reloc_ok)
9080 {
9081 switch (r)
9082 {
9083 case bfd_reloc_overflow:
9084 /* If the overflowing reloc was to an undefined symbol,
9085 we have already printed one error message and there
9086 is no point complaining again. */
9087 if ((! h ||
9088 h->root.type != bfd_link_hash_undefined)
9089 && (!((*info->callbacks->reloc_overflow)
9090 (info, (h ? &h->root : NULL), name, howto->name,
9091 (bfd_vma) 0, input_bfd, input_section,
9092 rel->r_offset))))
9093 return FALSE;
9094 break;
9095
9096 case bfd_reloc_undefined:
9097 if (!((*info->callbacks->undefined_symbol)
9098 (info, name, input_bfd, input_section,
9099 rel->r_offset, TRUE)))
9100 return FALSE;
9101 break;
9102
9103 case bfd_reloc_outofrange:
9104 error_message = _("out of range");
9105 goto common_error;
9106
9107 case bfd_reloc_notsupported:
9108 error_message = _("unsupported relocation");
9109 goto common_error;
9110
9111 case bfd_reloc_dangerous:
9112 /* error_message should already be set. */
9113 goto common_error;
9114
9115 default:
9116 error_message = _("unknown error");
9117 /* Fall through. */
9118
9119 common_error:
9120 BFD_ASSERT (error_message != NULL);
9121 if (!((*info->callbacks->reloc_dangerous)
9122 (info, error_message, input_bfd, input_section,
9123 rel->r_offset)))
9124 return FALSE;
9125 break;
9126 }
9127 }
9128 }
9129
9130 return TRUE;
9131 }
9132
9133 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
9134 adds the edit to the start of the list. (The list must be built in order of
9135 ascending TINDEX: the function's callers are primarily responsible for
9136 maintaining that condition). */
9137
9138 static void
9139 add_unwind_table_edit (arm_unwind_table_edit **head,
9140 arm_unwind_table_edit **tail,
9141 arm_unwind_edit_type type,
9142 asection *linked_section,
9143 unsigned int tindex)
9144 {
9145 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9146 xmalloc (sizeof (arm_unwind_table_edit));
9147
9148 new_edit->type = type;
9149 new_edit->linked_section = linked_section;
9150 new_edit->index = tindex;
9151
9152 if (tindex > 0)
9153 {
9154 new_edit->next = NULL;
9155
9156 if (*tail)
9157 (*tail)->next = new_edit;
9158
9159 (*tail) = new_edit;
9160
9161 if (!*head)
9162 (*head) = new_edit;
9163 }
9164 else
9165 {
9166 new_edit->next = *head;
9167
9168 if (!*tail)
9169 *tail = new_edit;
9170
9171 *head = new_edit;
9172 }
9173 }
9174
9175 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9176
9177 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9178 static void
9179 adjust_exidx_size(asection *exidx_sec, int adjust)
9180 {
9181 asection *out_sec;
9182
9183 if (!exidx_sec->rawsize)
9184 exidx_sec->rawsize = exidx_sec->size;
9185
9186 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9187 out_sec = exidx_sec->output_section;
9188 /* Adjust size of output section. */
9189 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9190 }
9191
9192 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9193 static void
9194 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9195 {
9196 struct _arm_elf_section_data *exidx_arm_data;
9197
9198 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9199 add_unwind_table_edit (
9200 &exidx_arm_data->u.exidx.unwind_edit_list,
9201 &exidx_arm_data->u.exidx.unwind_edit_tail,
9202 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9203
9204 adjust_exidx_size(exidx_sec, 8);
9205 }
9206
9207 /* Scan .ARM.exidx tables, and create a list describing edits which should be
9208 made to those tables, such that:
9209
9210 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9211 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9212 codes which have been inlined into the index).
9213
9214 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9215
9216 The edits are applied when the tables are written
9217 (in elf32_arm_write_section).
9218 */
9219
9220 bfd_boolean
9221 elf32_arm_fix_exidx_coverage (asection **text_section_order,
9222 unsigned int num_text_sections,
9223 struct bfd_link_info *info,
9224 bfd_boolean merge_exidx_entries)
9225 {
9226 bfd *inp;
9227 unsigned int last_second_word = 0, i;
9228 asection *last_exidx_sec = NULL;
9229 asection *last_text_sec = NULL;
9230 int last_unwind_type = -1;
9231
9232 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9233 text sections. */
9234 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9235 {
9236 asection *sec;
9237
9238 for (sec = inp->sections; sec != NULL; sec = sec->next)
9239 {
9240 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9241 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9242
9243 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
9244 continue;
9245
9246 if (elf_sec->linked_to)
9247 {
9248 Elf_Internal_Shdr *linked_hdr
9249 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9250 struct _arm_elf_section_data *linked_sec_arm_data
9251 = get_arm_elf_section_data (linked_hdr->bfd_section);
9252
9253 if (linked_sec_arm_data == NULL)
9254 continue;
9255
9256 /* Link this .ARM.exidx section back from the text section it
9257 describes. */
9258 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9259 }
9260 }
9261 }
9262
9263 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9264 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9265 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
9266
9267 for (i = 0; i < num_text_sections; i++)
9268 {
9269 asection *sec = text_section_order[i];
9270 asection *exidx_sec;
9271 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9272 struct _arm_elf_section_data *exidx_arm_data;
9273 bfd_byte *contents = NULL;
9274 int deleted_exidx_bytes = 0;
9275 bfd_vma j;
9276 arm_unwind_table_edit *unwind_edit_head = NULL;
9277 arm_unwind_table_edit *unwind_edit_tail = NULL;
9278 Elf_Internal_Shdr *hdr;
9279 bfd *ibfd;
9280
9281 if (arm_data == NULL)
9282 continue;
9283
9284 exidx_sec = arm_data->u.text.arm_exidx_sec;
9285 if (exidx_sec == NULL)
9286 {
9287 /* Section has no unwind data. */
9288 if (last_unwind_type == 0 || !last_exidx_sec)
9289 continue;
9290
9291 /* Ignore zero sized sections. */
9292 if (sec->size == 0)
9293 continue;
9294
9295 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9296 last_unwind_type = 0;
9297 continue;
9298 }
9299
9300 /* Skip /DISCARD/ sections. */
9301 if (bfd_is_abs_section (exidx_sec->output_section))
9302 continue;
9303
9304 hdr = &elf_section_data (exidx_sec)->this_hdr;
9305 if (hdr->sh_type != SHT_ARM_EXIDX)
9306 continue;
9307
9308 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9309 if (exidx_arm_data == NULL)
9310 continue;
9311
9312 ibfd = exidx_sec->owner;
9313
9314 if (hdr->contents != NULL)
9315 contents = hdr->contents;
9316 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9317 /* An error? */
9318 continue;
9319
9320 for (j = 0; j < hdr->sh_size; j += 8)
9321 {
9322 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9323 int unwind_type;
9324 int elide = 0;
9325
9326 /* An EXIDX_CANTUNWIND entry. */
9327 if (second_word == 1)
9328 {
9329 if (last_unwind_type == 0)
9330 elide = 1;
9331 unwind_type = 0;
9332 }
9333 /* Inlined unwinding data. Merge if equal to previous. */
9334 else if ((second_word & 0x80000000) != 0)
9335 {
9336 if (merge_exidx_entries
9337 && last_second_word == second_word && last_unwind_type == 1)
9338 elide = 1;
9339 unwind_type = 1;
9340 last_second_word = second_word;
9341 }
9342 /* Normal table entry. In theory we could merge these too,
9343 but duplicate entries are likely to be much less common. */
9344 else
9345 unwind_type = 2;
9346
9347 if (elide)
9348 {
9349 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9350 DELETE_EXIDX_ENTRY, NULL, j / 8);
9351
9352 deleted_exidx_bytes += 8;
9353 }
9354
9355 last_unwind_type = unwind_type;
9356 }
9357
9358 /* Free contents if we allocated it ourselves. */
9359 if (contents != hdr->contents)
9360 free (contents);
9361
9362 /* Record edits to be applied later (in elf32_arm_write_section). */
9363 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9364 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9365
9366 if (deleted_exidx_bytes > 0)
9367 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9368
9369 last_exidx_sec = exidx_sec;
9370 last_text_sec = sec;
9371 }
9372
9373 /* Add terminating CANTUNWIND entry. */
9374 if (last_exidx_sec && last_unwind_type != 0)
9375 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9376
9377 return TRUE;
9378 }
9379
9380 static bfd_boolean
9381 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9382 bfd *ibfd, const char *name)
9383 {
9384 asection *sec, *osec;
9385
9386 sec = bfd_get_section_by_name (ibfd, name);
9387 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9388 return TRUE;
9389
9390 osec = sec->output_section;
9391 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9392 return TRUE;
9393
9394 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9395 sec->output_offset, sec->size))
9396 return FALSE;
9397
9398 return TRUE;
9399 }
9400
9401 static bfd_boolean
9402 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9403 {
9404 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9405 asection *sec, *osec;
9406
9407 if (globals == NULL)
9408 return FALSE;
9409
9410 /* Invoke the regular ELF backend linker to do all the work. */
9411 if (!bfd_elf_final_link (abfd, info))
9412 return FALSE;
9413
9414 /* Process stub sections (eg BE8 encoding, ...). */
9415 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9416 int i;
9417 for(i=0; i<htab->top_id; i++) {
9418 sec = htab->stub_group[i].stub_sec;
9419 if (sec) {
9420 osec = sec->output_section;
9421 elf32_arm_write_section (abfd, info, sec, sec->contents);
9422 if (! bfd_set_section_contents (abfd, osec, sec->contents,
9423 sec->output_offset, sec->size))
9424 return FALSE;
9425 }
9426 }
9427
9428 /* Write out any glue sections now that we have created all the
9429 stubs. */
9430 if (globals->bfd_of_glue_owner != NULL)
9431 {
9432 if (! elf32_arm_output_glue_section (info, abfd,
9433 globals->bfd_of_glue_owner,
9434 ARM2THUMB_GLUE_SECTION_NAME))
9435 return FALSE;
9436
9437 if (! elf32_arm_output_glue_section (info, abfd,
9438 globals->bfd_of_glue_owner,
9439 THUMB2ARM_GLUE_SECTION_NAME))
9440 return FALSE;
9441
9442 if (! elf32_arm_output_glue_section (info, abfd,
9443 globals->bfd_of_glue_owner,
9444 VFP11_ERRATUM_VENEER_SECTION_NAME))
9445 return FALSE;
9446
9447 if (! elf32_arm_output_glue_section (info, abfd,
9448 globals->bfd_of_glue_owner,
9449 ARM_BX_GLUE_SECTION_NAME))
9450 return FALSE;
9451 }
9452
9453 return TRUE;
9454 }
9455
9456 /* Set the right machine number. */
9457
9458 static bfd_boolean
9459 elf32_arm_object_p (bfd *abfd)
9460 {
9461 unsigned int mach;
9462
9463 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
9464
9465 if (mach != bfd_mach_arm_unknown)
9466 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9467
9468 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9469 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
9470
9471 else
9472 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9473
9474 return TRUE;
9475 }
9476
9477 /* Function to keep ARM specific flags in the ELF header. */
9478
9479 static bfd_boolean
9480 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
9481 {
9482 if (elf_flags_init (abfd)
9483 && elf_elfheader (abfd)->e_flags != flags)
9484 {
9485 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9486 {
9487 if (flags & EF_ARM_INTERWORK)
9488 (*_bfd_error_handler)
9489 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9490 abfd);
9491 else
9492 _bfd_error_handler
9493 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9494 abfd);
9495 }
9496 }
9497 else
9498 {
9499 elf_elfheader (abfd)->e_flags = flags;
9500 elf_flags_init (abfd) = TRUE;
9501 }
9502
9503 return TRUE;
9504 }
9505
9506 /* Copy backend specific data from one object module to another. */
9507
9508 static bfd_boolean
9509 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
9510 {
9511 flagword in_flags;
9512 flagword out_flags;
9513
9514 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
9515 return TRUE;
9516
9517 in_flags = elf_elfheader (ibfd)->e_flags;
9518 out_flags = elf_elfheader (obfd)->e_flags;
9519
9520 if (elf_flags_init (obfd)
9521 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9522 && in_flags != out_flags)
9523 {
9524 /* Cannot mix APCS26 and APCS32 code. */
9525 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
9526 return FALSE;
9527
9528 /* Cannot mix float APCS and non-float APCS code. */
9529 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
9530 return FALSE;
9531
9532 /* If the src and dest have different interworking flags
9533 then turn off the interworking bit. */
9534 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
9535 {
9536 if (out_flags & EF_ARM_INTERWORK)
9537 _bfd_error_handler
9538 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9539 obfd, ibfd);
9540
9541 in_flags &= ~EF_ARM_INTERWORK;
9542 }
9543
9544 /* Likewise for PIC, though don't warn for this case. */
9545 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9546 in_flags &= ~EF_ARM_PIC;
9547 }
9548
9549 elf_elfheader (obfd)->e_flags = in_flags;
9550 elf_flags_init (obfd) = TRUE;
9551
9552 /* Also copy the EI_OSABI field. */
9553 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9554 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9555
9556 /* Copy object attributes. */
9557 _bfd_elf_copy_obj_attributes (ibfd, obfd);
9558
9559 return TRUE;
9560 }
9561
9562 /* Values for Tag_ABI_PCS_R9_use. */
9563 enum
9564 {
9565 AEABI_R9_V6,
9566 AEABI_R9_SB,
9567 AEABI_R9_TLS,
9568 AEABI_R9_unused
9569 };
9570
9571 /* Values for Tag_ABI_PCS_RW_data. */
9572 enum
9573 {
9574 AEABI_PCS_RW_data_absolute,
9575 AEABI_PCS_RW_data_PCrel,
9576 AEABI_PCS_RW_data_SBrel,
9577 AEABI_PCS_RW_data_unused
9578 };
9579
9580 /* Values for Tag_ABI_enum_size. */
9581 enum
9582 {
9583 AEABI_enum_unused,
9584 AEABI_enum_short,
9585 AEABI_enum_wide,
9586 AEABI_enum_forced_wide
9587 };
9588
9589 /* Determine whether an object attribute tag takes an integer, a
9590 string or both. */
9591
9592 static int
9593 elf32_arm_obj_attrs_arg_type (int tag)
9594 {
9595 if (tag == Tag_compatibility)
9596 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
9597 else if (tag == Tag_nodefaults)
9598 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9599 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9600 return ATTR_TYPE_FLAG_STR_VAL;
9601 else if (tag < 32)
9602 return ATTR_TYPE_FLAG_INT_VAL;
9603 else
9604 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
9605 }
9606
9607 /* The ABI defines that Tag_conformance should be emitted first, and that
9608 Tag_nodefaults should be second (if either is defined). This sets those
9609 two positions, and bumps up the position of all the remaining tags to
9610 compensate. */
9611 static int
9612 elf32_arm_obj_attrs_order (int num)
9613 {
9614 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
9615 return Tag_conformance;
9616 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
9617 return Tag_nodefaults;
9618 if ((num - 2) < Tag_nodefaults)
9619 return num - 2;
9620 if ((num - 1) < Tag_conformance)
9621 return num - 1;
9622 return num;
9623 }
9624
9625 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
9626 Returns -1 if no architecture could be read. */
9627
9628 static int
9629 get_secondary_compatible_arch (bfd *abfd)
9630 {
9631 obj_attribute *attr =
9632 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9633
9634 /* Note: the tag and its argument below are uleb128 values, though
9635 currently-defined values fit in one byte for each. */
9636 if (attr->s
9637 && attr->s[0] == Tag_CPU_arch
9638 && (attr->s[1] & 128) != 128
9639 && attr->s[2] == 0)
9640 return attr->s[1];
9641
9642 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9643 return -1;
9644 }
9645
9646 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9647 The tag is removed if ARCH is -1. */
9648
9649 static void
9650 set_secondary_compatible_arch (bfd *abfd, int arch)
9651 {
9652 obj_attribute *attr =
9653 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9654
9655 if (arch == -1)
9656 {
9657 attr->s = NULL;
9658 return;
9659 }
9660
9661 /* Note: the tag and its argument below are uleb128 values, though
9662 currently-defined values fit in one byte for each. */
9663 if (!attr->s)
9664 attr->s = (char *) bfd_alloc (abfd, 3);
9665 attr->s[0] = Tag_CPU_arch;
9666 attr->s[1] = arch;
9667 attr->s[2] = '\0';
9668 }
9669
9670 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9671 into account. */
9672
9673 static int
9674 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9675 int newtag, int secondary_compat)
9676 {
9677 #define T(X) TAG_CPU_ARCH_##X
9678 int tagl, tagh, result;
9679 const int v6t2[] =
9680 {
9681 T(V6T2), /* PRE_V4. */
9682 T(V6T2), /* V4. */
9683 T(V6T2), /* V4T. */
9684 T(V6T2), /* V5T. */
9685 T(V6T2), /* V5TE. */
9686 T(V6T2), /* V5TEJ. */
9687 T(V6T2), /* V6. */
9688 T(V7), /* V6KZ. */
9689 T(V6T2) /* V6T2. */
9690 };
9691 const int v6k[] =
9692 {
9693 T(V6K), /* PRE_V4. */
9694 T(V6K), /* V4. */
9695 T(V6K), /* V4T. */
9696 T(V6K), /* V5T. */
9697 T(V6K), /* V5TE. */
9698 T(V6K), /* V5TEJ. */
9699 T(V6K), /* V6. */
9700 T(V6KZ), /* V6KZ. */
9701 T(V7), /* V6T2. */
9702 T(V6K) /* V6K. */
9703 };
9704 const int v7[] =
9705 {
9706 T(V7), /* PRE_V4. */
9707 T(V7), /* V4. */
9708 T(V7), /* V4T. */
9709 T(V7), /* V5T. */
9710 T(V7), /* V5TE. */
9711 T(V7), /* V5TEJ. */
9712 T(V7), /* V6. */
9713 T(V7), /* V6KZ. */
9714 T(V7), /* V6T2. */
9715 T(V7), /* V6K. */
9716 T(V7) /* V7. */
9717 };
9718 const int v6_m[] =
9719 {
9720 -1, /* PRE_V4. */
9721 -1, /* V4. */
9722 T(V6K), /* V4T. */
9723 T(V6K), /* V5T. */
9724 T(V6K), /* V5TE. */
9725 T(V6K), /* V5TEJ. */
9726 T(V6K), /* V6. */
9727 T(V6KZ), /* V6KZ. */
9728 T(V7), /* V6T2. */
9729 T(V6K), /* V6K. */
9730 T(V7), /* V7. */
9731 T(V6_M) /* V6_M. */
9732 };
9733 const int v6s_m[] =
9734 {
9735 -1, /* PRE_V4. */
9736 -1, /* V4. */
9737 T(V6K), /* V4T. */
9738 T(V6K), /* V5T. */
9739 T(V6K), /* V5TE. */
9740 T(V6K), /* V5TEJ. */
9741 T(V6K), /* V6. */
9742 T(V6KZ), /* V6KZ. */
9743 T(V7), /* V6T2. */
9744 T(V6K), /* V6K. */
9745 T(V7), /* V7. */
9746 T(V6S_M), /* V6_M. */
9747 T(V6S_M) /* V6S_M. */
9748 };
9749 const int v7e_m[] =
9750 {
9751 -1, /* PRE_V4. */
9752 -1, /* V4. */
9753 T(V7E_M), /* V4T. */
9754 T(V7E_M), /* V5T. */
9755 T(V7E_M), /* V5TE. */
9756 T(V7E_M), /* V5TEJ. */
9757 T(V7E_M), /* V6. */
9758 T(V7E_M), /* V6KZ. */
9759 T(V7E_M), /* V6T2. */
9760 T(V7E_M), /* V6K. */
9761 T(V7E_M), /* V7. */
9762 T(V7E_M), /* V6_M. */
9763 T(V7E_M), /* V6S_M. */
9764 T(V7E_M) /* V7E_M. */
9765 };
9766 const int v4t_plus_v6_m[] =
9767 {
9768 -1, /* PRE_V4. */
9769 -1, /* V4. */
9770 T(V4T), /* V4T. */
9771 T(V5T), /* V5T. */
9772 T(V5TE), /* V5TE. */
9773 T(V5TEJ), /* V5TEJ. */
9774 T(V6), /* V6. */
9775 T(V6KZ), /* V6KZ. */
9776 T(V6T2), /* V6T2. */
9777 T(V6K), /* V6K. */
9778 T(V7), /* V7. */
9779 T(V6_M), /* V6_M. */
9780 T(V6S_M), /* V6S_M. */
9781 T(V7E_M), /* V7E_M. */
9782 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9783 };
9784 const int *comb[] =
9785 {
9786 v6t2,
9787 v6k,
9788 v7,
9789 v6_m,
9790 v6s_m,
9791 v7e_m,
9792 /* Pseudo-architecture. */
9793 v4t_plus_v6_m
9794 };
9795
9796 /* Check we've not got a higher architecture than we know about. */
9797
9798 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
9799 {
9800 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
9801 return -1;
9802 }
9803
9804 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9805
9806 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9807 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9808 oldtag = T(V4T_PLUS_V6_M);
9809
9810 /* And override the new tag if we have a Tag_also_compatible_with on the
9811 input. */
9812
9813 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9814 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9815 newtag = T(V4T_PLUS_V6_M);
9816
9817 tagl = (oldtag < newtag) ? oldtag : newtag;
9818 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9819
9820 /* Architectures before V6KZ add features monotonically. */
9821 if (tagh <= TAG_CPU_ARCH_V6KZ)
9822 return result;
9823
9824 result = comb[tagh - T(V6T2)][tagl];
9825
9826 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9827 as the canonical version. */
9828 if (result == T(V4T_PLUS_V6_M))
9829 {
9830 result = T(V4T);
9831 *secondary_compat_out = T(V6_M);
9832 }
9833 else
9834 *secondary_compat_out = -1;
9835
9836 if (result == -1)
9837 {
9838 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
9839 ibfd, oldtag, newtag);
9840 return -1;
9841 }
9842
9843 return result;
9844 #undef T
9845 }
9846
9847 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9848 are conflicting attributes. */
9849
9850 static bfd_boolean
9851 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9852 {
9853 obj_attribute *in_attr;
9854 obj_attribute *out_attr;
9855 obj_attribute_list *in_list;
9856 obj_attribute_list *out_list;
9857 obj_attribute_list **out_listp;
9858 /* Some tags have 0 = don't care, 1 = strong requirement,
9859 2 = weak requirement. */
9860 static const int order_021[3] = {0, 2, 1};
9861 int i;
9862 bfd_boolean result = TRUE;
9863
9864 /* Skip the linker stubs file. This preserves previous behavior
9865 of accepting unknown attributes in the first input file - but
9866 is that a bug? */
9867 if (ibfd->flags & BFD_LINKER_CREATED)
9868 return TRUE;
9869
9870 if (!elf_known_obj_attributes_proc (obfd)[0].i)
9871 {
9872 /* This is the first object. Copy the attributes. */
9873 _bfd_elf_copy_obj_attributes (ibfd, obfd);
9874
9875 out_attr = elf_known_obj_attributes_proc (obfd);
9876
9877 /* Use the Tag_null value to indicate the attributes have been
9878 initialized. */
9879 out_attr[0].i = 1;
9880
9881 /* We do not output objects with Tag_MPextension_use_legacy - we move
9882 the attribute's value to Tag_MPextension_use. */
9883 if (out_attr[Tag_MPextension_use_legacy].i != 0)
9884 {
9885 if (out_attr[Tag_MPextension_use].i != 0
9886 && out_attr[Tag_MPextension_use_legacy].i
9887 != out_attr[Tag_MPextension_use].i)
9888 {
9889 _bfd_error_handler
9890 (_("Error: %B has both the current and legacy "
9891 "Tag_MPextension_use attributes"), ibfd);
9892 result = FALSE;
9893 }
9894
9895 out_attr[Tag_MPextension_use] =
9896 out_attr[Tag_MPextension_use_legacy];
9897 out_attr[Tag_MPextension_use_legacy].type = 0;
9898 out_attr[Tag_MPextension_use_legacy].i = 0;
9899 }
9900
9901 return result;
9902 }
9903
9904 in_attr = elf_known_obj_attributes_proc (ibfd);
9905 out_attr = elf_known_obj_attributes_proc (obfd);
9906 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9907 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9908 {
9909 /* Ignore mismatches if the object doesn't use floating point. */
9910 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9911 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9912 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9913 {
9914 _bfd_error_handler
9915 (_("error: %B uses VFP register arguments, %B does not"),
9916 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
9917 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
9918 result = FALSE;
9919 }
9920 }
9921
9922 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
9923 {
9924 /* Merge this attribute with existing attributes. */
9925 switch (i)
9926 {
9927 case Tag_CPU_raw_name:
9928 case Tag_CPU_name:
9929 /* These are merged after Tag_CPU_arch. */
9930 break;
9931
9932 case Tag_ABI_optimization_goals:
9933 case Tag_ABI_FP_optimization_goals:
9934 /* Use the first value seen. */
9935 break;
9936
9937 case Tag_CPU_arch:
9938 {
9939 int secondary_compat = -1, secondary_compat_out = -1;
9940 unsigned int saved_out_attr = out_attr[i].i;
9941 static const char *name_table[] = {
9942 /* These aren't real CPU names, but we can't guess
9943 that from the architecture version alone. */
9944 "Pre v4",
9945 "ARM v4",
9946 "ARM v4T",
9947 "ARM v5T",
9948 "ARM v5TE",
9949 "ARM v5TEJ",
9950 "ARM v6",
9951 "ARM v6KZ",
9952 "ARM v6T2",
9953 "ARM v6K",
9954 "ARM v7",
9955 "ARM v6-M",
9956 "ARM v6S-M"
9957 };
9958
9959 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9960 secondary_compat = get_secondary_compatible_arch (ibfd);
9961 secondary_compat_out = get_secondary_compatible_arch (obfd);
9962 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9963 &secondary_compat_out,
9964 in_attr[i].i,
9965 secondary_compat);
9966 set_secondary_compatible_arch (obfd, secondary_compat_out);
9967
9968 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9969 if (out_attr[i].i == saved_out_attr)
9970 ; /* Leave the names alone. */
9971 else if (out_attr[i].i == in_attr[i].i)
9972 {
9973 /* The output architecture has been changed to match the
9974 input architecture. Use the input names. */
9975 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9976 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9977 : NULL;
9978 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9979 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9980 : NULL;
9981 }
9982 else
9983 {
9984 out_attr[Tag_CPU_name].s = NULL;
9985 out_attr[Tag_CPU_raw_name].s = NULL;
9986 }
9987
9988 /* If we still don't have a value for Tag_CPU_name,
9989 make one up now. Tag_CPU_raw_name remains blank. */
9990 if (out_attr[Tag_CPU_name].s == NULL
9991 && out_attr[i].i < ARRAY_SIZE (name_table))
9992 out_attr[Tag_CPU_name].s =
9993 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9994 }
9995 break;
9996
9997 case Tag_ARM_ISA_use:
9998 case Tag_THUMB_ISA_use:
9999 case Tag_WMMX_arch:
10000 case Tag_Advanced_SIMD_arch:
10001 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
10002 case Tag_ABI_FP_rounding:
10003 case Tag_ABI_FP_exceptions:
10004 case Tag_ABI_FP_user_exceptions:
10005 case Tag_ABI_FP_number_model:
10006 case Tag_FP_HP_extension:
10007 case Tag_CPU_unaligned_access:
10008 case Tag_T2EE_use:
10009 case Tag_MPextension_use:
10010 /* Use the largest value specified. */
10011 if (in_attr[i].i > out_attr[i].i)
10012 out_attr[i].i = in_attr[i].i;
10013 break;
10014
10015 case Tag_ABI_align_preserved:
10016 case Tag_ABI_PCS_RO_data:
10017 /* Use the smallest value specified. */
10018 if (in_attr[i].i < out_attr[i].i)
10019 out_attr[i].i = in_attr[i].i;
10020 break;
10021
10022 case Tag_ABI_align_needed:
10023 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
10024 && (in_attr[Tag_ABI_align_preserved].i == 0
10025 || out_attr[Tag_ABI_align_preserved].i == 0))
10026 {
10027 /* This error message should be enabled once all non-conformant
10028 binaries in the toolchain have had the attributes set
10029 properly.
10030 _bfd_error_handler
10031 (_("error: %B: 8-byte data alignment conflicts with %B"),
10032 obfd, ibfd);
10033 result = FALSE; */
10034 }
10035 /* Fall through. */
10036 case Tag_ABI_FP_denormal:
10037 case Tag_ABI_PCS_GOT_use:
10038 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10039 value if greater than 2 (for future-proofing). */
10040 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10041 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10042 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
10043 out_attr[i].i = in_attr[i].i;
10044 break;
10045
10046 case Tag_Virtualization_use:
10047 /* The virtualization tag effectively stores two bits of
10048 information: the intended use of TrustZone (in bit 0), and the
10049 intended use of Virtualization (in bit 1). */
10050 if (out_attr[i].i == 0)
10051 out_attr[i].i = in_attr[i].i;
10052 else if (in_attr[i].i != 0
10053 && in_attr[i].i != out_attr[i].i)
10054 {
10055 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10056 out_attr[i].i = 3;
10057 else
10058 {
10059 _bfd_error_handler
10060 (_("error: %B: unable to merge virtualization attributes "
10061 "with %B"),
10062 obfd, ibfd);
10063 result = FALSE;
10064 }
10065 }
10066 break;
10067
10068 case Tag_CPU_arch_profile:
10069 if (out_attr[i].i != in_attr[i].i)
10070 {
10071 /* 0 will merge with anything.
10072 'A' and 'S' merge to 'A'.
10073 'R' and 'S' merge to 'R'.
10074 'M' and 'A|R|S' is an error. */
10075 if (out_attr[i].i == 0
10076 || (out_attr[i].i == 'S'
10077 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10078 out_attr[i].i = in_attr[i].i;
10079 else if (in_attr[i].i == 0
10080 || (in_attr[i].i == 'S'
10081 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10082 ; /* Do nothing. */
10083 else
10084 {
10085 _bfd_error_handler
10086 (_("error: %B: Conflicting architecture profiles %c/%c"),
10087 ibfd,
10088 in_attr[i].i ? in_attr[i].i : '0',
10089 out_attr[i].i ? out_attr[i].i : '0');
10090 result = FALSE;
10091 }
10092 }
10093 break;
10094 case Tag_FP_arch:
10095 {
10096 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10097 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10098 when it's 0. It might mean absence of FP hardware if
10099 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10100
10101 static const struct
10102 {
10103 int ver;
10104 int regs;
10105 } vfp_versions[7] =
10106 {
10107 {0, 0},
10108 {1, 16},
10109 {2, 16},
10110 {3, 32},
10111 {3, 16},
10112 {4, 32},
10113 {4, 16}
10114 };
10115 int ver;
10116 int regs;
10117 int newval;
10118
10119 /* If the output has no requirement about FP hardware,
10120 follow the requirement of the input. */
10121 if (out_attr[i].i == 0)
10122 {
10123 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10124 out_attr[i].i = in_attr[i].i;
10125 out_attr[Tag_ABI_HardFP_use].i
10126 = in_attr[Tag_ABI_HardFP_use].i;
10127 break;
10128 }
10129 /* If the input has no requirement about FP hardware, do
10130 nothing. */
10131 else if (in_attr[i].i == 0)
10132 {
10133 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10134 break;
10135 }
10136
10137 /* Both the input and the output have nonzero Tag_FP_arch.
10138 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10139
10140 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10141 do nothing. */
10142 if (in_attr[Tag_ABI_HardFP_use].i == 0
10143 && out_attr[Tag_ABI_HardFP_use].i == 0)
10144 ;
10145 /* If the input and the output have different Tag_ABI_HardFP_use,
10146 the combination of them is 3 (SP & DP). */
10147 else if (in_attr[Tag_ABI_HardFP_use].i
10148 != out_attr[Tag_ABI_HardFP_use].i)
10149 out_attr[Tag_ABI_HardFP_use].i = 3;
10150
10151 /* Now we can handle Tag_FP_arch. */
10152
10153 /* Values greater than 6 aren't defined, so just pick the
10154 biggest */
10155 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10156 {
10157 out_attr[i] = in_attr[i];
10158 break;
10159 }
10160 /* The output uses the superset of input features
10161 (ISA version) and registers. */
10162 ver = vfp_versions[in_attr[i].i].ver;
10163 if (ver < vfp_versions[out_attr[i].i].ver)
10164 ver = vfp_versions[out_attr[i].i].ver;
10165 regs = vfp_versions[in_attr[i].i].regs;
10166 if (regs < vfp_versions[out_attr[i].i].regs)
10167 regs = vfp_versions[out_attr[i].i].regs;
10168 /* This assumes all possible supersets are also a valid
10169 options. */
10170 for (newval = 6; newval > 0; newval--)
10171 {
10172 if (regs == vfp_versions[newval].regs
10173 && ver == vfp_versions[newval].ver)
10174 break;
10175 }
10176 out_attr[i].i = newval;
10177 }
10178 break;
10179 case Tag_PCS_config:
10180 if (out_attr[i].i == 0)
10181 out_attr[i].i = in_attr[i].i;
10182 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10183 {
10184 /* It's sometimes ok to mix different configs, so this is only
10185 a warning. */
10186 _bfd_error_handler
10187 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10188 }
10189 break;
10190 case Tag_ABI_PCS_R9_use:
10191 if (in_attr[i].i != out_attr[i].i
10192 && out_attr[i].i != AEABI_R9_unused
10193 && in_attr[i].i != AEABI_R9_unused)
10194 {
10195 _bfd_error_handler
10196 (_("error: %B: Conflicting use of R9"), ibfd);
10197 result = FALSE;
10198 }
10199 if (out_attr[i].i == AEABI_R9_unused)
10200 out_attr[i].i = in_attr[i].i;
10201 break;
10202 case Tag_ABI_PCS_RW_data:
10203 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10204 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10205 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10206 {
10207 _bfd_error_handler
10208 (_("error: %B: SB relative addressing conflicts with use of R9"),
10209 ibfd);
10210 result = FALSE;
10211 }
10212 /* Use the smallest value specified. */
10213 if (in_attr[i].i < out_attr[i].i)
10214 out_attr[i].i = in_attr[i].i;
10215 break;
10216 case Tag_ABI_PCS_wchar_t:
10217 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10218 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
10219 {
10220 _bfd_error_handler
10221 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10222 ibfd, in_attr[i].i, out_attr[i].i);
10223 }
10224 else if (in_attr[i].i && !out_attr[i].i)
10225 out_attr[i].i = in_attr[i].i;
10226 break;
10227 case Tag_ABI_enum_size:
10228 if (in_attr[i].i != AEABI_enum_unused)
10229 {
10230 if (out_attr[i].i == AEABI_enum_unused
10231 || out_attr[i].i == AEABI_enum_forced_wide)
10232 {
10233 /* The existing object is compatible with anything.
10234 Use whatever requirements the new object has. */
10235 out_attr[i].i = in_attr[i].i;
10236 }
10237 else if (in_attr[i].i != AEABI_enum_forced_wide
10238 && out_attr[i].i != in_attr[i].i
10239 && !elf_arm_tdata (obfd)->no_enum_size_warning)
10240 {
10241 static const char *aeabi_enum_names[] =
10242 { "", "variable-size", "32-bit", "" };
10243 const char *in_name =
10244 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10245 ? aeabi_enum_names[in_attr[i].i]
10246 : "<unknown>";
10247 const char *out_name =
10248 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10249 ? aeabi_enum_names[out_attr[i].i]
10250 : "<unknown>";
10251 _bfd_error_handler
10252 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
10253 ibfd, in_name, out_name);
10254 }
10255 }
10256 break;
10257 case Tag_ABI_VFP_args:
10258 /* Aready done. */
10259 break;
10260 case Tag_ABI_WMMX_args:
10261 if (in_attr[i].i != out_attr[i].i)
10262 {
10263 _bfd_error_handler
10264 (_("error: %B uses iWMMXt register arguments, %B does not"),
10265 ibfd, obfd);
10266 result = FALSE;
10267 }
10268 break;
10269 case Tag_compatibility:
10270 /* Merged in target-independent code. */
10271 break;
10272 case Tag_ABI_HardFP_use:
10273 /* This is handled along with Tag_FP_arch. */
10274 break;
10275 case Tag_ABI_FP_16bit_format:
10276 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10277 {
10278 if (in_attr[i].i != out_attr[i].i)
10279 {
10280 _bfd_error_handler
10281 (_("error: fp16 format mismatch between %B and %B"),
10282 ibfd, obfd);
10283 result = FALSE;
10284 }
10285 }
10286 if (in_attr[i].i != 0)
10287 out_attr[i].i = in_attr[i].i;
10288 break;
10289
10290 case Tag_DIV_use:
10291 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10292 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10293 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10294 CPU. We will merge as follows: If the input attribute's value
10295 is one then the output attribute's value remains unchanged. If
10296 the input attribute's value is zero or two then if the output
10297 attribute's value is one the output value is set to the input
10298 value, otherwise the output value must be the same as the
10299 inputs. */
10300 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10301 {
10302 if (in_attr[i].i != out_attr[i].i)
10303 {
10304 _bfd_error_handler
10305 (_("DIV usage mismatch between %B and %B"),
10306 ibfd, obfd);
10307 result = FALSE;
10308 }
10309 }
10310
10311 if (in_attr[i].i != 1)
10312 out_attr[i].i = in_attr[i].i;
10313
10314 break;
10315
10316 case Tag_MPextension_use_legacy:
10317 /* We don't output objects with Tag_MPextension_use_legacy - we
10318 move the value to Tag_MPextension_use. */
10319 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10320 {
10321 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10322 {
10323 _bfd_error_handler
10324 (_("%B has has both the current and legacy "
10325 "Tag_MPextension_use attributes"),
10326 ibfd);
10327 result = FALSE;
10328 }
10329 }
10330
10331 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10332 out_attr[Tag_MPextension_use] = in_attr[i];
10333
10334 break;
10335
10336 case Tag_nodefaults:
10337 /* This tag is set if it exists, but the value is unused (and is
10338 typically zero). We don't actually need to do anything here -
10339 the merge happens automatically when the type flags are merged
10340 below. */
10341 break;
10342 case Tag_also_compatible_with:
10343 /* Already done in Tag_CPU_arch. */
10344 break;
10345 case Tag_conformance:
10346 /* Keep the attribute if it matches. Throw it away otherwise.
10347 No attribute means no claim to conform. */
10348 if (!in_attr[i].s || !out_attr[i].s
10349 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10350 out_attr[i].s = NULL;
10351 break;
10352
10353 default:
10354 {
10355 bfd *err_bfd = NULL;
10356
10357 /* The "known_obj_attributes" table does contain some undefined
10358 attributes. Ensure that there are unused. */
10359 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10360 err_bfd = obfd;
10361 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10362 err_bfd = ibfd;
10363
10364 if (err_bfd != NULL)
10365 {
10366 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10367 if ((i & 127) < 64)
10368 {
10369 _bfd_error_handler
10370 (_("%B: Unknown mandatory EABI object attribute %d"),
10371 err_bfd, i);
10372 bfd_set_error (bfd_error_bad_value);
10373 result = FALSE;
10374 }
10375 else
10376 {
10377 _bfd_error_handler
10378 (_("Warning: %B: Unknown EABI object attribute %d"),
10379 err_bfd, i);
10380 }
10381 }
10382
10383 /* Only pass on attributes that match in both inputs. */
10384 if (in_attr[i].i != out_attr[i].i
10385 || in_attr[i].s != out_attr[i].s
10386 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10387 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10388 {
10389 out_attr[i].i = 0;
10390 out_attr[i].s = NULL;
10391 }
10392 }
10393 }
10394
10395 /* If out_attr was copied from in_attr then it won't have a type yet. */
10396 if (in_attr[i].type && !out_attr[i].type)
10397 out_attr[i].type = in_attr[i].type;
10398 }
10399
10400 /* Merge Tag_compatibility attributes and any common GNU ones. */
10401 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10402 return FALSE;
10403
10404 /* Check for any attributes not known on ARM. */
10405 in_list = elf_other_obj_attributes_proc (ibfd);
10406 out_listp = &elf_other_obj_attributes_proc (obfd);
10407 out_list = *out_listp;
10408
10409 for (; in_list || out_list; )
10410 {
10411 bfd *err_bfd = NULL;
10412 int err_tag = 0;
10413
10414 /* The tags for each list are in numerical order. */
10415 /* If the tags are equal, then merge. */
10416 if (out_list && (!in_list || in_list->tag > out_list->tag))
10417 {
10418 /* This attribute only exists in obfd. We can't merge, and we don't
10419 know what the tag means, so delete it. */
10420 err_bfd = obfd;
10421 err_tag = out_list->tag;
10422 *out_listp = out_list->next;
10423 out_list = *out_listp;
10424 }
10425 else if (in_list && (!out_list || in_list->tag < out_list->tag))
10426 {
10427 /* This attribute only exists in ibfd. We can't merge, and we don't
10428 know what the tag means, so ignore it. */
10429 err_bfd = ibfd;
10430 err_tag = in_list->tag;
10431 in_list = in_list->next;
10432 }
10433 else /* The tags are equal. */
10434 {
10435 /* As present, all attributes in the list are unknown, and
10436 therefore can't be merged meaningfully. */
10437 err_bfd = obfd;
10438 err_tag = out_list->tag;
10439
10440 /* Only pass on attributes that match in both inputs. */
10441 if (in_list->attr.i != out_list->attr.i
10442 || in_list->attr.s != out_list->attr.s
10443 || (in_list->attr.s && out_list->attr.s
10444 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10445 {
10446 /* No match. Delete the attribute. */
10447 *out_listp = out_list->next;
10448 out_list = *out_listp;
10449 }
10450 else
10451 {
10452 /* Matched. Keep the attribute and move to the next. */
10453 out_list = out_list->next;
10454 in_list = in_list->next;
10455 }
10456 }
10457
10458 if (err_bfd)
10459 {
10460 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10461 if ((err_tag & 127) < 64)
10462 {
10463 _bfd_error_handler
10464 (_("%B: Unknown mandatory EABI object attribute %d"),
10465 err_bfd, err_tag);
10466 bfd_set_error (bfd_error_bad_value);
10467 result = FALSE;
10468 }
10469 else
10470 {
10471 _bfd_error_handler
10472 (_("Warning: %B: Unknown EABI object attribute %d"),
10473 err_bfd, err_tag);
10474 }
10475 }
10476 }
10477 return result;
10478 }
10479
10480
10481 /* Return TRUE if the two EABI versions are incompatible. */
10482
10483 static bfd_boolean
10484 elf32_arm_versions_compatible (unsigned iver, unsigned over)
10485 {
10486 /* v4 and v5 are the same spec before and after it was released,
10487 so allow mixing them. */
10488 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10489 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10490 return TRUE;
10491
10492 return (iver == over);
10493 }
10494
10495 /* Merge backend specific data from an object file to the output
10496 object file when linking. */
10497
10498 static bfd_boolean
10499 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
10500
10501 /* Display the flags field. */
10502
10503 static bfd_boolean
10504 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
10505 {
10506 FILE * file = (FILE *) ptr;
10507 unsigned long flags;
10508
10509 BFD_ASSERT (abfd != NULL && ptr != NULL);
10510
10511 /* Print normal ELF private data. */
10512 _bfd_elf_print_private_bfd_data (abfd, ptr);
10513
10514 flags = elf_elfheader (abfd)->e_flags;
10515 /* Ignore init flag - it may not be set, despite the flags field
10516 containing valid data. */
10517
10518 /* xgettext:c-format */
10519 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
10520
10521 switch (EF_ARM_EABI_VERSION (flags))
10522 {
10523 case EF_ARM_EABI_UNKNOWN:
10524 /* The following flag bits are GNU extensions and not part of the
10525 official ARM ELF extended ABI. Hence they are only decoded if
10526 the EABI version is not set. */
10527 if (flags & EF_ARM_INTERWORK)
10528 fprintf (file, _(" [interworking enabled]"));
10529
10530 if (flags & EF_ARM_APCS_26)
10531 fprintf (file, " [APCS-26]");
10532 else
10533 fprintf (file, " [APCS-32]");
10534
10535 if (flags & EF_ARM_VFP_FLOAT)
10536 fprintf (file, _(" [VFP float format]"));
10537 else if (flags & EF_ARM_MAVERICK_FLOAT)
10538 fprintf (file, _(" [Maverick float format]"));
10539 else
10540 fprintf (file, _(" [FPA float format]"));
10541
10542 if (flags & EF_ARM_APCS_FLOAT)
10543 fprintf (file, _(" [floats passed in float registers]"));
10544
10545 if (flags & EF_ARM_PIC)
10546 fprintf (file, _(" [position independent]"));
10547
10548 if (flags & EF_ARM_NEW_ABI)
10549 fprintf (file, _(" [new ABI]"));
10550
10551 if (flags & EF_ARM_OLD_ABI)
10552 fprintf (file, _(" [old ABI]"));
10553
10554 if (flags & EF_ARM_SOFT_FLOAT)
10555 fprintf (file, _(" [software FP]"));
10556
10557 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10558 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
10559 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10560 | EF_ARM_MAVERICK_FLOAT);
10561 break;
10562
10563 case EF_ARM_EABI_VER1:
10564 fprintf (file, _(" [Version1 EABI]"));
10565
10566 if (flags & EF_ARM_SYMSARESORTED)
10567 fprintf (file, _(" [sorted symbol table]"));
10568 else
10569 fprintf (file, _(" [unsorted symbol table]"));
10570
10571 flags &= ~ EF_ARM_SYMSARESORTED;
10572 break;
10573
10574 case EF_ARM_EABI_VER2:
10575 fprintf (file, _(" [Version2 EABI]"));
10576
10577 if (flags & EF_ARM_SYMSARESORTED)
10578 fprintf (file, _(" [sorted symbol table]"));
10579 else
10580 fprintf (file, _(" [unsorted symbol table]"));
10581
10582 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10583 fprintf (file, _(" [dynamic symbols use segment index]"));
10584
10585 if (flags & EF_ARM_MAPSYMSFIRST)
10586 fprintf (file, _(" [mapping symbols precede others]"));
10587
10588 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
10589 | EF_ARM_MAPSYMSFIRST);
10590 break;
10591
10592 case EF_ARM_EABI_VER3:
10593 fprintf (file, _(" [Version3 EABI]"));
10594 break;
10595
10596 case EF_ARM_EABI_VER4:
10597 fprintf (file, _(" [Version4 EABI]"));
10598 goto eabi;
10599
10600 case EF_ARM_EABI_VER5:
10601 fprintf (file, _(" [Version5 EABI]"));
10602 eabi:
10603 if (flags & EF_ARM_BE8)
10604 fprintf (file, _(" [BE8]"));
10605
10606 if (flags & EF_ARM_LE8)
10607 fprintf (file, _(" [LE8]"));
10608
10609 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10610 break;
10611
10612 default:
10613 fprintf (file, _(" <EABI version unrecognised>"));
10614 break;
10615 }
10616
10617 flags &= ~ EF_ARM_EABIMASK;
10618
10619 if (flags & EF_ARM_RELEXEC)
10620 fprintf (file, _(" [relocatable executable]"));
10621
10622 if (flags & EF_ARM_HASENTRY)
10623 fprintf (file, _(" [has entry point]"));
10624
10625 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10626
10627 if (flags)
10628 fprintf (file, _("<Unrecognised flag bits set>"));
10629
10630 fputc ('\n', file);
10631
10632 return TRUE;
10633 }
10634
10635 static int
10636 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
10637 {
10638 switch (ELF_ST_TYPE (elf_sym->st_info))
10639 {
10640 case STT_ARM_TFUNC:
10641 return ELF_ST_TYPE (elf_sym->st_info);
10642
10643 case STT_ARM_16BIT:
10644 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10645 This allows us to distinguish between data used by Thumb instructions
10646 and non-data (which is probably code) inside Thumb regions of an
10647 executable. */
10648 if (type != STT_OBJECT && type != STT_TLS)
10649 return ELF_ST_TYPE (elf_sym->st_info);
10650 break;
10651
10652 default:
10653 break;
10654 }
10655
10656 return type;
10657 }
10658
10659 static asection *
10660 elf32_arm_gc_mark_hook (asection *sec,
10661 struct bfd_link_info *info,
10662 Elf_Internal_Rela *rel,
10663 struct elf_link_hash_entry *h,
10664 Elf_Internal_Sym *sym)
10665 {
10666 if (h != NULL)
10667 switch (ELF32_R_TYPE (rel->r_info))
10668 {
10669 case R_ARM_GNU_VTINHERIT:
10670 case R_ARM_GNU_VTENTRY:
10671 return NULL;
10672 }
10673
10674 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
10675 }
10676
10677 /* Update the got entry reference counts for the section being removed. */
10678
10679 static bfd_boolean
10680 elf32_arm_gc_sweep_hook (bfd * abfd,
10681 struct bfd_link_info * info,
10682 asection * sec,
10683 const Elf_Internal_Rela * relocs)
10684 {
10685 Elf_Internal_Shdr *symtab_hdr;
10686 struct elf_link_hash_entry **sym_hashes;
10687 bfd_signed_vma *local_got_refcounts;
10688 const Elf_Internal_Rela *rel, *relend;
10689 struct elf32_arm_link_hash_table * globals;
10690
10691 if (info->relocatable)
10692 return TRUE;
10693
10694 globals = elf32_arm_hash_table (info);
10695 if (globals == NULL)
10696 return FALSE;
10697
10698 elf_section_data (sec)->local_dynrel = NULL;
10699
10700 symtab_hdr = & elf_symtab_hdr (abfd);
10701 sym_hashes = elf_sym_hashes (abfd);
10702 local_got_refcounts = elf_local_got_refcounts (abfd);
10703
10704 check_use_blx (globals);
10705
10706 relend = relocs + sec->reloc_count;
10707 for (rel = relocs; rel < relend; rel++)
10708 {
10709 unsigned long r_symndx;
10710 struct elf_link_hash_entry *h = NULL;
10711 int r_type;
10712
10713 r_symndx = ELF32_R_SYM (rel->r_info);
10714 if (r_symndx >= symtab_hdr->sh_info)
10715 {
10716 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10717 while (h->root.type == bfd_link_hash_indirect
10718 || h->root.type == bfd_link_hash_warning)
10719 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10720 }
10721
10722 r_type = ELF32_R_TYPE (rel->r_info);
10723 r_type = arm_real_reloc_type (globals, r_type);
10724 switch (r_type)
10725 {
10726 case R_ARM_GOT32:
10727 case R_ARM_GOT_PREL:
10728 case R_ARM_TLS_GD32:
10729 case R_ARM_TLS_IE32:
10730 if (h != NULL)
10731 {
10732 if (h->got.refcount > 0)
10733 h->got.refcount -= 1;
10734 }
10735 else if (local_got_refcounts != NULL)
10736 {
10737 if (local_got_refcounts[r_symndx] > 0)
10738 local_got_refcounts[r_symndx] -= 1;
10739 }
10740 break;
10741
10742 case R_ARM_TLS_LDM32:
10743 globals->tls_ldm_got.refcount -= 1;
10744 break;
10745
10746 case R_ARM_ABS32:
10747 case R_ARM_ABS32_NOI:
10748 case R_ARM_REL32:
10749 case R_ARM_REL32_NOI:
10750 case R_ARM_PC24:
10751 case R_ARM_PLT32:
10752 case R_ARM_CALL:
10753 case R_ARM_JUMP24:
10754 case R_ARM_PREL31:
10755 case R_ARM_THM_CALL:
10756 case R_ARM_THM_JUMP24:
10757 case R_ARM_THM_JUMP19:
10758 case R_ARM_MOVW_ABS_NC:
10759 case R_ARM_MOVT_ABS:
10760 case R_ARM_MOVW_PREL_NC:
10761 case R_ARM_MOVT_PREL:
10762 case R_ARM_THM_MOVW_ABS_NC:
10763 case R_ARM_THM_MOVT_ABS:
10764 case R_ARM_THM_MOVW_PREL_NC:
10765 case R_ARM_THM_MOVT_PREL:
10766 /* Should the interworking branches be here also? */
10767
10768 if (h != NULL)
10769 {
10770 struct elf32_arm_link_hash_entry *eh;
10771 struct elf32_arm_relocs_copied **pp;
10772 struct elf32_arm_relocs_copied *p;
10773
10774 eh = (struct elf32_arm_link_hash_entry *) h;
10775
10776 if (h->plt.refcount > 0)
10777 {
10778 h->plt.refcount -= 1;
10779 if (r_type == R_ARM_THM_CALL)
10780 eh->plt_maybe_thumb_refcount--;
10781
10782 if (r_type == R_ARM_THM_JUMP24
10783 || r_type == R_ARM_THM_JUMP19)
10784 eh->plt_thumb_refcount--;
10785 }
10786
10787 if (r_type == R_ARM_ABS32
10788 || r_type == R_ARM_REL32
10789 || r_type == R_ARM_ABS32_NOI
10790 || r_type == R_ARM_REL32_NOI)
10791 {
10792 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10793 pp = &p->next)
10794 if (p->section == sec)
10795 {
10796 p->count -= 1;
10797 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10798 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
10799 p->pc_count -= 1;
10800 if (p->count == 0)
10801 *pp = p->next;
10802 break;
10803 }
10804 }
10805 }
10806 break;
10807
10808 default:
10809 break;
10810 }
10811 }
10812
10813 return TRUE;
10814 }
10815
10816 /* Look through the relocs for a section during the first phase. */
10817
10818 static bfd_boolean
10819 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10820 asection *sec, const Elf_Internal_Rela *relocs)
10821 {
10822 Elf_Internal_Shdr *symtab_hdr;
10823 struct elf_link_hash_entry **sym_hashes;
10824 const Elf_Internal_Rela *rel;
10825 const Elf_Internal_Rela *rel_end;
10826 bfd *dynobj;
10827 asection *sreloc;
10828 struct elf32_arm_link_hash_table *htab;
10829 bfd_boolean needs_plt;
10830 unsigned long nsyms;
10831
10832 if (info->relocatable)
10833 return TRUE;
10834
10835 BFD_ASSERT (is_arm_elf (abfd));
10836
10837 htab = elf32_arm_hash_table (info);
10838 if (htab == NULL)
10839 return FALSE;
10840
10841 sreloc = NULL;
10842
10843 /* Create dynamic sections for relocatable executables so that we can
10844 copy relocations. */
10845 if (htab->root.is_relocatable_executable
10846 && ! htab->root.dynamic_sections_created)
10847 {
10848 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10849 return FALSE;
10850 }
10851
10852 dynobj = elf_hash_table (info)->dynobj;
10853 symtab_hdr = & elf_symtab_hdr (abfd);
10854 sym_hashes = elf_sym_hashes (abfd);
10855 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10856
10857 rel_end = relocs + sec->reloc_count;
10858 for (rel = relocs; rel < rel_end; rel++)
10859 {
10860 struct elf_link_hash_entry *h;
10861 struct elf32_arm_link_hash_entry *eh;
10862 unsigned long r_symndx;
10863 int r_type;
10864
10865 r_symndx = ELF32_R_SYM (rel->r_info);
10866 r_type = ELF32_R_TYPE (rel->r_info);
10867 r_type = arm_real_reloc_type (htab, r_type);
10868
10869 if (r_symndx >= nsyms
10870 /* PR 9934: It is possible to have relocations that do not
10871 refer to symbols, thus it is also possible to have an
10872 object file containing relocations but no symbol table. */
10873 && (r_symndx > 0 || nsyms > 0))
10874 {
10875 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
10876 r_symndx);
10877 return FALSE;
10878 }
10879
10880 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
10881 h = NULL;
10882 else
10883 {
10884 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10885 while (h->root.type == bfd_link_hash_indirect
10886 || h->root.type == bfd_link_hash_warning)
10887 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10888 }
10889
10890 eh = (struct elf32_arm_link_hash_entry *) h;
10891
10892 switch (r_type)
10893 {
10894 case R_ARM_GOT32:
10895 case R_ARM_GOT_PREL:
10896 case R_ARM_TLS_GD32:
10897 case R_ARM_TLS_IE32:
10898 /* This symbol requires a global offset table entry. */
10899 {
10900 int tls_type, old_tls_type;
10901
10902 switch (r_type)
10903 {
10904 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10905 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10906 default: tls_type = GOT_NORMAL; break;
10907 }
10908
10909 if (h != NULL)
10910 {
10911 h->got.refcount++;
10912 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10913 }
10914 else
10915 {
10916 bfd_signed_vma *local_got_refcounts;
10917
10918 /* This is a global offset table entry for a local symbol. */
10919 local_got_refcounts = elf_local_got_refcounts (abfd);
10920 if (local_got_refcounts == NULL)
10921 {
10922 bfd_size_type size;
10923
10924 size = symtab_hdr->sh_info;
10925 size *= (sizeof (bfd_signed_vma) + sizeof (char));
10926 local_got_refcounts = (bfd_signed_vma *)
10927 bfd_zalloc (abfd, size);
10928 if (local_got_refcounts == NULL)
10929 return FALSE;
10930 elf_local_got_refcounts (abfd) = local_got_refcounts;
10931 elf32_arm_local_got_tls_type (abfd)
10932 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10933 }
10934 local_got_refcounts[r_symndx] += 1;
10935 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10936 }
10937
10938 /* We will already have issued an error message if there is a
10939 TLS / non-TLS mismatch, based on the symbol type. We don't
10940 support any linker relaxations. So just combine any TLS
10941 types needed. */
10942 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10943 && tls_type != GOT_NORMAL)
10944 tls_type |= old_tls_type;
10945
10946 if (old_tls_type != tls_type)
10947 {
10948 if (h != NULL)
10949 elf32_arm_hash_entry (h)->tls_type = tls_type;
10950 else
10951 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10952 }
10953 }
10954 /* Fall through. */
10955
10956 case R_ARM_TLS_LDM32:
10957 if (r_type == R_ARM_TLS_LDM32)
10958 htab->tls_ldm_got.refcount++;
10959 /* Fall through. */
10960
10961 case R_ARM_GOTOFF32:
10962 case R_ARM_GOTPC:
10963 if (htab->sgot == NULL)
10964 {
10965 if (htab->root.dynobj == NULL)
10966 htab->root.dynobj = abfd;
10967 if (!create_got_section (htab->root.dynobj, info))
10968 return FALSE;
10969 }
10970 break;
10971
10972 case R_ARM_ABS12:
10973 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10974 ldr __GOTT_INDEX__ offsets. */
10975 if (!htab->vxworks_p)
10976 break;
10977 /* Fall through. */
10978
10979 case R_ARM_PC24:
10980 case R_ARM_PLT32:
10981 case R_ARM_CALL:
10982 case R_ARM_JUMP24:
10983 case R_ARM_PREL31:
10984 case R_ARM_THM_CALL:
10985 case R_ARM_THM_JUMP24:
10986 case R_ARM_THM_JUMP19:
10987 needs_plt = 1;
10988 goto normal_reloc;
10989
10990 case R_ARM_MOVW_ABS_NC:
10991 case R_ARM_MOVT_ABS:
10992 case R_ARM_THM_MOVW_ABS_NC:
10993 case R_ARM_THM_MOVT_ABS:
10994 if (info->shared)
10995 {
10996 (*_bfd_error_handler)
10997 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10998 abfd, elf32_arm_howto_table_1[r_type].name,
10999 (h) ? h->root.root.string : "a local symbol");
11000 bfd_set_error (bfd_error_bad_value);
11001 return FALSE;
11002 }
11003
11004 /* Fall through. */
11005 case R_ARM_ABS32:
11006 case R_ARM_ABS32_NOI:
11007 case R_ARM_REL32:
11008 case R_ARM_REL32_NOI:
11009 case R_ARM_MOVW_PREL_NC:
11010 case R_ARM_MOVT_PREL:
11011 case R_ARM_THM_MOVW_PREL_NC:
11012 case R_ARM_THM_MOVT_PREL:
11013 needs_plt = 0;
11014 normal_reloc:
11015
11016 /* Should the interworking branches be listed here? */
11017 if (h != NULL)
11018 {
11019 /* If this reloc is in a read-only section, we might
11020 need a copy reloc. We can't check reliably at this
11021 stage whether the section is read-only, as input
11022 sections have not yet been mapped to output sections.
11023 Tentatively set the flag for now, and correct in
11024 adjust_dynamic_symbol. */
11025 if (!info->shared)
11026 h->non_got_ref = 1;
11027
11028 /* We may need a .plt entry if the function this reloc
11029 refers to is in a different object. We can't tell for
11030 sure yet, because something later might force the
11031 symbol local. */
11032 if (needs_plt)
11033 h->needs_plt = 1;
11034
11035 /* If we create a PLT entry, this relocation will reference
11036 it, even if it's an ABS32 relocation. */
11037 h->plt.refcount += 1;
11038
11039 /* It's too early to use htab->use_blx here, so we have to
11040 record possible blx references separately from
11041 relocs that definitely need a thumb stub. */
11042
11043 if (r_type == R_ARM_THM_CALL)
11044 eh->plt_maybe_thumb_refcount += 1;
11045
11046 if (r_type == R_ARM_THM_JUMP24
11047 || r_type == R_ARM_THM_JUMP19)
11048 eh->plt_thumb_refcount += 1;
11049 }
11050
11051 /* If we are creating a shared library or relocatable executable,
11052 and this is a reloc against a global symbol, or a non PC
11053 relative reloc against a local symbol, then we need to copy
11054 the reloc into the shared library. However, if we are linking
11055 with -Bsymbolic, we do not need to copy a reloc against a
11056 global symbol which is defined in an object we are
11057 including in the link (i.e., DEF_REGULAR is set). At
11058 this point we have not seen all the input files, so it is
11059 possible that DEF_REGULAR is not set now but will be set
11060 later (it is never cleared). We account for that
11061 possibility below by storing information in the
11062 relocs_copied field of the hash table entry. */
11063 if ((info->shared || htab->root.is_relocatable_executable)
11064 && (sec->flags & SEC_ALLOC) != 0
11065 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
11066 || (h != NULL && ! h->needs_plt
11067 && (! info->symbolic || ! h->def_regular))))
11068 {
11069 struct elf32_arm_relocs_copied *p, **head;
11070
11071 /* When creating a shared object, we must copy these
11072 reloc types into the output file. We create a reloc
11073 section in dynobj and make room for this reloc. */
11074 if (sreloc == NULL)
11075 {
11076 sreloc = _bfd_elf_make_dynamic_reloc_section
11077 (sec, dynobj, 2, abfd, ! htab->use_rel);
11078
11079 if (sreloc == NULL)
11080 return FALSE;
11081
11082 /* BPABI objects never have dynamic relocations mapped. */
11083 if (htab->symbian_p)
11084 {
11085 flagword flags;
11086
11087 flags = bfd_get_section_flags (dynobj, sreloc);
11088 flags &= ~(SEC_LOAD | SEC_ALLOC);
11089 bfd_set_section_flags (dynobj, sreloc, flags);
11090 }
11091 }
11092
11093 /* If this is a global symbol, we count the number of
11094 relocations we need for this symbol. */
11095 if (h != NULL)
11096 {
11097 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
11098 }
11099 else
11100 {
11101 /* Track dynamic relocs needed for local syms too.
11102 We really need local syms available to do this
11103 easily. Oh well. */
11104 asection *s;
11105 void *vpp;
11106 Elf_Internal_Sym *isym;
11107
11108 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11109 abfd, r_symndx);
11110 if (isym == NULL)
11111 return FALSE;
11112
11113 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11114 if (s == NULL)
11115 s = sec;
11116
11117 vpp = &elf_section_data (s)->local_dynrel;
11118 head = (struct elf32_arm_relocs_copied **) vpp;
11119 }
11120
11121 p = *head;
11122 if (p == NULL || p->section != sec)
11123 {
11124 bfd_size_type amt = sizeof *p;
11125
11126 p = (struct elf32_arm_relocs_copied *)
11127 bfd_alloc (htab->root.dynobj, amt);
11128 if (p == NULL)
11129 return FALSE;
11130 p->next = *head;
11131 *head = p;
11132 p->section = sec;
11133 p->count = 0;
11134 p->pc_count = 0;
11135 }
11136
11137 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
11138 p->pc_count += 1;
11139 p->count += 1;
11140 }
11141 break;
11142
11143 /* This relocation describes the C++ object vtable hierarchy.
11144 Reconstruct it for later use during GC. */
11145 case R_ARM_GNU_VTINHERIT:
11146 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
11147 return FALSE;
11148 break;
11149
11150 /* This relocation describes which C++ vtable entries are actually
11151 used. Record for later use during GC. */
11152 case R_ARM_GNU_VTENTRY:
11153 BFD_ASSERT (h != NULL);
11154 if (h != NULL
11155 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
11156 return FALSE;
11157 break;
11158 }
11159 }
11160
11161 return TRUE;
11162 }
11163
11164 /* Unwinding tables are not referenced directly. This pass marks them as
11165 required if the corresponding code section is marked. */
11166
11167 static bfd_boolean
11168 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11169 elf_gc_mark_hook_fn gc_mark_hook)
11170 {
11171 bfd *sub;
11172 Elf_Internal_Shdr **elf_shdrp;
11173 bfd_boolean again;
11174
11175 /* Marking EH data may cause additional code sections to be marked,
11176 requiring multiple passes. */
11177 again = TRUE;
11178 while (again)
11179 {
11180 again = FALSE;
11181 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11182 {
11183 asection *o;
11184
11185 if (! is_arm_elf (sub))
11186 continue;
11187
11188 elf_shdrp = elf_elfsections (sub);
11189 for (o = sub->sections; o != NULL; o = o->next)
11190 {
11191 Elf_Internal_Shdr *hdr;
11192
11193 hdr = &elf_section_data (o)->this_hdr;
11194 if (hdr->sh_type == SHT_ARM_EXIDX
11195 && hdr->sh_link
11196 && hdr->sh_link < elf_numsections (sub)
11197 && !o->gc_mark
11198 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11199 {
11200 again = TRUE;
11201 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11202 return FALSE;
11203 }
11204 }
11205 }
11206 }
11207
11208 return TRUE;
11209 }
11210
11211 /* Treat mapping symbols as special target symbols. */
11212
11213 static bfd_boolean
11214 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11215 {
11216 return bfd_is_arm_special_symbol_name (sym->name,
11217 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
11218 }
11219
11220 /* This is a copy of elf_find_function() from elf.c except that
11221 ARM mapping symbols are ignored when looking for function names
11222 and STT_ARM_TFUNC is considered to a function type. */
11223
11224 static bfd_boolean
11225 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11226 asection * section,
11227 asymbol ** symbols,
11228 bfd_vma offset,
11229 const char ** filename_ptr,
11230 const char ** functionname_ptr)
11231 {
11232 const char * filename = NULL;
11233 asymbol * func = NULL;
11234 bfd_vma low_func = 0;
11235 asymbol ** p;
11236
11237 for (p = symbols; *p != NULL; p++)
11238 {
11239 elf_symbol_type *q;
11240
11241 q = (elf_symbol_type *) *p;
11242
11243 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11244 {
11245 default:
11246 break;
11247 case STT_FILE:
11248 filename = bfd_asymbol_name (&q->symbol);
11249 break;
11250 case STT_FUNC:
11251 case STT_ARM_TFUNC:
11252 case STT_NOTYPE:
11253 /* Skip mapping symbols. */
11254 if ((q->symbol.flags & BSF_LOCAL)
11255 && bfd_is_arm_special_symbol_name (q->symbol.name,
11256 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
11257 continue;
11258 /* Fall through. */
11259 if (bfd_get_section (&q->symbol) == section
11260 && q->symbol.value >= low_func
11261 && q->symbol.value <= offset)
11262 {
11263 func = (asymbol *) q;
11264 low_func = q->symbol.value;
11265 }
11266 break;
11267 }
11268 }
11269
11270 if (func == NULL)
11271 return FALSE;
11272
11273 if (filename_ptr)
11274 *filename_ptr = filename;
11275 if (functionname_ptr)
11276 *functionname_ptr = bfd_asymbol_name (func);
11277
11278 return TRUE;
11279 }
11280
11281
11282 /* Find the nearest line to a particular section and offset, for error
11283 reporting. This code is a duplicate of the code in elf.c, except
11284 that it uses arm_elf_find_function. */
11285
11286 static bfd_boolean
11287 elf32_arm_find_nearest_line (bfd * abfd,
11288 asection * section,
11289 asymbol ** symbols,
11290 bfd_vma offset,
11291 const char ** filename_ptr,
11292 const char ** functionname_ptr,
11293 unsigned int * line_ptr)
11294 {
11295 bfd_boolean found = FALSE;
11296
11297 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11298
11299 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11300 filename_ptr, functionname_ptr,
11301 line_ptr, 0,
11302 & elf_tdata (abfd)->dwarf2_find_line_info))
11303 {
11304 if (!*functionname_ptr)
11305 arm_elf_find_function (abfd, section, symbols, offset,
11306 *filename_ptr ? NULL : filename_ptr,
11307 functionname_ptr);
11308
11309 return TRUE;
11310 }
11311
11312 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11313 & found, filename_ptr,
11314 functionname_ptr, line_ptr,
11315 & elf_tdata (abfd)->line_info))
11316 return FALSE;
11317
11318 if (found && (*functionname_ptr || *line_ptr))
11319 return TRUE;
11320
11321 if (symbols == NULL)
11322 return FALSE;
11323
11324 if (! arm_elf_find_function (abfd, section, symbols, offset,
11325 filename_ptr, functionname_ptr))
11326 return FALSE;
11327
11328 *line_ptr = 0;
11329 return TRUE;
11330 }
11331
11332 static bfd_boolean
11333 elf32_arm_find_inliner_info (bfd * abfd,
11334 const char ** filename_ptr,
11335 const char ** functionname_ptr,
11336 unsigned int * line_ptr)
11337 {
11338 bfd_boolean found;
11339 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11340 functionname_ptr, line_ptr,
11341 & elf_tdata (abfd)->dwarf2_find_line_info);
11342 return found;
11343 }
11344
11345 /* Adjust a symbol defined by a dynamic object and referenced by a
11346 regular object. The current definition is in some section of the
11347 dynamic object, but we're not including those sections. We have to
11348 change the definition to something the rest of the link can
11349 understand. */
11350
11351 static bfd_boolean
11352 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11353 struct elf_link_hash_entry * h)
11354 {
11355 bfd * dynobj;
11356 asection * s;
11357 struct elf32_arm_link_hash_entry * eh;
11358 struct elf32_arm_link_hash_table *globals;
11359
11360 globals = elf32_arm_hash_table (info);
11361 if (globals == NULL)
11362 return FALSE;
11363
11364 dynobj = elf_hash_table (info)->dynobj;
11365
11366 /* Make sure we know what is going on here. */
11367 BFD_ASSERT (dynobj != NULL
11368 && (h->needs_plt
11369 || h->u.weakdef != NULL
11370 || (h->def_dynamic
11371 && h->ref_regular
11372 && !h->def_regular)));
11373
11374 eh = (struct elf32_arm_link_hash_entry *) h;
11375
11376 /* If this is a function, put it in the procedure linkage table. We
11377 will fill in the contents of the procedure linkage table later,
11378 when we know the address of the .got section. */
11379 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
11380 || h->needs_plt)
11381 {
11382 if (h->plt.refcount <= 0
11383 || SYMBOL_CALLS_LOCAL (info, h)
11384 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11385 && h->root.type == bfd_link_hash_undefweak))
11386 {
11387 /* This case can occur if we saw a PLT32 reloc in an input
11388 file, but the symbol was never referred to by a dynamic
11389 object, or if all references were garbage collected. In
11390 such a case, we don't actually need to build a procedure
11391 linkage table, and we can just do a PC24 reloc instead. */
11392 h->plt.offset = (bfd_vma) -1;
11393 eh->plt_thumb_refcount = 0;
11394 eh->plt_maybe_thumb_refcount = 0;
11395 h->needs_plt = 0;
11396 }
11397
11398 return TRUE;
11399 }
11400 else
11401 {
11402 /* It's possible that we incorrectly decided a .plt reloc was
11403 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11404 in check_relocs. We can't decide accurately between function
11405 and non-function syms in check-relocs; Objects loaded later in
11406 the link may change h->type. So fix it now. */
11407 h->plt.offset = (bfd_vma) -1;
11408 eh->plt_thumb_refcount = 0;
11409 eh->plt_maybe_thumb_refcount = 0;
11410 }
11411
11412 /* If this is a weak symbol, and there is a real definition, the
11413 processor independent code will have arranged for us to see the
11414 real definition first, and we can just use the same value. */
11415 if (h->u.weakdef != NULL)
11416 {
11417 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11418 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11419 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11420 h->root.u.def.value = h->u.weakdef->root.u.def.value;
11421 return TRUE;
11422 }
11423
11424 /* If there are no non-GOT references, we do not need a copy
11425 relocation. */
11426 if (!h->non_got_ref)
11427 return TRUE;
11428
11429 /* This is a reference to a symbol defined by a dynamic object which
11430 is not a function. */
11431
11432 /* If we are creating a shared library, we must presume that the
11433 only references to the symbol are via the global offset table.
11434 For such cases we need not do anything here; the relocations will
11435 be handled correctly by relocate_section. Relocatable executables
11436 can reference data in shared objects directly, so we don't need to
11437 do anything here. */
11438 if (info->shared || globals->root.is_relocatable_executable)
11439 return TRUE;
11440
11441 if (h->size == 0)
11442 {
11443 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11444 h->root.root.string);
11445 return TRUE;
11446 }
11447
11448 /* We must allocate the symbol in our .dynbss section, which will
11449 become part of the .bss section of the executable. There will be
11450 an entry for this symbol in the .dynsym section. The dynamic
11451 object will contain position independent code, so all references
11452 from the dynamic object to this symbol will go through the global
11453 offset table. The dynamic linker will use the .dynsym entry to
11454 determine the address it must put in the global offset table, so
11455 both the dynamic object and the regular object will refer to the
11456 same memory location for the variable. */
11457 s = bfd_get_section_by_name (dynobj, ".dynbss");
11458 BFD_ASSERT (s != NULL);
11459
11460 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11461 copy the initial value out of the dynamic object and into the
11462 runtime process image. We need to remember the offset into the
11463 .rel(a).bss section we are going to use. */
11464 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11465 {
11466 asection *srel;
11467
11468 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
11469 BFD_ASSERT (srel != NULL);
11470 srel->size += RELOC_SIZE (globals);
11471 h->needs_copy = 1;
11472 }
11473
11474 return _bfd_elf_adjust_dynamic_copy (h, s);
11475 }
11476
11477 /* Allocate space in .plt, .got and associated reloc sections for
11478 dynamic relocs. */
11479
11480 static bfd_boolean
11481 allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
11482 {
11483 struct bfd_link_info *info;
11484 struct elf32_arm_link_hash_table *htab;
11485 struct elf32_arm_link_hash_entry *eh;
11486 struct elf32_arm_relocs_copied *p;
11487 bfd_signed_vma thumb_refs;
11488
11489 eh = (struct elf32_arm_link_hash_entry *) h;
11490
11491 if (h->root.type == bfd_link_hash_indirect)
11492 return TRUE;
11493
11494 if (h->root.type == bfd_link_hash_warning)
11495 /* When warning symbols are created, they **replace** the "real"
11496 entry in the hash table, thus we never get to see the real
11497 symbol in a hash traversal. So look at it now. */
11498 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11499
11500 info = (struct bfd_link_info *) inf;
11501 htab = elf32_arm_hash_table (info);
11502 if (htab == NULL)
11503 return FALSE;
11504
11505 if (htab->root.dynamic_sections_created
11506 && h->plt.refcount > 0)
11507 {
11508 /* Make sure this symbol is output as a dynamic symbol.
11509 Undefined weak syms won't yet be marked as dynamic. */
11510 if (h->dynindx == -1
11511 && !h->forced_local)
11512 {
11513 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11514 return FALSE;
11515 }
11516
11517 if (info->shared
11518 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
11519 {
11520 asection *s = htab->splt;
11521
11522 /* If this is the first .plt entry, make room for the special
11523 first entry. */
11524 if (s->size == 0)
11525 s->size += htab->plt_header_size;
11526
11527 h->plt.offset = s->size;
11528
11529 /* If we will insert a Thumb trampoline before this PLT, leave room
11530 for it. */
11531 thumb_refs = eh->plt_thumb_refcount;
11532 if (!htab->use_blx)
11533 thumb_refs += eh->plt_maybe_thumb_refcount;
11534
11535 if (thumb_refs > 0)
11536 {
11537 h->plt.offset += PLT_THUMB_STUB_SIZE;
11538 s->size += PLT_THUMB_STUB_SIZE;
11539 }
11540
11541 /* If this symbol is not defined in a regular file, and we are
11542 not generating a shared library, then set the symbol to this
11543 location in the .plt. This is required to make function
11544 pointers compare as equal between the normal executable and
11545 the shared library. */
11546 if (! info->shared
11547 && !h->def_regular)
11548 {
11549 h->root.u.def.section = s;
11550 h->root.u.def.value = h->plt.offset;
11551
11552 /* Make sure the function is not marked as Thumb, in case
11553 it is the target of an ABS32 relocation, which will
11554 point to the PLT entry. */
11555 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11556 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11557 }
11558
11559 /* Make room for this entry. */
11560 s->size += htab->plt_entry_size;
11561
11562 if (!htab->symbian_p)
11563 {
11564 /* We also need to make an entry in the .got.plt section, which
11565 will be placed in the .got section by the linker script. */
11566 eh->plt_got_offset = htab->sgotplt->size;
11567 htab->sgotplt->size += 4;
11568 }
11569
11570 /* We also need to make an entry in the .rel(a).plt section. */
11571 htab->srelplt->size += RELOC_SIZE (htab);
11572
11573 /* VxWorks executables have a second set of relocations for
11574 each PLT entry. They go in a separate relocation section,
11575 which is processed by the kernel loader. */
11576 if (htab->vxworks_p && !info->shared)
11577 {
11578 /* There is a relocation for the initial PLT entry:
11579 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11580 if (h->plt.offset == htab->plt_header_size)
11581 htab->srelplt2->size += RELOC_SIZE (htab);
11582
11583 /* There are two extra relocations for each subsequent
11584 PLT entry: an R_ARM_32 relocation for the GOT entry,
11585 and an R_ARM_32 relocation for the PLT entry. */
11586 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11587 }
11588 }
11589 else
11590 {
11591 h->plt.offset = (bfd_vma) -1;
11592 h->needs_plt = 0;
11593 }
11594 }
11595 else
11596 {
11597 h->plt.offset = (bfd_vma) -1;
11598 h->needs_plt = 0;
11599 }
11600
11601 if (h->got.refcount > 0)
11602 {
11603 asection *s;
11604 bfd_boolean dyn;
11605 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11606 int indx;
11607
11608 /* Make sure this symbol is output as a dynamic symbol.
11609 Undefined weak syms won't yet be marked as dynamic. */
11610 if (h->dynindx == -1
11611 && !h->forced_local)
11612 {
11613 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11614 return FALSE;
11615 }
11616
11617 if (!htab->symbian_p)
11618 {
11619 s = htab->sgot;
11620 h->got.offset = s->size;
11621
11622 if (tls_type == GOT_UNKNOWN)
11623 abort ();
11624
11625 if (tls_type == GOT_NORMAL)
11626 /* Non-TLS symbols need one GOT slot. */
11627 s->size += 4;
11628 else
11629 {
11630 if (tls_type & GOT_TLS_GD)
11631 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11632 s->size += 8;
11633 if (tls_type & GOT_TLS_IE)
11634 /* R_ARM_TLS_IE32 needs one GOT slot. */
11635 s->size += 4;
11636 }
11637
11638 dyn = htab->root.dynamic_sections_created;
11639
11640 indx = 0;
11641 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11642 && (!info->shared
11643 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11644 indx = h->dynindx;
11645
11646 if (tls_type != GOT_NORMAL
11647 && (info->shared || indx != 0)
11648 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11649 || h->root.type != bfd_link_hash_undefweak))
11650 {
11651 if (tls_type & GOT_TLS_IE)
11652 htab->srelgot->size += RELOC_SIZE (htab);
11653
11654 if (tls_type & GOT_TLS_GD)
11655 htab->srelgot->size += RELOC_SIZE (htab);
11656
11657 if ((tls_type & GOT_TLS_GD) && indx != 0)
11658 htab->srelgot->size += RELOC_SIZE (htab);
11659 }
11660 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11661 || h->root.type != bfd_link_hash_undefweak)
11662 && (info->shared
11663 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
11664 htab->srelgot->size += RELOC_SIZE (htab);
11665 }
11666 }
11667 else
11668 h->got.offset = (bfd_vma) -1;
11669
11670 /* Allocate stubs for exported Thumb functions on v4t. */
11671 if (!htab->use_blx && h->dynindx != -1
11672 && h->def_regular
11673 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11674 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11675 {
11676 struct elf_link_hash_entry * th;
11677 struct bfd_link_hash_entry * bh;
11678 struct elf_link_hash_entry * myh;
11679 char name[1024];
11680 asection *s;
11681 bh = NULL;
11682 /* Create a new symbol to regist the real location of the function. */
11683 s = h->root.u.def.section;
11684 sprintf (name, "__real_%s", h->root.root.string);
11685 _bfd_generic_link_add_one_symbol (info, s->owner,
11686 name, BSF_GLOBAL, s,
11687 h->root.u.def.value,
11688 NULL, TRUE, FALSE, &bh);
11689
11690 myh = (struct elf_link_hash_entry *) bh;
11691 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11692 myh->forced_local = 1;
11693 eh->export_glue = myh;
11694 th = record_arm_to_thumb_glue (info, h);
11695 /* Point the symbol at the stub. */
11696 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11697 h->root.u.def.section = th->root.u.def.section;
11698 h->root.u.def.value = th->root.u.def.value & ~1;
11699 }
11700
11701 if (eh->relocs_copied == NULL)
11702 return TRUE;
11703
11704 /* In the shared -Bsymbolic case, discard space allocated for
11705 dynamic pc-relative relocs against symbols which turn out to be
11706 defined in regular objects. For the normal shared case, discard
11707 space for pc-relative relocs that have become local due to symbol
11708 visibility changes. */
11709
11710 if (info->shared || htab->root.is_relocatable_executable)
11711 {
11712 /* The only relocs that use pc_count are R_ARM_REL32 and
11713 R_ARM_REL32_NOI, which will appear on something like
11714 ".long foo - .". We want calls to protected symbols to resolve
11715 directly to the function rather than going via the plt. If people
11716 want function pointer comparisons to work as expected then they
11717 should avoid writing assembly like ".long foo - .". */
11718 if (SYMBOL_CALLS_LOCAL (info, h))
11719 {
11720 struct elf32_arm_relocs_copied **pp;
11721
11722 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11723 {
11724 p->count -= p->pc_count;
11725 p->pc_count = 0;
11726 if (p->count == 0)
11727 *pp = p->next;
11728 else
11729 pp = &p->next;
11730 }
11731 }
11732
11733 if (htab->vxworks_p)
11734 {
11735 struct elf32_arm_relocs_copied **pp;
11736
11737 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11738 {
11739 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11740 *pp = p->next;
11741 else
11742 pp = &p->next;
11743 }
11744 }
11745
11746 /* Also discard relocs on undefined weak syms with non-default
11747 visibility. */
11748 if (eh->relocs_copied != NULL
11749 && h->root.type == bfd_link_hash_undefweak)
11750 {
11751 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11752 eh->relocs_copied = NULL;
11753
11754 /* Make sure undefined weak symbols are output as a dynamic
11755 symbol in PIEs. */
11756 else if (h->dynindx == -1
11757 && !h->forced_local)
11758 {
11759 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11760 return FALSE;
11761 }
11762 }
11763
11764 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11765 && h->root.type == bfd_link_hash_new)
11766 {
11767 /* Output absolute symbols so that we can create relocations
11768 against them. For normal symbols we output a relocation
11769 against the section that contains them. */
11770 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11771 return FALSE;
11772 }
11773
11774 }
11775 else
11776 {
11777 /* For the non-shared case, discard space for relocs against
11778 symbols which turn out to need copy relocs or are not
11779 dynamic. */
11780
11781 if (!h->non_got_ref
11782 && ((h->def_dynamic
11783 && !h->def_regular)
11784 || (htab->root.dynamic_sections_created
11785 && (h->root.type == bfd_link_hash_undefweak
11786 || h->root.type == bfd_link_hash_undefined))))
11787 {
11788 /* Make sure this symbol is output as a dynamic symbol.
11789 Undefined weak syms won't yet be marked as dynamic. */
11790 if (h->dynindx == -1
11791 && !h->forced_local)
11792 {
11793 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11794 return FALSE;
11795 }
11796
11797 /* If that succeeded, we know we'll be keeping all the
11798 relocs. */
11799 if (h->dynindx != -1)
11800 goto keep;
11801 }
11802
11803 eh->relocs_copied = NULL;
11804
11805 keep: ;
11806 }
11807
11808 /* Finally, allocate space. */
11809 for (p = eh->relocs_copied; p != NULL; p = p->next)
11810 {
11811 asection *sreloc = elf_section_data (p->section)->sreloc;
11812 sreloc->size += p->count * RELOC_SIZE (htab);
11813 }
11814
11815 return TRUE;
11816 }
11817
11818 /* Find any dynamic relocs that apply to read-only sections. */
11819
11820 static bfd_boolean
11821 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
11822 {
11823 struct elf32_arm_link_hash_entry * eh;
11824 struct elf32_arm_relocs_copied * p;
11825
11826 if (h->root.type == bfd_link_hash_warning)
11827 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11828
11829 eh = (struct elf32_arm_link_hash_entry *) h;
11830 for (p = eh->relocs_copied; p != NULL; p = p->next)
11831 {
11832 asection *s = p->section;
11833
11834 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11835 {
11836 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11837
11838 info->flags |= DF_TEXTREL;
11839
11840 /* Not an error, just cut short the traversal. */
11841 return FALSE;
11842 }
11843 }
11844 return TRUE;
11845 }
11846
11847 void
11848 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11849 int byteswap_code)
11850 {
11851 struct elf32_arm_link_hash_table *globals;
11852
11853 globals = elf32_arm_hash_table (info);
11854 if (globals == NULL)
11855 return;
11856
11857 globals->byteswap_code = byteswap_code;
11858 }
11859
11860 /* Set the sizes of the dynamic sections. */
11861
11862 static bfd_boolean
11863 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11864 struct bfd_link_info * info)
11865 {
11866 bfd * dynobj;
11867 asection * s;
11868 bfd_boolean plt;
11869 bfd_boolean relocs;
11870 bfd *ibfd;
11871 struct elf32_arm_link_hash_table *htab;
11872
11873 htab = elf32_arm_hash_table (info);
11874 if (htab == NULL)
11875 return FALSE;
11876
11877 dynobj = elf_hash_table (info)->dynobj;
11878 BFD_ASSERT (dynobj != NULL);
11879 check_use_blx (htab);
11880
11881 if (elf_hash_table (info)->dynamic_sections_created)
11882 {
11883 /* Set the contents of the .interp section to the interpreter. */
11884 if (info->executable)
11885 {
11886 s = bfd_get_section_by_name (dynobj, ".interp");
11887 BFD_ASSERT (s != NULL);
11888 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
11889 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11890 }
11891 }
11892
11893 /* Set up .got offsets for local syms, and space for local dynamic
11894 relocs. */
11895 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
11896 {
11897 bfd_signed_vma *local_got;
11898 bfd_signed_vma *end_local_got;
11899 char *local_tls_type;
11900 bfd_size_type locsymcount;
11901 Elf_Internal_Shdr *symtab_hdr;
11902 asection *srel;
11903 bfd_boolean is_vxworks = htab->vxworks_p;
11904
11905 if (! is_arm_elf (ibfd))
11906 continue;
11907
11908 for (s = ibfd->sections; s != NULL; s = s->next)
11909 {
11910 struct elf32_arm_relocs_copied *p;
11911
11912 for (p = (struct elf32_arm_relocs_copied *)
11913 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
11914 {
11915 if (!bfd_is_abs_section (p->section)
11916 && bfd_is_abs_section (p->section->output_section))
11917 {
11918 /* Input section has been discarded, either because
11919 it is a copy of a linkonce section or due to
11920 linker script /DISCARD/, so we'll be discarding
11921 the relocs too. */
11922 }
11923 else if (is_vxworks
11924 && strcmp (p->section->output_section->name,
11925 ".tls_vars") == 0)
11926 {
11927 /* Relocations in vxworks .tls_vars sections are
11928 handled specially by the loader. */
11929 }
11930 else if (p->count != 0)
11931 {
11932 srel = elf_section_data (p->section)->sreloc;
11933 srel->size += p->count * RELOC_SIZE (htab);
11934 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11935 info->flags |= DF_TEXTREL;
11936 }
11937 }
11938 }
11939
11940 local_got = elf_local_got_refcounts (ibfd);
11941 if (!local_got)
11942 continue;
11943
11944 symtab_hdr = & elf_symtab_hdr (ibfd);
11945 locsymcount = symtab_hdr->sh_info;
11946 end_local_got = local_got + locsymcount;
11947 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
11948 s = htab->sgot;
11949 srel = htab->srelgot;
11950 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11951 {
11952 if (*local_got > 0)
11953 {
11954 *local_got = s->size;
11955 if (*local_tls_type & GOT_TLS_GD)
11956 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11957 s->size += 8;
11958 if (*local_tls_type & GOT_TLS_IE)
11959 s->size += 4;
11960 if (*local_tls_type == GOT_NORMAL)
11961 s->size += 4;
11962
11963 if (info->shared || *local_tls_type == GOT_TLS_GD)
11964 srel->size += RELOC_SIZE (htab);
11965 }
11966 else
11967 *local_got = (bfd_vma) -1;
11968 }
11969 }
11970
11971 if (htab->tls_ldm_got.refcount > 0)
11972 {
11973 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11974 for R_ARM_TLS_LDM32 relocations. */
11975 htab->tls_ldm_got.offset = htab->sgot->size;
11976 htab->sgot->size += 8;
11977 if (info->shared)
11978 htab->srelgot->size += RELOC_SIZE (htab);
11979 }
11980 else
11981 htab->tls_ldm_got.offset = -1;
11982
11983 /* Allocate global sym .plt and .got entries, and space for global
11984 sym dynamic relocs. */
11985 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
11986
11987 /* Here we rummage through the found bfds to collect glue information. */
11988 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
11989 {
11990 if (! is_arm_elf (ibfd))
11991 continue;
11992
11993 /* Initialise mapping tables for code/data. */
11994 bfd_elf32_arm_init_maps (ibfd);
11995
11996 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11997 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11998 /* xgettext:c-format */
11999 _bfd_error_handler (_("Errors encountered processing file %s"),
12000 ibfd->filename);
12001 }
12002
12003 /* Allocate space for the glue sections now that we've sized them. */
12004 bfd_elf32_arm_allocate_interworking_sections (info);
12005
12006 /* The check_relocs and adjust_dynamic_symbol entry points have
12007 determined the sizes of the various dynamic sections. Allocate
12008 memory for them. */
12009 plt = FALSE;
12010 relocs = FALSE;
12011 for (s = dynobj->sections; s != NULL; s = s->next)
12012 {
12013 const char * name;
12014
12015 if ((s->flags & SEC_LINKER_CREATED) == 0)
12016 continue;
12017
12018 /* It's OK to base decisions on the section name, because none
12019 of the dynobj section names depend upon the input files. */
12020 name = bfd_get_section_name (dynobj, s);
12021
12022 if (strcmp (name, ".plt") == 0)
12023 {
12024 /* Remember whether there is a PLT. */
12025 plt = s->size != 0;
12026 }
12027 else if (CONST_STRNEQ (name, ".rel"))
12028 {
12029 if (s->size != 0)
12030 {
12031 /* Remember whether there are any reloc sections other
12032 than .rel(a).plt and .rela.plt.unloaded. */
12033 if (s != htab->srelplt && s != htab->srelplt2)
12034 relocs = TRUE;
12035
12036 /* We use the reloc_count field as a counter if we need
12037 to copy relocs into the output file. */
12038 s->reloc_count = 0;
12039 }
12040 }
12041 else if (! CONST_STRNEQ (name, ".got")
12042 && strcmp (name, ".dynbss") != 0)
12043 {
12044 /* It's not one of our sections, so don't allocate space. */
12045 continue;
12046 }
12047
12048 if (s->size == 0)
12049 {
12050 /* If we don't need this section, strip it from the
12051 output file. This is mostly to handle .rel(a).bss and
12052 .rel(a).plt. We must create both sections in
12053 create_dynamic_sections, because they must be created
12054 before the linker maps input sections to output
12055 sections. The linker does that before
12056 adjust_dynamic_symbol is called, and it is that
12057 function which decides whether anything needs to go
12058 into these sections. */
12059 s->flags |= SEC_EXCLUDE;
12060 continue;
12061 }
12062
12063 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12064 continue;
12065
12066 /* Allocate memory for the section contents. */
12067 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
12068 if (s->contents == NULL)
12069 return FALSE;
12070 }
12071
12072 if (elf_hash_table (info)->dynamic_sections_created)
12073 {
12074 /* Add some entries to the .dynamic section. We fill in the
12075 values later, in elf32_arm_finish_dynamic_sections, but we
12076 must add the entries now so that we get the correct size for
12077 the .dynamic section. The DT_DEBUG entry is filled in by the
12078 dynamic linker and used by the debugger. */
12079 #define add_dynamic_entry(TAG, VAL) \
12080 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
12081
12082 if (info->executable)
12083 {
12084 if (!add_dynamic_entry (DT_DEBUG, 0))
12085 return FALSE;
12086 }
12087
12088 if (plt)
12089 {
12090 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12091 || !add_dynamic_entry (DT_PLTRELSZ, 0)
12092 || !add_dynamic_entry (DT_PLTREL,
12093 htab->use_rel ? DT_REL : DT_RELA)
12094 || !add_dynamic_entry (DT_JMPREL, 0))
12095 return FALSE;
12096 }
12097
12098 if (relocs)
12099 {
12100 if (htab->use_rel)
12101 {
12102 if (!add_dynamic_entry (DT_REL, 0)
12103 || !add_dynamic_entry (DT_RELSZ, 0)
12104 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12105 return FALSE;
12106 }
12107 else
12108 {
12109 if (!add_dynamic_entry (DT_RELA, 0)
12110 || !add_dynamic_entry (DT_RELASZ, 0)
12111 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12112 return FALSE;
12113 }
12114 }
12115
12116 /* If any dynamic relocs apply to a read-only section,
12117 then we need a DT_TEXTREL entry. */
12118 if ((info->flags & DF_TEXTREL) == 0)
12119 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12120 info);
12121
12122 if ((info->flags & DF_TEXTREL) != 0)
12123 {
12124 if (!add_dynamic_entry (DT_TEXTREL, 0))
12125 return FALSE;
12126 }
12127 if (htab->vxworks_p
12128 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12129 return FALSE;
12130 }
12131 #undef add_dynamic_entry
12132
12133 return TRUE;
12134 }
12135
12136 /* Finish up dynamic symbol handling. We set the contents of various
12137 dynamic sections here. */
12138
12139 static bfd_boolean
12140 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12141 struct bfd_link_info * info,
12142 struct elf_link_hash_entry * h,
12143 Elf_Internal_Sym * sym)
12144 {
12145 bfd * dynobj;
12146 struct elf32_arm_link_hash_table *htab;
12147 struct elf32_arm_link_hash_entry *eh;
12148
12149 dynobj = elf_hash_table (info)->dynobj;
12150 htab = elf32_arm_hash_table (info);
12151 if (htab == NULL)
12152 return FALSE;
12153
12154 eh = (struct elf32_arm_link_hash_entry *) h;
12155
12156 if (h->plt.offset != (bfd_vma) -1)
12157 {
12158 asection * splt;
12159 asection * srel;
12160 bfd_byte *loc;
12161 bfd_vma plt_index;
12162 Elf_Internal_Rela rel;
12163
12164 /* This symbol has an entry in the procedure linkage table. Set
12165 it up. */
12166
12167 BFD_ASSERT (h->dynindx != -1);
12168
12169 splt = bfd_get_section_by_name (dynobj, ".plt");
12170 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
12171 BFD_ASSERT (splt != NULL && srel != NULL);
12172
12173 /* Fill in the entry in the procedure linkage table. */
12174 if (htab->symbian_p)
12175 {
12176 put_arm_insn (htab, output_bfd,
12177 elf32_arm_symbian_plt_entry[0],
12178 splt->contents + h->plt.offset);
12179 bfd_put_32 (output_bfd,
12180 elf32_arm_symbian_plt_entry[1],
12181 splt->contents + h->plt.offset + 4);
12182
12183 /* Fill in the entry in the .rel.plt section. */
12184 rel.r_offset = (splt->output_section->vma
12185 + splt->output_offset
12186 + h->plt.offset + 4);
12187 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12188
12189 /* Get the index in the procedure linkage table which
12190 corresponds to this symbol. This is the index of this symbol
12191 in all the symbols for which we are making plt entries. The
12192 first entry in the procedure linkage table is reserved. */
12193 plt_index = ((h->plt.offset - htab->plt_header_size)
12194 / htab->plt_entry_size);
12195 }
12196 else
12197 {
12198 bfd_vma got_offset, got_address, plt_address;
12199 bfd_vma got_displacement;
12200 asection * sgot;
12201 bfd_byte * ptr;
12202
12203 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12204 BFD_ASSERT (sgot != NULL);
12205
12206 /* Get the offset into the .got.plt table of the entry that
12207 corresponds to this function. */
12208 got_offset = eh->plt_got_offset;
12209
12210 /* Get the index in the procedure linkage table which
12211 corresponds to this symbol. This is the index of this symbol
12212 in all the symbols for which we are making plt entries. The
12213 first three entries in .got.plt are reserved; after that
12214 symbols appear in the same order as in .plt. */
12215 plt_index = (got_offset - 12) / 4;
12216
12217 /* Calculate the address of the GOT entry. */
12218 got_address = (sgot->output_section->vma
12219 + sgot->output_offset
12220 + got_offset);
12221
12222 /* ...and the address of the PLT entry. */
12223 plt_address = (splt->output_section->vma
12224 + splt->output_offset
12225 + h->plt.offset);
12226
12227 ptr = htab->splt->contents + h->plt.offset;
12228 if (htab->vxworks_p && info->shared)
12229 {
12230 unsigned int i;
12231 bfd_vma val;
12232
12233 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
12234 {
12235 val = elf32_arm_vxworks_shared_plt_entry[i];
12236 if (i == 2)
12237 val |= got_address - sgot->output_section->vma;
12238 if (i == 5)
12239 val |= plt_index * RELOC_SIZE (htab);
12240 if (i == 2 || i == 5)
12241 bfd_put_32 (output_bfd, val, ptr);
12242 else
12243 put_arm_insn (htab, output_bfd, val, ptr);
12244 }
12245 }
12246 else if (htab->vxworks_p)
12247 {
12248 unsigned int i;
12249 bfd_vma val;
12250
12251 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
12252 {
12253 val = elf32_arm_vxworks_exec_plt_entry[i];
12254 if (i == 2)
12255 val |= got_address;
12256 if (i == 4)
12257 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12258 if (i == 5)
12259 val |= plt_index * RELOC_SIZE (htab);
12260 if (i == 2 || i == 5)
12261 bfd_put_32 (output_bfd, val, ptr);
12262 else
12263 put_arm_insn (htab, output_bfd, val, ptr);
12264 }
12265
12266 loc = (htab->srelplt2->contents
12267 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12268
12269 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12270 referencing the GOT for this PLT entry. */
12271 rel.r_offset = plt_address + 8;
12272 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12273 rel.r_addend = got_offset;
12274 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12275 loc += RELOC_SIZE (htab);
12276
12277 /* Create the R_ARM_ABS32 relocation referencing the
12278 beginning of the PLT for this GOT entry. */
12279 rel.r_offset = got_address;
12280 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12281 rel.r_addend = 0;
12282 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12283 }
12284 else
12285 {
12286 bfd_signed_vma thumb_refs;
12287 /* Calculate the displacement between the PLT slot and the
12288 entry in the GOT. The eight-byte offset accounts for the
12289 value produced by adding to pc in the first instruction
12290 of the PLT stub. */
12291 got_displacement = got_address - (plt_address + 8);
12292
12293 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12294
12295 thumb_refs = eh->plt_thumb_refcount;
12296 if (!htab->use_blx)
12297 thumb_refs += eh->plt_maybe_thumb_refcount;
12298
12299 if (thumb_refs > 0)
12300 {
12301 put_thumb_insn (htab, output_bfd,
12302 elf32_arm_plt_thumb_stub[0], ptr - 4);
12303 put_thumb_insn (htab, output_bfd,
12304 elf32_arm_plt_thumb_stub[1], ptr - 2);
12305 }
12306
12307 put_arm_insn (htab, output_bfd,
12308 elf32_arm_plt_entry[0]
12309 | ((got_displacement & 0x0ff00000) >> 20),
12310 ptr + 0);
12311 put_arm_insn (htab, output_bfd,
12312 elf32_arm_plt_entry[1]
12313 | ((got_displacement & 0x000ff000) >> 12),
12314 ptr+ 4);
12315 put_arm_insn (htab, output_bfd,
12316 elf32_arm_plt_entry[2]
12317 | (got_displacement & 0x00000fff),
12318 ptr + 8);
12319 #ifdef FOUR_WORD_PLT
12320 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
12321 #endif
12322 }
12323
12324 /* Fill in the entry in the global offset table. */
12325 bfd_put_32 (output_bfd,
12326 (splt->output_section->vma
12327 + splt->output_offset),
12328 sgot->contents + got_offset);
12329
12330 /* Fill in the entry in the .rel(a).plt section. */
12331 rel.r_addend = 0;
12332 rel.r_offset = got_address;
12333 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12334 }
12335
12336 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12337 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12338
12339 if (!h->def_regular)
12340 {
12341 /* Mark the symbol as undefined, rather than as defined in
12342 the .plt section. Leave the value alone. */
12343 sym->st_shndx = SHN_UNDEF;
12344 /* If the symbol is weak, we do need to clear the value.
12345 Otherwise, the PLT entry would provide a definition for
12346 the symbol even if the symbol wasn't defined anywhere,
12347 and so the symbol would never be NULL. */
12348 if (!h->ref_regular_nonweak)
12349 sym->st_value = 0;
12350 }
12351 }
12352
12353 if (h->got.offset != (bfd_vma) -1
12354 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12355 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
12356 {
12357 asection * sgot;
12358 asection * srel;
12359 Elf_Internal_Rela rel;
12360 bfd_byte *loc;
12361 bfd_vma offset;
12362
12363 /* This symbol has an entry in the global offset table. Set it
12364 up. */
12365 sgot = bfd_get_section_by_name (dynobj, ".got");
12366 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
12367 BFD_ASSERT (sgot != NULL && srel != NULL);
12368
12369 offset = (h->got.offset & ~(bfd_vma) 1);
12370 rel.r_addend = 0;
12371 rel.r_offset = (sgot->output_section->vma
12372 + sgot->output_offset
12373 + offset);
12374
12375 /* If this is a static link, or it is a -Bsymbolic link and the
12376 symbol is defined locally or was forced to be local because
12377 of a version file, we just want to emit a RELATIVE reloc.
12378 The entry in the global offset table will already have been
12379 initialized in the relocate_section function. */
12380 if (info->shared
12381 && SYMBOL_REFERENCES_LOCAL (info, h))
12382 {
12383 BFD_ASSERT ((h->got.offset & 1) != 0);
12384 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12385 if (!htab->use_rel)
12386 {
12387 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12388 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12389 }
12390 }
12391 else
12392 {
12393 BFD_ASSERT ((h->got.offset & 1) == 0);
12394 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12395 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12396 }
12397
12398 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12399 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12400 }
12401
12402 if (h->needs_copy)
12403 {
12404 asection * s;
12405 Elf_Internal_Rela rel;
12406 bfd_byte *loc;
12407
12408 /* This symbol needs a copy reloc. Set it up. */
12409 BFD_ASSERT (h->dynindx != -1
12410 && (h->root.type == bfd_link_hash_defined
12411 || h->root.type == bfd_link_hash_defweak));
12412
12413 s = bfd_get_section_by_name (h->root.u.def.section->owner,
12414 RELOC_SECTION (htab, ".bss"));
12415 BFD_ASSERT (s != NULL);
12416
12417 rel.r_addend = 0;
12418 rel.r_offset = (h->root.u.def.value
12419 + h->root.u.def.section->output_section->vma
12420 + h->root.u.def.section->output_offset);
12421 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
12422 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12423 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12424 }
12425
12426 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12427 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12428 to the ".got" section. */
12429 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
12430 || (!htab->vxworks_p && h == htab->root.hgot))
12431 sym->st_shndx = SHN_ABS;
12432
12433 return TRUE;
12434 }
12435
12436 /* Finish up the dynamic sections. */
12437
12438 static bfd_boolean
12439 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
12440 {
12441 bfd * dynobj;
12442 asection * sgot;
12443 asection * sdyn;
12444 struct elf32_arm_link_hash_table *htab;
12445
12446 htab = elf32_arm_hash_table (info);
12447 if (htab == NULL)
12448 return FALSE;
12449
12450 dynobj = elf_hash_table (info)->dynobj;
12451
12452 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12453 BFD_ASSERT (htab->symbian_p || sgot != NULL);
12454 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12455
12456 if (elf_hash_table (info)->dynamic_sections_created)
12457 {
12458 asection *splt;
12459 Elf32_External_Dyn *dyncon, *dynconend;
12460
12461 splt = bfd_get_section_by_name (dynobj, ".plt");
12462 BFD_ASSERT (splt != NULL && sdyn != NULL);
12463
12464 dyncon = (Elf32_External_Dyn *) sdyn->contents;
12465 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
12466
12467 for (; dyncon < dynconend; dyncon++)
12468 {
12469 Elf_Internal_Dyn dyn;
12470 const char * name;
12471 asection * s;
12472
12473 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12474
12475 switch (dyn.d_tag)
12476 {
12477 unsigned int type;
12478
12479 default:
12480 if (htab->vxworks_p
12481 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12482 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12483 break;
12484
12485 case DT_HASH:
12486 name = ".hash";
12487 goto get_vma_if_bpabi;
12488 case DT_STRTAB:
12489 name = ".dynstr";
12490 goto get_vma_if_bpabi;
12491 case DT_SYMTAB:
12492 name = ".dynsym";
12493 goto get_vma_if_bpabi;
12494 case DT_VERSYM:
12495 name = ".gnu.version";
12496 goto get_vma_if_bpabi;
12497 case DT_VERDEF:
12498 name = ".gnu.version_d";
12499 goto get_vma_if_bpabi;
12500 case DT_VERNEED:
12501 name = ".gnu.version_r";
12502 goto get_vma_if_bpabi;
12503
12504 case DT_PLTGOT:
12505 name = ".got";
12506 goto get_vma;
12507 case DT_JMPREL:
12508 name = RELOC_SECTION (htab, ".plt");
12509 get_vma:
12510 s = bfd_get_section_by_name (output_bfd, name);
12511 BFD_ASSERT (s != NULL);
12512 if (!htab->symbian_p)
12513 dyn.d_un.d_ptr = s->vma;
12514 else
12515 /* In the BPABI, tags in the PT_DYNAMIC section point
12516 at the file offset, not the memory address, for the
12517 convenience of the post linker. */
12518 dyn.d_un.d_ptr = s->filepos;
12519 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12520 break;
12521
12522 get_vma_if_bpabi:
12523 if (htab->symbian_p)
12524 goto get_vma;
12525 break;
12526
12527 case DT_PLTRELSZ:
12528 s = bfd_get_section_by_name (output_bfd,
12529 RELOC_SECTION (htab, ".plt"));
12530 BFD_ASSERT (s != NULL);
12531 dyn.d_un.d_val = s->size;
12532 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12533 break;
12534
12535 case DT_RELSZ:
12536 case DT_RELASZ:
12537 if (!htab->symbian_p)
12538 {
12539 /* My reading of the SVR4 ABI indicates that the
12540 procedure linkage table relocs (DT_JMPREL) should be
12541 included in the overall relocs (DT_REL). This is
12542 what Solaris does. However, UnixWare can not handle
12543 that case. Therefore, we override the DT_RELSZ entry
12544 here to make it not include the JMPREL relocs. Since
12545 the linker script arranges for .rel(a).plt to follow all
12546 other relocation sections, we don't have to worry
12547 about changing the DT_REL entry. */
12548 s = bfd_get_section_by_name (output_bfd,
12549 RELOC_SECTION (htab, ".plt"));
12550 if (s != NULL)
12551 dyn.d_un.d_val -= s->size;
12552 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12553 break;
12554 }
12555 /* Fall through. */
12556
12557 case DT_REL:
12558 case DT_RELA:
12559 /* In the BPABI, the DT_REL tag must point at the file
12560 offset, not the VMA, of the first relocation
12561 section. So, we use code similar to that in
12562 elflink.c, but do not check for SHF_ALLOC on the
12563 relcoation section, since relocations sections are
12564 never allocated under the BPABI. The comments above
12565 about Unixware notwithstanding, we include all of the
12566 relocations here. */
12567 if (htab->symbian_p)
12568 {
12569 unsigned int i;
12570 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12571 ? SHT_REL : SHT_RELA);
12572 dyn.d_un.d_val = 0;
12573 for (i = 1; i < elf_numsections (output_bfd); i++)
12574 {
12575 Elf_Internal_Shdr *hdr
12576 = elf_elfsections (output_bfd)[i];
12577 if (hdr->sh_type == type)
12578 {
12579 if (dyn.d_tag == DT_RELSZ
12580 || dyn.d_tag == DT_RELASZ)
12581 dyn.d_un.d_val += hdr->sh_size;
12582 else if ((ufile_ptr) hdr->sh_offset
12583 <= dyn.d_un.d_val - 1)
12584 dyn.d_un.d_val = hdr->sh_offset;
12585 }
12586 }
12587 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12588 }
12589 break;
12590
12591 /* Set the bottom bit of DT_INIT/FINI if the
12592 corresponding function is Thumb. */
12593 case DT_INIT:
12594 name = info->init_function;
12595 goto get_sym;
12596 case DT_FINI:
12597 name = info->fini_function;
12598 get_sym:
12599 /* If it wasn't set by elf_bfd_final_link
12600 then there is nothing to adjust. */
12601 if (dyn.d_un.d_val != 0)
12602 {
12603 struct elf_link_hash_entry * eh;
12604
12605 eh = elf_link_hash_lookup (elf_hash_table (info), name,
12606 FALSE, FALSE, TRUE);
12607 if (eh != NULL
12608 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12609 {
12610 dyn.d_un.d_val |= 1;
12611 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12612 }
12613 }
12614 break;
12615 }
12616 }
12617
12618 /* Fill in the first entry in the procedure linkage table. */
12619 if (splt->size > 0 && htab->plt_header_size)
12620 {
12621 const bfd_vma *plt0_entry;
12622 bfd_vma got_address, plt_address, got_displacement;
12623
12624 /* Calculate the addresses of the GOT and PLT. */
12625 got_address = sgot->output_section->vma + sgot->output_offset;
12626 plt_address = splt->output_section->vma + splt->output_offset;
12627
12628 if (htab->vxworks_p)
12629 {
12630 /* The VxWorks GOT is relocated by the dynamic linker.
12631 Therefore, we must emit relocations rather than simply
12632 computing the values now. */
12633 Elf_Internal_Rela rel;
12634
12635 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
12636 put_arm_insn (htab, output_bfd, plt0_entry[0],
12637 splt->contents + 0);
12638 put_arm_insn (htab, output_bfd, plt0_entry[1],
12639 splt->contents + 4);
12640 put_arm_insn (htab, output_bfd, plt0_entry[2],
12641 splt->contents + 8);
12642 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12643
12644 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
12645 rel.r_offset = plt_address + 12;
12646 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12647 rel.r_addend = 0;
12648 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12649 htab->srelplt2->contents);
12650 }
12651 else
12652 {
12653 got_displacement = got_address - (plt_address + 16);
12654
12655 plt0_entry = elf32_arm_plt0_entry;
12656 put_arm_insn (htab, output_bfd, plt0_entry[0],
12657 splt->contents + 0);
12658 put_arm_insn (htab, output_bfd, plt0_entry[1],
12659 splt->contents + 4);
12660 put_arm_insn (htab, output_bfd, plt0_entry[2],
12661 splt->contents + 8);
12662 put_arm_insn (htab, output_bfd, plt0_entry[3],
12663 splt->contents + 12);
12664
12665 #ifdef FOUR_WORD_PLT
12666 /* The displacement value goes in the otherwise-unused
12667 last word of the second entry. */
12668 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
12669 #else
12670 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
12671 #endif
12672 }
12673 }
12674
12675 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12676 really seem like the right value. */
12677 if (splt->output_section->owner == output_bfd)
12678 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
12679
12680 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12681 {
12682 /* Correct the .rel(a).plt.unloaded relocations. They will have
12683 incorrect symbol indexes. */
12684 int num_plts;
12685 unsigned char *p;
12686
12687 num_plts = ((htab->splt->size - htab->plt_header_size)
12688 / htab->plt_entry_size);
12689 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12690
12691 for (; num_plts; num_plts--)
12692 {
12693 Elf_Internal_Rela rel;
12694
12695 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12696 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12697 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12698 p += RELOC_SIZE (htab);
12699
12700 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12701 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12702 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12703 p += RELOC_SIZE (htab);
12704 }
12705 }
12706 }
12707
12708 /* Fill in the first three entries in the global offset table. */
12709 if (sgot)
12710 {
12711 if (sgot->size > 0)
12712 {
12713 if (sdyn == NULL)
12714 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12715 else
12716 bfd_put_32 (output_bfd,
12717 sdyn->output_section->vma + sdyn->output_offset,
12718 sgot->contents);
12719 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12720 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12721 }
12722
12723 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12724 }
12725
12726 return TRUE;
12727 }
12728
12729 static void
12730 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
12731 {
12732 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
12733 struct elf32_arm_link_hash_table *globals;
12734
12735 i_ehdrp = elf_elfheader (abfd);
12736
12737 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12738 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12739 else
12740 i_ehdrp->e_ident[EI_OSABI] = 0;
12741 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
12742
12743 if (link_info)
12744 {
12745 globals = elf32_arm_hash_table (link_info);
12746 if (globals != NULL && globals->byteswap_code)
12747 i_ehdrp->e_flags |= EF_ARM_BE8;
12748 }
12749 }
12750
12751 static enum elf_reloc_type_class
12752 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
12753 {
12754 switch ((int) ELF32_R_TYPE (rela->r_info))
12755 {
12756 case R_ARM_RELATIVE:
12757 return reloc_class_relative;
12758 case R_ARM_JUMP_SLOT:
12759 return reloc_class_plt;
12760 case R_ARM_COPY:
12761 return reloc_class_copy;
12762 default:
12763 return reloc_class_normal;
12764 }
12765 }
12766
12767 /* Set the right machine number for an Arm ELF file. */
12768
12769 static bfd_boolean
12770 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
12771 {
12772 if (hdr->sh_type == SHT_NOTE)
12773 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12774
12775 return TRUE;
12776 }
12777
12778 static void
12779 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
12780 {
12781 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
12782 }
12783
12784 /* Return TRUE if this is an unwinding table entry. */
12785
12786 static bfd_boolean
12787 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12788 {
12789 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12790 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
12791 }
12792
12793
12794 /* Set the type and flags for an ARM section. We do this by
12795 the section name, which is a hack, but ought to work. */
12796
12797 static bfd_boolean
12798 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12799 {
12800 const char * name;
12801
12802 name = bfd_get_section_name (abfd, sec);
12803
12804 if (is_arm_elf_unwind_section_name (abfd, name))
12805 {
12806 hdr->sh_type = SHT_ARM_EXIDX;
12807 hdr->sh_flags |= SHF_LINK_ORDER;
12808 }
12809 return TRUE;
12810 }
12811
12812 /* Handle an ARM specific section when reading an object file. This is
12813 called when bfd_section_from_shdr finds a section with an unknown
12814 type. */
12815
12816 static bfd_boolean
12817 elf32_arm_section_from_shdr (bfd *abfd,
12818 Elf_Internal_Shdr * hdr,
12819 const char *name,
12820 int shindex)
12821 {
12822 /* There ought to be a place to keep ELF backend specific flags, but
12823 at the moment there isn't one. We just keep track of the
12824 sections by their name, instead. Fortunately, the ABI gives
12825 names for all the ARM specific sections, so we will probably get
12826 away with this. */
12827 switch (hdr->sh_type)
12828 {
12829 case SHT_ARM_EXIDX:
12830 case SHT_ARM_PREEMPTMAP:
12831 case SHT_ARM_ATTRIBUTES:
12832 break;
12833
12834 default:
12835 return FALSE;
12836 }
12837
12838 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
12839 return FALSE;
12840
12841 return TRUE;
12842 }
12843
12844 static _arm_elf_section_data *
12845 get_arm_elf_section_data (asection * sec)
12846 {
12847 if (sec && sec->owner && is_arm_elf (sec->owner))
12848 return elf32_arm_section_data (sec);
12849 else
12850 return NULL;
12851 }
12852
12853 typedef struct
12854 {
12855 void *finfo;
12856 struct bfd_link_info *info;
12857 asection *sec;
12858 int sec_shndx;
12859 int (*func) (void *, const char *, Elf_Internal_Sym *,
12860 asection *, struct elf_link_hash_entry *);
12861 } output_arch_syminfo;
12862
12863 enum map_symbol_type
12864 {
12865 ARM_MAP_ARM,
12866 ARM_MAP_THUMB,
12867 ARM_MAP_DATA
12868 };
12869
12870
12871 /* Output a single mapping symbol. */
12872
12873 static bfd_boolean
12874 elf32_arm_output_map_sym (output_arch_syminfo *osi,
12875 enum map_symbol_type type,
12876 bfd_vma offset)
12877 {
12878 static const char *names[3] = {"$a", "$t", "$d"};
12879 Elf_Internal_Sym sym;
12880
12881 sym.st_value = osi->sec->output_section->vma
12882 + osi->sec->output_offset
12883 + offset;
12884 sym.st_size = 0;
12885 sym.st_other = 0;
12886 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
12887 sym.st_shndx = osi->sec_shndx;
12888 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
12889 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
12890 }
12891
12892
12893 /* Output mapping symbols for PLT entries associated with H. */
12894
12895 static bfd_boolean
12896 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12897 {
12898 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12899 struct elf32_arm_link_hash_table *htab;
12900 struct elf32_arm_link_hash_entry *eh;
12901 bfd_vma addr;
12902
12903 if (h->root.type == bfd_link_hash_indirect)
12904 return TRUE;
12905
12906 if (h->root.type == bfd_link_hash_warning)
12907 /* When warning symbols are created, they **replace** the "real"
12908 entry in the hash table, thus we never get to see the real
12909 symbol in a hash traversal. So look at it now. */
12910 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12911
12912 if (h->plt.offset == (bfd_vma) -1)
12913 return TRUE;
12914
12915 htab = elf32_arm_hash_table (osi->info);
12916 if (htab == NULL)
12917 return FALSE;
12918
12919 eh = (struct elf32_arm_link_hash_entry *) h;
12920 addr = h->plt.offset;
12921 if (htab->symbian_p)
12922 {
12923 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
12924 return FALSE;
12925 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
12926 return FALSE;
12927 }
12928 else if (htab->vxworks_p)
12929 {
12930 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
12931 return FALSE;
12932 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
12933 return FALSE;
12934 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
12935 return FALSE;
12936 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
12937 return FALSE;
12938 }
12939 else
12940 {
12941 bfd_signed_vma thumb_refs;
12942
12943 thumb_refs = eh->plt_thumb_refcount;
12944 if (!htab->use_blx)
12945 thumb_refs += eh->plt_maybe_thumb_refcount;
12946
12947 if (thumb_refs > 0)
12948 {
12949 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
12950 return FALSE;
12951 }
12952 #ifdef FOUR_WORD_PLT
12953 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
12954 return FALSE;
12955 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
12956 return FALSE;
12957 #else
12958 /* A three-word PLT with no Thumb thunk contains only Arm code,
12959 so only need to output a mapping symbol for the first PLT entry and
12960 entries with thumb thunks. */
12961 if (thumb_refs > 0 || addr == 20)
12962 {
12963 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
12964 return FALSE;
12965 }
12966 #endif
12967 }
12968
12969 return TRUE;
12970 }
12971
12972 /* Output a single local symbol for a generated stub. */
12973
12974 static bfd_boolean
12975 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12976 bfd_vma offset, bfd_vma size)
12977 {
12978 Elf_Internal_Sym sym;
12979
12980 sym.st_value = osi->sec->output_section->vma
12981 + osi->sec->output_offset
12982 + offset;
12983 sym.st_size = size;
12984 sym.st_other = 0;
12985 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12986 sym.st_shndx = osi->sec_shndx;
12987 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
12988 }
12989
12990 static bfd_boolean
12991 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12992 void * in_arg)
12993 {
12994 struct elf32_arm_stub_hash_entry *stub_entry;
12995 asection *stub_sec;
12996 bfd_vma addr;
12997 char *stub_name;
12998 output_arch_syminfo *osi;
12999 const insn_sequence *template_sequence;
13000 enum stub_insn_type prev_type;
13001 int size;
13002 int i;
13003 enum map_symbol_type sym_type;
13004
13005 /* Massage our args to the form they really have. */
13006 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13007 osi = (output_arch_syminfo *) in_arg;
13008
13009 stub_sec = stub_entry->stub_sec;
13010
13011 /* Ensure this stub is attached to the current section being
13012 processed. */
13013 if (stub_sec != osi->sec)
13014 return TRUE;
13015
13016 addr = (bfd_vma) stub_entry->stub_offset;
13017 stub_name = stub_entry->output_name;
13018
13019 template_sequence = stub_entry->stub_template;
13020 switch (template_sequence[0].type)
13021 {
13022 case ARM_TYPE:
13023 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
13024 return FALSE;
13025 break;
13026 case THUMB16_TYPE:
13027 case THUMB32_TYPE:
13028 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13029 stub_entry->stub_size))
13030 return FALSE;
13031 break;
13032 default:
13033 BFD_FAIL ();
13034 return 0;
13035 }
13036
13037 prev_type = DATA_TYPE;
13038 size = 0;
13039 for (i = 0; i < stub_entry->stub_template_size; i++)
13040 {
13041 switch (template_sequence[i].type)
13042 {
13043 case ARM_TYPE:
13044 sym_type = ARM_MAP_ARM;
13045 break;
13046
13047 case THUMB16_TYPE:
13048 case THUMB32_TYPE:
13049 sym_type = ARM_MAP_THUMB;
13050 break;
13051
13052 case DATA_TYPE:
13053 sym_type = ARM_MAP_DATA;
13054 break;
13055
13056 default:
13057 BFD_FAIL ();
13058 return FALSE;
13059 }
13060
13061 if (template_sequence[i].type != prev_type)
13062 {
13063 prev_type = template_sequence[i].type;
13064 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13065 return FALSE;
13066 }
13067
13068 switch (template_sequence[i].type)
13069 {
13070 case ARM_TYPE:
13071 case THUMB32_TYPE:
13072 size += 4;
13073 break;
13074
13075 case THUMB16_TYPE:
13076 size += 2;
13077 break;
13078
13079 case DATA_TYPE:
13080 size += 4;
13081 break;
13082
13083 default:
13084 BFD_FAIL ();
13085 return FALSE;
13086 }
13087 }
13088
13089 return TRUE;
13090 }
13091
13092 /* Output mapping symbols for linker generated sections,
13093 and for those data-only sections that do not have a
13094 $d. */
13095
13096 static bfd_boolean
13097 elf32_arm_output_arch_local_syms (bfd *output_bfd,
13098 struct bfd_link_info *info,
13099 void *finfo,
13100 int (*func) (void *, const char *,
13101 Elf_Internal_Sym *,
13102 asection *,
13103 struct elf_link_hash_entry *))
13104 {
13105 output_arch_syminfo osi;
13106 struct elf32_arm_link_hash_table *htab;
13107 bfd_vma offset;
13108 bfd_size_type size;
13109 bfd *input_bfd;
13110
13111 htab = elf32_arm_hash_table (info);
13112 if (htab == NULL)
13113 return FALSE;
13114
13115 check_use_blx (htab);
13116
13117 osi.finfo = finfo;
13118 osi.info = info;
13119 osi.func = func;
13120
13121 /* Add a $d mapping symbol to data-only sections that
13122 don't have any mapping symbol. This may result in (harmless) redundant
13123 mapping symbols. */
13124 for (input_bfd = info->input_bfds;
13125 input_bfd != NULL;
13126 input_bfd = input_bfd->link_next)
13127 {
13128 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13129 for (osi.sec = input_bfd->sections;
13130 osi.sec != NULL;
13131 osi.sec = osi.sec->next)
13132 {
13133 if (osi.sec->output_section != NULL
13134 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13135 != 0)
13136 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13137 == SEC_HAS_CONTENTS
13138 && get_arm_elf_section_data (osi.sec) != NULL
13139 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13140 && osi.sec->size > 0)
13141 {
13142 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13143 (output_bfd, osi.sec->output_section);
13144 if (osi.sec_shndx != (int)SHN_BAD)
13145 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13146 }
13147 }
13148 }
13149
13150 /* ARM->Thumb glue. */
13151 if (htab->arm_glue_size > 0)
13152 {
13153 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13154 ARM2THUMB_GLUE_SECTION_NAME);
13155
13156 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13157 (output_bfd, osi.sec->output_section);
13158 if (info->shared || htab->root.is_relocatable_executable
13159 || htab->pic_veneer)
13160 size = ARM2THUMB_PIC_GLUE_SIZE;
13161 else if (htab->use_blx)
13162 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13163 else
13164 size = ARM2THUMB_STATIC_GLUE_SIZE;
13165
13166 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13167 {
13168 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13169 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
13170 }
13171 }
13172
13173 /* Thumb->ARM glue. */
13174 if (htab->thumb_glue_size > 0)
13175 {
13176 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13177 THUMB2ARM_GLUE_SECTION_NAME);
13178
13179 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13180 (output_bfd, osi.sec->output_section);
13181 size = THUMB2ARM_GLUE_SIZE;
13182
13183 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13184 {
13185 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13186 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
13187 }
13188 }
13189
13190 /* ARMv4 BX veneers. */
13191 if (htab->bx_glue_size > 0)
13192 {
13193 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13194 ARM_BX_GLUE_SECTION_NAME);
13195
13196 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13197 (output_bfd, osi.sec->output_section);
13198
13199 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
13200 }
13201
13202 /* Long calls stubs. */
13203 if (htab->stub_bfd && htab->stub_bfd->sections)
13204 {
13205 asection* stub_sec;
13206
13207 for (stub_sec = htab->stub_bfd->sections;
13208 stub_sec != NULL;
13209 stub_sec = stub_sec->next)
13210 {
13211 /* Ignore non-stub sections. */
13212 if (!strstr (stub_sec->name, STUB_SUFFIX))
13213 continue;
13214
13215 osi.sec = stub_sec;
13216
13217 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13218 (output_bfd, osi.sec->output_section);
13219
13220 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13221 }
13222 }
13223
13224 /* Finally, output mapping symbols for the PLT. */
13225 if (!htab->splt || htab->splt->size == 0)
13226 return TRUE;
13227
13228 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
13229 htab->splt->output_section);
13230 osi.sec = htab->splt;
13231 /* Output mapping symbols for the plt header. SymbianOS does not have a
13232 plt header. */
13233 if (htab->vxworks_p)
13234 {
13235 /* VxWorks shared libraries have no PLT header. */
13236 if (!info->shared)
13237 {
13238 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
13239 return FALSE;
13240 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
13241 return FALSE;
13242 }
13243 }
13244 else if (!htab->symbian_p)
13245 {
13246 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
13247 return FALSE;
13248 #ifndef FOUR_WORD_PLT
13249 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
13250 return FALSE;
13251 #endif
13252 }
13253
13254 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13255 return TRUE;
13256 }
13257
13258 /* Allocate target specific section data. */
13259
13260 static bfd_boolean
13261 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13262 {
13263 if (!sec->used_by_bfd)
13264 {
13265 _arm_elf_section_data *sdata;
13266 bfd_size_type amt = sizeof (*sdata);
13267
13268 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
13269 if (sdata == NULL)
13270 return FALSE;
13271 sec->used_by_bfd = sdata;
13272 }
13273
13274 return _bfd_elf_new_section_hook (abfd, sec);
13275 }
13276
13277
13278 /* Used to order a list of mapping symbols by address. */
13279
13280 static int
13281 elf32_arm_compare_mapping (const void * a, const void * b)
13282 {
13283 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13284 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13285
13286 if (amap->vma > bmap->vma)
13287 return 1;
13288 else if (amap->vma < bmap->vma)
13289 return -1;
13290 else if (amap->type > bmap->type)
13291 /* Ensure results do not depend on the host qsort for objects with
13292 multiple mapping symbols at the same address by sorting on type
13293 after vma. */
13294 return 1;
13295 else if (amap->type < bmap->type)
13296 return -1;
13297 else
13298 return 0;
13299 }
13300
13301 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13302
13303 static unsigned long
13304 offset_prel31 (unsigned long addr, bfd_vma offset)
13305 {
13306 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13307 }
13308
13309 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13310 relocations. */
13311
13312 static void
13313 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13314 {
13315 unsigned long first_word = bfd_get_32 (output_bfd, from);
13316 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13317
13318 /* High bit of first word is supposed to be zero. */
13319 if ((first_word & 0x80000000ul) == 0)
13320 first_word = offset_prel31 (first_word, offset);
13321
13322 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13323 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13324 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13325 second_word = offset_prel31 (second_word, offset);
13326
13327 bfd_put_32 (output_bfd, first_word, to);
13328 bfd_put_32 (output_bfd, second_word, to + 4);
13329 }
13330
13331 /* Data for make_branch_to_a8_stub(). */
13332
13333 struct a8_branch_to_stub_data {
13334 asection *writing_section;
13335 bfd_byte *contents;
13336 };
13337
13338
13339 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
13340 places for a particular section. */
13341
13342 static bfd_boolean
13343 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13344 void *in_arg)
13345 {
13346 struct elf32_arm_stub_hash_entry *stub_entry;
13347 struct a8_branch_to_stub_data *data;
13348 bfd_byte *contents;
13349 unsigned long branch_insn;
13350 bfd_vma veneered_insn_loc, veneer_entry_loc;
13351 bfd_signed_vma branch_offset;
13352 bfd *abfd;
13353 unsigned int target;
13354
13355 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13356 data = (struct a8_branch_to_stub_data *) in_arg;
13357
13358 if (stub_entry->target_section != data->writing_section
13359 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13360 return TRUE;
13361
13362 contents = data->contents;
13363
13364 veneered_insn_loc = stub_entry->target_section->output_section->vma
13365 + stub_entry->target_section->output_offset
13366 + stub_entry->target_value;
13367
13368 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13369 + stub_entry->stub_sec->output_offset
13370 + stub_entry->stub_offset;
13371
13372 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13373 veneered_insn_loc &= ~3u;
13374
13375 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13376
13377 abfd = stub_entry->target_section->owner;
13378 target = stub_entry->target_value;
13379
13380 /* We attempt to avoid this condition by setting stubs_always_after_branch
13381 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13382 This check is just to be on the safe side... */
13383 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13384 {
13385 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13386 "allocated in unsafe location"), abfd);
13387 return FALSE;
13388 }
13389
13390 switch (stub_entry->stub_type)
13391 {
13392 case arm_stub_a8_veneer_b:
13393 case arm_stub_a8_veneer_b_cond:
13394 branch_insn = 0xf0009000;
13395 goto jump24;
13396
13397 case arm_stub_a8_veneer_blx:
13398 branch_insn = 0xf000e800;
13399 goto jump24;
13400
13401 case arm_stub_a8_veneer_bl:
13402 {
13403 unsigned int i1, j1, i2, j2, s;
13404
13405 branch_insn = 0xf000d000;
13406
13407 jump24:
13408 if (branch_offset < -16777216 || branch_offset > 16777214)
13409 {
13410 /* There's not much we can do apart from complain if this
13411 happens. */
13412 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13413 "of range (input file too large)"), abfd);
13414 return FALSE;
13415 }
13416
13417 /* i1 = not(j1 eor s), so:
13418 not i1 = j1 eor s
13419 j1 = (not i1) eor s. */
13420
13421 branch_insn |= (branch_offset >> 1) & 0x7ff;
13422 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13423 i2 = (branch_offset >> 22) & 1;
13424 i1 = (branch_offset >> 23) & 1;
13425 s = (branch_offset >> 24) & 1;
13426 j1 = (!i1) ^ s;
13427 j2 = (!i2) ^ s;
13428 branch_insn |= j2 << 11;
13429 branch_insn |= j1 << 13;
13430 branch_insn |= s << 26;
13431 }
13432 break;
13433
13434 default:
13435 BFD_FAIL ();
13436 return FALSE;
13437 }
13438
13439 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13440 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
13441
13442 return TRUE;
13443 }
13444
13445 /* Do code byteswapping. Return FALSE afterwards so that the section is
13446 written out as normal. */
13447
13448 static bfd_boolean
13449 elf32_arm_write_section (bfd *output_bfd,
13450 struct bfd_link_info *link_info,
13451 asection *sec,
13452 bfd_byte *contents)
13453 {
13454 unsigned int mapcount, errcount;
13455 _arm_elf_section_data *arm_data;
13456 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
13457 elf32_arm_section_map *map;
13458 elf32_vfp11_erratum_list *errnode;
13459 bfd_vma ptr;
13460 bfd_vma end;
13461 bfd_vma offset = sec->output_section->vma + sec->output_offset;
13462 bfd_byte tmp;
13463 unsigned int i;
13464
13465 if (globals == NULL)
13466 return FALSE;
13467
13468 /* If this section has not been allocated an _arm_elf_section_data
13469 structure then we cannot record anything. */
13470 arm_data = get_arm_elf_section_data (sec);
13471 if (arm_data == NULL)
13472 return FALSE;
13473
13474 mapcount = arm_data->mapcount;
13475 map = arm_data->map;
13476 errcount = arm_data->erratumcount;
13477
13478 if (errcount != 0)
13479 {
13480 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13481
13482 for (errnode = arm_data->erratumlist; errnode != 0;
13483 errnode = errnode->next)
13484 {
13485 bfd_vma target = errnode->vma - offset;
13486
13487 switch (errnode->type)
13488 {
13489 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13490 {
13491 bfd_vma branch_to_veneer;
13492 /* Original condition code of instruction, plus bit mask for
13493 ARM B instruction. */
13494 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13495 | 0x0a000000;
13496
13497 /* The instruction is before the label. */
13498 target -= 4;
13499
13500 /* Above offset included in -4 below. */
13501 branch_to_veneer = errnode->u.b.veneer->vma
13502 - errnode->vma - 4;
13503
13504 if ((signed) branch_to_veneer < -(1 << 25)
13505 || (signed) branch_to_veneer >= (1 << 25))
13506 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13507 "range"), output_bfd);
13508
13509 insn |= (branch_to_veneer >> 2) & 0xffffff;
13510 contents[endianflip ^ target] = insn & 0xff;
13511 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13512 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13513 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
13514 }
13515 break;
13516
13517 case VFP11_ERRATUM_ARM_VENEER:
13518 {
13519 bfd_vma branch_from_veneer;
13520 unsigned int insn;
13521
13522 /* Take size of veneer into account. */
13523 branch_from_veneer = errnode->u.v.branch->vma
13524 - errnode->vma - 12;
13525
13526 if ((signed) branch_from_veneer < -(1 << 25)
13527 || (signed) branch_from_veneer >= (1 << 25))
13528 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13529 "range"), output_bfd);
13530
13531 /* Original instruction. */
13532 insn = errnode->u.v.branch->u.b.vfp_insn;
13533 contents[endianflip ^ target] = insn & 0xff;
13534 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13535 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13536 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
13537
13538 /* Branch back to insn after original insn. */
13539 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13540 contents[endianflip ^ (target + 4)] = insn & 0xff;
13541 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13542 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13543 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
13544 }
13545 break;
13546
13547 default:
13548 abort ();
13549 }
13550 }
13551 }
13552
13553 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13554 {
13555 arm_unwind_table_edit *edit_node
13556 = arm_data->u.exidx.unwind_edit_list;
13557 /* Now, sec->size is the size of the section we will write. The original
13558 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13559 markers) was sec->rawsize. (This isn't the case if we perform no
13560 edits, then rawsize will be zero and we should use size). */
13561 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
13562 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13563 unsigned int in_index, out_index;
13564 bfd_vma add_to_offsets = 0;
13565
13566 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13567 {
13568 if (edit_node)
13569 {
13570 unsigned int edit_index = edit_node->index;
13571
13572 if (in_index < edit_index && in_index * 8 < input_size)
13573 {
13574 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13575 contents + in_index * 8, add_to_offsets);
13576 out_index++;
13577 in_index++;
13578 }
13579 else if (in_index == edit_index
13580 || (in_index * 8 >= input_size
13581 && edit_index == UINT_MAX))
13582 {
13583 switch (edit_node->type)
13584 {
13585 case DELETE_EXIDX_ENTRY:
13586 in_index++;
13587 add_to_offsets += 8;
13588 break;
13589
13590 case INSERT_EXIDX_CANTUNWIND_AT_END:
13591 {
13592 asection *text_sec = edit_node->linked_section;
13593 bfd_vma text_offset = text_sec->output_section->vma
13594 + text_sec->output_offset
13595 + text_sec->size;
13596 bfd_vma exidx_offset = offset + out_index * 8;
13597 unsigned long prel31_offset;
13598
13599 /* Note: this is meant to be equivalent to an
13600 R_ARM_PREL31 relocation. These synthetic
13601 EXIDX_CANTUNWIND markers are not relocated by the
13602 usual BFD method. */
13603 prel31_offset = (text_offset - exidx_offset)
13604 & 0x7ffffffful;
13605
13606 /* First address we can't unwind. */
13607 bfd_put_32 (output_bfd, prel31_offset,
13608 &edited_contents[out_index * 8]);
13609
13610 /* Code for EXIDX_CANTUNWIND. */
13611 bfd_put_32 (output_bfd, 0x1,
13612 &edited_contents[out_index * 8 + 4]);
13613
13614 out_index++;
13615 add_to_offsets -= 8;
13616 }
13617 break;
13618 }
13619
13620 edit_node = edit_node->next;
13621 }
13622 }
13623 else
13624 {
13625 /* No more edits, copy remaining entries verbatim. */
13626 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13627 contents + in_index * 8, add_to_offsets);
13628 out_index++;
13629 in_index++;
13630 }
13631 }
13632
13633 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13634 bfd_set_section_contents (output_bfd, sec->output_section,
13635 edited_contents,
13636 (file_ptr) sec->output_offset, sec->size);
13637
13638 return TRUE;
13639 }
13640
13641 /* Fix code to point to Cortex-A8 erratum stubs. */
13642 if (globals->fix_cortex_a8)
13643 {
13644 struct a8_branch_to_stub_data data;
13645
13646 data.writing_section = sec;
13647 data.contents = contents;
13648
13649 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13650 &data);
13651 }
13652
13653 if (mapcount == 0)
13654 return FALSE;
13655
13656 if (globals->byteswap_code)
13657 {
13658 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
13659
13660 ptr = map[0].vma;
13661 for (i = 0; i < mapcount; i++)
13662 {
13663 if (i == mapcount - 1)
13664 end = sec->size;
13665 else
13666 end = map[i + 1].vma;
13667
13668 switch (map[i].type)
13669 {
13670 case 'a':
13671 /* Byte swap code words. */
13672 while (ptr + 3 < end)
13673 {
13674 tmp = contents[ptr];
13675 contents[ptr] = contents[ptr + 3];
13676 contents[ptr + 3] = tmp;
13677 tmp = contents[ptr + 1];
13678 contents[ptr + 1] = contents[ptr + 2];
13679 contents[ptr + 2] = tmp;
13680 ptr += 4;
13681 }
13682 break;
13683
13684 case 't':
13685 /* Byte swap code halfwords. */
13686 while (ptr + 1 < end)
13687 {
13688 tmp = contents[ptr];
13689 contents[ptr] = contents[ptr + 1];
13690 contents[ptr + 1] = tmp;
13691 ptr += 2;
13692 }
13693 break;
13694
13695 case 'd':
13696 /* Leave data alone. */
13697 break;
13698 }
13699 ptr = end;
13700 }
13701 }
13702
13703 free (map);
13704 arm_data->mapcount = -1;
13705 arm_data->mapsize = 0;
13706 arm_data->map = NULL;
13707
13708 return FALSE;
13709 }
13710
13711 /* Display STT_ARM_TFUNC symbols as functions. */
13712
13713 static void
13714 elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13715 asymbol *asym)
13716 {
13717 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13718
13719 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13720 elfsym->symbol.flags |= BSF_FUNCTION;
13721 }
13722
13723
13724 /* Mangle thumb function symbols as we read them in. */
13725
13726 static bfd_boolean
13727 elf32_arm_swap_symbol_in (bfd * abfd,
13728 const void *psrc,
13729 const void *pshn,
13730 Elf_Internal_Sym *dst)
13731 {
13732 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13733 return FALSE;
13734
13735 /* New EABI objects mark thumb function symbols by setting the low bit of
13736 the address. Turn these into STT_ARM_TFUNC. */
13737 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
13738 && (dst->st_value & 1))
13739 {
13740 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13741 dst->st_value &= ~(bfd_vma) 1;
13742 }
13743 return TRUE;
13744 }
13745
13746
13747 /* Mangle thumb function symbols as we write them out. */
13748
13749 static void
13750 elf32_arm_swap_symbol_out (bfd *abfd,
13751 const Elf_Internal_Sym *src,
13752 void *cdst,
13753 void *shndx)
13754 {
13755 Elf_Internal_Sym newsym;
13756
13757 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13758 of the address set, as per the new EABI. We do this unconditionally
13759 because objcopy does not set the elf header flags until after
13760 it writes out the symbol table. */
13761 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13762 {
13763 newsym = *src;
13764 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
13765 if (newsym.st_shndx != SHN_UNDEF)
13766 {
13767 /* Do this only for defined symbols. At link type, the static
13768 linker will simulate the work of dynamic linker of resolving
13769 symbols and will carry over the thumbness of found symbols to
13770 the output symbol table. It's not clear how it happens, but
13771 the thumbness of undefined symbols can well be different at
13772 runtime, and writing '1' for them will be confusing for users
13773 and possibly for dynamic linker itself.
13774 */
13775 newsym.st_value |= 1;
13776 }
13777
13778 src = &newsym;
13779 }
13780 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13781 }
13782
13783 /* Add the PT_ARM_EXIDX program header. */
13784
13785 static bfd_boolean
13786 elf32_arm_modify_segment_map (bfd *abfd,
13787 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13788 {
13789 struct elf_segment_map *m;
13790 asection *sec;
13791
13792 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13793 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13794 {
13795 /* If there is already a PT_ARM_EXIDX header, then we do not
13796 want to add another one. This situation arises when running
13797 "strip"; the input binary already has the header. */
13798 m = elf_tdata (abfd)->segment_map;
13799 while (m && m->p_type != PT_ARM_EXIDX)
13800 m = m->next;
13801 if (!m)
13802 {
13803 m = (struct elf_segment_map *)
13804 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13805 if (m == NULL)
13806 return FALSE;
13807 m->p_type = PT_ARM_EXIDX;
13808 m->count = 1;
13809 m->sections[0] = sec;
13810
13811 m->next = elf_tdata (abfd)->segment_map;
13812 elf_tdata (abfd)->segment_map = m;
13813 }
13814 }
13815
13816 return TRUE;
13817 }
13818
13819 /* We may add a PT_ARM_EXIDX program header. */
13820
13821 static int
13822 elf32_arm_additional_program_headers (bfd *abfd,
13823 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13824 {
13825 asection *sec;
13826
13827 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13828 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13829 return 1;
13830 else
13831 return 0;
13832 }
13833
13834 /* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
13835
13836 static bfd_boolean
13837 elf32_arm_is_function_type (unsigned int type)
13838 {
13839 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
13840 }
13841
13842 /* We use this to override swap_symbol_in and swap_symbol_out. */
13843 const struct elf_size_info elf32_arm_size_info =
13844 {
13845 sizeof (Elf32_External_Ehdr),
13846 sizeof (Elf32_External_Phdr),
13847 sizeof (Elf32_External_Shdr),
13848 sizeof (Elf32_External_Rel),
13849 sizeof (Elf32_External_Rela),
13850 sizeof (Elf32_External_Sym),
13851 sizeof (Elf32_External_Dyn),
13852 sizeof (Elf_External_Note),
13853 4,
13854 1,
13855 32, 2,
13856 ELFCLASS32, EV_CURRENT,
13857 bfd_elf32_write_out_phdrs,
13858 bfd_elf32_write_shdrs_and_ehdr,
13859 bfd_elf32_checksum_contents,
13860 bfd_elf32_write_relocs,
13861 elf32_arm_swap_symbol_in,
13862 elf32_arm_swap_symbol_out,
13863 bfd_elf32_slurp_reloc_table,
13864 bfd_elf32_slurp_symbol_table,
13865 bfd_elf32_swap_dyn_in,
13866 bfd_elf32_swap_dyn_out,
13867 bfd_elf32_swap_reloc_in,
13868 bfd_elf32_swap_reloc_out,
13869 bfd_elf32_swap_reloca_in,
13870 bfd_elf32_swap_reloca_out
13871 };
13872
13873 #define ELF_ARCH bfd_arch_arm
13874 #define ELF_MACHINE_CODE EM_ARM
13875 #ifdef __QNXTARGET__
13876 #define ELF_MAXPAGESIZE 0x1000
13877 #else
13878 #define ELF_MAXPAGESIZE 0x8000
13879 #endif
13880 #define ELF_MINPAGESIZE 0x1000
13881 #define ELF_COMMONPAGESIZE 0x1000
13882
13883 #define bfd_elf32_mkobject elf32_arm_mkobject
13884
13885 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13886 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
13887 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13888 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13889 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
13890 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
13891 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
13892 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
13893 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
13894 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
13895 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
13896 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
13897 #define bfd_elf32_bfd_final_link elf32_arm_final_link
13898
13899 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13900 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
13901 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
13902 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13903 #define elf_backend_check_relocs elf32_arm_check_relocs
13904 #define elf_backend_relocate_section elf32_arm_relocate_section
13905 #define elf_backend_write_section elf32_arm_write_section
13906 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
13907 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
13908 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13909 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13910 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
13911 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
13912 #define elf_backend_post_process_headers elf32_arm_post_process_headers
13913 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
13914 #define elf_backend_object_p elf32_arm_object_p
13915 #define elf_backend_section_flags elf32_arm_section_flags
13916 #define elf_backend_fake_sections elf32_arm_fake_sections
13917 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
13918 #define elf_backend_final_write_processing elf32_arm_final_write_processing
13919 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
13920 #define elf_backend_symbol_processing elf32_arm_symbol_processing
13921 #define elf_backend_size_info elf32_arm_size_info
13922 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
13923 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13924 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13925 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13926 #define elf_backend_is_function_type elf32_arm_is_function_type
13927
13928 #define elf_backend_can_refcount 1
13929 #define elf_backend_can_gc_sections 1
13930 #define elf_backend_plt_readonly 1
13931 #define elf_backend_want_got_plt 1
13932 #define elf_backend_want_plt_sym 0
13933 #define elf_backend_may_use_rel_p 1
13934 #define elf_backend_may_use_rela_p 0
13935 #define elf_backend_default_use_rela_p 0
13936
13937 #define elf_backend_got_header_size 12
13938
13939 #undef elf_backend_obj_attrs_vendor
13940 #define elf_backend_obj_attrs_vendor "aeabi"
13941 #undef elf_backend_obj_attrs_section
13942 #define elf_backend_obj_attrs_section ".ARM.attributes"
13943 #undef elf_backend_obj_attrs_arg_type
13944 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13945 #undef elf_backend_obj_attrs_section_type
13946 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
13947 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
13948
13949 #include "elf32-target.h"
13950
13951 /* VxWorks Targets. */
13952
13953 #undef TARGET_LITTLE_SYM
13954 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
13955 #undef TARGET_LITTLE_NAME
13956 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
13957 #undef TARGET_BIG_SYM
13958 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
13959 #undef TARGET_BIG_NAME
13960 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13961
13962 /* Like elf32_arm_link_hash_table_create -- but overrides
13963 appropriately for VxWorks. */
13964
13965 static struct bfd_link_hash_table *
13966 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13967 {
13968 struct bfd_link_hash_table *ret;
13969
13970 ret = elf32_arm_link_hash_table_create (abfd);
13971 if (ret)
13972 {
13973 struct elf32_arm_link_hash_table *htab
13974 = (struct elf32_arm_link_hash_table *) ret;
13975 htab->use_rel = 0;
13976 htab->vxworks_p = 1;
13977 }
13978 return ret;
13979 }
13980
13981 static void
13982 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13983 {
13984 elf32_arm_final_write_processing (abfd, linker);
13985 elf_vxworks_final_write_processing (abfd, linker);
13986 }
13987
13988 #undef elf32_bed
13989 #define elf32_bed elf32_arm_vxworks_bed
13990
13991 #undef bfd_elf32_bfd_link_hash_table_create
13992 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13993 #undef elf_backend_add_symbol_hook
13994 #define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13995 #undef elf_backend_final_write_processing
13996 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13997 #undef elf_backend_emit_relocs
13998 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
13999
14000 #undef elf_backend_may_use_rel_p
14001 #define elf_backend_may_use_rel_p 0
14002 #undef elf_backend_may_use_rela_p
14003 #define elf_backend_may_use_rela_p 1
14004 #undef elf_backend_default_use_rela_p
14005 #define elf_backend_default_use_rela_p 1
14006 #undef elf_backend_want_plt_sym
14007 #define elf_backend_want_plt_sym 1
14008 #undef ELF_MAXPAGESIZE
14009 #define ELF_MAXPAGESIZE 0x1000
14010
14011 #include "elf32-target.h"
14012
14013
14014 /* Merge backend specific data from an object file to the output
14015 object file when linking. */
14016
14017 static bfd_boolean
14018 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
14019 {
14020 flagword out_flags;
14021 flagword in_flags;
14022 bfd_boolean flags_compatible = TRUE;
14023 asection *sec;
14024
14025 /* Check if we have the same endianess. */
14026 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14027 return FALSE;
14028
14029 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14030 return TRUE;
14031
14032 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14033 return FALSE;
14034
14035 /* The input BFD must have had its flags initialised. */
14036 /* The following seems bogus to me -- The flags are initialized in
14037 the assembler but I don't think an elf_flags_init field is
14038 written into the object. */
14039 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14040
14041 in_flags = elf_elfheader (ibfd)->e_flags;
14042 out_flags = elf_elfheader (obfd)->e_flags;
14043
14044 /* In theory there is no reason why we couldn't handle this. However
14045 in practice it isn't even close to working and there is no real
14046 reason to want it. */
14047 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14048 && !(ibfd->flags & DYNAMIC)
14049 && (in_flags & EF_ARM_BE8))
14050 {
14051 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14052 ibfd);
14053 return FALSE;
14054 }
14055
14056 if (!elf_flags_init (obfd))
14057 {
14058 /* If the input is the default architecture and had the default
14059 flags then do not bother setting the flags for the output
14060 architecture, instead allow future merges to do this. If no
14061 future merges ever set these flags then they will retain their
14062 uninitialised values, which surprise surprise, correspond
14063 to the default values. */
14064 if (bfd_get_arch_info (ibfd)->the_default
14065 && elf_elfheader (ibfd)->e_flags == 0)
14066 return TRUE;
14067
14068 elf_flags_init (obfd) = TRUE;
14069 elf_elfheader (obfd)->e_flags = in_flags;
14070
14071 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14072 && bfd_get_arch_info (obfd)->the_default)
14073 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14074
14075 return TRUE;
14076 }
14077
14078 /* Determine what should happen if the input ARM architecture
14079 does not match the output ARM architecture. */
14080 if (! bfd_arm_merge_machines (ibfd, obfd))
14081 return FALSE;
14082
14083 /* Identical flags must be compatible. */
14084 if (in_flags == out_flags)
14085 return TRUE;
14086
14087 /* Check to see if the input BFD actually contains any sections. If
14088 not, its flags may not have been initialised either, but it
14089 cannot actually cause any incompatiblity. Do not short-circuit
14090 dynamic objects; their section list may be emptied by
14091 elf_link_add_object_symbols.
14092
14093 Also check to see if there are no code sections in the input.
14094 In this case there is no need to check for code specific flags.
14095 XXX - do we need to worry about floating-point format compatability
14096 in data sections ? */
14097 if (!(ibfd->flags & DYNAMIC))
14098 {
14099 bfd_boolean null_input_bfd = TRUE;
14100 bfd_boolean only_data_sections = TRUE;
14101
14102 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14103 {
14104 /* Ignore synthetic glue sections. */
14105 if (strcmp (sec->name, ".glue_7")
14106 && strcmp (sec->name, ".glue_7t"))
14107 {
14108 if ((bfd_get_section_flags (ibfd, sec)
14109 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14110 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14111 only_data_sections = FALSE;
14112
14113 null_input_bfd = FALSE;
14114 break;
14115 }
14116 }
14117
14118 if (null_input_bfd || only_data_sections)
14119 return TRUE;
14120 }
14121
14122 /* Complain about various flag mismatches. */
14123 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14124 EF_ARM_EABI_VERSION (out_flags)))
14125 {
14126 _bfd_error_handler
14127 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14128 ibfd, obfd,
14129 (in_flags & EF_ARM_EABIMASK) >> 24,
14130 (out_flags & EF_ARM_EABIMASK) >> 24);
14131 return FALSE;
14132 }
14133
14134 /* Not sure what needs to be checked for EABI versions >= 1. */
14135 /* VxWorks libraries do not use these flags. */
14136 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14137 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14138 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14139 {
14140 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14141 {
14142 _bfd_error_handler
14143 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14144 ibfd, obfd,
14145 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14146 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14147 flags_compatible = FALSE;
14148 }
14149
14150 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14151 {
14152 if (in_flags & EF_ARM_APCS_FLOAT)
14153 _bfd_error_handler
14154 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14155 ibfd, obfd);
14156 else
14157 _bfd_error_handler
14158 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14159 ibfd, obfd);
14160
14161 flags_compatible = FALSE;
14162 }
14163
14164 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14165 {
14166 if (in_flags & EF_ARM_VFP_FLOAT)
14167 _bfd_error_handler
14168 (_("error: %B uses VFP instructions, whereas %B does not"),
14169 ibfd, obfd);
14170 else
14171 _bfd_error_handler
14172 (_("error: %B uses FPA instructions, whereas %B does not"),
14173 ibfd, obfd);
14174
14175 flags_compatible = FALSE;
14176 }
14177
14178 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14179 {
14180 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14181 _bfd_error_handler
14182 (_("error: %B uses Maverick instructions, whereas %B does not"),
14183 ibfd, obfd);
14184 else
14185 _bfd_error_handler
14186 (_("error: %B does not use Maverick instructions, whereas %B does"),
14187 ibfd, obfd);
14188
14189 flags_compatible = FALSE;
14190 }
14191
14192 #ifdef EF_ARM_SOFT_FLOAT
14193 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14194 {
14195 /* We can allow interworking between code that is VFP format
14196 layout, and uses either soft float or integer regs for
14197 passing floating point arguments and results. We already
14198 know that the APCS_FLOAT flags match; similarly for VFP
14199 flags. */
14200 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14201 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14202 {
14203 if (in_flags & EF_ARM_SOFT_FLOAT)
14204 _bfd_error_handler
14205 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14206 ibfd, obfd);
14207 else
14208 _bfd_error_handler
14209 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14210 ibfd, obfd);
14211
14212 flags_compatible = FALSE;
14213 }
14214 }
14215 #endif
14216
14217 /* Interworking mismatch is only a warning. */
14218 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14219 {
14220 if (in_flags & EF_ARM_INTERWORK)
14221 {
14222 _bfd_error_handler
14223 (_("Warning: %B supports interworking, whereas %B does not"),
14224 ibfd, obfd);
14225 }
14226 else
14227 {
14228 _bfd_error_handler
14229 (_("Warning: %B does not support interworking, whereas %B does"),
14230 ibfd, obfd);
14231 }
14232 }
14233 }
14234
14235 return flags_compatible;
14236 }
14237
14238
14239 /* Symbian OS Targets. */
14240
14241 #undef TARGET_LITTLE_SYM
14242 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
14243 #undef TARGET_LITTLE_NAME
14244 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
14245 #undef TARGET_BIG_SYM
14246 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
14247 #undef TARGET_BIG_NAME
14248 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
14249
14250 /* Like elf32_arm_link_hash_table_create -- but overrides
14251 appropriately for Symbian OS. */
14252
14253 static struct bfd_link_hash_table *
14254 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14255 {
14256 struct bfd_link_hash_table *ret;
14257
14258 ret = elf32_arm_link_hash_table_create (abfd);
14259 if (ret)
14260 {
14261 struct elf32_arm_link_hash_table *htab
14262 = (struct elf32_arm_link_hash_table *)ret;
14263 /* There is no PLT header for Symbian OS. */
14264 htab->plt_header_size = 0;
14265 /* The PLT entries are each one instruction and one word. */
14266 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
14267 htab->symbian_p = 1;
14268 /* Symbian uses armv5t or above, so use_blx is always true. */
14269 htab->use_blx = 1;
14270 htab->root.is_relocatable_executable = 1;
14271 }
14272 return ret;
14273 }
14274
14275 static const struct bfd_elf_special_section
14276 elf32_arm_symbian_special_sections[] =
14277 {
14278 /* In a BPABI executable, the dynamic linking sections do not go in
14279 the loadable read-only segment. The post-linker may wish to
14280 refer to these sections, but they are not part of the final
14281 program image. */
14282 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14283 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14284 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14285 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14286 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
14287 /* These sections do not need to be writable as the SymbianOS
14288 postlinker will arrange things so that no dynamic relocation is
14289 required. */
14290 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14291 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14292 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14293 { NULL, 0, 0, 0, 0 }
14294 };
14295
14296 static void
14297 elf32_arm_symbian_begin_write_processing (bfd *abfd,
14298 struct bfd_link_info *link_info)
14299 {
14300 /* BPABI objects are never loaded directly by an OS kernel; they are
14301 processed by a postlinker first, into an OS-specific format. If
14302 the D_PAGED bit is set on the file, BFD will align segments on
14303 page boundaries, so that an OS can directly map the file. With
14304 BPABI objects, that just results in wasted space. In addition,
14305 because we clear the D_PAGED bit, map_sections_to_segments will
14306 recognize that the program headers should not be mapped into any
14307 loadable segment. */
14308 abfd->flags &= ~D_PAGED;
14309 elf32_arm_begin_write_processing (abfd, link_info);
14310 }
14311
14312 static bfd_boolean
14313 elf32_arm_symbian_modify_segment_map (bfd *abfd,
14314 struct bfd_link_info *info)
14315 {
14316 struct elf_segment_map *m;
14317 asection *dynsec;
14318
14319 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14320 segment. However, because the .dynamic section is not marked
14321 with SEC_LOAD, the generic ELF code will not create such a
14322 segment. */
14323 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14324 if (dynsec)
14325 {
14326 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14327 if (m->p_type == PT_DYNAMIC)
14328 break;
14329
14330 if (m == NULL)
14331 {
14332 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14333 m->next = elf_tdata (abfd)->segment_map;
14334 elf_tdata (abfd)->segment_map = m;
14335 }
14336 }
14337
14338 /* Also call the generic arm routine. */
14339 return elf32_arm_modify_segment_map (abfd, info);
14340 }
14341
14342 /* Return address for Ith PLT stub in section PLT, for relocation REL
14343 or (bfd_vma) -1 if it should not be included. */
14344
14345 static bfd_vma
14346 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14347 const arelent *rel ATTRIBUTE_UNUSED)
14348 {
14349 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14350 }
14351
14352
14353 #undef elf32_bed
14354 #define elf32_bed elf32_arm_symbian_bed
14355
14356 /* The dynamic sections are not allocated on SymbianOS; the postlinker
14357 will process them and then discard them. */
14358 #undef ELF_DYNAMIC_SEC_FLAGS
14359 #define ELF_DYNAMIC_SEC_FLAGS \
14360 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14361
14362 #undef elf_backend_add_symbol_hook
14363 #undef elf_backend_emit_relocs
14364
14365 #undef bfd_elf32_bfd_link_hash_table_create
14366 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14367 #undef elf_backend_special_sections
14368 #define elf_backend_special_sections elf32_arm_symbian_special_sections
14369 #undef elf_backend_begin_write_processing
14370 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14371 #undef elf_backend_final_write_processing
14372 #define elf_backend_final_write_processing elf32_arm_final_write_processing
14373
14374 #undef elf_backend_modify_segment_map
14375 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14376
14377 /* There is no .got section for BPABI objects, and hence no header. */
14378 #undef elf_backend_got_header_size
14379 #define elf_backend_got_header_size 0
14380
14381 /* Similarly, there is no .got.plt section. */
14382 #undef elf_backend_want_got_plt
14383 #define elf_backend_want_got_plt 0
14384
14385 #undef elf_backend_plt_sym_val
14386 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14387
14388 #undef elf_backend_may_use_rel_p
14389 #define elf_backend_may_use_rel_p 1
14390 #undef elf_backend_may_use_rela_p
14391 #define elf_backend_may_use_rela_p 0
14392 #undef elf_backend_default_use_rela_p
14393 #define elf_backend_default_use_rela_p 0
14394 #undef elf_backend_want_plt_sym
14395 #define elf_backend_want_plt_sym 0
14396 #undef ELF_MAXPAGESIZE
14397 #define ELF_MAXPAGESIZE 0x8000
14398
14399 #include "elf32-target.h"
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