| blob | 7c5c344c728b4740e3283597dd72b0830613f7c4 |
1 2006-06-23 Thiemo Seufer <ths@mips.com>
2 David Ung <davidu@mips.com>
4 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
5 label_list.
6 * config/tc-mips.c (label_list): Define per-segment label_list.
7 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
8 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
9 mips_from_file_after_relocs, mips_define_label): Use per-segment
10 label_list.
12 2006-06-22 Thiemo Seufer <ths@mips.com>
14 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
15 (append_insn): Use it.
16 (md_apply_fix): Whitespace formatting.
17 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
18 mips16_extended_frag): Remove register specifier.
19 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
20 constants.
22 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
24 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
25 a directive saving VFP registers for ARMv6 or later.
26 (s_arm_unwind_save): Add parameter arch_v6 and call
27 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
28 appropriate.
29 (md_pseudo_table): Add entry for new "vsave" directive.
30 * doc/c-arm.texi: Correct error in example for "save"
31 directive (fstmdf -> fstmdx). Also document "vsave" directive.
33 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
34 Anatoly Sokolov <aesok@post.ru>
36 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
37 and atmega644p devices. Rename atmega164/atmega324 devices to
38 atmega164p/atmega324p.
39 * doc/c-avr.texi: Document new mcu and arch options.
41 2006-06-17 Nick Clifton <nickc@redhat.com>
43 * config/tc-arm.c (enum parse_operand_result): Move outside of
44 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
46 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
48 * config/tc-i386.h (processor_type): New.
49 (arch_entry): Add type.
51 * config/tc-i386.c (cpu_arch_tune): New.
52 (cpu_arch_tune_flags): Likewise.
53 (cpu_arch_isa_flags): Likewise.
54 (cpu_arch): Updated.
55 (set_cpu_arch): Also update cpu_arch_isa_flags.
56 (md_assemble): Update cpu_arch_isa_flags.
57 (OPTION_MARCH): New.
58 (OPTION_MTUNE): Likewise.
59 (md_longopts): Add -march= and -mtune=.
60 (md_parse_option): Support -march= and -mtune=.
61 (md_show_usage): Add -march=CPU/-mtune=CPU.
62 (i386_target_format): Also update cpu_arch_isa_flags,
63 cpu_arch_tune and cpu_arch_tune_flags.
65 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
67 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
69 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
71 * config/tc-arm.c (enum parse_operand_result): New.
72 (struct group_reloc_table_entry): New.
73 (enum group_reloc_type): New.
74 (group_reloc_table): New array.
75 (find_group_reloc_table_entry): New function.
76 (parse_shifter_operand_group_reloc): New function.
77 (parse_address_main): New function, incorporating code
78 from the old parse_address function. To be used via...
79 (parse_address): wrapper for parse_address_main; and
80 (parse_address_group_reloc): new function, likewise.
81 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
82 OP_ADDRGLDRS, OP_ADDRGLDC.
83 (parse_operands): Support for these new operand codes.
84 New macro po_misc_or_fail_no_backtrack.
85 (encode_arm_cp_address): Preserve group relocations.
86 (insns): Modify to use the above operand codes where group
87 relocations are permitted.
88 (md_apply_fix): Handle the group relocations
89 ALU_PC_G0_NC through LDC_SB_G2.
90 (tc_gen_reloc): Likewise.
91 (arm_force_relocation): Leave group relocations for the linker.
92 (arm_fix_adjustable): Likewise.
94 2006-06-15 Julian Brown <julian@codesourcery.com>
96 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
97 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
98 relocs properly.
100 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
102 * config/tc-i386.c (process_suffix): Don't add rex64 for
103 "xchg %rax,%rax".
105 2006-06-09 Thiemo Seufer <ths@mips.com>
107 * config/tc-mips.c (mips_ip): Maintain argument count.
109 2006-06-09 Alan Modra <amodra@bigpond.net.au>
111 * config/tc-iq2000.c: Include sb.h.
113 2006-06-08 Nigel Stephens <nigel@mips.com>
115 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
116 aliases for better compatibility with SGI tools.
118 2006-06-08 Alan Modra <amodra@bigpond.net.au>
120 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
121 * Makefile.am (GASLIBS): Expand @BFDLIB@.
122 (BFDVER_H): Delete.
123 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
124 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
125 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
126 Run "make dep-am".
127 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
128 * Makefile.in: Regenerate.
129 * doc/Makefile.in: Regenerate.
130 * configure: Regenerate.
132 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
134 * po/Make-in (pdf, ps): New dummy targets.
136 2006-06-07 Julian Brown <julian@codesourcery.com>
138 * config/tc-arm.c (stdarg.h): include.
139 (arm_it): Add uncond_value field. Add isvec and issingle to operand
140 array.
141 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
142 REG_TYPE_NSDQ (single, double or quad vector reg).
143 (reg_expected_msgs): Update.
144 (BAD_FPU): Add macro for unsupported FPU instruction error.
145 (parse_neon_type): Support 'd' as an alias for .f64.
146 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
147 sets of registers.
148 (parse_vfp_reg_list): Don't update first arg on error.
149 (parse_neon_mov): Support extra syntax for VFP moves.
150 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
151 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
152 (parse_operands): Support isvec, issingle operands fields, new parse
153 codes above.
154 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
155 msr variants.
156 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
157 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
158 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
159 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
160 shapes.
161 (neon_shape): Redefine in terms of above.
162 (neon_shape_class): New enumeration, table of shape classes.
163 (neon_shape_el): New enumeration. One element of a shape.
164 (neon_shape_el_size): Register widths of above, where appropriate.
165 (neon_shape_info): New struct. Info for shape table.
166 (neon_shape_tab): New array.
167 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
168 (neon_check_shape): Rewrite as...
169 (neon_select_shape): New function to classify instruction shapes,
170 driven by new table neon_shape_tab array.
171 (neon_quad): New function. Return 1 if shape should set Q flag in
172 instructions (or equivalent), 0 otherwise.
173 (type_chk_of_el_type): Support F64.
174 (el_type_of_type_chk): Likewise.
175 (neon_check_type): Add support for VFP type checking (VFP data
176 elements fill their containing registers).
177 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
178 in thumb mode for VFP instructions.
179 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
180 and encode the current instruction as if it were that opcode.
181 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
182 arguments, call function in PFN.
183 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
184 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
185 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
186 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
187 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
188 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
189 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
190 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
191 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
192 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
193 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
194 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
195 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
196 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
197 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
198 neon_quad.
199 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
200 between VFP and Neon turns out to belong to Neon. Perform
201 architecture check and fill in condition field if appropriate.
202 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
203 (do_neon_cvt): Add support for VFP variants of instructions.
204 (neon_cvt_flavour): Extend to cover VFP conversions.
205 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
206 vmov variants.
207 (do_neon_ldr_str): Handle single-precision VFP load/store.
208 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
209 NS_NULL not NS_IGNORE.
210 (opcode_tag): Add OT_csuffixF for operands which either take a
211 conditional suffix, or have 0xF in the condition field.
212 (md_assemble): Add support for OT_csuffixF.
213 (NCE): Replace macro with...
214 (NCE_tag, NCE, NCEF): New macros.
215 (nCE): Replace macro with...
216 (nCE_tag, nCE, nCEF): New macros.
217 (insns): Add support for VFP insns or VFP versions of insns msr,
218 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
219 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
220 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
221 VFP/Neon insns together.
223 2006-06-07 Alan Modra <amodra@bigpond.net.au>
224 Ladislav Michl <ladis@linux-mips.org>
226 * app.c: Don't include headers already included by as.h.
227 * as.c: Likewise.
228 * atof-generic.c: Likewise.
229 * cgen.c: Likewise.
230 * dwarf2dbg.c: Likewise.
231 * expr.c: Likewise.
232 * input-file.c: Likewise.
233 * input-scrub.c: Likewise.
234 * macro.c: Likewise.
235 * output-file.c: Likewise.
236 * read.c: Likewise.
237 * sb.c: Likewise.
238 * config/bfin-lex.l: Likewise.
239 * config/obj-coff.h: Likewise.
240 * config/obj-elf.h: Likewise.
241 * config/obj-som.h: Likewise.
242 * config/tc-arc.c: Likewise.
243 * config/tc-arm.c: Likewise.
244 * config/tc-avr.c: Likewise.
245 * config/tc-bfin.c: Likewise.
246 * config/tc-cris.c: Likewise.
247 * config/tc-d10v.c: Likewise.
248 * config/tc-d30v.c: Likewise.
249 * config/tc-dlx.h: Likewise.
250 * config/tc-fr30.c: Likewise.
251 * config/tc-frv.c: Likewise.
252 * config/tc-h8300.c: Likewise.
253 * config/tc-hppa.c: Likewise.
254 * config/tc-i370.c: Likewise.
255 * config/tc-i860.c: Likewise.
256 * config/tc-i960.c: Likewise.
257 * config/tc-ip2k.c: Likewise.
258 * config/tc-iq2000.c: Likewise.
259 * config/tc-m32c.c: Likewise.
260 * config/tc-m32r.c: Likewise.
261 * config/tc-maxq.c: Likewise.
262 * config/tc-mcore.c: Likewise.
263 * config/tc-mips.c: Likewise.
264 * config/tc-mmix.c: Likewise.
265 * config/tc-mn10200.c: Likewise.
266 * config/tc-mn10300.c: Likewise.
267 * config/tc-msp430.c: Likewise.
268 * config/tc-mt.c: Likewise.
269 * config/tc-ns32k.c: Likewise.
270 * config/tc-openrisc.c: Likewise.
271 * config/tc-ppc.c: Likewise.
272 * config/tc-s390.c: Likewise.
273 * config/tc-sh.c: Likewise.
274 * config/tc-sh64.c: Likewise.
275 * config/tc-sparc.c: Likewise.
276 * config/tc-tic30.c: Likewise.
277 * config/tc-tic4x.c: Likewise.
278 * config/tc-tic54x.c: Likewise.
279 * config/tc-v850.c: Likewise.
280 * config/tc-vax.c: Likewise.
281 * config/tc-xc16x.c: Likewise.
282 * config/tc-xstormy16.c: Likewise.
283 * config/tc-xtensa.c: Likewise.
284 * config/tc-z80.c: Likewise.
285 * config/tc-z8k.c: Likewise.
286 * macro.h: Don't include sb.h or ansidecl.h.
287 * sb.h: Don't include stdio.h or ansidecl.h.
288 * cond.c: Include sb.h.
289 * itbl-lex.l: Include as.h instead of other system headers.
290 * itbl-parse.y: Likewise.
291 * itbl-ops.c: Similarly.
292 * itbl-ops.h: Don't include as.h or ansidecl.h.
293 * config/bfin-defs.h: Don't include bfd.h or as.h.
294 * config/bfin-parse.y: Include as.h instead of other system headers.
296 2006-06-06 Ben Elliston <bje@au.ibm.com>
297 Anton Blanchard <anton@samba.org>
299 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
300 (md_show_usage): Document it.
301 (ppc_setup_opcodes): Test power6 opcode flag bits.
302 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
304 2006-06-06 Thiemo Seufer <ths@mips.com>
305 Chao-ying Fu <fu@mips.com>
307 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
308 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
309 (macro_build): Update comment.
310 (mips_ip): Allow DSP64 instructions for MIPS64R2.
311 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
312 CPU_HAS_MDMX.
313 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
314 MIPS_CPU_ASE_MDMX flags for sb1.
316 2006-06-05 Thiemo Seufer <ths@mips.com>
318 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
319 appropriate.
320 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
321 (mips_ip): Make overflowed/underflowed constant arguments in DSP
322 and MT instructions a fatal error. Use INSERT_OPERAND where
323 appropriate. Improve warnings for break and wait code overflows.
324 Use symbolic constant of OP_MASK_COPZ.
325 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
327 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
329 * po/Make-in (top_builddir): Define.
331 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
333 * doc/Makefile.am (TEXI2DVI): Define.
334 * doc/Makefile.in: Regenerate.
335 * doc/c-arc.texi: Fix typo.
337 2006-06-01 Alan Modra <amodra@bigpond.net.au>
339 * config/obj-ieee.c: Delete.
340 * config/obj-ieee.h: Delete.
341 * Makefile.am (OBJ_FORMATS): Remove ieee.
342 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
343 (obj-ieee.o): Remove rule.
344 * Makefile.in: Regenerate.
345 * configure.in (atof): Remove tahoe.
346 (OBJ_MAYBE_IEEE): Don't define.
347 * configure: Regenerate.
348 * config.in: Regenerate.
349 * doc/Makefile.in: Regenerate.
350 * po/POTFILES.in: Regenerate.
352 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
354 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
355 and LIBINTL_DEP everywhere.
356 (INTLLIBS): Remove.
357 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
358 * acinclude.m4: Include new gettext macros.
359 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
360 Remove local code for po/Makefile.
361 * Makefile.in, configure, doc/Makefile.in: Regenerated.
363 2006-05-30 Nick Clifton <nickc@redhat.com>
365 * po/es.po: Updated Spanish translation.
367 2006-05-06 Denis Chertykov <denisc@overta.ru>
369 * doc/c-avr.texi: New file.
370 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
371 * doc/all.texi: Set AVR
372 * doc/as.texinfo: Include c-avr.texi
374 2006-05-28 Jie Zhang <jie.zhang@analog.com>
376 * config/bfin-parse.y (check_macfunc): Loose the condition of
377 calling check_multiply_halfregs ().
379 2006-05-25 Jie Zhang <jie.zhang@analog.com>
381 * config/bfin-parse.y (asm_1): Better check and deal with
382 vector and scalar Multiply 16-Bit Operands instructions.
384 2006-05-24 Nick Clifton <nickc@redhat.com>
386 * config/tc-hppa.c: Convert to ISO C90 format.
387 * config/tc-hppa.h: Likewise.
389 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
390 Randolph Chung <randolph@tausq.org>
392 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
393 is_tls_ieoff, is_tls_leoff): Define.
394 (fix_new_hppa): Handle TLS.
395 (cons_fix_new_hppa): Likewise.
396 (pa_ip): Likewise.
397 (md_apply_fix): Handle TLS relocs.
398 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
400 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
402 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
404 2006-05-23 Thiemo Seufer <ths@mips.com>
405 David Ung <davidu@mips.com>
406 Nigel Stephens <nigel@mips.com>
408 [ gas/ChangeLog ]
409 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
410 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
411 ISA_HAS_MXHC1): New macros.
412 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
413 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
414 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
415 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
416 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
417 (mips_after_parse_args): Change default handling of float register
418 size to account for 32bit code with 64bit FP. Better sanity checking
419 of ISA/ASE/ABI option combinations.
420 (s_mipsset): Support switching of GPR and FPR sizes via
421 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
422 options.
423 (mips_elf_final_processing): We should record the use of 64bit FP
424 registers in 32bit code but we don't, because ELF header flags are
425 a scarce ressource.
426 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
427 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
428 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
429 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
430 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
431 missing -march options. Document .set arch=CPU. Move .set smartmips
432 to ASE page. Use @code for .set FOO examples.
434 2006-05-23 Jie Zhang <jie.zhang@analog.com>
436 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
437 if needed.
439 2006-05-23 Jie Zhang <jie.zhang@analog.com>
441 * config/bfin-defs.h (bfin_equals): Remove declaration.
442 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
443 * config/tc-bfin.c (bfin_name_is_register): Remove.
444 (bfin_equals): Remove.
445 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
446 (bfin_name_is_register): Remove declaration.
448 2006-05-19 Thiemo Seufer <ths@mips.com>
449 Nigel Stephens <nigel@mips.com>
451 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
452 (mips_oddfpreg_ok): New function.
453 (mips_ip): Use it.
455 2006-05-19 Thiemo Seufer <ths@mips.com>
456 David Ung <davidu@mips.com>
458 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
459 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
460 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
461 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
462 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
463 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
464 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
465 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
466 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
467 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
468 reg_names_o32, reg_names_n32n64): Define register classes.
469 (reg_lookup): New function, use register classes.
470 (md_begin): Reserve register names in the symbol table. Simplify
471 OBJ_ELF defines.
472 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
473 Use reg_lookup.
474 (mips16_ip): Use reg_lookup.
475 (tc_get_register): Likewise.
476 (tc_mips_regname_to_dw2regnum): New function.
478 2006-05-19 Thiemo Seufer <ths@mips.com>
480 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
481 Un-constify string argument.
482 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
483 Likewise.
484 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
485 Likewise.
486 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
487 Likewise.
488 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
489 Likewise.
490 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
491 Likewise.
492 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
493 Likewise.
495 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
497 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
498 cfloat/m68881 to correct architecture before using it.
500 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
502 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
503 constant values.
505 2006-05-15 Paul Brook <paul@codesourcery.com>
507 * config/tc-arm.c (arm_adjust_symtab): Use
508 bfd_is_arm_special_symbol_name.
510 2006-05-15 Bob Wilson <bob.wilson@acm.org>
512 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
513 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
514 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
515 Handle errors from calls to xtensa_opcode_is_* functions.
517 2006-05-14 Thiemo Seufer <ths@mips.com>
519 * config/tc-mips.c (macro_build): Test for currently active
520 mips16 option.
521 (mips16_ip): Reject invalid opcodes.
523 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
525 * doc/as.texinfo: Rename "Index" to "AS Index",
526 and "ABORT" to "ABORT (COFF)".
528 2006-05-11 Paul Brook <paul@codesourcery.com>
530 * config/tc-arm.c (parse_half): New function.
531 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
532 (parse_operands): Ditto.
533 (do_mov16): Reject invalid relocations.
534 (do_t_mov16): Ditto. Use Thumb reloc numbers.
535 (insns): Replace Iffff with HALF.
536 (md_apply_fix): Add MOVW and MOVT relocs.
537 (tc_gen_reloc): Ditto.
538 * doc/c-arm.texi: Document relocation operators
540 2006-05-11 Paul Brook <paul@codesourcery.com>
542 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
544 2006-05-11 Thiemo Seufer <ths@mips.com>
546 * config/tc-mips.c (append_insn): Don't check the range of j or
547 jal addresses.
549 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
551 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
552 relocs against external symbols for WinCE targets.
553 (md_apply_fix): Likewise.
555 2006-05-09 David Ung <davidu@mips.com>
557 * config/tc-mips.c (append_insn): Only warn about an out-of-range
558 j or jal address.
560 2006-05-09 Nick Clifton <nickc@redhat.com>
562 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
563 against symbols which are not going to be placed into the symbol
564 table.
566 2006-05-09 Ben Elliston <bje@au.ibm.com>
568 * expr.c (operand): Remove `if (0 && ..)' statement and
569 subsequently unused target_op label. Collapse `if (1 || ..)'
570 statement.
571 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
572 separately above the switch.
574 2006-05-08 Nick Clifton <nickc@redhat.com>
576 PR gas/2623
577 * config/tc-msp430.c (line_separator_character): Define as |.
579 2006-05-08 Thiemo Seufer <ths@mips.com>
580 Nigel Stephens <nigel@mips.com>
581 David Ung <davidu@mips.com>
583 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
584 (mips_opts): Likewise.
585 (file_ase_smartmips): New variable.
586 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
587 (macro_build): Handle SmartMIPS instructions.
588 (mips_ip): Likewise.
589 (md_longopts): Add argument handling for smartmips.
590 (md_parse_options, mips_after_parse_args): Likewise.
591 (s_mipsset): Add .set smartmips support.
592 (md_show_usage): Document -msmartmips/-mno-smartmips.
593 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
594 .set smartmips.
595 * doc/c-mips.texi: Likewise.
597 2006-05-08 Alan Modra <amodra@bigpond.net.au>
599 * write.c (relax_segment): Add pass count arg. Don't error on
600 negative org/space on first two passes.
601 (relax_seg_info): New struct.
602 (relax_seg, write_object_file): Adjust.
603 * write.h (relax_segment): Update prototype.
605 2006-05-05 Julian Brown <julian@codesourcery.com>
607 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
608 checking.
609 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
610 architecture version checks.
611 (insns): Allow overlapping instructions to be used in VFP mode.
613 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
615 PR gas/2598
616 * config/obj-elf.c (obj_elf_change_section): Allow user
617 specified SHF_ALPHA_GPREL.
619 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
621 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
622 for PMEM related expressions.
624 2006-05-05 Nick Clifton <nickc@redhat.com>
626 PR gas/2582
627 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
628 insertion of a directory separator character into a string at a
629 given offset. Uses heuristics to decide when to use a backslash
630 character rather than a forward-slash character.
631 (dwarf2_directive_loc): Use the macro.
632 (out_debug_info): Likewise.
634 2006-05-05 Thiemo Seufer <ths@mips.com>
635 David Ung <davidu@mips.com>
637 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
638 instruction.
639 (macro): Add new case M_CACHE_AB.
641 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
643 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
644 (opcode_lookup): Issue a warning for opcode with
645 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
646 identical to OT_cinfix3.
647 (TxC3w, TC3w, tC3w): New.
648 (insns): Use tC3w and TC3w for comparison instructions with
649 's' suffix.
651 2006-05-04 Alan Modra <amodra@bigpond.net.au>
653 * subsegs.h (struct frchain): Delete frch_seg.
654 (frchain_root): Delete.
655 (seg_info): Define as macro.
656 * subsegs.c (frchain_root): Delete.
657 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
658 (subsegs_begin, subseg_change): Adjust for above.
659 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
660 rather than to one big list.
661 (subseg_get): Don't special case abs, und sections.
662 (subseg_new, subseg_force_new): Don't set frchainP here.
663 (seg_info): Delete.
664 (subsegs_print_statistics): Adjust frag chain control list traversal.
665 * debug.c (dmp_frags): Likewise.
666 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
667 at frchain_root. Make use of known frchain ordering.
668 (last_frag_for_seg): Likewise.
669 (get_frag_fix): Likewise. Add seg param.
670 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
671 * write.c (chain_frchains_together_1): Adjust for struct frchain.
672 (SUB_SEGMENT_ALIGN): Likewise.
673 (subsegs_finish): Adjust frchain list traversal.
674 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
675 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
676 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
677 (xtensa_fix_b_j_loop_end_frags): Likewise.
678 (xtensa_fix_close_loop_end_frags): Likewise.
679 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
680 (retrieve_segment_info): Delete frch_seg initialisation.
682 2006-05-03 Alan Modra <amodra@bigpond.net.au>
684 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
685 * config/obj-elf.h (obj_sec_set_private_data): Delete.
686 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
687 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
689 2006-05-02 Joseph Myers <joseph@codesourcery.com>
691 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
692 here.
693 (md_apply_fix3): Multiply offset by 4 here for
694 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
696 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
697 Jan Beulich <jbeulich@novell.com>
699 * config/tc-i386.c (output_invalid_buf): Change size for
700 unsigned char.
701 * config/tc-tic30.c (output_invalid_buf): Likewise.
703 * config/tc-i386.c (output_invalid): Cast none-ascii char to
704 unsigned char.
705 * config/tc-tic30.c (output_invalid): Likewise.
707 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
709 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
710 (TEXI2POD): Use AM_MAKEINFOFLAGS.
711 (asconfig.texi): Don't set top_srcdir.
712 * doc/as.texinfo: Don't use top_srcdir.
713 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
715 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
717 * config/tc-i386.c (output_invalid_buf): Change size to 16.
718 * config/tc-tic30.c (output_invalid_buf): Likewise.
720 * config/tc-i386.c (output_invalid): Use snprintf instead of
721 sprintf.
722 * config/tc-ia64.c (declare_register_set): Likewise.
723 (emit_one_bundle): Likewise.
724 (check_dependencies): Likewise.
725 * config/tc-tic30.c (output_invalid): Likewise.
727 2006-05-02 Paul Brook <paul@codesourcery.com>
729 * config/tc-arm.c (arm_optimize_expr): New function.
730 * config/tc-arm.h (md_optimize_expr): Define
731 (arm_optimize_expr): Add prototype.
732 (TC_FORCE_RELOCATION_SUB_SAME): Define.
734 2006-05-02 Ben Elliston <bje@au.ibm.com>
736 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
737 field unsigned.
739 * sb.h (sb_list_vector): Move to sb.c.
740 * sb.c (free_list): Use type of sb_list_vector directly.
741 (sb_build): Fix off-by-one error in assertion about `size'.
743 2006-05-01 Ben Elliston <bje@au.ibm.com>
745 * listing.c (listing_listing): Remove useless loop.
746 * macro.c (macro_expand): Remove is_positional local variable.
747 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
748 and simplify surrounding expressions, where possible.
749 (assign_symbol): Likewise.
750 (s_weakref): Likewise.
751 * symbols.c (colon): Likewise.
753 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
755 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
757 2006-04-30 Thiemo Seufer <ths@mips.com>
758 David Ung <davidu@mips.com>
760 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
761 (mips_immed): New table that records various handling of udi
762 instruction patterns.
763 (mips_ip): Adds udi handling.
765 2006-04-28 Alan Modra <amodra@bigpond.net.au>
767 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
768 of list rather than beginning.
770 2006-04-26 Julian Brown <julian@codesourcery.com>
772 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
773 (is_quarter_float): Rename from above. Simplify slightly.
774 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
775 number.
776 (parse_neon_mov): Parse floating-point constants.
777 (neon_qfloat_bits): Fix encoding.
778 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
779 preference to integer encoding when using the F32 type.
781 2006-04-26 Julian Brown <julian@codesourcery.com>
783 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
784 zero-initialising structures containing it will lead to invalid types).
785 (arm_it): Add vectype to each operand.
786 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
787 defined field.
788 (neon_typed_alias): New structure. Extra information for typed
789 register aliases.
790 (reg_entry): Add neon type info field.
791 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
792 Break out alternative syntax for coprocessor registers, etc. into...
793 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
794 out from arm_reg_parse.
795 (parse_neon_type): Move. Return SUCCESS/FAIL.
796 (first_error): New function. Call to ensure first error which occurs is
797 reported.
798 (parse_neon_operand_type): Parse exactly one type.
799 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
800 (parse_typed_reg_or_scalar): New function. Handle core of both
801 arm_typed_reg_parse and parse_scalar.
802 (arm_typed_reg_parse): Parse a register with an optional type.
803 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
804 result.
805 (parse_scalar): Parse a Neon scalar with optional type.
806 (parse_reg_list): Use first_error.
807 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
808 (neon_alias_types_same): New function. Return true if two (alias) types
809 are the same.
810 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
811 of elements.
812 (insert_reg_alias): Return new reg_entry not void.
813 (insert_neon_reg_alias): New function. Insert type/index information as
814 well as register for alias.
815 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
816 make typed register aliases accordingly.
817 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
818 of line.
819 (s_unreq): Delete type information if present.
820 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
821 (s_arm_unwind_save_mmxwcg): Likewise.
822 (s_arm_unwind_movsp): Likewise.
823 (s_arm_unwind_setfp): Likewise.
824 (parse_shift): Likewise.
825 (parse_shifter_operand): Likewise.
826 (parse_address): Likewise.
827 (parse_tb): Likewise.
828 (tc_arm_regname_to_dw2regnum): Likewise.
829 (md_pseudo_table): Add dn, qn.
830 (parse_neon_mov): Handle typed operands.
831 (parse_operands): Likewise.
832 (neon_type_mask): Add N_SIZ.
833 (N_ALLMODS): New macro.
834 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
835 (el_type_of_type_chk): Add some safeguards.
836 (modify_types_allowed): Fix logic bug.
837 (neon_check_type): Handle operands with types.
838 (neon_three_same): Remove redundant optional arg handling.
839 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
840 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
841 (do_neon_step): Adjust accordingly.
842 (neon_cmode_for_logic_imm): Use first_error.
843 (do_neon_bitfield): Call neon_check_type.
844 (neon_dyadic): Rename to...
845 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
846 to allow modification of type of the destination.
847 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
848 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
849 (do_neon_compare): Make destination be an untyped bitfield.
850 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
851 (neon_mul_mac): Return early in case of errors.
852 (neon_move_immediate): Use first_error.
853 (neon_mac_reg_scalar_long): Fix type to include scalar.
854 (do_neon_dup): Likewise.
855 (do_neon_mov): Likewise (in several places).
856 (do_neon_tbl_tbx): Fix type.
857 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
858 (do_neon_ld_dup): Exit early in case of errors and/or use
859 first_error.
860 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
861 Handle .dn/.qn directives.
862 (REGDEF): Add zero for reg_entry neon field.
864 2006-04-26 Julian Brown <julian@codesourcery.com>
866 * config/tc-arm.c (limits.h): Include.
867 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
868 (fpu_vfp_v3_or_neon_ext): Declare constants.
869 (neon_el_type): New enumeration of types for Neon vector elements.
870 (neon_type_el): New struct. Define type and size of a vector element.
871 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
872 instruction.
873 (neon_type): Define struct. The type of an instruction.
874 (arm_it): Add 'vectype' for the current instruction.
875 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
876 (vfp_sp_reg_pos): Rename to...
877 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
878 tags.
879 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
880 (Neon D or Q register).
881 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
882 register.
883 (GE_OPT_PREFIX_BIG): Define constant, for use in...
884 (my_get_expression): Allow above constant as argument to accept
885 64-bit constants with optional prefix.
886 (arm_reg_parse): Add extra argument to return the specific type of
887 register in when either a D or Q register (REG_TYPE_NDQ) is
888 requested. Can be NULL.
889 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
890 (parse_reg_list): Update for new arm_reg_parse args.
891 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
892 (parse_neon_el_struct_list): New function. Parse element/structure
893 register lists for VLD<n>/VST<n> instructions.
894 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
895 (s_arm_unwind_save_mmxwr): Likewise.
896 (s_arm_unwind_save_mmxwcg): Likewise.
897 (s_arm_unwind_movsp): Likewise.
898 (s_arm_unwind_setfp): Likewise.
899 (parse_big_immediate): New function. Parse an immediate, which may be
900 64 bits wide. Put results in inst.operands[i].
901 (parse_shift): Update for new arm_reg_parse args.
902 (parse_address): Likewise. Add parsing of alignment specifiers.
903 (parse_neon_mov): Parse the operands of a VMOV instruction.
904 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
905 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
906 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
907 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
908 (parse_operands): Handle new codes above.
909 (encode_arm_vfp_sp_reg): Rename to...
910 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
911 selected VFP version only supports D0-D15.
912 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
913 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
914 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
915 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
916 encode_arm_vfp_reg name, and allow 32 D regs.
917 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
918 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
919 regs.
920 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
921 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
922 constant-load and conversion insns introduced with VFPv3.
923 (neon_tab_entry): New struct.
924 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
925 those which are the targets of pseudo-instructions.
926 (neon_opc): Enumerate opcodes, use as indices into...
927 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
928 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
929 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
930 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
931 neon_enc_tab.
932 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
933 Neon instructions.
934 (neon_type_mask): New. Compact type representation for type checking.
935 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
936 permitted type combinations.
937 (N_IGNORE_TYPE): New macro.
938 (neon_check_shape): New function. Check an instruction shape for
939 multiple alternatives. Return the specific shape for the current
940 instruction.
941 (neon_modify_type_size): New function. Modify a vector type and size,
942 depending on the bit mask in argument 1.
943 (neon_type_promote): New function. Convert a given "key" type (of an
944 operand) into the correct type for a different operand, based on a bit
945 mask.
946 (type_chk_of_el_type): New function. Convert a type and size into the
947 compact representation used for type checking.
948 (el_type_of_type_ckh): New function. Reverse of above (only when a
949 single bit is set in the bit mask).
950 (modify_types_allowed): New function. Alter a mask of allowed types
951 based on a bit mask of modifications.
952 (neon_check_type): New function. Check the type of the current
953 instruction against the variable argument list. The "key" type of the
954 instruction is returned.
955 (neon_dp_fixup): New function. Fill in and modify instruction bits for
956 a Neon data-processing instruction depending on whether we're in ARM
957 mode or Thumb-2 mode.
958 (neon_logbits): New function.
959 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
960 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
961 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
962 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
963 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
964 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
965 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
966 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
967 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
968 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
969 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
970 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
971 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
972 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
973 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
974 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
975 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
976 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
977 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
978 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
979 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
980 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
981 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
982 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
983 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
984 helpers.
985 (parse_neon_type): New function. Parse Neon type specifier.
986 (opcode_lookup): Allow parsing of Neon type specifiers.
987 (REGNUM2, REGSETH, REGSET2): New macros.
988 (reg_names): Add new VFPv3 and Neon registers.
989 (NUF, nUF, NCE, nCE): New macros for opcode table.
990 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
991 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
992 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
993 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
994 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
995 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
996 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
997 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
998 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
999 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1000 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1001 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1002 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1003 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1004 fto[us][lh][sd].
1005 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1006 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1007 (arm_option_cpu_value): Add vfp3 and neon.
1008 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1009 VFPv1 attribute.
1011 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1013 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1014 syntax instead of hardcoded opcodes with ".w18" suffixes.
1015 (wide_branch_opcode): New.
1016 (build_transition): Use it to check for wide branch opcodes with
1017 either ".w18" or ".w15" suffixes.
1019 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1021 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1022 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1023 frag's is_literal flag.
1025 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1027 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1029 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1031 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1032 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1033 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1034 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1035 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1037 2005-04-20 Paul Brook <paul@codesourcery.com>
1039 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1040 all targets.
1041 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1043 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1045 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1046 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1047 Make some cpus unsupported on ELF. Run "make dep-am".
1048 * Makefile.in: Regenerate.
1050 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1052 * configure.in (--enable-targets): Indent help message.
1053 * configure: Regenerate.
1055 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1057 PR gas/2533
1058 * config/tc-i386.c (i386_immediate): Check illegal immediate
1059 register operand.
1061 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1063 * config/tc-i386.c: Formatting.
1064 (output_disp, output_imm): ISO C90 params.
1066 * frags.c (frag_offset_fixed_p): Constify args.
1067 * frags.h (frag_offset_fixed_p): Ditto.
1069 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1070 (COFF_MAGIC): Delete.
1072 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1074 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1076 * po/POTFILES.in: Regenerated.
1078 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1080 * doc/as.texinfo: Mention that some .type syntaxes are not
1081 supported on all architectures.
1083 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1085 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1086 instructions when such transformations have been disabled.
1088 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1090 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1091 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1092 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1093 decoding the loop instructions. Remove current_offset variable.
1094 (xtensa_fix_short_loop_frags): Likewise.
1095 (min_bytes_to_other_loop_end): Remove current_offset argument.
1097 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1099 * config/tc-z80.c (z80_optimize_expr): Removed.
1100 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1102 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1104 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1105 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1106 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1107 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1108 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1109 at90can64, at90usb646, at90usb647, at90usb1286 and
1110 at90usb1287.
1111 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1113 2006-04-07 Paul Brook <paul@codesourcery.com>
1115 * config/tc-arm.c (parse_operands): Set default error message.
1117 2006-04-07 Paul Brook <paul@codesourcery.com>
1119 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1121 2006-04-07 Paul Brook <paul@codesourcery.com>
1123 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1125 2006-04-07 Paul Brook <paul@codesourcery.com>
1127 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1128 (move_or_literal_pool): Handle Thumb-2 instructions.
1129 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1131 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1133 PR 2512.
1134 * config/tc-i386.c (match_template): Move 64-bit operand tests
1135 inside loop.
1137 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1139 * po/Make-in: Add install-html target.
1140 * Makefile.am: Add install-html and install-html-recursive targets.
1141 * Makefile.in: Regenerate.
1142 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1143 * configure: Regenerate.
1144 * doc/Makefile.am: Add install-html and install-html-am targets.
1145 * doc/Makefile.in: Regenerate.
1147 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1149 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1150 second scan.
1152 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1153 Daniel Jacobowitz <dan@codesourcery.com>
1155 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1156 (GOTT_BASE, GOTT_INDEX): New.
1157 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1158 GOTT_INDEX when generating VxWorks PIC.
1159 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1160 use the generic *-*-vxworks* stanza instead.
1162 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1164 PR 997
1165 * frags.c (frag_offset_fixed_p): New function.
1166 * frags.h (frag_offset_fixed_p): Declare.
1167 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1168 (resolve_expression): Likewise.
1170 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1172 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1173 of the same length but different numbers of slots.
1175 2006-03-30 Andreas Schwab <schwab@suse.de>
1177 * configure.in: Fix help string for --enable-targets option.
1178 * configure: Regenerate.
1180 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1182 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1183 (m68k_ip): ... here. Use for all chips. Protect against buffer
1184 overrun and avoid excessive copying.
1186 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1187 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1188 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1189 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1190 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1191 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1192 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1193 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1194 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1195 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1196 (struct m68k_cpu): Change chip field to control_regs.
1197 (current_chip): Remove.
1198 (control_regs): New.
1199 (m68k_archs, m68k_extensions): Adjust.
1200 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1201 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1202 (find_cf_chip): Reimplement for new organization of cpu table.
1203 (select_control_regs): Remove.
1204 (mri_chip): Adjust.
1205 (struct save_opts): Save control regs, not chip.
1206 (s_save, s_restore): Adjust.
1207 (m68k_lookup_cpu): Give deprecated warning when necessary.
1208 (m68k_init_arch): Adjust.
1209 (md_show_usage): Adjust for new cpu table organization.
1211 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1213 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1214 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1215 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1216 "elf/bfin.h".
1217 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1218 (any_gotrel): New rule.
1219 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1220 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1221 "elf/bfin.h".
1222 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1223 (bfin_pic_ptr): New function.
1224 (md_pseudo_table): Add it for ".picptr".
1225 (OPTION_FDPIC): New macro.
1226 (md_longopts): Add -mfdpic.
1227 (md_parse_option): Handle it.
1228 (md_begin): Set BFD flags.
1229 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1230 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1231 us for GOT relocs.
1232 * Makefile.am (bfin-parse.o): Update dependencies.
1233 (DEPTC_bfin_elf): Likewise.
1234 * Makefile.in: Regenerate.
1236 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1238 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1239 mcfemac instead of mcfmac.
1241 2006-03-23 Michael Matz <matz@suse.de>
1243 * config/tc-i386.c (type_names): Correct placement of 'static'.
1244 (reloc): Map some more relocs to their 64 bit counterpart when
1245 size is 8.
1246 (output_insn): Work around breakage if DEBUG386 is defined.
1247 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1248 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1249 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1250 different from i386.
1251 (output_imm): Ditto.
1252 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1253 Imm64.
1254 (md_convert_frag): Jumps can now be larger than 2GB away, error
1255 out in that case.
1256 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1257 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1259 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1260 Daniel Jacobowitz <dan@codesourcery.com>
1261 Phil Edwards <phil@codesourcery.com>
1262 Zack Weinberg <zack@codesourcery.com>
1263 Mark Mitchell <mark@codesourcery.com>
1264 Nathan Sidwell <nathan@codesourcery.com>
1266 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1267 (md_begin): Complain about -G being used for PIC. Don't change
1268 the text, data and bss alignments on VxWorks.
1269 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1270 generating VxWorks PIC.
1271 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1272 (macro): Likewise, but do not treat la $25 specially for
1273 VxWorks PIC, and do not handle jal.
1274 (OPTION_MVXWORKS_PIC): New macro.
1275 (md_longopts): Add -mvxworks-pic.
1276 (md_parse_option): Don't complain about using PIC and -G together here.
1277 Handle OPTION_MVXWORKS_PIC.
1278 (md_estimate_size_before_relax): Always use the first relaxation
1279 sequence on VxWorks.
1280 * config/tc-mips.h (VXWORKS_PIC): New.
1282 2006-03-21 Paul Brook <paul@codesourcery.com>
1284 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1286 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1288 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1289 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1290 (get_loop_align_size): New.
1291 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1292 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1293 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1294 (get_noop_aligned_address): Use get_loop_align_size.
1295 (get_aligned_diff): Likewise.
1297 2006-03-21 Paul Brook <paul@codesourcery.com>
1299 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1301 2006-03-20 Paul Brook <paul@codesourcery.com>
1303 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1304 (do_t_branch): Encode branches inside IT blocks as unconditional.
1305 (do_t_cps): New function.
1306 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1307 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1308 (opcode_lookup): Allow conditional suffixes on all instructions in
1309 Thumb mode.
1310 (md_assemble): Advance condexec state before checking for errors.
1311 (insns): Use do_t_cps.
1313 2006-03-20 Paul Brook <paul@codesourcery.com>
1315 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1316 outputting the insn.
1318 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1320 * config/tc-vax.c: Update copyright year.
1321 * config/tc-vax.h: Likewise.
1323 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1325 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1326 make it static.
1327 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1329 2006-03-17 Paul Brook <paul@codesourcery.com>
1331 * config/tc-arm.c (insns): Add ldm and stm.
1333 2006-03-17 Ben Elliston <bje@au.ibm.com>
1335 PR gas/2446
1336 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1338 2006-03-16 Paul Brook <paul@codesourcery.com>
1340 * config/tc-arm.c (insns): Add "svc".
1342 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1344 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1345 flag and avoid double underscore prefixes.
1347 2006-03-10 Paul Brook <paul@codesourcery.com>
1349 * config/tc-arm.c (md_begin): Handle EABIv5.
1350 (arm_eabis): Add EF_ARM_EABI_VER5.
1351 * doc/c-arm.texi: Document -meabi=5.
1353 2006-03-10 Ben Elliston <bje@au.ibm.com>
1355 * app.c (do_scrub_chars): Simplify string handling.
1357 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1358 Daniel Jacobowitz <dan@codesourcery.com>
1359 Zack Weinberg <zack@codesourcery.com>
1360 Nathan Sidwell <nathan@codesourcery.com>
1361 Paul Brook <paul@codesourcery.com>
1362 Ricardo Anguiano <anguiano@codesourcery.com>
1363 Phil Edwards <phil@codesourcery.com>
1365 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1366 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1367 R_ARM_ABS12 reloc.
1368 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1369 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1370 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1372 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1374 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1375 even when using the text-section-literals option.
1377 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1379 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1380 and cf.
1381 (m68k_ip): <case 'J'> Check we have some control regs.
1382 (md_parse_option): Allow raw arch switch.
1383 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1384 whether 68881 or cfloat was meant by -mfloat.
1385 (md_show_usage): Adjust extension display.
1386 (m68k_elf_final_processing): Adjust.
1388 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1390 * config/tc-avr.c (avr_mod_hash_value): New function.
1391 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1392 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1393 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1394 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1395 of (int).
1396 (tc_gen_reloc): Handle substractions of symbols, if possible do
1397 fixups, abort otherwise.
1398 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1399 tc_fix_adjustable): Define.
1401 2006-03-02 James E Wilson <wilson@specifix.com>
1403 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1404 change the template, then clear md.slot[curr].end_of_insn_group.
1406 2006-02-28 Jan Beulich <jbeulich@novell.com>
1408 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1410 2006-02-28 Jan Beulich <jbeulich@novell.com>
1412 PR/1070
1413 * macro.c (getstring): Don't treat parentheses special anymore.
1414 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1415 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1416 characters.
1418 2006-02-28 Mat <mat@csail.mit.edu>
1420 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1422 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1424 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1425 field.
1426 (CFI_signal_frame): Define.
1427 (cfi_pseudo_table): Add .cfi_signal_frame.
1428 (dot_cfi): Handle CFI_signal_frame.
1429 (output_cie): Handle cie->signal_frame.
1430 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1431 different. Copy signal_frame from FDE to newly created CIE.
1432 * doc/as.texinfo: Document .cfi_signal_frame.
1434 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1436 * doc/Makefile.am: Add html target.
1437 * doc/Makefile.in: Regenerate.
1438 * po/Make-in: Add html target.
1440 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1442 * config/tc-i386.c (output_insn): Support Intel Merom New
1443 Instructions.
1445 * config/tc-i386.h (CpuMNI): New.
1446 (CpuUnknownFlags): Add CpuMNI.
1448 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1450 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1451 (hpriv_reg_table): New table for hyperprivileged registers.
1452 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1453 register encoding.
1455 2006-02-24 DJ Delorie <dj@redhat.com>
1457 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1458 (tc_gen_reloc): Don't define.
1459 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1460 (OPTION_LINKRELAX): New.
1461 (md_longopts): Add it.
1462 (m32c_relax): New.
1463 (md_parse_options): Set it.
1464 (md_assemble): Emit relaxation relocs as needed.
1465 (md_convert_frag): Emit relaxation relocs as needed.
1466 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1467 (m32c_apply_fix): New.
1468 (tc_gen_reloc): New.
1469 (m32c_force_relocation): Force out jump relocs when relaxing.
1470 (m32c_fix_adjustable): Return false if relaxing.
1472 2006-02-24 Paul Brook <paul@codesourcery.com>
1474 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1475 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1476 (struct asm_barrier_opt): Define.
1477 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1478 (parse_psr): Accept V7M psr names.
1479 (parse_barrier): New function.
1480 (enum operand_parse_code): Add OP_oBARRIER.
1481 (parse_operands): Implement OP_oBARRIER.
1482 (do_barrier): New function.
1483 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1484 (do_t_cpsi): Add V7M restrictions.
1485 (do_t_mrs, do_t_msr): Validate V7M variants.
1486 (md_assemble): Check for NULL variants.
1487 (v7m_psrs, barrier_opt_names): New tables.
1488 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1489 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1490 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1491 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1492 (struct cpu_arch_ver_table): Define.
1493 (cpu_arch_ver): New.
1494 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1495 Tag_CPU_arch_profile.
1496 * doc/c-arm.texi: Document new cpu and arch options.
1498 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1500 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1502 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1504 * config/tc-ia64.c: Update copyright years.
1506 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1508 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1509 SDM 2.2.
1511 2005-02-22 Paul Brook <paul@codesourcery.com>
1513 * config/tc-arm.c (do_pld): Remove incorrect write to
1514 inst.instruction.
1515 (encode_thumb32_addr_mode): Use correct operand.
1517 2006-02-21 Paul Brook <paul@codesourcery.com>
1519 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1521 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1522 Anil Paranjape <anilp1@kpitcummins.com>
1523 Shilin Shakti <shilins@kpitcummins.com>
1525 * Makefile.am: Add xc16x related entry.
1526 * Makefile.in: Regenerate.
1527 * configure.in: Added xc16x related entry.
1528 * configure: Regenerate.
1529 * config/tc-xc16x.h: New file
1530 * config/tc-xc16x.c: New file
1531 * doc/c-xc16x.texi: New file for xc16x
1532 * doc/all.texi: Entry for xc16x
1533 * doc/Makefile.texi: Added c-xc16x.texi
1534 * NEWS: Announce the support for the new target.
1536 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1538 * configure.tgt: set emulation for mips-*-netbsd*
1540 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1542 * config.in: Rebuilt.
1544 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1546 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1547 from 1, not 0, in error messages.
1548 (md_assemble): Simplify special-case check for ENTRY instructions.
1549 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1550 operand in error message.
1552 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1554 * configure.tgt (arm-*-linux-gnueabi*): Change to
1555 arm-*-linux-*eabi*.
1557 2006-02-10 Nick Clifton <nickc@redhat.com>
1559 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1560 32-bit value is propagated into the upper bits of a 64-bit long.
1562 * config/tc-arc.c (init_opcode_tables): Fix cast.
1563 (arc_extoper, md_operand): Likewise.
1565 2006-02-09 David Heine <dlheine@tensilica.com>
1567 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1568 each relaxation step.
1570 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1572 * configure.in (CHECK_DECLS): Add vsnprintf.
1573 * configure: Regenerate.
1574 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1575 include/declare here, but...
1576 * as.h: Move code detecting VARARGS idiom to the top.
1577 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1578 (vsnprintf): Declare if not already declared.
1580 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1582 * as.c (close_output_file): New.
1583 (main): Register close_output_file with xatexit before
1584 dump_statistics. Don't call output_file_close.
1586 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1588 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1589 mcf5329_control_regs): New.
1590 (not_current_architecture, selected_arch, selected_cpu): New.
1591 (m68k_archs, m68k_extensions): New.
1592 (archs): Renamed to ...
1593 (m68k_cpus): ... here. Adjust.
1594 (n_arches): Remove.
1595 (md_pseudo_table): Add arch and cpu directives.
1596 (find_cf_chip, m68k_ip): Adjust table scanning.
1597 (no_68851, no_68881): Remove.
1598 (md_assemble): Lazily initialize.
1599 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1600 (md_init_after_args): Move functionality to m68k_init_arch.
1601 (mri_chip): Adjust table scanning.
1602 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1603 options with saner parsing.
1604 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1605 m68k_init_arch): New.
1606 (s_m68k_cpu, s_m68k_arch): New.
1607 (md_show_usage): Adjust.
1608 (m68k_elf_final_processing): Set CF EF flags.
1609 * config/tc-m68k.h (m68k_init_after_args): Remove.
1610 (tc_init_after_args): Remove.
1611 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1612 (M68k-Directives): Document .arch and .cpu directives.
1614 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1616 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1617 synonyms for equ and defl.
1618 (z80_cons_fix_new): New function.
1619 (emit_byte): Disallow relative jumps to absolute locations.
1620 (emit_data): Only handle defb, prototype changed, because defb is
1621 now handled as pseudo-op rather than an instruction.
1622 (instab): Entries for defb,defw,db,dw moved from here...
1623 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1624 Add entries for def24,def32,d24,d32.
1625 (md_assemble): Improved error handling.
1626 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1627 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1628 (z80_cons_fix_new): Declare.
1629 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1630 (def24,d24,def32,d32): New pseudo-ops.
1632 2006-02-02 Paul Brook <paul@codesourcery.com>
1634 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1636 2005-02-02 Paul Brook <paul@codesourcery.com>
1638 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1639 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1640 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1641 T2_OPCODE_RSB): Define.
1642 (thumb32_negate_data_op): New function.
1643 (md_apply_fix): Use it.
1645 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1647 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1648 fields.
1649 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1650 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1651 subtracted symbols.
1652 (relaxation_requirements): Add pfinish_frag argument and use it to
1653 replace setting tinsn->record_fix fields.
1654 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1655 and vinsn_to_insnbuf. Remove references to record_fix and
1656 slot_sub_symbols fields.
1657 (xtensa_mark_narrow_branches): Delete unused code.
1658 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1659 a symbol.
1660 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1661 record_fix fields.
1662 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1663 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1664 of the record_fix field. Simplify error messages for unexpected
1665 symbolic operands.
1666 (set_expr_symbol_offset_diff): Delete.
1668 2006-01-31 Paul Brook <paul@codesourcery.com>
1670 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1672 2006-01-31 Paul Brook <paul@codesourcery.com>
1673 Richard Earnshaw <rearnsha@arm.com>
1675 * config/tc-arm.c: Use arm_feature_set.
1676 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1677 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1678 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1679 New variables.
1680 (insns): Use them.
1681 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1682 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1683 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1684 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1685 feature flags.
1686 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1687 (arm_opts): Move old cpu/arch options from here...
1688 (arm_legacy_opts): ... to here.
1689 (md_parse_option): Search arm_legacy_opts.
1690 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1691 (arm_float_abis, arm_eabis): Make const.
1693 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1695 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1697 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1699 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1700 in load immediate intruction.
1702 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1704 * config/bfin-parse.y (value_match): Use correct conversion
1705 specifications in template string for __FILE__ and __LINE__.
1706 (binary): Ditto.
1707 (unary): Ditto.
1709 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1711 Introduce TLS descriptors for i386 and x86_64.
1712 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1713 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1714 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1715 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1716 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1717 displacement bits.
1718 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1719 (lex_got): Handle @tlsdesc and @tlscall.
1720 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1722 2006-01-11 Nick Clifton <nickc@redhat.com>
1724 Fixes for building on 64-bit hosts:
1725 * config/tc-avr.c (mod_index): New union to allow conversion
1726 between pointers and integers.
1727 (md_begin, avr_ldi_expression): Use it.
1728 * config/tc-i370.c (md_assemble): Add cast for argument to print
1729 statement.
1730 * config/tc-tic54x.c (subsym_substitute): Likewise.
1731 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1732 opindex field of fr_cgen structure into a pointer so that it can
1733 be stored in a frag.
1734 * config/tc-mn10300.c (md_assemble): Likewise.
1735 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1736 types.
1737 * config/tc-v850.c: Replace uses of (int) casts with correct
1738 types.
1740 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1742 PR gas/2117
1743 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1745 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1747 PR gas/2101
1748 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1749 a local-label reference.
1751 For older changes see ChangeLog-2005
1752 \f
1753 Local Variables:
1754 mode: change-log
1755 left-margin: 8
1756 fill-column: 74
1757 version-control: never
1758 End: