opcodes/tilegx-opc.c

   1 /* TILE-Gx opcode information.
   2
   3    Copyright 2011 Free Software Foundation, Inc.
   4
   5    This program is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 3 of the License, or
   8    (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  18     MA 02110-1301, USA.  */
  19
  20 /* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else.  */
  21 #define BFD_RELOC(x) BFD_RELOC_##x
  22
  23 #include "bfd.h"
  24
  25 /* Special registers.  */
  26 #define TREG_LR   55
  27 #define TREG_SN   56
  28 #define TREG_ZERO 63
  29
  30 #if defined(__KERNEL__) || defined(_LIBC)
  31 /* FIXME: Rename this. */
  32 #include <asm/opcode-tile_64.h>
  33 #define DISASM_ONLY
  34 #else
  35 #include "opcode/tilegx.h"
  36 #endif
  37
  38 #ifdef __KERNEL__
  39 #include <linux/stddef.h>
  40 #else
  41 #include <stddef.h>
  42 #endif
  43
  44 const struct tilegx_opcode tilegx_opcodes[334] =
  45 {
  46  { "bpt", TILEGX_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
  47     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
  48 #ifndef DISASM_ONLY
  49     {
  50       0ULL,
  51       0xffffffff80000000ULL,
  52       0ULL,
  53       0ULL,
  54       0ULL
  55     },
  56     {
  57       -1ULL,
  58       0x286a44ae00000000ULL,
  59       -1ULL,
  60       -1ULL,
  61       -1ULL
  62     }
  63 #endif
  64   },
  65   { "info", TILEGX_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
  66     { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } },
  67 #ifndef DISASM_ONLY
  68     {
  69       0xc00000007ff00fffULL,
  70       0xfff807ff80000000ULL,
  71       0x0000000078000fffULL,
  72       0x3c0007ff80000000ULL,
  73       0ULL
  74     },
  75     {
  76       0x0000000040300fffULL,
  77       0x181807ff80000000ULL,
  78       0x0000000010000fffULL,
  79       0x0c0007ff80000000ULL,
  80       -1ULL
  81     }
  82 #endif
  83   },
  84   { "infol", TILEGX_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
  85     { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } },
  86 #ifndef DISASM_ONLY
  87     {
  88       0xc000000070000fffULL,
  89       0xf80007ff80000000ULL,
  90       0ULL,
  91       0ULL,
  92       0ULL
  93     },
  94     {
  95       0x0000000070000fffULL,
  96       0x380007ff80000000ULL,
  97       -1ULL,
  98       -1ULL,
  99       -1ULL
 100     }
 101 #endif
 102   },
 103   { "move", TILEGX_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
 104     { { 6, 7 }, { 8, 9 }, { 10, 11 }, { 12, 13 }, { 0, } },
 105 #ifndef DISASM_ONLY
 106     {
 107       0xc00000007ffff000ULL,
 108       0xfffff80000000000ULL,
 109       0x00000000780ff000ULL,
 110       0x3c07f80000000000ULL,
 111       0ULL
 112     },
 113     {
 114       0x000000005107f000ULL,
 115       0x283bf80000000000ULL,
 116       0x00000000500bf000ULL,
 117       0x2c05f80000000000ULL,
 118       -1ULL
 119     }
 120 #endif
 121   },
 122   { "movei", TILEGX_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
 123     { { 6, 0 }, { 8, 1 }, { 10, 2 }, { 12, 3 }, { 0, } },
 124 #ifndef DISASM_ONLY
 125     {
 126       0xc00000007ff00fc0ULL,
 127       0xfff807e000000000ULL,
 128       0x0000000078000fc0ULL,
 129       0x3c0007e000000000ULL,
 130       0ULL
 131     },
 132     {
 133       0x0000000040100fc0ULL,
 134       0x180807e000000000ULL,
 135       0x0000000000000fc0ULL,
 136       0x040007e000000000ULL,
 137       -1ULL
 138     }
 139 #endif
 140   },
 141   { "moveli", TILEGX_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
 142     { { 6, 4 }, { 8, 5 }, { 0, }, { 0, }, { 0, } },
 143 #ifndef DISASM_ONLY
 144     {
 145       0xc000000070000fc0ULL,
 146       0xf80007e000000000ULL,
 147       0ULL,
 148       0ULL,
 149       0ULL
 150     },
 151     {
 152       0x0000000010000fc0ULL,
 153       0x000007e000000000ULL,
 154       -1ULL,
 155       -1ULL,
 156       -1ULL
 157     }
 158 #endif
 159   },
 160   { "prefetch", TILEGX_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
 161     { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } },
 162 #ifndef DISASM_ONLY
 163     {
 164       0ULL,
 165       0xfffff81f80000000ULL,
 166       0ULL,
 167       0ULL,
 168       0xc3f8000004000000ULL
 169     },
 170     {
 171       -1ULL,
 172       0x286a801f80000000ULL,
 173       -1ULL,
 174       -1ULL,
 175       0x41f8000004000000ULL
 176     }
 177 #endif
 178   },
 179   { "prefetch_add_l1", TILEGX_OPC_PREFETCH_ADD_L1, 0x2, 2, TREG_ZERO, 1,
 180     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
 181 #ifndef DISASM_ONLY
 182     {
 183       0ULL,
 184       0xfff8001f80000000ULL,
 185       0ULL,
 186       0ULL,
 187       0ULL
 188     },
 189     {
 190       -1ULL,
 191       0x1840001f80000000ULL,
 192       -1ULL,
 193       -1ULL,
 194       -1ULL
 195     }
 196 #endif
 197   },
 198   { "prefetch_add_l1_fault", TILEGX_OPC_PREFETCH_ADD_L1_FAULT, 0x2, 2, TREG_ZERO, 1,
 199     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
 200 #ifndef DISASM_ONLY
 201     {
 202       0ULL,
 203       0xfff8001f80000000ULL,
 204       0ULL,
 205       0ULL,
 206       0ULL
 207     },
 208     {
 209       -1ULL,
 210       0x1838001f80000000ULL,
 211       -1ULL,
 212       -1ULL,
 213       -1ULL
 214     }
 215 #endif
 216   },
 217   { "prefetch_add_l2", TILEGX_OPC_PREFETCH_ADD_L2, 0x2, 2, TREG_ZERO, 1,
 218     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
 219 #ifndef DISASM_ONLY
 220     {
 221       0ULL,
 222       0xfff8001f80000000ULL,
 223       0ULL,
 224       0ULL,
 225       0ULL
 226     },
 227     {
 228       -1ULL,
 229       0x1850001f80000000ULL,
 230       -1ULL,
 231       -1ULL,
 232       -1ULL
 233     }
 234 #endif
 235   },
 236   { "prefetch_add_l2_fault", TILEGX_OPC_PREFETCH_ADD_L2_FAULT, 0x2, 2, TREG_ZERO, 1,
 237     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
 238 #ifndef DISASM_ONLY
 239     {
 240       0ULL,
 241       0xfff8001f80000000ULL,
 242       0ULL,
 243       0ULL,
 244       0ULL
 245     },
 246     {
 247       -1ULL,
 248       0x1848001f80000000ULL,
 249       -1ULL,
 250       -1ULL,
 251       -1ULL
 252     }
 253 #endif
 254   },
 255   { "prefetch_add_l3", TILEGX_OPC_PREFETCH_ADD_L3, 0x2, 2, TREG_ZERO, 1,
 256     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
 257 #ifndef DISASM_ONLY
 258     {
 259       0ULL,
 260       0xfff8001f80000000ULL,
 261       0ULL,
 262       0ULL,
 263       0ULL
 264     },
 265     {
 266       -1ULL,
 267       0x1860001f80000000ULL,
 268       -1ULL,
 269       -1ULL,
 270       -1ULL
 271     }
 272 #endif
 273   },
 274   { "prefetch_add_l3_fault", TILEGX_OPC_PREFETCH_ADD_L3_FAULT, 0x2, 2, TREG_ZERO, 1,
 275     { { 0, }, { 15, 1 }, { 0, }, { 0, }, { 0, } },
 276 #ifndef DISASM_ONLY
 277     {
 278       0ULL,
 279       0xfff8001f80000000ULL,
 280       0ULL,
 281       0ULL,
 282       0ULL
 283     },
 284     {
 285       -1ULL,
 286       0x1858001f80000000ULL,
 287       -1ULL,
 288       -1ULL,
 289       -1ULL
 290     }
 291 #endif
 292   },
 293   { "prefetch_l1", TILEGX_OPC_PREFETCH_L1, 0x12, 1, TREG_ZERO, 1,
 294     { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } },
 295 #ifndef DISASM_ONLY
 296     {
 297       0ULL,
 298       0xfffff81f80000000ULL,
 299       0ULL,
 300       0ULL,
 301       0xc3f8000004000000ULL
 302     },
 303     {
 304       -1ULL,
 305       0x286a801f80000000ULL,
 306       -1ULL,
 307       -1ULL,
 308       0x41f8000004000000ULL
 309     }
 310 #endif
 311   },
 312   { "prefetch_l1_fault", TILEGX_OPC_PREFETCH_L1_FAULT, 0x12, 1, TREG_ZERO, 1,
 313     { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } },
 314 #ifndef DISASM_ONLY
 315     {
 316       0ULL,
 317       0xfffff81f80000000ULL,
 318       0ULL,
 319       0ULL,
 320       0xc3f8000004000000ULL
 321     },
 322     {
 323       -1ULL,
 324       0x286a781f80000000ULL,
 325       -1ULL,
 326       -1ULL,
 327       0x41f8000000000000ULL
 328     }
 329 #endif
 330   },
 331   { "prefetch_l2", TILEGX_OPC_PREFETCH_L2, 0x12, 1, TREG_ZERO, 1,
 332     { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } },
 333 #ifndef DISASM_ONLY
 334     {
 335       0ULL,
 336       0xfffff81f80000000ULL,
 337       0ULL,
 338       0ULL,
 339       0xc3f8000004000000ULL
 340     },
 341     {
 342       -1ULL,
 343       0x286a901f80000000ULL,
 344       -1ULL,
 345       -1ULL,
 346       0x43f8000004000000ULL
 347     }
 348 #endif
 349   },
 350   { "prefetch_l2_fault", TILEGX_OPC_PREFETCH_L2_FAULT, 0x12, 1, TREG_ZERO, 1,
 351     { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } },
 352 #ifndef DISASM_ONLY
 353     {
 354       0ULL,
 355       0xfffff81f80000000ULL,
 356       0ULL,
 357       0ULL,
 358       0xc3f8000004000000ULL
 359     },
 360     {
 361       -1ULL,
 362       0x286a881f80000000ULL,
 363       -1ULL,
 364       -1ULL,
 365       0x43f8000000000000ULL
 366     }
 367 #endif
 368   },
 369   { "prefetch_l3", TILEGX_OPC_PREFETCH_L3, 0x12, 1, TREG_ZERO, 1,
 370     { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } },
 371 #ifndef DISASM_ONLY
 372     {
 373       0ULL,
 374       0xfffff81f80000000ULL,
 375       0ULL,
 376       0ULL,
 377       0xc3f8000004000000ULL
 378     },
 379     {
 380       -1ULL,
 381       0x286aa01f80000000ULL,
 382       -1ULL,
 383       -1ULL,
 384       0x83f8000000000000ULL
 385     }
 386 #endif
 387   },
 388   { "prefetch_l3_fault", TILEGX_OPC_PREFETCH_L3_FAULT, 0x12, 1, TREG_ZERO, 1,
 389     { { 0, }, { 9 }, { 0, }, { 0, }, { 14 } },
 390 #ifndef DISASM_ONLY
 391     {
 392       0ULL,
 393       0xfffff81f80000000ULL,
 394       0ULL,
 395       0ULL,
 396       0xc3f8000004000000ULL
 397     },
 398     {
 399       -1ULL,
 400       0x286a981f80000000ULL,
 401       -1ULL,
 402       -1ULL,
 403       0x81f8000004000000ULL
 404     }
 405 #endif
 406   },
 407   { "raise", TILEGX_OPC_RAISE, 0x2, 0, TREG_ZERO, 1,
 408     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
 409 #ifndef DISASM_ONLY
 410     {
 411       0ULL,
 412       0xffffffff80000000ULL,
 413       0ULL,
 414       0ULL,
 415       0ULL
 416     },
 417     {
 418       -1ULL,
 419       0x286a44ae80000000ULL,
 420       -1ULL,
 421       -1ULL,
 422       -1ULL
 423     }
 424 #endif
 425   },
 426   { "add", TILEGX_OPC_ADD, 0xf, 3, TREG_ZERO, 1,
 427     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
 428 #ifndef DISASM_ONLY
 429     {
 430       0xc00000007ffc0000ULL,
 431       0xfffe000000000000ULL,
 432       0x00000000780c0000ULL,
 433       0x3c06000000000000ULL,
 434       0ULL
 435     },
 436     {
 437       0x00000000500c0000ULL,
 438       0x2806000000000000ULL,
 439       0x0000000028040000ULL,
 440       0x1802000000000000ULL,
 441       -1ULL
 442     }
 443 #endif
 444   },
 445   { "addi", TILEGX_OPC_ADDI, 0xf, 3, TREG_ZERO, 1,
 446     { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
 447 #ifndef DISASM_ONLY
 448     {
 449       0xc00000007ff00000ULL,
 450       0xfff8000000000000ULL,
 451       0x0000000078000000ULL,
 452       0x3c00000000000000ULL,
 453       0ULL
 454     },
 455     {
 456       0x0000000040100000ULL,
 457       0x1808000000000000ULL,
 458       0ULL,
 459       0x0400000000000000ULL,
 460       -1ULL
 461     }
 462 #endif
 463   },
 464   { "addli", TILEGX_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1,
 465     { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } },
 466 #ifndef DISASM_ONLY
 467     {
 468       0xc000000070000000ULL,
 469       0xf800000000000000ULL,
 470       0ULL,
 471       0ULL,
 472       0ULL
 473     },
 474     {
 475       0x0000000010000000ULL,
 476       0ULL,
 477       -1ULL,
 478       -1ULL,
 479       -1ULL
 480     }
 481 #endif
 482   },
 483   { "addx", TILEGX_OPC_ADDX, 0xf, 3, TREG_ZERO, 1,
 484     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
 485 #ifndef DISASM_ONLY
 486     {
 487       0xc00000007ffc0000ULL,
 488       0xfffe000000000000ULL,
 489       0x00000000780c0000ULL,
 490       0x3c06000000000000ULL,
 491       0ULL
 492     },
 493     {
 494       0x0000000050080000ULL,
 495       0x2804000000000000ULL,
 496       0x0000000028000000ULL,
 497       0x1800000000000000ULL,
 498       -1ULL
 499     }
 500 #endif
 501   },
 502   { "addxi", TILEGX_OPC_ADDXI, 0xf, 3, TREG_ZERO, 1,
 503     { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
 504 #ifndef DISASM_ONLY
 505     {
 506       0xc00000007ff00000ULL,
 507       0xfff8000000000000ULL,
 508       0x0000000078000000ULL,
 509       0x3c00000000000000ULL,
 510       0ULL
 511     },
 512     {
 513       0x0000000040200000ULL,
 514       0x1810000000000000ULL,
 515       0x0000000008000000ULL,
 516       0x0800000000000000ULL,
 517       -1ULL
 518     }
 519 #endif
 520   },
 521   { "addxli", TILEGX_OPC_ADDXLI, 0x3, 3, TREG_ZERO, 1,
 522     { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } },
 523 #ifndef DISASM_ONLY
 524     {
 525       0xc000000070000000ULL,
 526       0xf800000000000000ULL,
 527       0ULL,
 528       0ULL,
 529       0ULL
 530     },
 531     {
 532       0x0000000020000000ULL,
 533       0x0800000000000000ULL,
 534       -1ULL,
 535       -1ULL,
 536       -1ULL
 537     }
 538 #endif
 539   },
 540   { "addxsc", TILEGX_OPC_ADDXSC, 0x3, 3, TREG_ZERO, 1,
 541     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
 542 #ifndef DISASM_ONLY
 543     {
 544       0xc00000007ffc0000ULL,
 545       0xfffe000000000000ULL,
 546       0ULL,
 547       0ULL,
 548       0ULL
 549     },
 550     {
 551       0x0000000050040000ULL,
 552       0x2802000000000000ULL,
 553       -1ULL,
 554       -1ULL,
 555       -1ULL
 556     }
 557 #endif
 558   },
 559   { "and", TILEGX_OPC_AND, 0xf, 3, TREG_ZERO, 1,
 560     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
 561 #ifndef DISASM_ONLY
 562     {
 563       0xc00000007ffc0000ULL,
 564       0xfffe000000000000ULL,
 565       0x00000000780c0000ULL,
 566       0x3c06000000000000ULL,
 567       0ULL
 568     },
 569     {
 570       0x0000000050100000ULL,
 571       0x2808000000000000ULL,
 572       0x0000000050000000ULL,
 573       0x2c00000000000000ULL,
 574       -1ULL
 575     }
 576 #endif
 577   },
 578   { "andi", TILEGX_OPC_ANDI, 0xf, 3, TREG_ZERO, 1,
 579     { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
 580 #ifndef DISASM_ONLY
 581     {
 582       0xc00000007ff00000ULL,
 583       0xfff8000000000000ULL,
 584       0x0000000078000000ULL,
 585       0x3c00000000000000ULL,
 586       0ULL
 587     },
 588     {
 589       0x0000000040300000ULL,
 590       0x1818000000000000ULL,
 591       0x0000000010000000ULL,
 592       0x0c00000000000000ULL,
 593       -1ULL
 594     }
 595 #endif
 596   },
 597   { "beqz", TILEGX_OPC_BEQZ, 0x2, 2, TREG_ZERO, 1,
 598     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 599 #ifndef DISASM_ONLY
 600     {
 601       0ULL,
 602       0xffc0000000000000ULL,
 603       0ULL,
 604       0ULL,
 605       0ULL
 606     },
 607     {
 608       -1ULL,
 609       0x1440000000000000ULL,
 610       -1ULL,
 611       -1ULL,
 612       -1ULL
 613     }
 614 #endif
 615   },
 616   { "beqzt", TILEGX_OPC_BEQZT, 0x2, 2, TREG_ZERO, 1,
 617     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 618 #ifndef DISASM_ONLY
 619     {
 620       0ULL,
 621       0xffc0000000000000ULL,
 622       0ULL,
 623       0ULL,
 624       0ULL
 625     },
 626     {
 627       -1ULL,
 628       0x1400000000000000ULL,
 629       -1ULL,
 630       -1ULL,
 631       -1ULL
 632     }
 633 #endif
 634   },
 635   { "bfexts", TILEGX_OPC_BFEXTS, 0x1, 4, TREG_ZERO, 1,
 636     { { 6, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
 637 #ifndef DISASM_ONLY
 638     {
 639       0xc00000007f000000ULL,
 640       0ULL,
 641       0ULL,
 642       0ULL,
 643       0ULL
 644     },
 645     {
 646       0x0000000034000000ULL,
 647       -1ULL,
 648       -1ULL,
 649       -1ULL,
 650       -1ULL
 651     }
 652 #endif
 653   },
 654   { "bfextu", TILEGX_OPC_BFEXTU, 0x1, 4, TREG_ZERO, 1,
 655     { { 6, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
 656 #ifndef DISASM_ONLY
 657     {
 658       0xc00000007f000000ULL,
 659       0ULL,
 660       0ULL,
 661       0ULL,
 662       0ULL
 663     },
 664     {
 665       0x0000000035000000ULL,
 666       -1ULL,
 667       -1ULL,
 668       -1ULL,
 669       -1ULL
 670     }
 671 #endif
 672   },
 673   { "bfins", TILEGX_OPC_BFINS, 0x1, 4, TREG_ZERO, 1,
 674     { { 23, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
 675 #ifndef DISASM_ONLY
 676     {
 677       0xc00000007f000000ULL,
 678       0ULL,
 679       0ULL,
 680       0ULL,
 681       0ULL
 682     },
 683     {
 684       0x0000000036000000ULL,
 685       -1ULL,
 686       -1ULL,
 687       -1ULL,
 688       -1ULL
 689     }
 690 #endif
 691   },
 692   { "bgez", TILEGX_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1,
 693     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 694 #ifndef DISASM_ONLY
 695     {
 696       0ULL,
 697       0xffc0000000000000ULL,
 698       0ULL,
 699       0ULL,
 700       0ULL
 701     },
 702     {
 703       -1ULL,
 704       0x14c0000000000000ULL,
 705       -1ULL,
 706       -1ULL,
 707       -1ULL
 708     }
 709 #endif
 710   },
 711   { "bgezt", TILEGX_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1,
 712     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 713 #ifndef DISASM_ONLY
 714     {
 715       0ULL,
 716       0xffc0000000000000ULL,
 717       0ULL,
 718       0ULL,
 719       0ULL
 720     },
 721     {
 722       -1ULL,
 723       0x1480000000000000ULL,
 724       -1ULL,
 725       -1ULL,
 726       -1ULL
 727     }
 728 #endif
 729   },
 730   { "bgtz", TILEGX_OPC_BGTZ, 0x2, 2, TREG_ZERO, 1,
 731     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 732 #ifndef DISASM_ONLY
 733     {
 734       0ULL,
 735       0xffc0000000000000ULL,
 736       0ULL,
 737       0ULL,
 738       0ULL
 739     },
 740     {
 741       -1ULL,
 742       0x1540000000000000ULL,
 743       -1ULL,
 744       -1ULL,
 745       -1ULL
 746     }
 747 #endif
 748   },
 749   { "bgtzt", TILEGX_OPC_BGTZT, 0x2, 2, TREG_ZERO, 1,
 750     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 751 #ifndef DISASM_ONLY
 752     {
 753       0ULL,
 754       0xffc0000000000000ULL,
 755       0ULL,
 756       0ULL,
 757       0ULL
 758     },
 759     {
 760       -1ULL,
 761       0x1500000000000000ULL,
 762       -1ULL,
 763       -1ULL,
 764       -1ULL
 765     }
 766 #endif
 767   },
 768   { "blbc", TILEGX_OPC_BLBC, 0x2, 2, TREG_ZERO, 1,
 769     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 770 #ifndef DISASM_ONLY
 771     {
 772       0ULL,
 773       0xffc0000000000000ULL,
 774       0ULL,
 775       0ULL,
 776       0ULL
 777     },
 778     {
 779       -1ULL,
 780       0x15c0000000000000ULL,
 781       -1ULL,
 782       -1ULL,
 783       -1ULL
 784     }
 785 #endif
 786   },
 787   { "blbct", TILEGX_OPC_BLBCT, 0x2, 2, TREG_ZERO, 1,
 788     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 789 #ifndef DISASM_ONLY
 790     {
 791       0ULL,
 792       0xffc0000000000000ULL,
 793       0ULL,
 794       0ULL,
 795       0ULL
 796     },
 797     {
 798       -1ULL,
 799       0x1580000000000000ULL,
 800       -1ULL,
 801       -1ULL,
 802       -1ULL
 803     }
 804 #endif
 805   },
 806   { "blbs", TILEGX_OPC_BLBS, 0x2, 2, TREG_ZERO, 1,
 807     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 808 #ifndef DISASM_ONLY
 809     {
 810       0ULL,
 811       0xffc0000000000000ULL,
 812       0ULL,
 813       0ULL,
 814       0ULL
 815     },
 816     {
 817       -1ULL,
 818       0x1640000000000000ULL,
 819       -1ULL,
 820       -1ULL,
 821       -1ULL
 822     }
 823 #endif
 824   },
 825   { "blbst", TILEGX_OPC_BLBST, 0x2, 2, TREG_ZERO, 1,
 826     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 827 #ifndef DISASM_ONLY
 828     {
 829       0ULL,
 830       0xffc0000000000000ULL,
 831       0ULL,
 832       0ULL,
 833       0ULL
 834     },
 835     {
 836       -1ULL,
 837       0x1600000000000000ULL,
 838       -1ULL,
 839       -1ULL,
 840       -1ULL
 841     }
 842 #endif
 843   },
 844   { "blez", TILEGX_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1,
 845     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 846 #ifndef DISASM_ONLY
 847     {
 848       0ULL,
 849       0xffc0000000000000ULL,
 850       0ULL,
 851       0ULL,
 852       0ULL
 853     },
 854     {
 855       -1ULL,
 856       0x16c0000000000000ULL,
 857       -1ULL,
 858       -1ULL,
 859       -1ULL
 860     }
 861 #endif
 862   },
 863   { "blezt", TILEGX_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1,
 864     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 865 #ifndef DISASM_ONLY
 866     {
 867       0ULL,
 868       0xffc0000000000000ULL,
 869       0ULL,
 870       0ULL,
 871       0ULL
 872     },
 873     {
 874       -1ULL,
 875       0x1680000000000000ULL,
 876       -1ULL,
 877       -1ULL,
 878       -1ULL
 879     }
 880 #endif
 881   },
 882   { "bltz", TILEGX_OPC_BLTZ, 0x2, 2, TREG_ZERO, 1,
 883     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 884 #ifndef DISASM_ONLY
 885     {
 886       0ULL,
 887       0xffc0000000000000ULL,
 888       0ULL,
 889       0ULL,
 890       0ULL
 891     },
 892     {
 893       -1ULL,
 894       0x1740000000000000ULL,
 895       -1ULL,
 896       -1ULL,
 897       -1ULL
 898     }
 899 #endif
 900   },
 901   { "bltzt", TILEGX_OPC_BLTZT, 0x2, 2, TREG_ZERO, 1,
 902     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 903 #ifndef DISASM_ONLY
 904     {
 905       0ULL,
 906       0xffc0000000000000ULL,
 907       0ULL,
 908       0ULL,
 909       0ULL
 910     },
 911     {
 912       -1ULL,
 913       0x1700000000000000ULL,
 914       -1ULL,
 915       -1ULL,
 916       -1ULL
 917     }
 918 #endif
 919   },
 920   { "bnez", TILEGX_OPC_BNEZ, 0x2, 2, TREG_ZERO, 1,
 921     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 922 #ifndef DISASM_ONLY
 923     {
 924       0ULL,
 925       0xffc0000000000000ULL,
 926       0ULL,
 927       0ULL,
 928       0ULL
 929     },
 930     {
 931       -1ULL,
 932       0x17c0000000000000ULL,
 933       -1ULL,
 934       -1ULL,
 935       -1ULL
 936     }
 937 #endif
 938   },
 939   { "bnezt", TILEGX_OPC_BNEZT, 0x2, 2, TREG_ZERO, 1,
 940     { { 0, }, { 9, 20 }, { 0, }, { 0, }, { 0, } },
 941 #ifndef DISASM_ONLY
 942     {
 943       0ULL,
 944       0xffc0000000000000ULL,
 945       0ULL,
 946       0ULL,
 947       0ULL
 948     },
 949     {
 950       -1ULL,
 951       0x1780000000000000ULL,
 952       -1ULL,
 953       -1ULL,
 954       -1ULL
 955     }
 956 #endif
 957   },
 958   { "clz", TILEGX_OPC_CLZ, 0x5, 2, TREG_ZERO, 1,
 959     { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
 960 #ifndef DISASM_ONLY
 961     {
 962       0xc00000007ffff000ULL,
 963       0ULL,
 964       0x00000000780ff000ULL,
 965       0ULL,
 966       0ULL
 967     },
 968     {
 969       0x0000000051481000ULL,
 970       -1ULL,
 971       0x00000000300c1000ULL,
 972       -1ULL,
 973       -1ULL
 974     }
 975 #endif
 976   },
 977   { "cmoveqz", TILEGX_OPC_CMOVEQZ, 0x5, 3, TREG_ZERO, 1,
 978     { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
 979 #ifndef DISASM_ONLY
 980     {
 981       0xc00000007ffc0000ULL,
 982       0ULL,
 983       0x00000000780c0000ULL,
 984       0ULL,
 985       0ULL
 986     },
 987     {
 988       0x0000000050140000ULL,
 989       -1ULL,
 990       0x0000000048000000ULL,
 991       -1ULL,
 992       -1ULL
 993     }
 994 #endif
 995   },
 996   { "cmovnez", TILEGX_OPC_CMOVNEZ, 0x5, 3, TREG_ZERO, 1,
 997     { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
 998 #ifndef DISASM_ONLY
 999     {
1000       0xc00000007ffc0000ULL,
1001       0ULL,
1002       0x00000000780c0000ULL,
1003       0ULL,
1004       0ULL
1005     },
1006     {
1007       0x0000000050180000ULL,
1008       -1ULL,
1009       0x0000000048040000ULL,
1010       -1ULL,
1011       -1ULL
1012     }
1013 #endif
1014   },
1015   { "cmpeq", TILEGX_OPC_CMPEQ, 0xf, 3, TREG_ZERO, 1,
1016     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1017 #ifndef DISASM_ONLY
1018     {
1019       0xc00000007ffc0000ULL,
1020       0xfffe000000000000ULL,
1021       0x00000000780c0000ULL,
1022       0x3c06000000000000ULL,
1023       0ULL
1024     },
1025     {
1026       0x00000000501c0000ULL,
1027       0x280a000000000000ULL,
1028       0x0000000040000000ULL,
1029       0x2404000000000000ULL,
1030       -1ULL
1031     }
1032 #endif
1033   },
1034   { "cmpeqi", TILEGX_OPC_CMPEQI, 0xf, 3, TREG_ZERO, 1,
1035     { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
1036 #ifndef DISASM_ONLY
1037     {
1038       0xc00000007ff00000ULL,
1039       0xfff8000000000000ULL,
1040       0x0000000078000000ULL,
1041       0x3c00000000000000ULL,
1042       0ULL
1043     },
1044     {
1045       0x0000000040400000ULL,
1046       0x1820000000000000ULL,
1047       0x0000000018000000ULL,
1048       0x1000000000000000ULL,
1049       -1ULL
1050     }
1051 #endif
1052   },
1053   { "cmpexch", TILEGX_OPC_CMPEXCH, 0x2, 3, TREG_ZERO, 1,
1054     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1055 #ifndef DISASM_ONLY
1056     {
1057       0ULL,
1058       0xfffe000000000000ULL,
1059       0ULL,
1060       0ULL,
1061       0ULL
1062     },
1063     {
1064       -1ULL,
1065       0x280e000000000000ULL,
1066       -1ULL,
1067       -1ULL,
1068       -1ULL
1069     }
1070 #endif
1071   },
1072   { "cmpexch4", TILEGX_OPC_CMPEXCH4, 0x2, 3, TREG_ZERO, 1,
1073     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1074 #ifndef DISASM_ONLY
1075     {
1076       0ULL,
1077       0xfffe000000000000ULL,
1078       0ULL,
1079       0ULL,
1080       0ULL
1081     },
1082     {
1083       -1ULL,
1084       0x280c000000000000ULL,
1085       -1ULL,
1086       -1ULL,
1087       -1ULL
1088     }
1089 #endif
1090   },
1091   { "cmples", TILEGX_OPC_CMPLES, 0xf, 3, TREG_ZERO, 1,
1092     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1093 #ifndef DISASM_ONLY
1094     {
1095       0xc00000007ffc0000ULL,
1096       0xfffe000000000000ULL,
1097       0x00000000780c0000ULL,
1098       0x3c06000000000000ULL,
1099       0ULL
1100     },
1101     {
1102       0x0000000050200000ULL,
1103       0x2810000000000000ULL,
1104       0x0000000038000000ULL,
1105       0x2000000000000000ULL,
1106       -1ULL
1107     }
1108 #endif
1109   },
1110   { "cmpleu", TILEGX_OPC_CMPLEU, 0xf, 3, TREG_ZERO, 1,
1111     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1112 #ifndef DISASM_ONLY
1113     {
1114       0xc00000007ffc0000ULL,
1115       0xfffe000000000000ULL,
1116       0x00000000780c0000ULL,
1117       0x3c06000000000000ULL,
1118       0ULL
1119     },
1120     {
1121       0x0000000050240000ULL,
1122       0x2812000000000000ULL,
1123       0x0000000038040000ULL,
1124       0x2002000000000000ULL,
1125       -1ULL
1126     }
1127 #endif
1128   },
1129   { "cmplts", TILEGX_OPC_CMPLTS, 0xf, 3, TREG_ZERO, 1,
1130     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1131 #ifndef DISASM_ONLY
1132     {
1133       0xc00000007ffc0000ULL,
1134       0xfffe000000000000ULL,
1135       0x00000000780c0000ULL,
1136       0x3c06000000000000ULL,
1137       0ULL
1138     },
1139     {
1140       0x0000000050280000ULL,
1141       0x2814000000000000ULL,
1142       0x0000000038080000ULL,
1143       0x2004000000000000ULL,
1144       -1ULL
1145     }
1146 #endif
1147   },
1148   { "cmpltsi", TILEGX_OPC_CMPLTSI, 0xf, 3, TREG_ZERO, 1,
1149     { { 6, 7, 0 }, { 8, 9, 1 }, { 10, 11, 2 }, { 12, 13, 3 }, { 0, } },
1150 #ifndef DISASM_ONLY
1151     {
1152       0xc00000007ff00000ULL,
1153       0xfff8000000000000ULL,
1154       0x0000000078000000ULL,
1155       0x3c00000000000000ULL,
1156       0ULL
1157     },
1158     {
1159       0x0000000040500000ULL,
1160       0x1828000000000000ULL,
1161       0x0000000020000000ULL,
1162       0x1400000000000000ULL,
1163       -1ULL
1164     }
1165 #endif
1166   },
1167   { "cmpltu", TILEGX_OPC_CMPLTU, 0xf, 3, TREG_ZERO, 1,
1168     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1169 #ifndef DISASM_ONLY
1170     {
1171       0xc00000007ffc0000ULL,
1172       0xfffe000000000000ULL,
1173       0x00000000780c0000ULL,
1174       0x3c06000000000000ULL,
1175       0ULL
1176     },
1177     {
1178       0x00000000502c0000ULL,
1179       0x2816000000000000ULL,
1180       0x00000000380c0000ULL,
1181       0x2006000000000000ULL,
1182       -1ULL
1183     }
1184 #endif
1185   },
1186   { "cmpltui", TILEGX_OPC_CMPLTUI, 0x3, 3, TREG_ZERO, 1,
1187     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
1188 #ifndef DISASM_ONLY
1189     {
1190       0xc00000007ff00000ULL,
1191       0xfff8000000000000ULL,
1192       0ULL,
1193       0ULL,
1194       0ULL
1195     },
1196     {
1197       0x0000000040600000ULL,
1198       0x1830000000000000ULL,
1199       -1ULL,
1200       -1ULL,
1201       -1ULL
1202     }
1203 #endif
1204   },
1205   { "cmpne", TILEGX_OPC_CMPNE, 0xf, 3, TREG_ZERO, 1,
1206     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
1207 #ifndef DISASM_ONLY
1208     {
1209       0xc00000007ffc0000ULL,
1210       0xfffe000000000000ULL,
1211       0x00000000780c0000ULL,
1212       0x3c06000000000000ULL,
1213       0ULL
1214     },
1215     {
1216       0x0000000050300000ULL,
1217       0x2818000000000000ULL,
1218       0x0000000040040000ULL,
1219       0x2406000000000000ULL,
1220       -1ULL
1221     }
1222 #endif
1223   },
1224   { "cmul", TILEGX_OPC_CMUL, 0x1, 3, TREG_ZERO, 1,
1225     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1226 #ifndef DISASM_ONLY
1227     {
1228       0xc00000007ffc0000ULL,
1229       0ULL,
1230       0ULL,
1231       0ULL,
1232       0ULL
1233     },
1234     {
1235       0x00000000504c0000ULL,
1236       -1ULL,
1237       -1ULL,
1238       -1ULL,
1239       -1ULL
1240     }
1241 #endif
1242   },
1243   { "cmula", TILEGX_OPC_CMULA, 0x1, 3, TREG_ZERO, 1,
1244     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1245 #ifndef DISASM_ONLY
1246     {
1247       0xc00000007ffc0000ULL,
1248       0ULL,
1249       0ULL,
1250       0ULL,
1251       0ULL
1252     },
1253     {
1254       0x0000000050380000ULL,
1255       -1ULL,
1256       -1ULL,
1257       -1ULL,
1258       -1ULL
1259     }
1260 #endif
1261   },
1262   { "cmulaf", TILEGX_OPC_CMULAF, 0x1, 3, TREG_ZERO, 1,
1263     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1264 #ifndef DISASM_ONLY
1265     {
1266       0xc00000007ffc0000ULL,
1267       0ULL,
1268       0ULL,
1269       0ULL,
1270       0ULL
1271     },
1272     {
1273       0x0000000050340000ULL,
1274       -1ULL,
1275       -1ULL,
1276       -1ULL,
1277       -1ULL
1278     }
1279 #endif
1280   },
1281   { "cmulf", TILEGX_OPC_CMULF, 0x1, 3, TREG_ZERO, 1,
1282     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1283 #ifndef DISASM_ONLY
1284     {
1285       0xc00000007ffc0000ULL,
1286       0ULL,
1287       0ULL,
1288       0ULL,
1289       0ULL
1290     },
1291     {
1292       0x0000000050400000ULL,
1293       -1ULL,
1294       -1ULL,
1295       -1ULL,
1296       -1ULL
1297     }
1298 #endif
1299   },
1300   { "cmulfr", TILEGX_OPC_CMULFR, 0x1, 3, TREG_ZERO, 1,
1301     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1302 #ifndef DISASM_ONLY
1303     {
1304       0xc00000007ffc0000ULL,
1305       0ULL,
1306       0ULL,
1307       0ULL,
1308       0ULL
1309     },
1310     {
1311       0x00000000503c0000ULL,
1312       -1ULL,
1313       -1ULL,
1314       -1ULL,
1315       -1ULL
1316     }
1317 #endif
1318   },
1319   { "cmulh", TILEGX_OPC_CMULH, 0x1, 3, TREG_ZERO, 1,
1320     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1321 #ifndef DISASM_ONLY
1322     {
1323       0xc00000007ffc0000ULL,
1324       0ULL,
1325       0ULL,
1326       0ULL,
1327       0ULL
1328     },
1329     {
1330       0x0000000050480000ULL,
1331       -1ULL,
1332       -1ULL,
1333       -1ULL,
1334       -1ULL
1335     }
1336 #endif
1337   },
1338   { "cmulhr", TILEGX_OPC_CMULHR, 0x1, 3, TREG_ZERO, 1,
1339     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1340 #ifndef DISASM_ONLY
1341     {
1342       0xc00000007ffc0000ULL,
1343       0ULL,
1344       0ULL,
1345       0ULL,
1346       0ULL
1347     },
1348     {
1349       0x0000000050440000ULL,
1350       -1ULL,
1351       -1ULL,
1352       -1ULL,
1353       -1ULL
1354     }
1355 #endif
1356   },
1357   { "crc32_32", TILEGX_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1,
1358     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1359 #ifndef DISASM_ONLY
1360     {
1361       0xc00000007ffc0000ULL,
1362       0ULL,
1363       0ULL,
1364       0ULL,
1365       0ULL
1366     },
1367     {
1368       0x0000000050500000ULL,
1369       -1ULL,
1370       -1ULL,
1371       -1ULL,
1372       -1ULL
1373     }
1374 #endif
1375   },
1376   { "crc32_8", TILEGX_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1,
1377     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1378 #ifndef DISASM_ONLY
1379     {
1380       0xc00000007ffc0000ULL,
1381       0ULL,
1382       0ULL,
1383       0ULL,
1384       0ULL
1385     },
1386     {
1387       0x0000000050540000ULL,
1388       -1ULL,
1389       -1ULL,
1390       -1ULL,
1391       -1ULL
1392     }
1393 #endif
1394   },
1395   { "ctz", TILEGX_OPC_CTZ, 0x5, 2, TREG_ZERO, 1,
1396     { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
1397 #ifndef DISASM_ONLY
1398     {
1399       0xc00000007ffff000ULL,
1400       0ULL,
1401       0x00000000780ff000ULL,
1402       0ULL,
1403       0ULL
1404     },
1405     {
1406       0x0000000051482000ULL,
1407       -1ULL,
1408       0x00000000300c2000ULL,
1409       -1ULL,
1410       -1ULL
1411     }
1412 #endif
1413   },
1414   { "dblalign", TILEGX_OPC_DBLALIGN, 0x1, 3, TREG_ZERO, 1,
1415     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1416 #ifndef DISASM_ONLY
1417     {
1418       0xc00000007ffc0000ULL,
1419       0ULL,
1420       0ULL,
1421       0ULL,
1422       0ULL
1423     },
1424     {
1425       0x0000000050640000ULL,
1426       -1ULL,
1427       -1ULL,
1428       -1ULL,
1429       -1ULL
1430     }
1431 #endif
1432   },
1433   { "dblalign2", TILEGX_OPC_DBLALIGN2, 0x3, 3, TREG_ZERO, 1,
1434     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1435 #ifndef DISASM_ONLY
1436     {
1437       0xc00000007ffc0000ULL,
1438       0xfffe000000000000ULL,
1439       0ULL,
1440       0ULL,
1441       0ULL
1442     },
1443     {
1444       0x0000000050580000ULL,
1445       0x281a000000000000ULL,
1446       -1ULL,
1447       -1ULL,
1448       -1ULL
1449     }
1450 #endif
1451   },
1452   { "dblalign4", TILEGX_OPC_DBLALIGN4, 0x3, 3, TREG_ZERO, 1,
1453     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1454 #ifndef DISASM_ONLY
1455     {
1456       0xc00000007ffc0000ULL,
1457       0xfffe000000000000ULL,
1458       0ULL,
1459       0ULL,
1460       0ULL
1461     },
1462     {
1463       0x00000000505c0000ULL,
1464       0x281c000000000000ULL,
1465       -1ULL,
1466       -1ULL,
1467       -1ULL
1468     }
1469 #endif
1470   },
1471   { "dblalign6", TILEGX_OPC_DBLALIGN6, 0x3, 3, TREG_ZERO, 1,
1472     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1473 #ifndef DISASM_ONLY
1474     {
1475       0xc00000007ffc0000ULL,
1476       0xfffe000000000000ULL,
1477       0ULL,
1478       0ULL,
1479       0ULL
1480     },
1481     {
1482       0x0000000050600000ULL,
1483       0x281e000000000000ULL,
1484       -1ULL,
1485       -1ULL,
1486       -1ULL
1487     }
1488 #endif
1489   },
1490   { "drain", TILEGX_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0,
1491     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
1492 #ifndef DISASM_ONLY
1493     {
1494       0ULL,
1495       0xfffff80000000000ULL,
1496       0ULL,
1497       0ULL,
1498       0ULL
1499     },
1500     {
1501       -1ULL,
1502       0x286a080000000000ULL,
1503       -1ULL,
1504       -1ULL,
1505       -1ULL
1506     }
1507 #endif
1508   },
1509   { "dtlbpr", TILEGX_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1,
1510     { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } },
1511 #ifndef DISASM_ONLY
1512     {
1513       0ULL,
1514       0xfffff80000000000ULL,
1515       0ULL,
1516       0ULL,
1517       0ULL
1518     },
1519     {
1520       -1ULL,
1521       0x286a100000000000ULL,
1522       -1ULL,
1523       -1ULL,
1524       -1ULL
1525     }
1526 #endif
1527   },
1528   { "exch", TILEGX_OPC_EXCH, 0x2, 3, TREG_ZERO, 1,
1529     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1530 #ifndef DISASM_ONLY
1531     {
1532       0ULL,
1533       0xfffe000000000000ULL,
1534       0ULL,
1535       0ULL,
1536       0ULL
1537     },
1538     {
1539       -1ULL,
1540       0x2822000000000000ULL,
1541       -1ULL,
1542       -1ULL,
1543       -1ULL
1544     }
1545 #endif
1546   },
1547   { "exch4", TILEGX_OPC_EXCH4, 0x2, 3, TREG_ZERO, 1,
1548     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1549 #ifndef DISASM_ONLY
1550     {
1551       0ULL,
1552       0xfffe000000000000ULL,
1553       0ULL,
1554       0ULL,
1555       0ULL
1556     },
1557     {
1558       -1ULL,
1559       0x2820000000000000ULL,
1560       -1ULL,
1561       -1ULL,
1562       -1ULL
1563     }
1564 #endif
1565   },
1566   { "fdouble_add_flags", TILEGX_OPC_FDOUBLE_ADD_FLAGS, 0x1, 3, TREG_ZERO, 1,
1567     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1568 #ifndef DISASM_ONLY
1569     {
1570       0xc00000007ffc0000ULL,
1571       0ULL,
1572       0ULL,
1573       0ULL,
1574       0ULL
1575     },
1576     {
1577       0x00000000506c0000ULL,
1578       -1ULL,
1579       -1ULL,
1580       -1ULL,
1581       -1ULL
1582     }
1583 #endif
1584   },
1585   { "fdouble_addsub", TILEGX_OPC_FDOUBLE_ADDSUB, 0x1, 3, TREG_ZERO, 1,
1586     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1587 #ifndef DISASM_ONLY
1588     {
1589       0xc00000007ffc0000ULL,
1590       0ULL,
1591       0ULL,
1592       0ULL,
1593       0ULL
1594     },
1595     {
1596       0x0000000050680000ULL,
1597       -1ULL,
1598       -1ULL,
1599       -1ULL,
1600       -1ULL
1601     }
1602 #endif
1603   },
1604   { "fdouble_mul_flags", TILEGX_OPC_FDOUBLE_MUL_FLAGS, 0x1, 3, TREG_ZERO, 1,
1605     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1606 #ifndef DISASM_ONLY
1607     {
1608       0xc00000007ffc0000ULL,
1609       0ULL,
1610       0ULL,
1611       0ULL,
1612       0ULL
1613     },
1614     {
1615       0x0000000050700000ULL,
1616       -1ULL,
1617       -1ULL,
1618       -1ULL,
1619       -1ULL
1620     }
1621 #endif
1622   },
1623   { "fdouble_pack1", TILEGX_OPC_FDOUBLE_PACK1, 0x1, 3, TREG_ZERO, 1,
1624     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1625 #ifndef DISASM_ONLY
1626     {
1627       0xc00000007ffc0000ULL,
1628       0ULL,
1629       0ULL,
1630       0ULL,
1631       0ULL
1632     },
1633     {
1634       0x0000000050740000ULL,
1635       -1ULL,
1636       -1ULL,
1637       -1ULL,
1638       -1ULL
1639     }
1640 #endif
1641   },
1642   { "fdouble_pack2", TILEGX_OPC_FDOUBLE_PACK2, 0x1, 3, TREG_ZERO, 1,
1643     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1644 #ifndef DISASM_ONLY
1645     {
1646       0xc00000007ffc0000ULL,
1647       0ULL,
1648       0ULL,
1649       0ULL,
1650       0ULL
1651     },
1652     {
1653       0x0000000050780000ULL,
1654       -1ULL,
1655       -1ULL,
1656       -1ULL,
1657       -1ULL
1658     }
1659 #endif
1660   },
1661   { "fdouble_sub_flags", TILEGX_OPC_FDOUBLE_SUB_FLAGS, 0x1, 3, TREG_ZERO, 1,
1662     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1663 #ifndef DISASM_ONLY
1664     {
1665       0xc00000007ffc0000ULL,
1666       0ULL,
1667       0ULL,
1668       0ULL,
1669       0ULL
1670     },
1671     {
1672       0x00000000507c0000ULL,
1673       -1ULL,
1674       -1ULL,
1675       -1ULL,
1676       -1ULL
1677     }
1678 #endif
1679   },
1680   { "fdouble_unpack_max", TILEGX_OPC_FDOUBLE_UNPACK_MAX, 0x1, 3, TREG_ZERO, 1,
1681     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1682 #ifndef DISASM_ONLY
1683     {
1684       0xc00000007ffc0000ULL,
1685       0ULL,
1686       0ULL,
1687       0ULL,
1688       0ULL
1689     },
1690     {
1691       0x0000000050800000ULL,
1692       -1ULL,
1693       -1ULL,
1694       -1ULL,
1695       -1ULL
1696     }
1697 #endif
1698   },
1699   { "fdouble_unpack_min", TILEGX_OPC_FDOUBLE_UNPACK_MIN, 0x1, 3, TREG_ZERO, 1,
1700     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1701 #ifndef DISASM_ONLY
1702     {
1703       0xc00000007ffc0000ULL,
1704       0ULL,
1705       0ULL,
1706       0ULL,
1707       0ULL
1708     },
1709     {
1710       0x0000000050840000ULL,
1711       -1ULL,
1712       -1ULL,
1713       -1ULL,
1714       -1ULL
1715     }
1716 #endif
1717   },
1718   { "fetchadd", TILEGX_OPC_FETCHADD, 0x2, 3, TREG_ZERO, 1,
1719     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1720 #ifndef DISASM_ONLY
1721     {
1722       0ULL,
1723       0xfffe000000000000ULL,
1724       0ULL,
1725       0ULL,
1726       0ULL
1727     },
1728     {
1729       -1ULL,
1730       0x282a000000000000ULL,
1731       -1ULL,
1732       -1ULL,
1733       -1ULL
1734     }
1735 #endif
1736   },
1737   { "fetchadd4", TILEGX_OPC_FETCHADD4, 0x2, 3, TREG_ZERO, 1,
1738     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1739 #ifndef DISASM_ONLY
1740     {
1741       0ULL,
1742       0xfffe000000000000ULL,
1743       0ULL,
1744       0ULL,
1745       0ULL
1746     },
1747     {
1748       -1ULL,
1749       0x2824000000000000ULL,
1750       -1ULL,
1751       -1ULL,
1752       -1ULL
1753     }
1754 #endif
1755   },
1756   { "fetchaddgez", TILEGX_OPC_FETCHADDGEZ, 0x2, 3, TREG_ZERO, 1,
1757     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1758 #ifndef DISASM_ONLY
1759     {
1760       0ULL,
1761       0xfffe000000000000ULL,
1762       0ULL,
1763       0ULL,
1764       0ULL
1765     },
1766     {
1767       -1ULL,
1768       0x2828000000000000ULL,
1769       -1ULL,
1770       -1ULL,
1771       -1ULL
1772     }
1773 #endif
1774   },
1775   { "fetchaddgez4", TILEGX_OPC_FETCHADDGEZ4, 0x2, 3, TREG_ZERO, 1,
1776     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1777 #ifndef DISASM_ONLY
1778     {
1779       0ULL,
1780       0xfffe000000000000ULL,
1781       0ULL,
1782       0ULL,
1783       0ULL
1784     },
1785     {
1786       -1ULL,
1787       0x2826000000000000ULL,
1788       -1ULL,
1789       -1ULL,
1790       -1ULL
1791     }
1792 #endif
1793   },
1794   { "fetchand", TILEGX_OPC_FETCHAND, 0x2, 3, TREG_ZERO, 1,
1795     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1796 #ifndef DISASM_ONLY
1797     {
1798       0ULL,
1799       0xfffe000000000000ULL,
1800       0ULL,
1801       0ULL,
1802       0ULL
1803     },
1804     {
1805       -1ULL,
1806       0x282e000000000000ULL,
1807       -1ULL,
1808       -1ULL,
1809       -1ULL
1810     }
1811 #endif
1812   },
1813   { "fetchand4", TILEGX_OPC_FETCHAND4, 0x2, 3, TREG_ZERO, 1,
1814     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1815 #ifndef DISASM_ONLY
1816     {
1817       0ULL,
1818       0xfffe000000000000ULL,
1819       0ULL,
1820       0ULL,
1821       0ULL
1822     },
1823     {
1824       -1ULL,
1825       0x282c000000000000ULL,
1826       -1ULL,
1827       -1ULL,
1828       -1ULL
1829     }
1830 #endif
1831   },
1832   { "fetchor", TILEGX_OPC_FETCHOR, 0x2, 3, TREG_ZERO, 1,
1833     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1834 #ifndef DISASM_ONLY
1835     {
1836       0ULL,
1837       0xfffe000000000000ULL,
1838       0ULL,
1839       0ULL,
1840       0ULL
1841     },
1842     {
1843       -1ULL,
1844       0x2832000000000000ULL,
1845       -1ULL,
1846       -1ULL,
1847       -1ULL
1848     }
1849 #endif
1850   },
1851   { "fetchor4", TILEGX_OPC_FETCHOR4, 0x2, 3, TREG_ZERO, 1,
1852     { { 0, }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
1853 #ifndef DISASM_ONLY
1854     {
1855       0ULL,
1856       0xfffe000000000000ULL,
1857       0ULL,
1858       0ULL,
1859       0ULL
1860     },
1861     {
1862       -1ULL,
1863       0x2830000000000000ULL,
1864       -1ULL,
1865       -1ULL,
1866       -1ULL
1867     }
1868 #endif
1869   },
1870   { "finv", TILEGX_OPC_FINV, 0x2, 1, TREG_ZERO, 1,
1871     { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } },
1872 #ifndef DISASM_ONLY
1873     {
1874       0ULL,
1875       0xfffff80000000000ULL,
1876       0ULL,
1877       0ULL,
1878       0ULL
1879     },
1880     {
1881       -1ULL,
1882       0x286a180000000000ULL,
1883       -1ULL,
1884       -1ULL,
1885       -1ULL
1886     }
1887 #endif
1888   },
1889   { "flush", TILEGX_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1,
1890     { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } },
1891 #ifndef DISASM_ONLY
1892     {
1893       0ULL,
1894       0xfffff80000000000ULL,
1895       0ULL,
1896       0ULL,
1897       0ULL
1898     },
1899     {
1900       -1ULL,
1901       0x286a280000000000ULL,
1902       -1ULL,
1903       -1ULL,
1904       -1ULL
1905     }
1906 #endif
1907   },
1908   { "flushwb", TILEGX_OPC_FLUSHWB, 0x2, 0, TREG_ZERO, 1,
1909     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
1910 #ifndef DISASM_ONLY
1911     {
1912       0ULL,
1913       0xfffff80000000000ULL,
1914       0ULL,
1915       0ULL,
1916       0ULL
1917     },
1918     {
1919       -1ULL,
1920       0x286a200000000000ULL,
1921       -1ULL,
1922       -1ULL,
1923       -1ULL
1924     }
1925 #endif
1926   },
1927   { "fnop", TILEGX_OPC_FNOP, 0xf, 0, TREG_ZERO, 1,
1928     { {  }, {  }, {  }, {  }, { 0, } },
1929 #ifndef DISASM_ONLY
1930     {
1931       0xc00000007ffff000ULL,
1932       0xfffff80000000000ULL,
1933       0x00000000780ff000ULL,
1934       0x3c07f80000000000ULL,
1935       0ULL
1936     },
1937     {
1938       0x0000000051483000ULL,
1939       0x286a300000000000ULL,
1940       0x00000000300c3000ULL,
1941       0x1c06400000000000ULL,
1942       -1ULL
1943     }
1944 #endif
1945   },
1946   { "fsingle_add1", TILEGX_OPC_FSINGLE_ADD1, 0x1, 3, TREG_ZERO, 1,
1947     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1948 #ifndef DISASM_ONLY
1949     {
1950       0xc00000007ffc0000ULL,
1951       0ULL,
1952       0ULL,
1953       0ULL,
1954       0ULL
1955     },
1956     {
1957       0x0000000050880000ULL,
1958       -1ULL,
1959       -1ULL,
1960       -1ULL,
1961       -1ULL
1962     }
1963 #endif
1964   },
1965   { "fsingle_addsub2", TILEGX_OPC_FSINGLE_ADDSUB2, 0x1, 3, TREG_ZERO, 1,
1966     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1967 #ifndef DISASM_ONLY
1968     {
1969       0xc00000007ffc0000ULL,
1970       0ULL,
1971       0ULL,
1972       0ULL,
1973       0ULL
1974     },
1975     {
1976       0x00000000508c0000ULL,
1977       -1ULL,
1978       -1ULL,
1979       -1ULL,
1980       -1ULL
1981     }
1982 #endif
1983   },
1984   { "fsingle_mul1", TILEGX_OPC_FSINGLE_MUL1, 0x1, 3, TREG_ZERO, 1,
1985     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
1986 #ifndef DISASM_ONLY
1987     {
1988       0xc00000007ffc0000ULL,
1989       0ULL,
1990       0ULL,
1991       0ULL,
1992       0ULL
1993     },
1994     {
1995       0x0000000050900000ULL,
1996       -1ULL,
1997       -1ULL,
1998       -1ULL,
1999       -1ULL
2000     }
2001 #endif
2002   },
2003   { "fsingle_mul2", TILEGX_OPC_FSINGLE_MUL2, 0x1, 3, TREG_ZERO, 1,
2004     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2005 #ifndef DISASM_ONLY
2006     {
2007       0xc00000007ffc0000ULL,
2008       0ULL,
2009       0ULL,
2010       0ULL,
2011       0ULL
2012     },
2013     {
2014       0x0000000050940000ULL,
2015       -1ULL,
2016       -1ULL,
2017       -1ULL,
2018       -1ULL
2019     }
2020 #endif
2021   },
2022   { "fsingle_pack1", TILEGX_OPC_FSINGLE_PACK1, 0x5, 2, TREG_ZERO, 1,
2023     { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
2024 #ifndef DISASM_ONLY
2025     {
2026       0xc00000007ffff000ULL,
2027       0ULL,
2028       0x00000000780ff000ULL,
2029       0ULL,
2030       0ULL
2031     },
2032     {
2033       0x0000000051484000ULL,
2034       -1ULL,
2035       0x00000000300c4000ULL,
2036       -1ULL,
2037       -1ULL
2038     }
2039 #endif
2040   },
2041   { "fsingle_pack2", TILEGX_OPC_FSINGLE_PACK2, 0x1, 3, TREG_ZERO, 1,
2042     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2043 #ifndef DISASM_ONLY
2044     {
2045       0xc00000007ffc0000ULL,
2046       0ULL,
2047       0ULL,
2048       0ULL,
2049       0ULL
2050     },
2051     {
2052       0x0000000050980000ULL,
2053       -1ULL,
2054       -1ULL,
2055       -1ULL,
2056       -1ULL
2057     }
2058 #endif
2059   },
2060   { "fsingle_sub1", TILEGX_OPC_FSINGLE_SUB1, 0x1, 3, TREG_ZERO, 1,
2061     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2062 #ifndef DISASM_ONLY
2063     {
2064       0xc00000007ffc0000ULL,
2065       0ULL,
2066       0ULL,
2067       0ULL,
2068       0ULL
2069     },
2070     {
2071       0x00000000509c0000ULL,
2072       -1ULL,
2073       -1ULL,
2074       -1ULL,
2075       -1ULL
2076     }
2077 #endif
2078   },
2079   { "icoh", TILEGX_OPC_ICOH, 0x2, 1, TREG_ZERO, 1,
2080     { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } },
2081 #ifndef DISASM_ONLY
2082     {
2083       0ULL,
2084       0xfffff80000000000ULL,
2085       0ULL,
2086       0ULL,
2087       0ULL
2088     },
2089     {
2090       -1ULL,
2091       0x286a380000000000ULL,
2092       -1ULL,
2093       -1ULL,
2094       -1ULL
2095     }
2096 #endif
2097   },
2098   { "ill", TILEGX_OPC_ILL, 0xa, 0, TREG_ZERO, 1,
2099     { { 0, }, {  }, { 0, }, {  }, { 0, } },
2100 #ifndef DISASM_ONLY
2101     {
2102       0ULL,
2103       0xfffff80000000000ULL,
2104       0ULL,
2105       0x3c07f80000000000ULL,
2106       0ULL
2107     },
2108     {
2109       -1ULL,
2110       0x286a400000000000ULL,
2111       -1ULL,
2112       0x1c06480000000000ULL,
2113       -1ULL
2114     }
2115 #endif
2116   },
2117   { "inv", TILEGX_OPC_INV, 0x2, 1, TREG_ZERO, 1,
2118     { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } },
2119 #ifndef DISASM_ONLY
2120     {
2121       0ULL,
2122       0xfffff80000000000ULL,
2123       0ULL,
2124       0ULL,
2125       0ULL
2126     },
2127     {
2128       -1ULL,
2129       0x286a480000000000ULL,
2130       -1ULL,
2131       -1ULL,
2132       -1ULL
2133     }
2134 #endif
2135   },
2136   { "iret", TILEGX_OPC_IRET, 0x2, 0, TREG_ZERO, 1,
2137     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
2138 #ifndef DISASM_ONLY
2139     {
2140       0ULL,
2141       0xfffff80000000000ULL,
2142       0ULL,
2143       0ULL,
2144       0ULL
2145     },
2146     {
2147       -1ULL,
2148       0x286a500000000000ULL,
2149       -1ULL,
2150       -1ULL,
2151       -1ULL
2152     }
2153 #endif
2154   },
2155   { "j", TILEGX_OPC_J, 0x2, 1, TREG_ZERO, 1,
2156     { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } },
2157 #ifndef DISASM_ONLY
2158     {
2159       0ULL,
2160       0xfc00000000000000ULL,
2161       0ULL,
2162       0ULL,
2163       0ULL
2164     },
2165     {
2166       -1ULL,
2167       0x2400000000000000ULL,
2168       -1ULL,
2169       -1ULL,
2170       -1ULL
2171     }
2172 #endif
2173   },
2174   { "jal", TILEGX_OPC_JAL, 0x2, 1, TREG_LR, 1,
2175     { { 0, }, { 25 }, { 0, }, { 0, }, { 0, } },
2176 #ifndef DISASM_ONLY
2177     {
2178       0ULL,
2179       0xfc00000000000000ULL,
2180       0ULL,
2181       0ULL,
2182       0ULL
2183     },
2184     {
2185       -1ULL,
2186       0x2000000000000000ULL,
2187       -1ULL,
2188       -1ULL,
2189       -1ULL
2190     }
2191 #endif
2192   },
2193   { "jalr", TILEGX_OPC_JALR, 0xa, 1, TREG_LR, 1,
2194     { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } },
2195 #ifndef DISASM_ONLY
2196     {
2197       0ULL,
2198       0xfffff80000000000ULL,
2199       0ULL,
2200       0x3c07f80000000000ULL,
2201       0ULL
2202     },
2203     {
2204       -1ULL,
2205       0x286a600000000000ULL,
2206       -1ULL,
2207       0x1c06580000000000ULL,
2208       -1ULL
2209     }
2210 #endif
2211   },
2212   { "jalrp", TILEGX_OPC_JALRP, 0xa, 1, TREG_LR, 1,
2213     { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } },
2214 #ifndef DISASM_ONLY
2215     {
2216       0ULL,
2217       0xfffff80000000000ULL,
2218       0ULL,
2219       0x3c07f80000000000ULL,
2220       0ULL
2221     },
2222     {
2223       -1ULL,
2224       0x286a580000000000ULL,
2225       -1ULL,
2226       0x1c06500000000000ULL,
2227       -1ULL
2228     }
2229 #endif
2230   },
2231   { "jr", TILEGX_OPC_JR, 0xa, 1, TREG_ZERO, 1,
2232     { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } },
2233 #ifndef DISASM_ONLY
2234     {
2235       0ULL,
2236       0xfffff80000000000ULL,
2237       0ULL,
2238       0x3c07f80000000000ULL,
2239       0ULL
2240     },
2241     {
2242       -1ULL,
2243       0x286a700000000000ULL,
2244       -1ULL,
2245       0x1c06680000000000ULL,
2246       -1ULL
2247     }
2248 #endif
2249   },
2250   { "jrp", TILEGX_OPC_JRP, 0xa, 1, TREG_ZERO, 1,
2251     { { 0, }, { 9 }, { 0, }, { 13 }, { 0, } },
2252 #ifndef DISASM_ONLY
2253     {
2254       0ULL,
2255       0xfffff80000000000ULL,
2256       0ULL,
2257       0x3c07f80000000000ULL,
2258       0ULL
2259     },
2260     {
2261       -1ULL,
2262       0x286a680000000000ULL,
2263       -1ULL,
2264       0x1c06600000000000ULL,
2265       -1ULL
2266     }
2267 #endif
2268   },
2269   { "ld", TILEGX_OPC_LD, 0x12, 2, TREG_ZERO, 1,
2270     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } },
2271 #ifndef DISASM_ONLY
2272     {
2273       0ULL,
2274       0xfffff80000000000ULL,
2275       0ULL,
2276       0ULL,
2277       0xc200000004000000ULL
2278     },
2279     {
2280       -1ULL,
2281       0x286ae80000000000ULL,
2282       -1ULL,
2283       -1ULL,
2284       0x8200000004000000ULL
2285     }
2286 #endif
2287   },
2288   { "ld1s", TILEGX_OPC_LD1S, 0x12, 2, TREG_ZERO, 1,
2289     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } },
2290 #ifndef DISASM_ONLY
2291     {
2292       0ULL,
2293       0xfffff80000000000ULL,
2294       0ULL,
2295       0ULL,
2296       0xc200000004000000ULL
2297     },
2298     {
2299       -1ULL,
2300       0x286a780000000000ULL,
2301       -1ULL,
2302       -1ULL,
2303       0x4000000000000000ULL
2304     }
2305 #endif
2306   },
2307   { "ld1s_add", TILEGX_OPC_LD1S_ADD, 0x2, 3, TREG_ZERO, 1,
2308     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2309 #ifndef DISASM_ONLY
2310     {
2311       0ULL,
2312       0xfff8000000000000ULL,
2313       0ULL,
2314       0ULL,
2315       0ULL
2316     },
2317     {
2318       -1ULL,
2319       0x1838000000000000ULL,
2320       -1ULL,
2321       -1ULL,
2322       -1ULL
2323     }
2324 #endif
2325   },
2326   { "ld1u", TILEGX_OPC_LD1U, 0x12, 2, TREG_ZERO, 1,
2327     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } },
2328 #ifndef DISASM_ONLY
2329     {
2330       0ULL,
2331       0xfffff80000000000ULL,
2332       0ULL,
2333       0ULL,
2334       0xc200000004000000ULL
2335     },
2336     {
2337       -1ULL,
2338       0x286a800000000000ULL,
2339       -1ULL,
2340       -1ULL,
2341       0x4000000004000000ULL
2342     }
2343 #endif
2344   },
2345   { "ld1u_add", TILEGX_OPC_LD1U_ADD, 0x2, 3, TREG_ZERO, 1,
2346     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2347 #ifndef DISASM_ONLY
2348     {
2349       0ULL,
2350       0xfff8000000000000ULL,
2351       0ULL,
2352       0ULL,
2353       0ULL
2354     },
2355     {
2356       -1ULL,
2357       0x1840000000000000ULL,
2358       -1ULL,
2359       -1ULL,
2360       -1ULL
2361     }
2362 #endif
2363   },
2364   { "ld2s", TILEGX_OPC_LD2S, 0x12, 2, TREG_ZERO, 1,
2365     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } },
2366 #ifndef DISASM_ONLY
2367     {
2368       0ULL,
2369       0xfffff80000000000ULL,
2370       0ULL,
2371       0ULL,
2372       0xc200000004000000ULL
2373     },
2374     {
2375       -1ULL,
2376       0x286a880000000000ULL,
2377       -1ULL,
2378       -1ULL,
2379       0x4200000000000000ULL
2380     }
2381 #endif
2382   },
2383   { "ld2s_add", TILEGX_OPC_LD2S_ADD, 0x2, 3, TREG_ZERO, 1,
2384     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2385 #ifndef DISASM_ONLY
2386     {
2387       0ULL,
2388       0xfff8000000000000ULL,
2389       0ULL,
2390       0ULL,
2391       0ULL
2392     },
2393     {
2394       -1ULL,
2395       0x1848000000000000ULL,
2396       -1ULL,
2397       -1ULL,
2398       -1ULL
2399     }
2400 #endif
2401   },
2402   { "ld2u", TILEGX_OPC_LD2U, 0x12, 2, TREG_ZERO, 1,
2403     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } },
2404 #ifndef DISASM_ONLY
2405     {
2406       0ULL,
2407       0xfffff80000000000ULL,
2408       0ULL,
2409       0ULL,
2410       0xc200000004000000ULL
2411     },
2412     {
2413       -1ULL,
2414       0x286a900000000000ULL,
2415       -1ULL,
2416       -1ULL,
2417       0x4200000004000000ULL
2418     }
2419 #endif
2420   },
2421   { "ld2u_add", TILEGX_OPC_LD2U_ADD, 0x2, 3, TREG_ZERO, 1,
2422     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2423 #ifndef DISASM_ONLY
2424     {
2425       0ULL,
2426       0xfff8000000000000ULL,
2427       0ULL,
2428       0ULL,
2429       0ULL
2430     },
2431     {
2432       -1ULL,
2433       0x1850000000000000ULL,
2434       -1ULL,
2435       -1ULL,
2436       -1ULL
2437     }
2438 #endif
2439   },
2440   { "ld4s", TILEGX_OPC_LD4S, 0x12, 2, TREG_ZERO, 1,
2441     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } },
2442 #ifndef DISASM_ONLY
2443     {
2444       0ULL,
2445       0xfffff80000000000ULL,
2446       0ULL,
2447       0ULL,
2448       0xc200000004000000ULL
2449     },
2450     {
2451       -1ULL,
2452       0x286a980000000000ULL,
2453       -1ULL,
2454       -1ULL,
2455       0x8000000004000000ULL
2456     }
2457 #endif
2458   },
2459   { "ld4s_add", TILEGX_OPC_LD4S_ADD, 0x2, 3, TREG_ZERO, 1,
2460     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2461 #ifndef DISASM_ONLY
2462     {
2463       0ULL,
2464       0xfff8000000000000ULL,
2465       0ULL,
2466       0ULL,
2467       0ULL
2468     },
2469     {
2470       -1ULL,
2471       0x1858000000000000ULL,
2472       -1ULL,
2473       -1ULL,
2474       -1ULL
2475     }
2476 #endif
2477   },
2478   { "ld4u", TILEGX_OPC_LD4U, 0x12, 2, TREG_ZERO, 1,
2479     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 26, 14 } },
2480 #ifndef DISASM_ONLY
2481     {
2482       0ULL,
2483       0xfffff80000000000ULL,
2484       0ULL,
2485       0ULL,
2486       0xc200000004000000ULL
2487     },
2488     {
2489       -1ULL,
2490       0x286aa00000000000ULL,
2491       -1ULL,
2492       -1ULL,
2493       0x8200000000000000ULL
2494     }
2495 #endif
2496   },
2497   { "ld4u_add", TILEGX_OPC_LD4U_ADD, 0x2, 3, TREG_ZERO, 1,
2498     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2499 #ifndef DISASM_ONLY
2500     {
2501       0ULL,
2502       0xfff8000000000000ULL,
2503       0ULL,
2504       0ULL,
2505       0ULL
2506     },
2507     {
2508       -1ULL,
2509       0x1860000000000000ULL,
2510       -1ULL,
2511       -1ULL,
2512       -1ULL
2513     }
2514 #endif
2515   },
2516   { "ld_add", TILEGX_OPC_LD_ADD, 0x2, 3, TREG_ZERO, 1,
2517     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2518 #ifndef DISASM_ONLY
2519     {
2520       0ULL,
2521       0xfff8000000000000ULL,
2522       0ULL,
2523       0ULL,
2524       0ULL
2525     },
2526     {
2527       -1ULL,
2528       0x18a0000000000000ULL,
2529       -1ULL,
2530       -1ULL,
2531       -1ULL
2532     }
2533 #endif
2534   },
2535   { "ldna", TILEGX_OPC_LDNA, 0x2, 2, TREG_ZERO, 1,
2536     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2537 #ifndef DISASM_ONLY
2538     {
2539       0ULL,
2540       0xfffff80000000000ULL,
2541       0ULL,
2542       0ULL,
2543       0ULL
2544     },
2545     {
2546       -1ULL,
2547       0x286aa80000000000ULL,
2548       -1ULL,
2549       -1ULL,
2550       -1ULL
2551     }
2552 #endif
2553   },
2554   { "ldna_add", TILEGX_OPC_LDNA_ADD, 0x2, 3, TREG_ZERO, 1,
2555     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2556 #ifndef DISASM_ONLY
2557     {
2558       0ULL,
2559       0xfff8000000000000ULL,
2560       0ULL,
2561       0ULL,
2562       0ULL
2563     },
2564     {
2565       -1ULL,
2566       0x18a8000000000000ULL,
2567       -1ULL,
2568       -1ULL,
2569       -1ULL
2570     }
2571 #endif
2572   },
2573   { "ldnt", TILEGX_OPC_LDNT, 0x2, 2, TREG_ZERO, 1,
2574     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2575 #ifndef DISASM_ONLY
2576     {
2577       0ULL,
2578       0xfffff80000000000ULL,
2579       0ULL,
2580       0ULL,
2581       0ULL
2582     },
2583     {
2584       -1ULL,
2585       0x286ae00000000000ULL,
2586       -1ULL,
2587       -1ULL,
2588       -1ULL
2589     }
2590 #endif
2591   },
2592   { "ldnt1s", TILEGX_OPC_LDNT1S, 0x2, 2, TREG_ZERO, 1,
2593     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2594 #ifndef DISASM_ONLY
2595     {
2596       0ULL,
2597       0xfffff80000000000ULL,
2598       0ULL,
2599       0ULL,
2600       0ULL
2601     },
2602     {
2603       -1ULL,
2604       0x286ab00000000000ULL,
2605       -1ULL,
2606       -1ULL,
2607       -1ULL
2608     }
2609 #endif
2610   },
2611   { "ldnt1s_add", TILEGX_OPC_LDNT1S_ADD, 0x2, 3, TREG_ZERO, 1,
2612     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2613 #ifndef DISASM_ONLY
2614     {
2615       0ULL,
2616       0xfff8000000000000ULL,
2617       0ULL,
2618       0ULL,
2619       0ULL
2620     },
2621     {
2622       -1ULL,
2623       0x1868000000000000ULL,
2624       -1ULL,
2625       -1ULL,
2626       -1ULL
2627     }
2628 #endif
2629   },
2630   { "ldnt1u", TILEGX_OPC_LDNT1U, 0x2, 2, TREG_ZERO, 1,
2631     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2632 #ifndef DISASM_ONLY
2633     {
2634       0ULL,
2635       0xfffff80000000000ULL,
2636       0ULL,
2637       0ULL,
2638       0ULL
2639     },
2640     {
2641       -1ULL,
2642       0x286ab80000000000ULL,
2643       -1ULL,
2644       -1ULL,
2645       -1ULL
2646     }
2647 #endif
2648   },
2649   { "ldnt1u_add", TILEGX_OPC_LDNT1U_ADD, 0x2, 3, TREG_ZERO, 1,
2650     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2651 #ifndef DISASM_ONLY
2652     {
2653       0ULL,
2654       0xfff8000000000000ULL,
2655       0ULL,
2656       0ULL,
2657       0ULL
2658     },
2659     {
2660       -1ULL,
2661       0x1870000000000000ULL,
2662       -1ULL,
2663       -1ULL,
2664       -1ULL
2665     }
2666 #endif
2667   },
2668   { "ldnt2s", TILEGX_OPC_LDNT2S, 0x2, 2, TREG_ZERO, 1,
2669     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2670 #ifndef DISASM_ONLY
2671     {
2672       0ULL,
2673       0xfffff80000000000ULL,
2674       0ULL,
2675       0ULL,
2676       0ULL
2677     },
2678     {
2679       -1ULL,
2680       0x286ac00000000000ULL,
2681       -1ULL,
2682       -1ULL,
2683       -1ULL
2684     }
2685 #endif
2686   },
2687   { "ldnt2s_add", TILEGX_OPC_LDNT2S_ADD, 0x2, 3, TREG_ZERO, 1,
2688     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2689 #ifndef DISASM_ONLY
2690     {
2691       0ULL,
2692       0xfff8000000000000ULL,
2693       0ULL,
2694       0ULL,
2695       0ULL
2696     },
2697     {
2698       -1ULL,
2699       0x1878000000000000ULL,
2700       -1ULL,
2701       -1ULL,
2702       -1ULL
2703     }
2704 #endif
2705   },
2706   { "ldnt2u", TILEGX_OPC_LDNT2U, 0x2, 2, TREG_ZERO, 1,
2707     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2708 #ifndef DISASM_ONLY
2709     {
2710       0ULL,
2711       0xfffff80000000000ULL,
2712       0ULL,
2713       0ULL,
2714       0ULL
2715     },
2716     {
2717       -1ULL,
2718       0x286ac80000000000ULL,
2719       -1ULL,
2720       -1ULL,
2721       -1ULL
2722     }
2723 #endif
2724   },
2725   { "ldnt2u_add", TILEGX_OPC_LDNT2U_ADD, 0x2, 3, TREG_ZERO, 1,
2726     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2727 #ifndef DISASM_ONLY
2728     {
2729       0ULL,
2730       0xfff8000000000000ULL,
2731       0ULL,
2732       0ULL,
2733       0ULL
2734     },
2735     {
2736       -1ULL,
2737       0x1880000000000000ULL,
2738       -1ULL,
2739       -1ULL,
2740       -1ULL
2741     }
2742 #endif
2743   },
2744   { "ldnt4s", TILEGX_OPC_LDNT4S, 0x2, 2, TREG_ZERO, 1,
2745     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2746 #ifndef DISASM_ONLY
2747     {
2748       0ULL,
2749       0xfffff80000000000ULL,
2750       0ULL,
2751       0ULL,
2752       0ULL
2753     },
2754     {
2755       -1ULL,
2756       0x286ad00000000000ULL,
2757       -1ULL,
2758       -1ULL,
2759       -1ULL
2760     }
2761 #endif
2762   },
2763   { "ldnt4s_add", TILEGX_OPC_LDNT4S_ADD, 0x2, 3, TREG_ZERO, 1,
2764     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2765 #ifndef DISASM_ONLY
2766     {
2767       0ULL,
2768       0xfff8000000000000ULL,
2769       0ULL,
2770       0ULL,
2771       0ULL
2772     },
2773     {
2774       -1ULL,
2775       0x1888000000000000ULL,
2776       -1ULL,
2777       -1ULL,
2778       -1ULL
2779     }
2780 #endif
2781   },
2782   { "ldnt4u", TILEGX_OPC_LDNT4U, 0x2, 2, TREG_ZERO, 1,
2783     { { 0, }, { 8, 9 }, { 0, }, { 0, }, { 0, } },
2784 #ifndef DISASM_ONLY
2785     {
2786       0ULL,
2787       0xfffff80000000000ULL,
2788       0ULL,
2789       0ULL,
2790       0ULL
2791     },
2792     {
2793       -1ULL,
2794       0x286ad80000000000ULL,
2795       -1ULL,
2796       -1ULL,
2797       -1ULL
2798     }
2799 #endif
2800   },
2801   { "ldnt4u_add", TILEGX_OPC_LDNT4U_ADD, 0x2, 3, TREG_ZERO, 1,
2802     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2803 #ifndef DISASM_ONLY
2804     {
2805       0ULL,
2806       0xfff8000000000000ULL,
2807       0ULL,
2808       0ULL,
2809       0ULL
2810     },
2811     {
2812       -1ULL,
2813       0x1890000000000000ULL,
2814       -1ULL,
2815       -1ULL,
2816       -1ULL
2817     }
2818 #endif
2819   },
2820   { "ldnt_add", TILEGX_OPC_LDNT_ADD, 0x2, 3, TREG_ZERO, 1,
2821     { { 0, }, { 8, 15, 1 }, { 0, }, { 0, }, { 0, } },
2822 #ifndef DISASM_ONLY
2823     {
2824       0ULL,
2825       0xfff8000000000000ULL,
2826       0ULL,
2827       0ULL,
2828       0ULL
2829     },
2830     {
2831       -1ULL,
2832       0x1898000000000000ULL,
2833       -1ULL,
2834       -1ULL,
2835       -1ULL
2836     }
2837 #endif
2838   },
2839   { "lnk", TILEGX_OPC_LNK, 0xa, 1, TREG_ZERO, 1,
2840     { { 0, }, { 8 }, { 0, }, { 12 }, { 0, } },
2841 #ifndef DISASM_ONLY
2842     {
2843       0ULL,
2844       0xfffff80000000000ULL,
2845       0ULL,
2846       0x3c07f80000000000ULL,
2847       0ULL
2848     },
2849     {
2850       -1ULL,
2851       0x286af00000000000ULL,
2852       -1ULL,
2853       0x1c06700000000000ULL,
2854       -1ULL
2855     }
2856 #endif
2857   },
2858   { "mf", TILEGX_OPC_MF, 0x2, 0, TREG_ZERO, 1,
2859     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
2860 #ifndef DISASM_ONLY
2861     {
2862       0ULL,
2863       0xfffff80000000000ULL,
2864       0ULL,
2865       0ULL,
2866       0ULL
2867     },
2868     {
2869       -1ULL,
2870       0x286af80000000000ULL,
2871       -1ULL,
2872       -1ULL,
2873       -1ULL
2874     }
2875 #endif
2876   },
2877   { "mfspr", TILEGX_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1,
2878     { { 0, }, { 8, 27 }, { 0, }, { 0, }, { 0, } },
2879 #ifndef DISASM_ONLY
2880     {
2881       0ULL,
2882       0xfff8000000000000ULL,
2883       0ULL,
2884       0ULL,
2885       0ULL
2886     },
2887     {
2888       -1ULL,
2889       0x18b0000000000000ULL,
2890       -1ULL,
2891       -1ULL,
2892       -1ULL
2893     }
2894 #endif
2895   },
2896   { "mm", TILEGX_OPC_MM, 0x1, 4, TREG_ZERO, 1,
2897     { { 23, 7, 21, 22 }, { 0, }, { 0, }, { 0, }, { 0, } },
2898 #ifndef DISASM_ONLY
2899     {
2900       0xc00000007f000000ULL,
2901       0ULL,
2902       0ULL,
2903       0ULL,
2904       0ULL
2905     },
2906     {
2907       0x0000000037000000ULL,
2908       -1ULL,
2909       -1ULL,
2910       -1ULL,
2911       -1ULL
2912     }
2913 #endif
2914   },
2915   { "mnz", TILEGX_OPC_MNZ, 0xf, 3, TREG_ZERO, 1,
2916     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
2917 #ifndef DISASM_ONLY
2918     {
2919       0xc00000007ffc0000ULL,
2920       0xfffe000000000000ULL,
2921       0x00000000780c0000ULL,
2922       0x3c06000000000000ULL,
2923       0ULL
2924     },
2925     {
2926       0x0000000050a00000ULL,
2927       0x2834000000000000ULL,
2928       0x0000000048080000ULL,
2929       0x2804000000000000ULL,
2930       -1ULL
2931     }
2932 #endif
2933   },
2934   { "mtspr", TILEGX_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1,
2935     { { 0, }, { 28, 9 }, { 0, }, { 0, }, { 0, } },
2936 #ifndef DISASM_ONLY
2937     {
2938       0ULL,
2939       0xfff8000000000000ULL,
2940       0ULL,
2941       0ULL,
2942       0ULL
2943     },
2944     {
2945       -1ULL,
2946       0x18b8000000000000ULL,
2947       -1ULL,
2948       -1ULL,
2949       -1ULL
2950     }
2951 #endif
2952   },
2953   { "mul_hs_hs", TILEGX_OPC_MUL_HS_HS, 0x5, 3, TREG_ZERO, 1,
2954     { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
2955 #ifndef DISASM_ONLY
2956     {
2957       0xc00000007ffc0000ULL,
2958       0ULL,
2959       0x00000000780c0000ULL,
2960       0ULL,
2961       0ULL
2962     },
2963     {
2964       0x0000000050d40000ULL,
2965       -1ULL,
2966       0x0000000068000000ULL,
2967       -1ULL,
2968       -1ULL
2969     }
2970 #endif
2971   },
2972   { "mul_hs_hu", TILEGX_OPC_MUL_HS_HU, 0x1, 3, TREG_ZERO, 1,
2973     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2974 #ifndef DISASM_ONLY
2975     {
2976       0xc00000007ffc0000ULL,
2977       0ULL,
2978       0ULL,
2979       0ULL,
2980       0ULL
2981     },
2982     {
2983       0x0000000050d80000ULL,
2984       -1ULL,
2985       -1ULL,
2986       -1ULL,
2987       -1ULL
2988     }
2989 #endif
2990   },
2991   { "mul_hs_ls", TILEGX_OPC_MUL_HS_LS, 0x1, 3, TREG_ZERO, 1,
2992     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
2993 #ifndef DISASM_ONLY
2994     {
2995       0xc00000007ffc0000ULL,
2996       0ULL,
2997       0ULL,
2998       0ULL,
2999       0ULL
3000     },
3001     {
3002       0x0000000050dc0000ULL,
3003       -1ULL,
3004       -1ULL,
3005       -1ULL,
3006       -1ULL
3007     }
3008 #endif
3009   },
3010   { "mul_hs_lu", TILEGX_OPC_MUL_HS_LU, 0x1, 3, TREG_ZERO, 1,
3011     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3012 #ifndef DISASM_ONLY
3013     {
3014       0xc00000007ffc0000ULL,
3015       0ULL,
3016       0ULL,
3017       0ULL,
3018       0ULL
3019     },
3020     {
3021       0x0000000050e00000ULL,
3022       -1ULL,
3023       -1ULL,
3024       -1ULL,
3025       -1ULL
3026     }
3027 #endif
3028   },
3029   { "mul_hu_hu", TILEGX_OPC_MUL_HU_HU, 0x5, 3, TREG_ZERO, 1,
3030     { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3031 #ifndef DISASM_ONLY
3032     {
3033       0xc00000007ffc0000ULL,
3034       0ULL,
3035       0x00000000780c0000ULL,
3036       0ULL,
3037       0ULL
3038     },
3039     {
3040       0x0000000050e40000ULL,
3041       -1ULL,
3042       0x0000000068040000ULL,
3043       -1ULL,
3044       -1ULL
3045     }
3046 #endif
3047   },
3048   { "mul_hu_ls", TILEGX_OPC_MUL_HU_LS, 0x1, 3, TREG_ZERO, 1,
3049     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3050 #ifndef DISASM_ONLY
3051     {
3052       0xc00000007ffc0000ULL,
3053       0ULL,
3054       0ULL,
3055       0ULL,
3056       0ULL
3057     },
3058     {
3059       0x0000000050e80000ULL,
3060       -1ULL,
3061       -1ULL,
3062       -1ULL,
3063       -1ULL
3064     }
3065 #endif
3066   },
3067   { "mul_hu_lu", TILEGX_OPC_MUL_HU_LU, 0x1, 3, TREG_ZERO, 1,
3068     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3069 #ifndef DISASM_ONLY
3070     {
3071       0xc00000007ffc0000ULL,
3072       0ULL,
3073       0ULL,
3074       0ULL,
3075       0ULL
3076     },
3077     {
3078       0x0000000050ec0000ULL,
3079       -1ULL,
3080       -1ULL,
3081       -1ULL,
3082       -1ULL
3083     }
3084 #endif
3085   },
3086   { "mul_ls_ls", TILEGX_OPC_MUL_LS_LS, 0x5, 3, TREG_ZERO, 1,
3087     { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3088 #ifndef DISASM_ONLY
3089     {
3090       0xc00000007ffc0000ULL,
3091       0ULL,
3092       0x00000000780c0000ULL,
3093       0ULL,
3094       0ULL
3095     },
3096     {
3097       0x0000000050f00000ULL,
3098       -1ULL,
3099       0x0000000068080000ULL,
3100       -1ULL,
3101       -1ULL
3102     }
3103 #endif
3104   },
3105   { "mul_ls_lu", TILEGX_OPC_MUL_LS_LU, 0x1, 3, TREG_ZERO, 1,
3106     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3107 #ifndef DISASM_ONLY
3108     {
3109       0xc00000007ffc0000ULL,
3110       0ULL,
3111       0ULL,
3112       0ULL,
3113       0ULL
3114     },
3115     {
3116       0x0000000050f40000ULL,
3117       -1ULL,
3118       -1ULL,
3119       -1ULL,
3120       -1ULL
3121     }
3122 #endif
3123   },
3124   { "mul_lu_lu", TILEGX_OPC_MUL_LU_LU, 0x5, 3, TREG_ZERO, 1,
3125     { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3126 #ifndef DISASM_ONLY
3127     {
3128       0xc00000007ffc0000ULL,
3129       0ULL,
3130       0x00000000780c0000ULL,
3131       0ULL,
3132       0ULL
3133     },
3134     {
3135       0x0000000050f80000ULL,
3136       -1ULL,
3137       0x00000000680c0000ULL,
3138       -1ULL,
3139       -1ULL
3140     }
3141 #endif
3142   },
3143   { "mula_hs_hs", TILEGX_OPC_MULA_HS_HS, 0x5, 3, TREG_ZERO, 1,
3144     { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3145 #ifndef DISASM_ONLY
3146     {
3147       0xc00000007ffc0000ULL,
3148       0ULL,
3149       0x00000000780c0000ULL,
3150       0ULL,
3151       0ULL
3152     },
3153     {
3154       0x0000000050a80000ULL,
3155       -1ULL,
3156       0x0000000070000000ULL,
3157       -1ULL,
3158       -1ULL
3159     }
3160 #endif
3161   },
3162   { "mula_hs_hu", TILEGX_OPC_MULA_HS_HU, 0x1, 3, TREG_ZERO, 1,
3163     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3164 #ifndef DISASM_ONLY
3165     {
3166       0xc00000007ffc0000ULL,
3167       0ULL,
3168       0ULL,
3169       0ULL,
3170       0ULL
3171     },
3172     {
3173       0x0000000050ac0000ULL,
3174       -1ULL,
3175       -1ULL,
3176       -1ULL,
3177       -1ULL
3178     }
3179 #endif
3180   },
3181   { "mula_hs_ls", TILEGX_OPC_MULA_HS_LS, 0x1, 3, TREG_ZERO, 1,
3182     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3183 #ifndef DISASM_ONLY
3184     {
3185       0xc00000007ffc0000ULL,
3186       0ULL,
3187       0ULL,
3188       0ULL,
3189       0ULL
3190     },
3191     {
3192       0x0000000050b00000ULL,
3193       -1ULL,
3194       -1ULL,
3195       -1ULL,
3196       -1ULL
3197     }
3198 #endif
3199   },
3200   { "mula_hs_lu", TILEGX_OPC_MULA_HS_LU, 0x1, 3, TREG_ZERO, 1,
3201     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3202 #ifndef DISASM_ONLY
3203     {
3204       0xc00000007ffc0000ULL,
3205       0ULL,
3206       0ULL,
3207       0ULL,
3208       0ULL
3209     },
3210     {
3211       0x0000000050b40000ULL,
3212       -1ULL,
3213       -1ULL,
3214       -1ULL,
3215       -1ULL
3216     }
3217 #endif
3218   },
3219   { "mula_hu_hu", TILEGX_OPC_MULA_HU_HU, 0x5, 3, TREG_ZERO, 1,
3220     { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3221 #ifndef DISASM_ONLY
3222     {
3223       0xc00000007ffc0000ULL,
3224       0ULL,
3225       0x00000000780c0000ULL,
3226       0ULL,
3227       0ULL
3228     },
3229     {
3230       0x0000000050b80000ULL,
3231       -1ULL,
3232       0x0000000070040000ULL,
3233       -1ULL,
3234       -1ULL
3235     }
3236 #endif
3237   },
3238   { "mula_hu_ls", TILEGX_OPC_MULA_HU_LS, 0x1, 3, TREG_ZERO, 1,
3239     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3240 #ifndef DISASM_ONLY
3241     {
3242       0xc00000007ffc0000ULL,
3243       0ULL,
3244       0ULL,
3245       0ULL,
3246       0ULL
3247     },
3248     {
3249       0x0000000050bc0000ULL,
3250       -1ULL,
3251       -1ULL,
3252       -1ULL,
3253       -1ULL
3254     }
3255 #endif
3256   },
3257   { "mula_hu_lu", TILEGX_OPC_MULA_HU_LU, 0x1, 3, TREG_ZERO, 1,
3258     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3259 #ifndef DISASM_ONLY
3260     {
3261       0xc00000007ffc0000ULL,
3262       0ULL,
3263       0ULL,
3264       0ULL,
3265       0ULL
3266     },
3267     {
3268       0x0000000050c00000ULL,
3269       -1ULL,
3270       -1ULL,
3271       -1ULL,
3272       -1ULL
3273     }
3274 #endif
3275   },
3276   { "mula_ls_ls", TILEGX_OPC_MULA_LS_LS, 0x5, 3, TREG_ZERO, 1,
3277     { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3278 #ifndef DISASM_ONLY
3279     {
3280       0xc00000007ffc0000ULL,
3281       0ULL,
3282       0x00000000780c0000ULL,
3283       0ULL,
3284       0ULL
3285     },
3286     {
3287       0x0000000050c40000ULL,
3288       -1ULL,
3289       0x0000000070080000ULL,
3290       -1ULL,
3291       -1ULL
3292     }
3293 #endif
3294   },
3295   { "mula_ls_lu", TILEGX_OPC_MULA_LS_LU, 0x1, 3, TREG_ZERO, 1,
3296     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3297 #ifndef DISASM_ONLY
3298     {
3299       0xc00000007ffc0000ULL,
3300       0ULL,
3301       0ULL,
3302       0ULL,
3303       0ULL
3304     },
3305     {
3306       0x0000000050c80000ULL,
3307       -1ULL,
3308       -1ULL,
3309       -1ULL,
3310       -1ULL
3311     }
3312 #endif
3313   },
3314   { "mula_lu_lu", TILEGX_OPC_MULA_LU_LU, 0x5, 3, TREG_ZERO, 1,
3315     { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3316 #ifndef DISASM_ONLY
3317     {
3318       0xc00000007ffc0000ULL,
3319       0ULL,
3320       0x00000000780c0000ULL,
3321       0ULL,
3322       0ULL
3323     },
3324     {
3325       0x0000000050cc0000ULL,
3326       -1ULL,
3327       0x00000000700c0000ULL,
3328       -1ULL,
3329       -1ULL
3330     }
3331 #endif
3332   },
3333   { "mulax", TILEGX_OPC_MULAX, 0x5, 3, TREG_ZERO, 1,
3334     { { 23, 7, 16 }, { 0, }, { 24, 11, 18 }, { 0, }, { 0, } },
3335 #ifndef DISASM_ONLY
3336     {
3337       0xc00000007ffc0000ULL,
3338       0ULL,
3339       0x00000000780c0000ULL,
3340       0ULL,
3341       0ULL
3342     },
3343     {
3344       0x0000000050a40000ULL,
3345       -1ULL,
3346       0x0000000040080000ULL,
3347       -1ULL,
3348       -1ULL
3349     }
3350 #endif
3351   },
3352   { "mulx", TILEGX_OPC_MULX, 0x5, 3, TREG_ZERO, 1,
3353     { { 6, 7, 16 }, { 0, }, { 10, 11, 18 }, { 0, }, { 0, } },
3354 #ifndef DISASM_ONLY
3355     {
3356       0xc00000007ffc0000ULL,
3357       0ULL,
3358       0x00000000780c0000ULL,
3359       0ULL,
3360       0ULL
3361     },
3362     {
3363       0x0000000050d00000ULL,
3364       -1ULL,
3365       0x00000000400c0000ULL,
3366       -1ULL,
3367       -1ULL
3368     }
3369 #endif
3370   },
3371   { "mz", TILEGX_OPC_MZ, 0xf, 3, TREG_ZERO, 1,
3372     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3373 #ifndef DISASM_ONLY
3374     {
3375       0xc00000007ffc0000ULL,
3376       0xfffe000000000000ULL,
3377       0x00000000780c0000ULL,
3378       0x3c06000000000000ULL,
3379       0ULL
3380     },
3381     {
3382       0x0000000050fc0000ULL,
3383       0x2836000000000000ULL,
3384       0x00000000480c0000ULL,
3385       0x2806000000000000ULL,
3386       -1ULL
3387     }
3388 #endif
3389   },
3390   { "nap", TILEGX_OPC_NAP, 0x2, 0, TREG_ZERO, 0,
3391     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
3392 #ifndef DISASM_ONLY
3393     {
3394       0ULL,
3395       0xfffff80000000000ULL,
3396       0ULL,
3397       0ULL,
3398       0ULL
3399     },
3400     {
3401       -1ULL,
3402       0x286b000000000000ULL,
3403       -1ULL,
3404       -1ULL,
3405       -1ULL
3406     }
3407 #endif
3408   },
3409   { "nop", TILEGX_OPC_NOP, 0xf, 0, TREG_ZERO, 1,
3410     { {  }, {  }, {  }, {  }, { 0, } },
3411 #ifndef DISASM_ONLY
3412     {
3413       0xc00000007ffff000ULL,
3414       0xfffff80000000000ULL,
3415       0x00000000780ff000ULL,
3416       0x3c07f80000000000ULL,
3417       0ULL
3418     },
3419     {
3420       0x0000000051485000ULL,
3421       0x286b080000000000ULL,
3422       0x00000000300c5000ULL,
3423       0x1c06780000000000ULL,
3424       -1ULL
3425     }
3426 #endif
3427   },
3428   { "nor", TILEGX_OPC_NOR, 0xf, 3, TREG_ZERO, 1,
3429     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3430 #ifndef DISASM_ONLY
3431     {
3432       0xc00000007ffc0000ULL,
3433       0xfffe000000000000ULL,
3434       0x00000000780c0000ULL,
3435       0x3c06000000000000ULL,
3436       0ULL
3437     },
3438     {
3439       0x0000000051000000ULL,
3440       0x2838000000000000ULL,
3441       0x0000000050040000ULL,
3442       0x2c02000000000000ULL,
3443       -1ULL
3444     }
3445 #endif
3446   },
3447   { "or", TILEGX_OPC_OR, 0xf, 3, TREG_ZERO, 1,
3448     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3449 #ifndef DISASM_ONLY
3450     {
3451       0xc00000007ffc0000ULL,
3452       0xfffe000000000000ULL,
3453       0x00000000780c0000ULL,
3454       0x3c06000000000000ULL,
3455       0ULL
3456     },
3457     {
3458       0x0000000051040000ULL,
3459       0x283a000000000000ULL,
3460       0x0000000050080000ULL,
3461       0x2c04000000000000ULL,
3462       -1ULL
3463     }
3464 #endif
3465   },
3466   { "ori", TILEGX_OPC_ORI, 0x3, 3, TREG_ZERO, 1,
3467     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
3468 #ifndef DISASM_ONLY
3469     {
3470       0xc00000007ff00000ULL,
3471       0xfff8000000000000ULL,
3472       0ULL,
3473       0ULL,
3474       0ULL
3475     },
3476     {
3477       0x0000000040700000ULL,
3478       0x18c0000000000000ULL,
3479       -1ULL,
3480       -1ULL,
3481       -1ULL
3482     }
3483 #endif
3484   },
3485   { "pcnt", TILEGX_OPC_PCNT, 0x5, 2, TREG_ZERO, 1,
3486     { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
3487 #ifndef DISASM_ONLY
3488     {
3489       0xc00000007ffff000ULL,
3490       0ULL,
3491       0x00000000780ff000ULL,
3492       0ULL,
3493       0ULL
3494     },
3495     {
3496       0x0000000051486000ULL,
3497       -1ULL,
3498       0x00000000300c6000ULL,
3499       -1ULL,
3500       -1ULL
3501     }
3502 #endif
3503   },
3504   { "revbits", TILEGX_OPC_REVBITS, 0x5, 2, TREG_ZERO, 1,
3505     { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
3506 #ifndef DISASM_ONLY
3507     {
3508       0xc00000007ffff000ULL,
3509       0ULL,
3510       0x00000000780ff000ULL,
3511       0ULL,
3512       0ULL
3513     },
3514     {
3515       0x0000000051487000ULL,
3516       -1ULL,
3517       0x00000000300c7000ULL,
3518       -1ULL,
3519       -1ULL
3520     }
3521 #endif
3522   },
3523   { "revbytes", TILEGX_OPC_REVBYTES, 0x5, 2, TREG_ZERO, 1,
3524     { { 6, 7 }, { 0, }, { 10, 11 }, { 0, }, { 0, } },
3525 #ifndef DISASM_ONLY
3526     {
3527       0xc00000007ffff000ULL,
3528       0ULL,
3529       0x00000000780ff000ULL,
3530       0ULL,
3531       0ULL
3532     },
3533     {
3534       0x0000000051488000ULL,
3535       -1ULL,
3536       0x00000000300c8000ULL,
3537       -1ULL,
3538       -1ULL
3539     }
3540 #endif
3541   },
3542   { "rotl", TILEGX_OPC_ROTL, 0xf, 3, TREG_ZERO, 1,
3543     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3544 #ifndef DISASM_ONLY
3545     {
3546       0xc00000007ffc0000ULL,
3547       0xfffe000000000000ULL,
3548       0x00000000780c0000ULL,
3549       0x3c06000000000000ULL,
3550       0ULL
3551     },
3552     {
3553       0x0000000051080000ULL,
3554       0x283c000000000000ULL,
3555       0x0000000058000000ULL,
3556       0x3000000000000000ULL,
3557       -1ULL
3558     }
3559 #endif
3560   },
3561   { "rotli", TILEGX_OPC_ROTLI, 0xf, 3, TREG_ZERO, 1,
3562     { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3563 #ifndef DISASM_ONLY
3564     {
3565       0xc00000007ffc0000ULL,
3566       0xfffe000000000000ULL,
3567       0x00000000780c0000ULL,
3568       0x3c06000000000000ULL,
3569       0ULL
3570     },
3571     {
3572       0x0000000060040000ULL,
3573       0x3002000000000000ULL,
3574       0x0000000078000000ULL,
3575       0x3800000000000000ULL,
3576       -1ULL
3577     }
3578 #endif
3579   },
3580   { "shl", TILEGX_OPC_SHL, 0xf, 3, TREG_ZERO, 1,
3581     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3582 #ifndef DISASM_ONLY
3583     {
3584       0xc00000007ffc0000ULL,
3585       0xfffe000000000000ULL,
3586       0x00000000780c0000ULL,
3587       0x3c06000000000000ULL,
3588       0ULL
3589     },
3590     {
3591       0x0000000051280000ULL,
3592       0x284c000000000000ULL,
3593       0x0000000058040000ULL,
3594       0x3002000000000000ULL,
3595       -1ULL
3596     }
3597 #endif
3598   },
3599   { "shl16insli", TILEGX_OPC_SHL16INSLI, 0x3, 3, TREG_ZERO, 1,
3600     { { 6, 7, 4 }, { 8, 9, 5 }, { 0, }, { 0, }, { 0, } },
3601 #ifndef DISASM_ONLY
3602     {
3603       0xc000000070000000ULL,
3604       0xf800000000000000ULL,
3605       0ULL,
3606       0ULL,
3607       0ULL
3608     },
3609     {
3610       0x0000000070000000ULL,
3611       0x3800000000000000ULL,
3612       -1ULL,
3613       -1ULL,
3614       -1ULL
3615     }
3616 #endif
3617   },
3618   { "shl1add", TILEGX_OPC_SHL1ADD, 0xf, 3, TREG_ZERO, 1,
3619     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3620 #ifndef DISASM_ONLY
3621     {
3622       0xc00000007ffc0000ULL,
3623       0xfffe000000000000ULL,
3624       0x00000000780c0000ULL,
3625       0x3c06000000000000ULL,
3626       0ULL
3627     },
3628     {
3629       0x0000000051100000ULL,
3630       0x2840000000000000ULL,
3631       0x0000000030000000ULL,
3632       0x1c00000000000000ULL,
3633       -1ULL
3634     }
3635 #endif
3636   },
3637   { "shl1addx", TILEGX_OPC_SHL1ADDX, 0xf, 3, TREG_ZERO, 1,
3638     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3639 #ifndef DISASM_ONLY
3640     {
3641       0xc00000007ffc0000ULL,
3642       0xfffe000000000000ULL,
3643       0x00000000780c0000ULL,
3644       0x3c06000000000000ULL,
3645       0ULL
3646     },
3647     {
3648       0x00000000510c0000ULL,
3649       0x283e000000000000ULL,
3650       0x0000000060040000ULL,
3651       0x3402000000000000ULL,
3652       -1ULL
3653     }
3654 #endif
3655   },
3656   { "shl2add", TILEGX_OPC_SHL2ADD, 0xf, 3, TREG_ZERO, 1,
3657     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3658 #ifndef DISASM_ONLY
3659     {
3660       0xc00000007ffc0000ULL,
3661       0xfffe000000000000ULL,
3662       0x00000000780c0000ULL,
3663       0x3c06000000000000ULL,
3664       0ULL
3665     },
3666     {
3667       0x0000000051180000ULL,
3668       0x2844000000000000ULL,
3669       0x0000000030040000ULL,
3670       0x1c02000000000000ULL,
3671       -1ULL
3672     }
3673 #endif
3674   },
3675   { "shl2addx", TILEGX_OPC_SHL2ADDX, 0xf, 3, TREG_ZERO, 1,
3676     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3677 #ifndef DISASM_ONLY
3678     {
3679       0xc00000007ffc0000ULL,
3680       0xfffe000000000000ULL,
3681       0x00000000780c0000ULL,
3682       0x3c06000000000000ULL,
3683       0ULL
3684     },
3685     {
3686       0x0000000051140000ULL,
3687       0x2842000000000000ULL,
3688       0x0000000060080000ULL,
3689       0x3404000000000000ULL,
3690       -1ULL
3691     }
3692 #endif
3693   },
3694   { "shl3add", TILEGX_OPC_SHL3ADD, 0xf, 3, TREG_ZERO, 1,
3695     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3696 #ifndef DISASM_ONLY
3697     {
3698       0xc00000007ffc0000ULL,
3699       0xfffe000000000000ULL,
3700       0x00000000780c0000ULL,
3701       0x3c06000000000000ULL,
3702       0ULL
3703     },
3704     {
3705       0x0000000051200000ULL,
3706       0x2848000000000000ULL,
3707       0x0000000030080000ULL,
3708       0x1c04000000000000ULL,
3709       -1ULL
3710     }
3711 #endif
3712   },
3713   { "shl3addx", TILEGX_OPC_SHL3ADDX, 0xf, 3, TREG_ZERO, 1,
3714     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3715 #ifndef DISASM_ONLY
3716     {
3717       0xc00000007ffc0000ULL,
3718       0xfffe000000000000ULL,
3719       0x00000000780c0000ULL,
3720       0x3c06000000000000ULL,
3721       0ULL
3722     },
3723     {
3724       0x00000000511c0000ULL,
3725       0x2846000000000000ULL,
3726       0x00000000600c0000ULL,
3727       0x3406000000000000ULL,
3728       -1ULL
3729     }
3730 #endif
3731   },
3732   { "shli", TILEGX_OPC_SHLI, 0xf, 3, TREG_ZERO, 1,
3733     { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3734 #ifndef DISASM_ONLY
3735     {
3736       0xc00000007ffc0000ULL,
3737       0xfffe000000000000ULL,
3738       0x00000000780c0000ULL,
3739       0x3c06000000000000ULL,
3740       0ULL
3741     },
3742     {
3743       0x0000000060080000ULL,
3744       0x3004000000000000ULL,
3745       0x0000000078040000ULL,
3746       0x3802000000000000ULL,
3747       -1ULL
3748     }
3749 #endif
3750   },
3751   { "shlx", TILEGX_OPC_SHLX, 0x3, 3, TREG_ZERO, 1,
3752     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
3753 #ifndef DISASM_ONLY
3754     {
3755       0xc00000007ffc0000ULL,
3756       0xfffe000000000000ULL,
3757       0ULL,
3758       0ULL,
3759       0ULL
3760     },
3761     {
3762       0x0000000051240000ULL,
3763       0x284a000000000000ULL,
3764       -1ULL,
3765       -1ULL,
3766       -1ULL
3767     }
3768 #endif
3769   },
3770   { "shlxi", TILEGX_OPC_SHLXI, 0x3, 3, TREG_ZERO, 1,
3771     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
3772 #ifndef DISASM_ONLY
3773     {
3774       0xc00000007ffc0000ULL,
3775       0xfffe000000000000ULL,
3776       0ULL,
3777       0ULL,
3778       0ULL
3779     },
3780     {
3781       0x00000000600c0000ULL,
3782       0x3006000000000000ULL,
3783       -1ULL,
3784       -1ULL,
3785       -1ULL
3786     }
3787 #endif
3788   },
3789   { "shrs", TILEGX_OPC_SHRS, 0xf, 3, TREG_ZERO, 1,
3790     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3791 #ifndef DISASM_ONLY
3792     {
3793       0xc00000007ffc0000ULL,
3794       0xfffe000000000000ULL,
3795       0x00000000780c0000ULL,
3796       0x3c06000000000000ULL,
3797       0ULL
3798     },
3799     {
3800       0x00000000512c0000ULL,
3801       0x284e000000000000ULL,
3802       0x0000000058080000ULL,
3803       0x3004000000000000ULL,
3804       -1ULL
3805     }
3806 #endif
3807   },
3808   { "shrsi", TILEGX_OPC_SHRSI, 0xf, 3, TREG_ZERO, 1,
3809     { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3810 #ifndef DISASM_ONLY
3811     {
3812       0xc00000007ffc0000ULL,
3813       0xfffe000000000000ULL,
3814       0x00000000780c0000ULL,
3815       0x3c06000000000000ULL,
3816       0ULL
3817     },
3818     {
3819       0x0000000060100000ULL,
3820       0x3008000000000000ULL,
3821       0x0000000078080000ULL,
3822       0x3804000000000000ULL,
3823       -1ULL
3824     }
3825 #endif
3826   },
3827   { "shru", TILEGX_OPC_SHRU, 0xf, 3, TREG_ZERO, 1,
3828     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
3829 #ifndef DISASM_ONLY
3830     {
3831       0xc00000007ffc0000ULL,
3832       0xfffe000000000000ULL,
3833       0x00000000780c0000ULL,
3834       0x3c06000000000000ULL,
3835       0ULL
3836     },
3837     {
3838       0x0000000051340000ULL,
3839       0x2852000000000000ULL,
3840       0x00000000580c0000ULL,
3841       0x3006000000000000ULL,
3842       -1ULL
3843     }
3844 #endif
3845   },
3846   { "shrui", TILEGX_OPC_SHRUI, 0xf, 3, TREG_ZERO, 1,
3847     { { 6, 7, 29 }, { 8, 9, 30 }, { 10, 11, 31 }, { 12, 13, 32 }, { 0, } },
3848 #ifndef DISASM_ONLY
3849     {
3850       0xc00000007ffc0000ULL,
3851       0xfffe000000000000ULL,
3852       0x00000000780c0000ULL,
3853       0x3c06000000000000ULL,
3854       0ULL
3855     },
3856     {
3857       0x0000000060140000ULL,
3858       0x300a000000000000ULL,
3859       0x00000000780c0000ULL,
3860       0x3806000000000000ULL,
3861       -1ULL
3862     }
3863 #endif
3864   },
3865   { "shrux", TILEGX_OPC_SHRUX, 0x3, 3, TREG_ZERO, 1,
3866     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
3867 #ifndef DISASM_ONLY
3868     {
3869       0xc00000007ffc0000ULL,
3870       0xfffe000000000000ULL,
3871       0ULL,
3872       0ULL,
3873       0ULL
3874     },
3875     {
3876       0x0000000051300000ULL,
3877       0x2850000000000000ULL,
3878       -1ULL,
3879       -1ULL,
3880       -1ULL
3881     }
3882 #endif
3883   },
3884   { "shruxi", TILEGX_OPC_SHRUXI, 0x3, 3, TREG_ZERO, 1,
3885     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
3886 #ifndef DISASM_ONLY
3887     {
3888       0xc00000007ffc0000ULL,
3889       0xfffe000000000000ULL,
3890       0ULL,
3891       0ULL,
3892       0ULL
3893     },
3894     {
3895       0x0000000060180000ULL,
3896       0x300c000000000000ULL,
3897       -1ULL,
3898       -1ULL,
3899       -1ULL
3900     }
3901 #endif
3902   },
3903   { "shufflebytes", TILEGX_OPC_SHUFFLEBYTES, 0x1, 3, TREG_ZERO, 1,
3904     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
3905 #ifndef DISASM_ONLY
3906     {
3907       0xc00000007ffc0000ULL,
3908       0ULL,
3909       0ULL,
3910       0ULL,
3911       0ULL
3912     },
3913     {
3914       0x0000000051380000ULL,
3915       -1ULL,
3916       -1ULL,
3917       -1ULL,
3918       -1ULL
3919     }
3920 #endif
3921   },
3922   { "st", TILEGX_OPC_ST, 0x12, 2, TREG_ZERO, 1,
3923     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } },
3924 #ifndef DISASM_ONLY
3925     {
3926       0ULL,
3927       0xfffe000000000000ULL,
3928       0ULL,
3929       0ULL,
3930       0xc200000004000000ULL
3931     },
3932     {
3933       -1ULL,
3934       0x2862000000000000ULL,
3935       -1ULL,
3936       -1ULL,
3937       0xc200000004000000ULL
3938     }
3939 #endif
3940   },
3941   { "st1", TILEGX_OPC_ST1, 0x12, 2, TREG_ZERO, 1,
3942     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } },
3943 #ifndef DISASM_ONLY
3944     {
3945       0ULL,
3946       0xfffe000000000000ULL,
3947       0ULL,
3948       0ULL,
3949       0xc200000004000000ULL
3950     },
3951     {
3952       -1ULL,
3953       0x2854000000000000ULL,
3954       -1ULL,
3955       -1ULL,
3956       0xc000000000000000ULL
3957     }
3958 #endif
3959   },
3960   { "st1_add", TILEGX_OPC_ST1_ADD, 0x2, 3, TREG_ZERO, 1,
3961     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
3962 #ifndef DISASM_ONLY
3963     {
3964       0ULL,
3965       0xfff8000000000000ULL,
3966       0ULL,
3967       0ULL,
3968       0ULL
3969     },
3970     {
3971       -1ULL,
3972       0x18c8000000000000ULL,
3973       -1ULL,
3974       -1ULL,
3975       -1ULL
3976     }
3977 #endif
3978   },
3979   { "st2", TILEGX_OPC_ST2, 0x12, 2, TREG_ZERO, 1,
3980     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } },
3981 #ifndef DISASM_ONLY
3982     {
3983       0ULL,
3984       0xfffe000000000000ULL,
3985       0ULL,
3986       0ULL,
3987       0xc200000004000000ULL
3988     },
3989     {
3990       -1ULL,
3991       0x2856000000000000ULL,
3992       -1ULL,
3993       -1ULL,
3994       0xc000000004000000ULL
3995     }
3996 #endif
3997   },
3998   { "st2_add", TILEGX_OPC_ST2_ADD, 0x2, 3, TREG_ZERO, 1,
3999     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4000 #ifndef DISASM_ONLY
4001     {
4002       0ULL,
4003       0xfff8000000000000ULL,
4004       0ULL,
4005       0ULL,
4006       0ULL
4007     },
4008     {
4009       -1ULL,
4010       0x18d0000000000000ULL,
4011       -1ULL,
4012       -1ULL,
4013       -1ULL
4014     }
4015 #endif
4016   },
4017   { "st4", TILEGX_OPC_ST4, 0x12, 2, TREG_ZERO, 1,
4018     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 14, 33 } },
4019 #ifndef DISASM_ONLY
4020     {
4021       0ULL,
4022       0xfffe000000000000ULL,
4023       0ULL,
4024       0ULL,
4025       0xc200000004000000ULL
4026     },
4027     {
4028       -1ULL,
4029       0x2858000000000000ULL,
4030       -1ULL,
4031       -1ULL,
4032       0xc200000000000000ULL
4033     }
4034 #endif
4035   },
4036   { "st4_add", TILEGX_OPC_ST4_ADD, 0x2, 3, TREG_ZERO, 1,
4037     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4038 #ifndef DISASM_ONLY
4039     {
4040       0ULL,
4041       0xfff8000000000000ULL,
4042       0ULL,
4043       0ULL,
4044       0ULL
4045     },
4046     {
4047       -1ULL,
4048       0x18d8000000000000ULL,
4049       -1ULL,
4050       -1ULL,
4051       -1ULL
4052     }
4053 #endif
4054   },
4055   { "st_add", TILEGX_OPC_ST_ADD, 0x2, 3, TREG_ZERO, 1,
4056     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4057 #ifndef DISASM_ONLY
4058     {
4059       0ULL,
4060       0xfff8000000000000ULL,
4061       0ULL,
4062       0ULL,
4063       0ULL
4064     },
4065     {
4066       -1ULL,
4067       0x1900000000000000ULL,
4068       -1ULL,
4069       -1ULL,
4070       -1ULL
4071     }
4072 #endif
4073   },
4074   { "stnt", TILEGX_OPC_STNT, 0x2, 2, TREG_ZERO, 1,
4075     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } },
4076 #ifndef DISASM_ONLY
4077     {
4078       0ULL,
4079       0xfffe000000000000ULL,
4080       0ULL,
4081       0ULL,
4082       0ULL
4083     },
4084     {
4085       -1ULL,
4086       0x2860000000000000ULL,
4087       -1ULL,
4088       -1ULL,
4089       -1ULL
4090     }
4091 #endif
4092   },
4093   { "stnt1", TILEGX_OPC_STNT1, 0x2, 2, TREG_ZERO, 1,
4094     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } },
4095 #ifndef DISASM_ONLY
4096     {
4097       0ULL,
4098       0xfffe000000000000ULL,
4099       0ULL,
4100       0ULL,
4101       0ULL
4102     },
4103     {
4104       -1ULL,
4105       0x285a000000000000ULL,
4106       -1ULL,
4107       -1ULL,
4108       -1ULL
4109     }
4110 #endif
4111   },
4112   { "stnt1_add", TILEGX_OPC_STNT1_ADD, 0x2, 3, TREG_ZERO, 1,
4113     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4114 #ifndef DISASM_ONLY
4115     {
4116       0ULL,
4117       0xfff8000000000000ULL,
4118       0ULL,
4119       0ULL,
4120       0ULL
4121     },
4122     {
4123       -1ULL,
4124       0x18e0000000000000ULL,
4125       -1ULL,
4126       -1ULL,
4127       -1ULL
4128     }
4129 #endif
4130   },
4131   { "stnt2", TILEGX_OPC_STNT2, 0x2, 2, TREG_ZERO, 1,
4132     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } },
4133 #ifndef DISASM_ONLY
4134     {
4135       0ULL,
4136       0xfffe000000000000ULL,
4137       0ULL,
4138       0ULL,
4139       0ULL
4140     },
4141     {
4142       -1ULL,
4143       0x285c000000000000ULL,
4144       -1ULL,
4145       -1ULL,
4146       -1ULL
4147     }
4148 #endif
4149   },
4150   { "stnt2_add", TILEGX_OPC_STNT2_ADD, 0x2, 3, TREG_ZERO, 1,
4151     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4152 #ifndef DISASM_ONLY
4153     {
4154       0ULL,
4155       0xfff8000000000000ULL,
4156       0ULL,
4157       0ULL,
4158       0ULL
4159     },
4160     {
4161       -1ULL,
4162       0x18e8000000000000ULL,
4163       -1ULL,
4164       -1ULL,
4165       -1ULL
4166     }
4167 #endif
4168   },
4169   { "stnt4", TILEGX_OPC_STNT4, 0x2, 2, TREG_ZERO, 1,
4170     { { 0, }, { 9, 17 }, { 0, }, { 0, }, { 0, } },
4171 #ifndef DISASM_ONLY
4172     {
4173       0ULL,
4174       0xfffe000000000000ULL,
4175       0ULL,
4176       0ULL,
4177       0ULL
4178     },
4179     {
4180       -1ULL,
4181       0x285e000000000000ULL,
4182       -1ULL,
4183       -1ULL,
4184       -1ULL
4185     }
4186 #endif
4187   },
4188   { "stnt4_add", TILEGX_OPC_STNT4_ADD, 0x2, 3, TREG_ZERO, 1,
4189     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4190 #ifndef DISASM_ONLY
4191     {
4192       0ULL,
4193       0xfff8000000000000ULL,
4194       0ULL,
4195       0ULL,
4196       0ULL
4197     },
4198     {
4199       -1ULL,
4200       0x18f0000000000000ULL,
4201       -1ULL,
4202       -1ULL,
4203       -1ULL
4204     }
4205 #endif
4206   },
4207   { "stnt_add", TILEGX_OPC_STNT_ADD, 0x2, 3, TREG_ZERO, 1,
4208     { { 0, }, { 15, 17, 34 }, { 0, }, { 0, }, { 0, } },
4209 #ifndef DISASM_ONLY
4210     {
4211       0ULL,
4212       0xfff8000000000000ULL,
4213       0ULL,
4214       0ULL,
4215       0ULL
4216     },
4217     {
4218       -1ULL,
4219       0x18f8000000000000ULL,
4220       -1ULL,
4221       -1ULL,
4222       -1ULL
4223     }
4224 #endif
4225   },
4226   { "sub", TILEGX_OPC_SUB, 0xf, 3, TREG_ZERO, 1,
4227     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
4228 #ifndef DISASM_ONLY
4229     {
4230       0xc00000007ffc0000ULL,
4231       0xfffe000000000000ULL,
4232       0x00000000780c0000ULL,
4233       0x3c06000000000000ULL,
4234       0ULL
4235     },
4236     {
4237       0x0000000051440000ULL,
4238       0x2868000000000000ULL,
4239       0x00000000280c0000ULL,
4240       0x1806000000000000ULL,
4241       -1ULL
4242     }
4243 #endif
4244   },
4245   { "subx", TILEGX_OPC_SUBX, 0xf, 3, TREG_ZERO, 1,
4246     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
4247 #ifndef DISASM_ONLY
4248     {
4249       0xc00000007ffc0000ULL,
4250       0xfffe000000000000ULL,
4251       0x00000000780c0000ULL,
4252       0x3c06000000000000ULL,
4253       0ULL
4254     },
4255     {
4256       0x0000000051400000ULL,
4257       0x2866000000000000ULL,
4258       0x0000000028080000ULL,
4259       0x1804000000000000ULL,
4260       -1ULL
4261     }
4262 #endif
4263   },
4264   { "subxsc", TILEGX_OPC_SUBXSC, 0x3, 3, TREG_ZERO, 1,
4265     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4266 #ifndef DISASM_ONLY
4267     {
4268       0xc00000007ffc0000ULL,
4269       0xfffe000000000000ULL,
4270       0ULL,
4271       0ULL,
4272       0ULL
4273     },
4274     {
4275       0x00000000513c0000ULL,
4276       0x2864000000000000ULL,
4277       -1ULL,
4278       -1ULL,
4279       -1ULL
4280     }
4281 #endif
4282   },
4283   { "swint0", TILEGX_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0,
4284     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
4285 #ifndef DISASM_ONLY
4286     {
4287       0ULL,
4288       0xfffff80000000000ULL,
4289       0ULL,
4290       0ULL,
4291       0ULL
4292     },
4293     {
4294       -1ULL,
4295       0x286b100000000000ULL,
4296       -1ULL,
4297       -1ULL,
4298       -1ULL
4299     }
4300 #endif
4301   },
4302   { "swint1", TILEGX_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0,
4303     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
4304 #ifndef DISASM_ONLY
4305     {
4306       0ULL,
4307       0xfffff80000000000ULL,
4308       0ULL,
4309       0ULL,
4310       0ULL
4311     },
4312     {
4313       -1ULL,
4314       0x286b180000000000ULL,
4315       -1ULL,
4316       -1ULL,
4317       -1ULL
4318     }
4319 #endif
4320   },
4321   { "swint2", TILEGX_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0,
4322     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
4323 #ifndef DISASM_ONLY
4324     {
4325       0ULL,
4326       0xfffff80000000000ULL,
4327       0ULL,
4328       0ULL,
4329       0ULL
4330     },
4331     {
4332       -1ULL,
4333       0x286b200000000000ULL,
4334       -1ULL,
4335       -1ULL,
4336       -1ULL
4337     }
4338 #endif
4339   },
4340   { "swint3", TILEGX_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0,
4341     { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
4342 #ifndef DISASM_ONLY
4343     {
4344       0ULL,
4345       0xfffff80000000000ULL,
4346       0ULL,
4347       0ULL,
4348       0ULL
4349     },
4350     {
4351       -1ULL,
4352       0x286b280000000000ULL,
4353       -1ULL,
4354       -1ULL,
4355       -1ULL
4356     }
4357 #endif
4358   },
4359   { "tblidxb0", TILEGX_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1,
4360     { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4361 #ifndef DISASM_ONLY
4362     {
4363       0xc00000007ffff000ULL,
4364       0ULL,
4365       0x00000000780ff000ULL,
4366       0ULL,
4367       0ULL
4368     },
4369     {
4370       0x0000000051489000ULL,
4371       -1ULL,
4372       0x00000000300c9000ULL,
4373       -1ULL,
4374       -1ULL
4375     }
4376 #endif
4377   },
4378   { "tblidxb1", TILEGX_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1,
4379     { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4380 #ifndef DISASM_ONLY
4381     {
4382       0xc00000007ffff000ULL,
4383       0ULL,
4384       0x00000000780ff000ULL,
4385       0ULL,
4386       0ULL
4387     },
4388     {
4389       0x000000005148a000ULL,
4390       -1ULL,
4391       0x00000000300ca000ULL,
4392       -1ULL,
4393       -1ULL
4394     }
4395 #endif
4396   },
4397   { "tblidxb2", TILEGX_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1,
4398     { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4399 #ifndef DISASM_ONLY
4400     {
4401       0xc00000007ffff000ULL,
4402       0ULL,
4403       0x00000000780ff000ULL,
4404       0ULL,
4405       0ULL
4406     },
4407     {
4408       0x000000005148b000ULL,
4409       -1ULL,
4410       0x00000000300cb000ULL,
4411       -1ULL,
4412       -1ULL
4413     }
4414 #endif
4415   },
4416   { "tblidxb3", TILEGX_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1,
4417     { { 23, 7 }, { 0, }, { 24, 11 }, { 0, }, { 0, } },
4418 #ifndef DISASM_ONLY
4419     {
4420       0xc00000007ffff000ULL,
4421       0ULL,
4422       0x00000000780ff000ULL,
4423       0ULL,
4424       0ULL
4425     },
4426     {
4427       0x000000005148c000ULL,
4428       -1ULL,
4429       0x00000000300cc000ULL,
4430       -1ULL,
4431       -1ULL
4432     }
4433 #endif
4434   },
4435   { "v1add", TILEGX_OPC_V1ADD, 0x3, 3, TREG_ZERO, 1,
4436     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4437 #ifndef DISASM_ONLY
4438     {
4439       0xc00000007ffc0000ULL,
4440       0xfffe000000000000ULL,
4441       0ULL,
4442       0ULL,
4443       0ULL
4444     },
4445     {
4446       0x0000000051500000ULL,
4447       0x286e000000000000ULL,
4448       -1ULL,
4449       -1ULL,
4450       -1ULL
4451     }
4452 #endif
4453   },
4454   { "v1addi", TILEGX_OPC_V1ADDI, 0x3, 3, TREG_ZERO, 1,
4455     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
4456 #ifndef DISASM_ONLY
4457     {
4458       0xc00000007ff00000ULL,
4459       0xfff8000000000000ULL,
4460       0ULL,
4461       0ULL,
4462       0ULL
4463     },
4464     {
4465       0x0000000040800000ULL,
4466       0x1908000000000000ULL,
4467       -1ULL,
4468       -1ULL,
4469       -1ULL
4470     }
4471 #endif
4472   },
4473   { "v1adduc", TILEGX_OPC_V1ADDUC, 0x3, 3, TREG_ZERO, 1,
4474     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4475 #ifndef DISASM_ONLY
4476     {
4477       0xc00000007ffc0000ULL,
4478       0xfffe000000000000ULL,
4479       0ULL,
4480       0ULL,
4481       0ULL
4482     },
4483     {
4484       0x00000000514c0000ULL,
4485       0x286c000000000000ULL,
4486       -1ULL,
4487       -1ULL,
4488       -1ULL
4489     }
4490 #endif
4491   },
4492   { "v1adiffu", TILEGX_OPC_V1ADIFFU, 0x1, 3, TREG_ZERO, 1,
4493     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4494 #ifndef DISASM_ONLY
4495     {
4496       0xc00000007ffc0000ULL,
4497       0ULL,
4498       0ULL,
4499       0ULL,
4500       0ULL
4501     },
4502     {
4503       0x0000000051540000ULL,
4504       -1ULL,
4505       -1ULL,
4506       -1ULL,
4507       -1ULL
4508     }
4509 #endif
4510   },
4511   { "v1avgu", TILEGX_OPC_V1AVGU, 0x1, 3, TREG_ZERO, 1,
4512     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4513 #ifndef DISASM_ONLY
4514     {
4515       0xc00000007ffc0000ULL,
4516       0ULL,
4517       0ULL,
4518       0ULL,
4519       0ULL
4520     },
4521     {
4522       0x0000000051580000ULL,
4523       -1ULL,
4524       -1ULL,
4525       -1ULL,
4526       -1ULL
4527     }
4528 #endif
4529   },
4530   { "v1cmpeq", TILEGX_OPC_V1CMPEQ, 0x3, 3, TREG_ZERO, 1,
4531     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4532 #ifndef DISASM_ONLY
4533     {
4534       0xc00000007ffc0000ULL,
4535       0xfffe000000000000ULL,
4536       0ULL,
4537       0ULL,
4538       0ULL
4539     },
4540     {
4541       0x00000000515c0000ULL,
4542       0x2870000000000000ULL,
4543       -1ULL,
4544       -1ULL,
4545       -1ULL
4546     }
4547 #endif
4548   },
4549   { "v1cmpeqi", TILEGX_OPC_V1CMPEQI, 0x3, 3, TREG_ZERO, 1,
4550     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
4551 #ifndef DISASM_ONLY
4552     {
4553       0xc00000007ff00000ULL,
4554       0xfff8000000000000ULL,
4555       0ULL,
4556       0ULL,
4557       0ULL
4558     },
4559     {
4560       0x0000000040900000ULL,
4561       0x1910000000000000ULL,
4562       -1ULL,
4563       -1ULL,
4564       -1ULL
4565     }
4566 #endif
4567   },
4568   { "v1cmples", TILEGX_OPC_V1CMPLES, 0x3, 3, TREG_ZERO, 1,
4569     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4570 #ifndef DISASM_ONLY
4571     {
4572       0xc00000007ffc0000ULL,
4573       0xfffe000000000000ULL,
4574       0ULL,
4575       0ULL,
4576       0ULL
4577     },
4578     {
4579       0x0000000051600000ULL,
4580       0x2872000000000000ULL,
4581       -1ULL,
4582       -1ULL,
4583       -1ULL
4584     }
4585 #endif
4586   },
4587   { "v1cmpleu", TILEGX_OPC_V1CMPLEU, 0x3, 3, TREG_ZERO, 1,
4588     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4589 #ifndef DISASM_ONLY
4590     {
4591       0xc00000007ffc0000ULL,
4592       0xfffe000000000000ULL,
4593       0ULL,
4594       0ULL,
4595       0ULL
4596     },
4597     {
4598       0x0000000051640000ULL,
4599       0x2874000000000000ULL,
4600       -1ULL,
4601       -1ULL,
4602       -1ULL
4603     }
4604 #endif
4605   },
4606   { "v1cmplts", TILEGX_OPC_V1CMPLTS, 0x3, 3, TREG_ZERO, 1,
4607     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4608 #ifndef DISASM_ONLY
4609     {
4610       0xc00000007ffc0000ULL,
4611       0xfffe000000000000ULL,
4612       0ULL,
4613       0ULL,
4614       0ULL
4615     },
4616     {
4617       0x0000000051680000ULL,
4618       0x2876000000000000ULL,
4619       -1ULL,
4620       -1ULL,
4621       -1ULL
4622     }
4623 #endif
4624   },
4625   { "v1cmpltsi", TILEGX_OPC_V1CMPLTSI, 0x3, 3, TREG_ZERO, 1,
4626     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
4627 #ifndef DISASM_ONLY
4628     {
4629       0xc00000007ff00000ULL,
4630       0xfff8000000000000ULL,
4631       0ULL,
4632       0ULL,
4633       0ULL
4634     },
4635     {
4636       0x0000000040a00000ULL,
4637       0x1918000000000000ULL,
4638       -1ULL,
4639       -1ULL,
4640       -1ULL
4641     }
4642 #endif
4643   },
4644   { "v1cmpltu", TILEGX_OPC_V1CMPLTU, 0x3, 3, TREG_ZERO, 1,
4645     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4646 #ifndef DISASM_ONLY
4647     {
4648       0xc00000007ffc0000ULL,
4649       0xfffe000000000000ULL,
4650       0ULL,
4651       0ULL,
4652       0ULL
4653     },
4654     {
4655       0x00000000516c0000ULL,
4656       0x2878000000000000ULL,
4657       -1ULL,
4658       -1ULL,
4659       -1ULL
4660     }
4661 #endif
4662   },
4663   { "v1cmpltui", TILEGX_OPC_V1CMPLTUI, 0x3, 3, TREG_ZERO, 1,
4664     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
4665 #ifndef DISASM_ONLY
4666     {
4667       0xc00000007ff00000ULL,
4668       0xfff8000000000000ULL,
4669       0ULL,
4670       0ULL,
4671       0ULL
4672     },
4673     {
4674       0x0000000040b00000ULL,
4675       0x1920000000000000ULL,
4676       -1ULL,
4677       -1ULL,
4678       -1ULL
4679     }
4680 #endif
4681   },
4682   { "v1cmpne", TILEGX_OPC_V1CMPNE, 0x3, 3, TREG_ZERO, 1,
4683     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4684 #ifndef DISASM_ONLY
4685     {
4686       0xc00000007ffc0000ULL,
4687       0xfffe000000000000ULL,
4688       0ULL,
4689       0ULL,
4690       0ULL
4691     },
4692     {
4693       0x0000000051700000ULL,
4694       0x287a000000000000ULL,
4695       -1ULL,
4696       -1ULL,
4697       -1ULL
4698     }
4699 #endif
4700   },
4701   { "v1ddotpu", TILEGX_OPC_V1DDOTPU, 0x1, 3, TREG_ZERO, 1,
4702     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4703 #ifndef DISASM_ONLY
4704     {
4705       0xc00000007ffc0000ULL,
4706       0ULL,
4707       0ULL,
4708       0ULL,
4709       0ULL
4710     },
4711     {
4712       0x0000000052880000ULL,
4713       -1ULL,
4714       -1ULL,
4715       -1ULL,
4716       -1ULL
4717     }
4718 #endif
4719   },
4720   { "v1ddotpua", TILEGX_OPC_V1DDOTPUA, 0x1, 3, TREG_ZERO, 1,
4721     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4722 #ifndef DISASM_ONLY
4723     {
4724       0xc00000007ffc0000ULL,
4725       0ULL,
4726       0ULL,
4727       0ULL,
4728       0ULL
4729     },
4730     {
4731       0x0000000052840000ULL,
4732       -1ULL,
4733       -1ULL,
4734       -1ULL,
4735       -1ULL
4736     }
4737 #endif
4738   },
4739   { "v1ddotpus", TILEGX_OPC_V1DDOTPUS, 0x1, 3, TREG_ZERO, 1,
4740     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4741 #ifndef DISASM_ONLY
4742     {
4743       0xc00000007ffc0000ULL,
4744       0ULL,
4745       0ULL,
4746       0ULL,
4747       0ULL
4748     },
4749     {
4750       0x0000000051780000ULL,
4751       -1ULL,
4752       -1ULL,
4753       -1ULL,
4754       -1ULL
4755     }
4756 #endif
4757   },
4758   { "v1ddotpusa", TILEGX_OPC_V1DDOTPUSA, 0x1, 3, TREG_ZERO, 1,
4759     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4760 #ifndef DISASM_ONLY
4761     {
4762       0xc00000007ffc0000ULL,
4763       0ULL,
4764       0ULL,
4765       0ULL,
4766       0ULL
4767     },
4768     {
4769       0x0000000051740000ULL,
4770       -1ULL,
4771       -1ULL,
4772       -1ULL,
4773       -1ULL
4774     }
4775 #endif
4776   },
4777   { "v1dotp", TILEGX_OPC_V1DOTP, 0x1, 3, TREG_ZERO, 1,
4778     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4779 #ifndef DISASM_ONLY
4780     {
4781       0xc00000007ffc0000ULL,
4782       0ULL,
4783       0ULL,
4784       0ULL,
4785       0ULL
4786     },
4787     {
4788       0x0000000051880000ULL,
4789       -1ULL,
4790       -1ULL,
4791       -1ULL,
4792       -1ULL
4793     }
4794 #endif
4795   },
4796   { "v1dotpa", TILEGX_OPC_V1DOTPA, 0x1, 3, TREG_ZERO, 1,
4797     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4798 #ifndef DISASM_ONLY
4799     {
4800       0xc00000007ffc0000ULL,
4801       0ULL,
4802       0ULL,
4803       0ULL,
4804       0ULL
4805     },
4806     {
4807       0x00000000517c0000ULL,
4808       -1ULL,
4809       -1ULL,
4810       -1ULL,
4811       -1ULL
4812     }
4813 #endif
4814   },
4815   { "v1dotpu", TILEGX_OPC_V1DOTPU, 0x1, 3, TREG_ZERO, 1,
4816     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4817 #ifndef DISASM_ONLY
4818     {
4819       0xc00000007ffc0000ULL,
4820       0ULL,
4821       0ULL,
4822       0ULL,
4823       0ULL
4824     },
4825     {
4826       0x0000000052900000ULL,
4827       -1ULL,
4828       -1ULL,
4829       -1ULL,
4830       -1ULL
4831     }
4832 #endif
4833   },
4834   { "v1dotpua", TILEGX_OPC_V1DOTPUA, 0x1, 3, TREG_ZERO, 1,
4835     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4836 #ifndef DISASM_ONLY
4837     {
4838       0xc00000007ffc0000ULL,
4839       0ULL,
4840       0ULL,
4841       0ULL,
4842       0ULL
4843     },
4844     {
4845       0x00000000528c0000ULL,
4846       -1ULL,
4847       -1ULL,
4848       -1ULL,
4849       -1ULL
4850     }
4851 #endif
4852   },
4853   { "v1dotpus", TILEGX_OPC_V1DOTPUS, 0x1, 3, TREG_ZERO, 1,
4854     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4855 #ifndef DISASM_ONLY
4856     {
4857       0xc00000007ffc0000ULL,
4858       0ULL,
4859       0ULL,
4860       0ULL,
4861       0ULL
4862     },
4863     {
4864       0x0000000051840000ULL,
4865       -1ULL,
4866       -1ULL,
4867       -1ULL,
4868       -1ULL
4869     }
4870 #endif
4871   },
4872   { "v1dotpusa", TILEGX_OPC_V1DOTPUSA, 0x1, 3, TREG_ZERO, 1,
4873     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
4874 #ifndef DISASM_ONLY
4875     {
4876       0xc00000007ffc0000ULL,
4877       0ULL,
4878       0ULL,
4879       0ULL,
4880       0ULL
4881     },
4882     {
4883       0x0000000051800000ULL,
4884       -1ULL,
4885       -1ULL,
4886       -1ULL,
4887       -1ULL
4888     }
4889 #endif
4890   },
4891   { "v1int_h", TILEGX_OPC_V1INT_H, 0x3, 3, TREG_ZERO, 1,
4892     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4893 #ifndef DISASM_ONLY
4894     {
4895       0xc00000007ffc0000ULL,
4896       0xfffe000000000000ULL,
4897       0ULL,
4898       0ULL,
4899       0ULL
4900     },
4901     {
4902       0x00000000518c0000ULL,
4903       0x287c000000000000ULL,
4904       -1ULL,
4905       -1ULL,
4906       -1ULL
4907     }
4908 #endif
4909   },
4910   { "v1int_l", TILEGX_OPC_V1INT_L, 0x3, 3, TREG_ZERO, 1,
4911     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4912 #ifndef DISASM_ONLY
4913     {
4914       0xc00000007ffc0000ULL,
4915       0xfffe000000000000ULL,
4916       0ULL,
4917       0ULL,
4918       0ULL
4919     },
4920     {
4921       0x0000000051900000ULL,
4922       0x287e000000000000ULL,
4923       -1ULL,
4924       -1ULL,
4925       -1ULL
4926     }
4927 #endif
4928   },
4929   { "v1maxu", TILEGX_OPC_V1MAXU, 0x3, 3, TREG_ZERO, 1,
4930     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4931 #ifndef DISASM_ONLY
4932     {
4933       0xc00000007ffc0000ULL,
4934       0xfffe000000000000ULL,
4935       0ULL,
4936       0ULL,
4937       0ULL
4938     },
4939     {
4940       0x0000000051940000ULL,
4941       0x2880000000000000ULL,
4942       -1ULL,
4943       -1ULL,
4944       -1ULL
4945     }
4946 #endif
4947   },
4948   { "v1maxui", TILEGX_OPC_V1MAXUI, 0x3, 3, TREG_ZERO, 1,
4949     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
4950 #ifndef DISASM_ONLY
4951     {
4952       0xc00000007ff00000ULL,
4953       0xfff8000000000000ULL,
4954       0ULL,
4955       0ULL,
4956       0ULL
4957     },
4958     {
4959       0x0000000040c00000ULL,
4960       0x1928000000000000ULL,
4961       -1ULL,
4962       -1ULL,
4963       -1ULL
4964     }
4965 #endif
4966   },
4967   { "v1minu", TILEGX_OPC_V1MINU, 0x3, 3, TREG_ZERO, 1,
4968     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
4969 #ifndef DISASM_ONLY
4970     {
4971       0xc00000007ffc0000ULL,
4972       0xfffe000000000000ULL,
4973       0ULL,
4974       0ULL,
4975       0ULL
4976     },
4977     {
4978       0x0000000051980000ULL,
4979       0x2882000000000000ULL,
4980       -1ULL,
4981       -1ULL,
4982       -1ULL
4983     }
4984 #endif
4985   },
4986   { "v1minui", TILEGX_OPC_V1MINUI, 0x3, 3, TREG_ZERO, 1,
4987     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
4988 #ifndef DISASM_ONLY
4989     {
4990       0xc00000007ff00000ULL,
4991       0xfff8000000000000ULL,
4992       0ULL,
4993       0ULL,
4994       0ULL
4995     },
4996     {
4997       0x0000000040d00000ULL,
4998       0x1930000000000000ULL,
4999       -1ULL,
5000       -1ULL,
5001       -1ULL
5002     }
5003 #endif
5004   },
5005   { "v1mnz", TILEGX_OPC_V1MNZ, 0x3, 3, TREG_ZERO, 1,
5006     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5007 #ifndef DISASM_ONLY
5008     {
5009       0xc00000007ffc0000ULL,
5010       0xfffe000000000000ULL,
5011       0ULL,
5012       0ULL,
5013       0ULL
5014     },
5015     {
5016       0x00000000519c0000ULL,
5017       0x2884000000000000ULL,
5018       -1ULL,
5019       -1ULL,
5020       -1ULL
5021     }
5022 #endif
5023   },
5024   { "v1multu", TILEGX_OPC_V1MULTU, 0x1, 3, TREG_ZERO, 1,
5025     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5026 #ifndef DISASM_ONLY
5027     {
5028       0xc00000007ffc0000ULL,
5029       0ULL,
5030       0ULL,
5031       0ULL,
5032       0ULL
5033     },
5034     {
5035       0x0000000051a00000ULL,
5036       -1ULL,
5037       -1ULL,
5038       -1ULL,
5039       -1ULL
5040     }
5041 #endif
5042   },
5043   { "v1mulu", TILEGX_OPC_V1MULU, 0x1, 3, TREG_ZERO, 1,
5044     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5045 #ifndef DISASM_ONLY
5046     {
5047       0xc00000007ffc0000ULL,
5048       0ULL,
5049       0ULL,
5050       0ULL,
5051       0ULL
5052     },
5053     {
5054       0x0000000051a80000ULL,
5055       -1ULL,
5056       -1ULL,
5057       -1ULL,
5058       -1ULL
5059     }
5060 #endif
5061   },
5062   { "v1mulus", TILEGX_OPC_V1MULUS, 0x1, 3, TREG_ZERO, 1,
5063     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5064 #ifndef DISASM_ONLY
5065     {
5066       0xc00000007ffc0000ULL,
5067       0ULL,
5068       0ULL,
5069       0ULL,
5070       0ULL
5071     },
5072     {
5073       0x0000000051a40000ULL,
5074       -1ULL,
5075       -1ULL,
5076       -1ULL,
5077       -1ULL
5078     }
5079 #endif
5080   },
5081   { "v1mz", TILEGX_OPC_V1MZ, 0x3, 3, TREG_ZERO, 1,
5082     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5083 #ifndef DISASM_ONLY
5084     {
5085       0xc00000007ffc0000ULL,
5086       0xfffe000000000000ULL,
5087       0ULL,
5088       0ULL,
5089       0ULL
5090     },
5091     {
5092       0x0000000051ac0000ULL,
5093       0x2886000000000000ULL,
5094       -1ULL,
5095       -1ULL,
5096       -1ULL
5097     }
5098 #endif
5099   },
5100   { "v1sadau", TILEGX_OPC_V1SADAU, 0x1, 3, TREG_ZERO, 1,
5101     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5102 #ifndef DISASM_ONLY
5103     {
5104       0xc00000007ffc0000ULL,
5105       0ULL,
5106       0ULL,
5107       0ULL,
5108       0ULL
5109     },
5110     {
5111       0x0000000051b00000ULL,
5112       -1ULL,
5113       -1ULL,
5114       -1ULL,
5115       -1ULL
5116     }
5117 #endif
5118   },
5119   { "v1sadu", TILEGX_OPC_V1SADU, 0x1, 3, TREG_ZERO, 1,
5120     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5121 #ifndef DISASM_ONLY
5122     {
5123       0xc00000007ffc0000ULL,
5124       0ULL,
5125       0ULL,
5126       0ULL,
5127       0ULL
5128     },
5129     {
5130       0x0000000051b40000ULL,
5131       -1ULL,
5132       -1ULL,
5133       -1ULL,
5134       -1ULL
5135     }
5136 #endif
5137   },
5138   { "v1shl", TILEGX_OPC_V1SHL, 0x3, 3, TREG_ZERO, 1,
5139     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5140 #ifndef DISASM_ONLY
5141     {
5142       0xc00000007ffc0000ULL,
5143       0xfffe000000000000ULL,
5144       0ULL,
5145       0ULL,
5146       0ULL
5147     },
5148     {
5149       0x0000000051b80000ULL,
5150       0x2888000000000000ULL,
5151       -1ULL,
5152       -1ULL,
5153       -1ULL
5154     }
5155 #endif
5156   },
5157   { "v1shli", TILEGX_OPC_V1SHLI, 0x3, 3, TREG_ZERO, 1,
5158     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
5159 #ifndef DISASM_ONLY
5160     {
5161       0xc00000007ffc0000ULL,
5162       0xfffe000000000000ULL,
5163       0ULL,
5164       0ULL,
5165       0ULL
5166     },
5167     {
5168       0x00000000601c0000ULL,
5169       0x300e000000000000ULL,
5170       -1ULL,
5171       -1ULL,
5172       -1ULL
5173     }
5174 #endif
5175   },
5176   { "v1shrs", TILEGX_OPC_V1SHRS, 0x3, 3, TREG_ZERO, 1,
5177     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5178 #ifndef DISASM_ONLY
5179     {
5180       0xc00000007ffc0000ULL,
5181       0xfffe000000000000ULL,
5182       0ULL,
5183       0ULL,
5184       0ULL
5185     },
5186     {
5187       0x0000000051bc0000ULL,
5188       0x288a000000000000ULL,
5189       -1ULL,
5190       -1ULL,
5191       -1ULL
5192     }
5193 #endif
5194   },
5195   { "v1shrsi", TILEGX_OPC_V1SHRSI, 0x3, 3, TREG_ZERO, 1,
5196     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
5197 #ifndef DISASM_ONLY
5198     {
5199       0xc00000007ffc0000ULL,
5200       0xfffe000000000000ULL,
5201       0ULL,
5202       0ULL,
5203       0ULL
5204     },
5205     {
5206       0x0000000060200000ULL,
5207       0x3010000000000000ULL,
5208       -1ULL,
5209       -1ULL,
5210       -1ULL
5211     }
5212 #endif
5213   },
5214   { "v1shru", TILEGX_OPC_V1SHRU, 0x3, 3, TREG_ZERO, 1,
5215     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5216 #ifndef DISASM_ONLY
5217     {
5218       0xc00000007ffc0000ULL,
5219       0xfffe000000000000ULL,
5220       0ULL,
5221       0ULL,
5222       0ULL
5223     },
5224     {
5225       0x0000000051c00000ULL,
5226       0x288c000000000000ULL,
5227       -1ULL,
5228       -1ULL,
5229       -1ULL
5230     }
5231 #endif
5232   },
5233   { "v1shrui", TILEGX_OPC_V1SHRUI, 0x3, 3, TREG_ZERO, 1,
5234     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
5235 #ifndef DISASM_ONLY
5236     {
5237       0xc00000007ffc0000ULL,
5238       0xfffe000000000000ULL,
5239       0ULL,
5240       0ULL,
5241       0ULL
5242     },
5243     {
5244       0x0000000060240000ULL,
5245       0x3012000000000000ULL,
5246       -1ULL,
5247       -1ULL,
5248       -1ULL
5249     }
5250 #endif
5251   },
5252   { "v1sub", TILEGX_OPC_V1SUB, 0x3, 3, TREG_ZERO, 1,
5253     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5254 #ifndef DISASM_ONLY
5255     {
5256       0xc00000007ffc0000ULL,
5257       0xfffe000000000000ULL,
5258       0ULL,
5259       0ULL,
5260       0ULL
5261     },
5262     {
5263       0x0000000051c80000ULL,
5264       0x2890000000000000ULL,
5265       -1ULL,
5266       -1ULL,
5267       -1ULL
5268     }
5269 #endif
5270   },
5271   { "v1subuc", TILEGX_OPC_V1SUBUC, 0x3, 3, TREG_ZERO, 1,
5272     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5273 #ifndef DISASM_ONLY
5274     {
5275       0xc00000007ffc0000ULL,
5276       0xfffe000000000000ULL,
5277       0ULL,
5278       0ULL,
5279       0ULL
5280     },
5281     {
5282       0x0000000051c40000ULL,
5283       0x288e000000000000ULL,
5284       -1ULL,
5285       -1ULL,
5286       -1ULL
5287     }
5288 #endif
5289   },
5290   { "v2add", TILEGX_OPC_V2ADD, 0x3, 3, TREG_ZERO, 1,
5291     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5292 #ifndef DISASM_ONLY
5293     {
5294       0xc00000007ffc0000ULL,
5295       0xfffe000000000000ULL,
5296       0ULL,
5297       0ULL,
5298       0ULL
5299     },
5300     {
5301       0x0000000051d00000ULL,
5302       0x2894000000000000ULL,
5303       -1ULL,
5304       -1ULL,
5305       -1ULL
5306     }
5307 #endif
5308   },
5309   { "v2addi", TILEGX_OPC_V2ADDI, 0x3, 3, TREG_ZERO, 1,
5310     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
5311 #ifndef DISASM_ONLY
5312     {
5313       0xc00000007ff00000ULL,
5314       0xfff8000000000000ULL,
5315       0ULL,
5316       0ULL,
5317       0ULL
5318     },
5319     {
5320       0x0000000040e00000ULL,
5321       0x1938000000000000ULL,
5322       -1ULL,
5323       -1ULL,
5324       -1ULL
5325     }
5326 #endif
5327   },
5328   { "v2addsc", TILEGX_OPC_V2ADDSC, 0x3, 3, TREG_ZERO, 1,
5329     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5330 #ifndef DISASM_ONLY
5331     {
5332       0xc00000007ffc0000ULL,
5333       0xfffe000000000000ULL,
5334       0ULL,
5335       0ULL,
5336       0ULL
5337     },
5338     {
5339       0x0000000051cc0000ULL,
5340       0x2892000000000000ULL,
5341       -1ULL,
5342       -1ULL,
5343       -1ULL
5344     }
5345 #endif
5346   },
5347   { "v2adiffs", TILEGX_OPC_V2ADIFFS, 0x1, 3, TREG_ZERO, 1,
5348     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5349 #ifndef DISASM_ONLY
5350     {
5351       0xc00000007ffc0000ULL,
5352       0ULL,
5353       0ULL,
5354       0ULL,
5355       0ULL
5356     },
5357     {
5358       0x0000000051d40000ULL,
5359       -1ULL,
5360       -1ULL,
5361       -1ULL,
5362       -1ULL
5363     }
5364 #endif
5365   },
5366   { "v2avgs", TILEGX_OPC_V2AVGS, 0x1, 3, TREG_ZERO, 1,
5367     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5368 #ifndef DISASM_ONLY
5369     {
5370       0xc00000007ffc0000ULL,
5371       0ULL,
5372       0ULL,
5373       0ULL,
5374       0ULL
5375     },
5376     {
5377       0x0000000051d80000ULL,
5378       -1ULL,
5379       -1ULL,
5380       -1ULL,
5381       -1ULL
5382     }
5383 #endif
5384   },
5385   { "v2cmpeq", TILEGX_OPC_V2CMPEQ, 0x3, 3, TREG_ZERO, 1,
5386     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5387 #ifndef DISASM_ONLY
5388     {
5389       0xc00000007ffc0000ULL,
5390       0xfffe000000000000ULL,
5391       0ULL,
5392       0ULL,
5393       0ULL
5394     },
5395     {
5396       0x0000000051dc0000ULL,
5397       0x2896000000000000ULL,
5398       -1ULL,
5399       -1ULL,
5400       -1ULL
5401     }
5402 #endif
5403   },
5404   { "v2cmpeqi", TILEGX_OPC_V2CMPEQI, 0x3, 3, TREG_ZERO, 1,
5405     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
5406 #ifndef DISASM_ONLY
5407     {
5408       0xc00000007ff00000ULL,
5409       0xfff8000000000000ULL,
5410       0ULL,
5411       0ULL,
5412       0ULL
5413     },
5414     {
5415       0x0000000040f00000ULL,
5416       0x1940000000000000ULL,
5417       -1ULL,
5418       -1ULL,
5419       -1ULL
5420     }
5421 #endif
5422   },
5423   { "v2cmples", TILEGX_OPC_V2CMPLES, 0x3, 3, TREG_ZERO, 1,
5424     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5425 #ifndef DISASM_ONLY
5426     {
5427       0xc00000007ffc0000ULL,
5428       0xfffe000000000000ULL,
5429       0ULL,
5430       0ULL,
5431       0ULL
5432     },
5433     {
5434       0x0000000051e00000ULL,
5435       0x2898000000000000ULL,
5436       -1ULL,
5437       -1ULL,
5438       -1ULL
5439     }
5440 #endif
5441   },
5442   { "v2cmpleu", TILEGX_OPC_V2CMPLEU, 0x3, 3, TREG_ZERO, 1,
5443     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5444 #ifndef DISASM_ONLY
5445     {
5446       0xc00000007ffc0000ULL,
5447       0xfffe000000000000ULL,
5448       0ULL,
5449       0ULL,
5450       0ULL
5451     },
5452     {
5453       0x0000000051e40000ULL,
5454       0x289a000000000000ULL,
5455       -1ULL,
5456       -1ULL,
5457       -1ULL
5458     }
5459 #endif
5460   },
5461   { "v2cmplts", TILEGX_OPC_V2CMPLTS, 0x3, 3, TREG_ZERO, 1,
5462     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5463 #ifndef DISASM_ONLY
5464     {
5465       0xc00000007ffc0000ULL,
5466       0xfffe000000000000ULL,
5467       0ULL,
5468       0ULL,
5469       0ULL
5470     },
5471     {
5472       0x0000000051e80000ULL,
5473       0x289c000000000000ULL,
5474       -1ULL,
5475       -1ULL,
5476       -1ULL
5477     }
5478 #endif
5479   },
5480   { "v2cmpltsi", TILEGX_OPC_V2CMPLTSI, 0x3, 3, TREG_ZERO, 1,
5481     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
5482 #ifndef DISASM_ONLY
5483     {
5484       0xc00000007ff00000ULL,
5485       0xfff8000000000000ULL,
5486       0ULL,
5487       0ULL,
5488       0ULL
5489     },
5490     {
5491       0x0000000041000000ULL,
5492       0x1948000000000000ULL,
5493       -1ULL,
5494       -1ULL,
5495       -1ULL
5496     }
5497 #endif
5498   },
5499   { "v2cmpltu", TILEGX_OPC_V2CMPLTU, 0x3, 3, TREG_ZERO, 1,
5500     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5501 #ifndef DISASM_ONLY
5502     {
5503       0xc00000007ffc0000ULL,
5504       0xfffe000000000000ULL,
5505       0ULL,
5506       0ULL,
5507       0ULL
5508     },
5509     {
5510       0x0000000051ec0000ULL,
5511       0x289e000000000000ULL,
5512       -1ULL,
5513       -1ULL,
5514       -1ULL
5515     }
5516 #endif
5517   },
5518   { "v2cmpltui", TILEGX_OPC_V2CMPLTUI, 0x3, 3, TREG_ZERO, 1,
5519     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
5520 #ifndef DISASM_ONLY
5521     {
5522       0xc00000007ff00000ULL,
5523       0xfff8000000000000ULL,
5524       0ULL,
5525       0ULL,
5526       0ULL
5527     },
5528     {
5529       0x0000000041100000ULL,
5530       0x1950000000000000ULL,
5531       -1ULL,
5532       -1ULL,
5533       -1ULL
5534     }
5535 #endif
5536   },
5537   { "v2cmpne", TILEGX_OPC_V2CMPNE, 0x3, 3, TREG_ZERO, 1,
5538     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5539 #ifndef DISASM_ONLY
5540     {
5541       0xc00000007ffc0000ULL,
5542       0xfffe000000000000ULL,
5543       0ULL,
5544       0ULL,
5545       0ULL
5546     },
5547     {
5548       0x0000000051f00000ULL,
5549       0x28a0000000000000ULL,
5550       -1ULL,
5551       -1ULL,
5552       -1ULL
5553     }
5554 #endif
5555   },
5556   { "v2dotp", TILEGX_OPC_V2DOTP, 0x1, 3, TREG_ZERO, 1,
5557     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5558 #ifndef DISASM_ONLY
5559     {
5560       0xc00000007ffc0000ULL,
5561       0ULL,
5562       0ULL,
5563       0ULL,
5564       0ULL
5565     },
5566     {
5567       0x0000000051f80000ULL,
5568       -1ULL,
5569       -1ULL,
5570       -1ULL,
5571       -1ULL
5572     }
5573 #endif
5574   },
5575   { "v2dotpa", TILEGX_OPC_V2DOTPA, 0x1, 3, TREG_ZERO, 1,
5576     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5577 #ifndef DISASM_ONLY
5578     {
5579       0xc00000007ffc0000ULL,
5580       0ULL,
5581       0ULL,
5582       0ULL,
5583       0ULL
5584     },
5585     {
5586       0x0000000051f40000ULL,
5587       -1ULL,
5588       -1ULL,
5589       -1ULL,
5590       -1ULL
5591     }
5592 #endif
5593   },
5594   { "v2int_h", TILEGX_OPC_V2INT_H, 0x3, 3, TREG_ZERO, 1,
5595     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5596 #ifndef DISASM_ONLY
5597     {
5598       0xc00000007ffc0000ULL,
5599       0xfffe000000000000ULL,
5600       0ULL,
5601       0ULL,
5602       0ULL
5603     },
5604     {
5605       0x0000000051fc0000ULL,
5606       0x28a2000000000000ULL,
5607       -1ULL,
5608       -1ULL,
5609       -1ULL
5610     }
5611 #endif
5612   },
5613   { "v2int_l", TILEGX_OPC_V2INT_L, 0x3, 3, TREG_ZERO, 1,
5614     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5615 #ifndef DISASM_ONLY
5616     {
5617       0xc00000007ffc0000ULL,
5618       0xfffe000000000000ULL,
5619       0ULL,
5620       0ULL,
5621       0ULL
5622     },
5623     {
5624       0x0000000052000000ULL,
5625       0x28a4000000000000ULL,
5626       -1ULL,
5627       -1ULL,
5628       -1ULL
5629     }
5630 #endif
5631   },
5632   { "v2maxs", TILEGX_OPC_V2MAXS, 0x3, 3, TREG_ZERO, 1,
5633     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5634 #ifndef DISASM_ONLY
5635     {
5636       0xc00000007ffc0000ULL,
5637       0xfffe000000000000ULL,
5638       0ULL,
5639       0ULL,
5640       0ULL
5641     },
5642     {
5643       0x0000000052040000ULL,
5644       0x28a6000000000000ULL,
5645       -1ULL,
5646       -1ULL,
5647       -1ULL
5648     }
5649 #endif
5650   },
5651   { "v2maxsi", TILEGX_OPC_V2MAXSI, 0x3, 3, TREG_ZERO, 1,
5652     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
5653 #ifndef DISASM_ONLY
5654     {
5655       0xc00000007ff00000ULL,
5656       0xfff8000000000000ULL,
5657       0ULL,
5658       0ULL,
5659       0ULL
5660     },
5661     {
5662       0x0000000041200000ULL,
5663       0x1958000000000000ULL,
5664       -1ULL,
5665       -1ULL,
5666       -1ULL
5667     }
5668 #endif
5669   },
5670   { "v2mins", TILEGX_OPC_V2MINS, 0x3, 3, TREG_ZERO, 1,
5671     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5672 #ifndef DISASM_ONLY
5673     {
5674       0xc00000007ffc0000ULL,
5675       0xfffe000000000000ULL,
5676       0ULL,
5677       0ULL,
5678       0ULL
5679     },
5680     {
5681       0x0000000052080000ULL,
5682       0x28a8000000000000ULL,
5683       -1ULL,
5684       -1ULL,
5685       -1ULL
5686     }
5687 #endif
5688   },
5689   { "v2minsi", TILEGX_OPC_V2MINSI, 0x3, 3, TREG_ZERO, 1,
5690     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
5691 #ifndef DISASM_ONLY
5692     {
5693       0xc00000007ff00000ULL,
5694       0xfff8000000000000ULL,
5695       0ULL,
5696       0ULL,
5697       0ULL
5698     },
5699     {
5700       0x0000000041300000ULL,
5701       0x1960000000000000ULL,
5702       -1ULL,
5703       -1ULL,
5704       -1ULL
5705     }
5706 #endif
5707   },
5708   { "v2mnz", TILEGX_OPC_V2MNZ, 0x3, 3, TREG_ZERO, 1,
5709     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5710 #ifndef DISASM_ONLY
5711     {
5712       0xc00000007ffc0000ULL,
5713       0xfffe000000000000ULL,
5714       0ULL,
5715       0ULL,
5716       0ULL
5717     },
5718     {
5719       0x00000000520c0000ULL,
5720       0x28aa000000000000ULL,
5721       -1ULL,
5722       -1ULL,
5723       -1ULL
5724     }
5725 #endif
5726   },
5727   { "v2mulfsc", TILEGX_OPC_V2MULFSC, 0x1, 3, TREG_ZERO, 1,
5728     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5729 #ifndef DISASM_ONLY
5730     {
5731       0xc00000007ffc0000ULL,
5732       0ULL,
5733       0ULL,
5734       0ULL,
5735       0ULL
5736     },
5737     {
5738       0x0000000052100000ULL,
5739       -1ULL,
5740       -1ULL,
5741       -1ULL,
5742       -1ULL
5743     }
5744 #endif
5745   },
5746   { "v2muls", TILEGX_OPC_V2MULS, 0x1, 3, TREG_ZERO, 1,
5747     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5748 #ifndef DISASM_ONLY
5749     {
5750       0xc00000007ffc0000ULL,
5751       0ULL,
5752       0ULL,
5753       0ULL,
5754       0ULL
5755     },
5756     {
5757       0x0000000052140000ULL,
5758       -1ULL,
5759       -1ULL,
5760       -1ULL,
5761       -1ULL
5762     }
5763 #endif
5764   },
5765   { "v2mults", TILEGX_OPC_V2MULTS, 0x1, 3, TREG_ZERO, 1,
5766     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5767 #ifndef DISASM_ONLY
5768     {
5769       0xc00000007ffc0000ULL,
5770       0ULL,
5771       0ULL,
5772       0ULL,
5773       0ULL
5774     },
5775     {
5776       0x0000000052180000ULL,
5777       -1ULL,
5778       -1ULL,
5779       -1ULL,
5780       -1ULL
5781     }
5782 #endif
5783   },
5784   { "v2mz", TILEGX_OPC_V2MZ, 0x3, 3, TREG_ZERO, 1,
5785     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5786 #ifndef DISASM_ONLY
5787     {
5788       0xc00000007ffc0000ULL,
5789       0xfffe000000000000ULL,
5790       0ULL,
5791       0ULL,
5792       0ULL
5793     },
5794     {
5795       0x00000000521c0000ULL,
5796       0x28ac000000000000ULL,
5797       -1ULL,
5798       -1ULL,
5799       -1ULL
5800     }
5801 #endif
5802   },
5803   { "v2packh", TILEGX_OPC_V2PACKH, 0x3, 3, TREG_ZERO, 1,
5804     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5805 #ifndef DISASM_ONLY
5806     {
5807       0xc00000007ffc0000ULL,
5808       0xfffe000000000000ULL,
5809       0ULL,
5810       0ULL,
5811       0ULL
5812     },
5813     {
5814       0x0000000052200000ULL,
5815       0x28ae000000000000ULL,
5816       -1ULL,
5817       -1ULL,
5818       -1ULL
5819     }
5820 #endif
5821   },
5822   { "v2packl", TILEGX_OPC_V2PACKL, 0x3, 3, TREG_ZERO, 1,
5823     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5824 #ifndef DISASM_ONLY
5825     {
5826       0xc00000007ffc0000ULL,
5827       0xfffe000000000000ULL,
5828       0ULL,
5829       0ULL,
5830       0ULL
5831     },
5832     {
5833       0x0000000052240000ULL,
5834       0x28b0000000000000ULL,
5835       -1ULL,
5836       -1ULL,
5837       -1ULL
5838     }
5839 #endif
5840   },
5841   { "v2packuc", TILEGX_OPC_V2PACKUC, 0x3, 3, TREG_ZERO, 1,
5842     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5843 #ifndef DISASM_ONLY
5844     {
5845       0xc00000007ffc0000ULL,
5846       0xfffe000000000000ULL,
5847       0ULL,
5848       0ULL,
5849       0ULL
5850     },
5851     {
5852       0x0000000052280000ULL,
5853       0x28b2000000000000ULL,
5854       -1ULL,
5855       -1ULL,
5856       -1ULL
5857     }
5858 #endif
5859   },
5860   { "v2sadas", TILEGX_OPC_V2SADAS, 0x1, 3, TREG_ZERO, 1,
5861     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5862 #ifndef DISASM_ONLY
5863     {
5864       0xc00000007ffc0000ULL,
5865       0ULL,
5866       0ULL,
5867       0ULL,
5868       0ULL
5869     },
5870     {
5871       0x00000000522c0000ULL,
5872       -1ULL,
5873       -1ULL,
5874       -1ULL,
5875       -1ULL
5876     }
5877 #endif
5878   },
5879   { "v2sadau", TILEGX_OPC_V2SADAU, 0x1, 3, TREG_ZERO, 1,
5880     { { 23, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5881 #ifndef DISASM_ONLY
5882     {
5883       0xc00000007ffc0000ULL,
5884       0ULL,
5885       0ULL,
5886       0ULL,
5887       0ULL
5888     },
5889     {
5890       0x0000000052300000ULL,
5891       -1ULL,
5892       -1ULL,
5893       -1ULL,
5894       -1ULL
5895     }
5896 #endif
5897   },
5898   { "v2sads", TILEGX_OPC_V2SADS, 0x1, 3, TREG_ZERO, 1,
5899     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5900 #ifndef DISASM_ONLY
5901     {
5902       0xc00000007ffc0000ULL,
5903       0ULL,
5904       0ULL,
5905       0ULL,
5906       0ULL
5907     },
5908     {
5909       0x0000000052340000ULL,
5910       -1ULL,
5911       -1ULL,
5912       -1ULL,
5913       -1ULL
5914     }
5915 #endif
5916   },
5917   { "v2sadu", TILEGX_OPC_V2SADU, 0x1, 3, TREG_ZERO, 1,
5918     { { 6, 7, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
5919 #ifndef DISASM_ONLY
5920     {
5921       0xc00000007ffc0000ULL,
5922       0ULL,
5923       0ULL,
5924       0ULL,
5925       0ULL
5926     },
5927     {
5928       0x0000000052380000ULL,
5929       -1ULL,
5930       -1ULL,
5931       -1ULL,
5932       -1ULL
5933     }
5934 #endif
5935   },
5936   { "v2shl", TILEGX_OPC_V2SHL, 0x3, 3, TREG_ZERO, 1,
5937     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5938 #ifndef DISASM_ONLY
5939     {
5940       0xc00000007ffc0000ULL,
5941       0xfffe000000000000ULL,
5942       0ULL,
5943       0ULL,
5944       0ULL
5945     },
5946     {
5947       0x0000000052400000ULL,
5948       0x28b6000000000000ULL,
5949       -1ULL,
5950       -1ULL,
5951       -1ULL
5952     }
5953 #endif
5954   },
5955   { "v2shli", TILEGX_OPC_V2SHLI, 0x3, 3, TREG_ZERO, 1,
5956     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
5957 #ifndef DISASM_ONLY
5958     {
5959       0xc00000007ffc0000ULL,
5960       0xfffe000000000000ULL,
5961       0ULL,
5962       0ULL,
5963       0ULL
5964     },
5965     {
5966       0x0000000060280000ULL,
5967       0x3014000000000000ULL,
5968       -1ULL,
5969       -1ULL,
5970       -1ULL
5971     }
5972 #endif
5973   },
5974   { "v2shlsc", TILEGX_OPC_V2SHLSC, 0x3, 3, TREG_ZERO, 1,
5975     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5976 #ifndef DISASM_ONLY
5977     {
5978       0xc00000007ffc0000ULL,
5979       0xfffe000000000000ULL,
5980       0ULL,
5981       0ULL,
5982       0ULL
5983     },
5984     {
5985       0x00000000523c0000ULL,
5986       0x28b4000000000000ULL,
5987       -1ULL,
5988       -1ULL,
5989       -1ULL
5990     }
5991 #endif
5992   },
5993   { "v2shrs", TILEGX_OPC_V2SHRS, 0x3, 3, TREG_ZERO, 1,
5994     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
5995 #ifndef DISASM_ONLY
5996     {
5997       0xc00000007ffc0000ULL,
5998       0xfffe000000000000ULL,
5999       0ULL,
6000       0ULL,
6001       0ULL
6002     },
6003     {
6004       0x0000000052440000ULL,
6005       0x28b8000000000000ULL,
6006       -1ULL,
6007       -1ULL,
6008       -1ULL
6009     }
6010 #endif
6011   },
6012   { "v2shrsi", TILEGX_OPC_V2SHRSI, 0x3, 3, TREG_ZERO, 1,
6013     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
6014 #ifndef DISASM_ONLY
6015     {
6016       0xc00000007ffc0000ULL,
6017       0xfffe000000000000ULL,
6018       0ULL,
6019       0ULL,
6020       0ULL
6021     },
6022     {
6023       0x00000000602c0000ULL,
6024       0x3016000000000000ULL,
6025       -1ULL,
6026       -1ULL,
6027       -1ULL
6028     }
6029 #endif
6030   },
6031   { "v2shru", TILEGX_OPC_V2SHRU, 0x3, 3, TREG_ZERO, 1,
6032     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6033 #ifndef DISASM_ONLY
6034     {
6035       0xc00000007ffc0000ULL,
6036       0xfffe000000000000ULL,
6037       0ULL,
6038       0ULL,
6039       0ULL
6040     },
6041     {
6042       0x0000000052480000ULL,
6043       0x28ba000000000000ULL,
6044       -1ULL,
6045       -1ULL,
6046       -1ULL
6047     }
6048 #endif
6049   },
6050   { "v2shrui", TILEGX_OPC_V2SHRUI, 0x3, 3, TREG_ZERO, 1,
6051     { { 6, 7, 29 }, { 8, 9, 30 }, { 0, }, { 0, }, { 0, } },
6052 #ifndef DISASM_ONLY
6053     {
6054       0xc00000007ffc0000ULL,
6055       0xfffe000000000000ULL,
6056       0ULL,
6057       0ULL,
6058       0ULL
6059     },
6060     {
6061       0x0000000060300000ULL,
6062       0x3018000000000000ULL,
6063       -1ULL,
6064       -1ULL,
6065       -1ULL
6066     }
6067 #endif
6068   },
6069   { "v2sub", TILEGX_OPC_V2SUB, 0x3, 3, TREG_ZERO, 1,
6070     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6071 #ifndef DISASM_ONLY
6072     {
6073       0xc00000007ffc0000ULL,
6074       0xfffe000000000000ULL,
6075       0ULL,
6076       0ULL,
6077       0ULL
6078     },
6079     {
6080       0x0000000052500000ULL,
6081       0x28be000000000000ULL,
6082       -1ULL,
6083       -1ULL,
6084       -1ULL
6085     }
6086 #endif
6087   },
6088   { "v2subsc", TILEGX_OPC_V2SUBSC, 0x3, 3, TREG_ZERO, 1,
6089     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6090 #ifndef DISASM_ONLY
6091     {
6092       0xc00000007ffc0000ULL,
6093       0xfffe000000000000ULL,
6094       0ULL,
6095       0ULL,
6096       0ULL
6097     },
6098     {
6099       0x00000000524c0000ULL,
6100       0x28bc000000000000ULL,
6101       -1ULL,
6102       -1ULL,
6103       -1ULL
6104     }
6105 #endif
6106   },
6107   { "v4add", TILEGX_OPC_V4ADD, 0x3, 3, TREG_ZERO, 1,
6108     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6109 #ifndef DISASM_ONLY
6110     {
6111       0xc00000007ffc0000ULL,
6112       0xfffe000000000000ULL,
6113       0ULL,
6114       0ULL,
6115       0ULL
6116     },
6117     {
6118       0x0000000052580000ULL,
6119       0x28c2000000000000ULL,
6120       -1ULL,
6121       -1ULL,
6122       -1ULL
6123     }
6124 #endif
6125   },
6126   { "v4addsc", TILEGX_OPC_V4ADDSC, 0x3, 3, TREG_ZERO, 1,
6127     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6128 #ifndef DISASM_ONLY
6129     {
6130       0xc00000007ffc0000ULL,
6131       0xfffe000000000000ULL,
6132       0ULL,
6133       0ULL,
6134       0ULL
6135     },
6136     {
6137       0x0000000052540000ULL,
6138       0x28c0000000000000ULL,
6139       -1ULL,
6140       -1ULL,
6141       -1ULL
6142     }
6143 #endif
6144   },
6145   { "v4int_h", TILEGX_OPC_V4INT_H, 0x3, 3, TREG_ZERO, 1,
6146     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6147 #ifndef DISASM_ONLY
6148     {
6149       0xc00000007ffc0000ULL,
6150       0xfffe000000000000ULL,
6151       0ULL,
6152       0ULL,
6153       0ULL
6154     },
6155     {
6156       0x00000000525c0000ULL,
6157       0x28c4000000000000ULL,
6158       -1ULL,
6159       -1ULL,
6160       -1ULL
6161     }
6162 #endif
6163   },
6164   { "v4int_l", TILEGX_OPC_V4INT_L, 0x3, 3, TREG_ZERO, 1,
6165     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6166 #ifndef DISASM_ONLY
6167     {
6168       0xc00000007ffc0000ULL,
6169       0xfffe000000000000ULL,
6170       0ULL,
6171       0ULL,
6172       0ULL
6173     },
6174     {
6175       0x0000000052600000ULL,
6176       0x28c6000000000000ULL,
6177       -1ULL,
6178       -1ULL,
6179       -1ULL
6180     }
6181 #endif
6182   },
6183   { "v4packsc", TILEGX_OPC_V4PACKSC, 0x3, 3, TREG_ZERO, 1,
6184     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6185 #ifndef DISASM_ONLY
6186     {
6187       0xc00000007ffc0000ULL,
6188       0xfffe000000000000ULL,
6189       0ULL,
6190       0ULL,
6191       0ULL
6192     },
6193     {
6194       0x0000000052640000ULL,
6195       0x28c8000000000000ULL,
6196       -1ULL,
6197       -1ULL,
6198       -1ULL
6199     }
6200 #endif
6201   },
6202   { "v4shl", TILEGX_OPC_V4SHL, 0x3, 3, TREG_ZERO, 1,
6203     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6204 #ifndef DISASM_ONLY
6205     {
6206       0xc00000007ffc0000ULL,
6207       0xfffe000000000000ULL,
6208       0ULL,
6209       0ULL,
6210       0ULL
6211     },
6212     {
6213       0x00000000526c0000ULL,
6214       0x28cc000000000000ULL,
6215       -1ULL,
6216       -1ULL,
6217       -1ULL
6218     }
6219 #endif
6220   },
6221   { "v4shlsc", TILEGX_OPC_V4SHLSC, 0x3, 3, TREG_ZERO, 1,
6222     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6223 #ifndef DISASM_ONLY
6224     {
6225       0xc00000007ffc0000ULL,
6226       0xfffe000000000000ULL,
6227       0ULL,
6228       0ULL,
6229       0ULL
6230     },
6231     {
6232       0x0000000052680000ULL,
6233       0x28ca000000000000ULL,
6234       -1ULL,
6235       -1ULL,
6236       -1ULL
6237     }
6238 #endif
6239   },
6240   { "v4shrs", TILEGX_OPC_V4SHRS, 0x3, 3, TREG_ZERO, 1,
6241     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6242 #ifndef DISASM_ONLY
6243     {
6244       0xc00000007ffc0000ULL,
6245       0xfffe000000000000ULL,
6246       0ULL,
6247       0ULL,
6248       0ULL
6249     },
6250     {
6251       0x0000000052700000ULL,
6252       0x28ce000000000000ULL,
6253       -1ULL,
6254       -1ULL,
6255       -1ULL
6256     }
6257 #endif
6258   },
6259   { "v4shru", TILEGX_OPC_V4SHRU, 0x3, 3, TREG_ZERO, 1,
6260     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6261 #ifndef DISASM_ONLY
6262     {
6263       0xc00000007ffc0000ULL,
6264       0xfffe000000000000ULL,
6265       0ULL,
6266       0ULL,
6267       0ULL
6268     },
6269     {
6270       0x0000000052740000ULL,
6271       0x28d0000000000000ULL,
6272       -1ULL,
6273       -1ULL,
6274       -1ULL
6275     }
6276 #endif
6277   },
6278   { "v4sub", TILEGX_OPC_V4SUB, 0x3, 3, TREG_ZERO, 1,
6279     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6280 #ifndef DISASM_ONLY
6281     {
6282       0xc00000007ffc0000ULL,
6283       0xfffe000000000000ULL,
6284       0ULL,
6285       0ULL,
6286       0ULL
6287     },
6288     {
6289       0x00000000527c0000ULL,
6290       0x28d4000000000000ULL,
6291       -1ULL,
6292       -1ULL,
6293       -1ULL
6294     }
6295 #endif
6296   },
6297   { "v4subsc", TILEGX_OPC_V4SUBSC, 0x3, 3, TREG_ZERO, 1,
6298     { { 6, 7, 16 }, { 8, 9, 17 }, { 0, }, { 0, }, { 0, } },
6299 #ifndef DISASM_ONLY
6300     {
6301       0xc00000007ffc0000ULL,
6302       0xfffe000000000000ULL,
6303       0ULL,
6304       0ULL,
6305       0ULL
6306     },
6307     {
6308       0x0000000052780000ULL,
6309       0x28d2000000000000ULL,
6310       -1ULL,
6311       -1ULL,
6312       -1ULL
6313     }
6314 #endif
6315   },
6316   { "wh64", TILEGX_OPC_WH64, 0x2, 1, TREG_ZERO, 1,
6317     { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } },
6318 #ifndef DISASM_ONLY
6319     {
6320       0ULL,
6321       0xfffff80000000000ULL,
6322       0ULL,
6323       0ULL,
6324       0ULL
6325     },
6326     {
6327       -1ULL,
6328       0x286b300000000000ULL,
6329       -1ULL,
6330       -1ULL,
6331       -1ULL
6332     }
6333 #endif
6334   },
6335   { "xor", TILEGX_OPC_XOR, 0xf, 3, TREG_ZERO, 1,
6336     { { 6, 7, 16 }, { 8, 9, 17 }, { 10, 11, 18 }, { 12, 13, 19 }, { 0, } },
6337 #ifndef DISASM_ONLY
6338     {
6339       0xc00000007ffc0000ULL,
6340       0xfffe000000000000ULL,
6341       0x00000000780c0000ULL,
6342       0x3c06000000000000ULL,
6343       0ULL
6344     },
6345     {
6346       0x0000000052800000ULL,
6347       0x28d6000000000000ULL,
6348       0x00000000500c0000ULL,
6349       0x2c06000000000000ULL,
6350       -1ULL
6351     }
6352 #endif
6353   },
6354   { "xori", TILEGX_OPC_XORI, 0x3, 3, TREG_ZERO, 1,
6355     { { 6, 7, 0 }, { 8, 9, 1 }, { 0, }, { 0, }, { 0, } },
6356 #ifndef DISASM_ONLY
6357     {
6358       0xc00000007ff00000ULL,
6359       0xfff8000000000000ULL,
6360       0ULL,
6361       0ULL,
6362       0ULL
6363     },
6364     {
6365       0x0000000041400000ULL,
6366       0x1968000000000000ULL,
6367       -1ULL,
6368       -1ULL,
6369       -1ULL
6370     }
6371 #endif
6372   },
6373   { NULL, TILEGX_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } },
6374 #ifndef DISASM_ONLY
6375     { 0, }, { 0, }
6376 #endif
6377   }
6378 };
6379 #define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6))
6380 #define CHILD(array_index) (TILEGX_OPC_NONE + (array_index))
6381
6382 static const unsigned short decode_X0_fsm[936] =
6383 {
6384   BITFIELD(22, 9) /* index 0 */,
6385   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6386   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6387   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6388   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6389   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6390   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6391   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6392   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6393   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6394   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6395   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6396   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6397   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6398   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6399   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6400   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6401   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6402   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6403   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6404   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6405   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6406   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6407   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6408   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6409   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6410   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6411   CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI,
6412   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6413   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6414   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6415   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6416   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6417   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6418   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6419   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6420   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6421   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6422   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6423   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6424   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6425   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6426   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6427   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE,
6428   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6429   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6430   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6431   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BFEXTS,
6432   TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTS, TILEGX_OPC_BFEXTU,
6433   TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFEXTU, TILEGX_OPC_BFINS,
6434   TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_BFINS, TILEGX_OPC_MM,
6435   TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_MM, TILEGX_OPC_NONE,
6436   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6437   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6438   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6439   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6440   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6441   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6442   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6443   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(528), CHILD(578),
6444   CHILD(583), CHILD(588), CHILD(593), CHILD(598), TILEGX_OPC_NONE,
6445   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6446   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6447   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6448   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6449   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6450   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6451   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6452   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6453   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6454   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6455   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6456   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6457   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6458   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6459   TILEGX_OPC_NONE, CHILD(603), CHILD(620), CHILD(637), CHILD(654), CHILD(671),
6460   CHILD(703), CHILD(797), CHILD(814), CHILD(831), CHILD(848), CHILD(865),
6461   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6462   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6463   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6464   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6465   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6466   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6467   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6468   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6469   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6470   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6471   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6472   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6473   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6474   TILEGX_OPC_NONE, CHILD(889), TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6475   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6476   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6477   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6478   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6479   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6480   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6481   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6482   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6483   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6484   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6485   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6486   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6487   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6488   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6489   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6490   TILEGX_OPC_NONE, CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6491   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6492   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6493   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6494   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6495   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6496   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6497   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6498   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6499   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6500   CHILD(906), CHILD(906), CHILD(906), CHILD(906), CHILD(906),
6501   BITFIELD(6, 2) /* index 513 */,
6502   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518),
6503   BITFIELD(8, 2) /* index 518 */,
6504   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523),
6505   BITFIELD(10, 2) /* index 523 */,
6506   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI,
6507   BITFIELD(20, 2) /* index 528 */,
6508   TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548),
6509   BITFIELD(6, 2) /* index 533 */,
6510   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538),
6511   BITFIELD(8, 2) /* index 538 */,
6512   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543),
6513   BITFIELD(10, 2) /* index 543 */,
6514   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
6515   BITFIELD(0, 2) /* index 548 */,
6516   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553),
6517   BITFIELD(2, 2) /* index 553 */,
6518   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558),
6519   BITFIELD(4, 2) /* index 558 */,
6520   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563),
6521   BITFIELD(6, 2) /* index 563 */,
6522   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568),
6523   BITFIELD(8, 2) /* index 568 */,
6524   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573),
6525   BITFIELD(10, 2) /* index 573 */,
6526   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
6527   BITFIELD(20, 2) /* index 578 */,
6528   TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, TILEGX_OPC_ORI,
6529   BITFIELD(20, 2) /* index 583 */,
6530   TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI, TILEGX_OPC_V1CMPLTSI,
6531   TILEGX_OPC_V1CMPLTUI,
6532   BITFIELD(20, 2) /* index 588 */,
6533   TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI, TILEGX_OPC_V2ADDI,
6534   TILEGX_OPC_V2CMPEQI,
6535   BITFIELD(20, 2) /* index 593 */,
6536   TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI, TILEGX_OPC_V2MAXSI,
6537   TILEGX_OPC_V2MINSI,
6538   BITFIELD(20, 2) /* index 598 */,
6539   TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6540   BITFIELD(18, 4) /* index 603 */,
6541   TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD,
6542   TILEGX_OPC_AND, TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_CMPEQ,
6543   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
6544   TILEGX_OPC_CMPNE, TILEGX_OPC_CMULAF, TILEGX_OPC_CMULA, TILEGX_OPC_CMULFR,
6545   BITFIELD(18, 4) /* index 620 */,
6546   TILEGX_OPC_CMULF, TILEGX_OPC_CMULHR, TILEGX_OPC_CMULH, TILEGX_OPC_CMUL,
6547   TILEGX_OPC_CRC32_32, TILEGX_OPC_CRC32_8, TILEGX_OPC_DBLALIGN2,
6548   TILEGX_OPC_DBLALIGN4, TILEGX_OPC_DBLALIGN6, TILEGX_OPC_DBLALIGN,
6549   TILEGX_OPC_FDOUBLE_ADDSUB, TILEGX_OPC_FDOUBLE_ADD_FLAGS,
6550   TILEGX_OPC_FDOUBLE_MUL_FLAGS, TILEGX_OPC_FDOUBLE_PACK1,
6551   TILEGX_OPC_FDOUBLE_PACK2, TILEGX_OPC_FDOUBLE_SUB_FLAGS,
6552   BITFIELD(18, 4) /* index 637 */,
6553   TILEGX_OPC_FDOUBLE_UNPACK_MAX, TILEGX_OPC_FDOUBLE_UNPACK_MIN,
6554   TILEGX_OPC_FSINGLE_ADD1, TILEGX_OPC_FSINGLE_ADDSUB2,
6555   TILEGX_OPC_FSINGLE_MUL1, TILEGX_OPC_FSINGLE_MUL2, TILEGX_OPC_FSINGLE_PACK2,
6556   TILEGX_OPC_FSINGLE_SUB1, TILEGX_OPC_MNZ, TILEGX_OPC_MULAX,
6557   TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HS_HU, TILEGX_OPC_MULA_HS_LS,
6558   TILEGX_OPC_MULA_HS_LU, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_HU_LS,
6559   BITFIELD(18, 4) /* index 654 */,
6560   TILEGX_OPC_MULA_HU_LU, TILEGX_OPC_MULA_LS_LS, TILEGX_OPC_MULA_LS_LU,
6561   TILEGX_OPC_MULA_LU_LU, TILEGX_OPC_MULX, TILEGX_OPC_MUL_HS_HS,
6562   TILEGX_OPC_MUL_HS_HU, TILEGX_OPC_MUL_HS_LS, TILEGX_OPC_MUL_HS_LU,
6563   TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_HU_LS, TILEGX_OPC_MUL_HU_LU,
6564   TILEGX_OPC_MUL_LS_LS, TILEGX_OPC_MUL_LS_LU, TILEGX_OPC_MUL_LU_LU,
6565   TILEGX_OPC_MZ,
6566   BITFIELD(18, 4) /* index 671 */,
6567   TILEGX_OPC_NOR, CHILD(688), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX,
6568   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD,
6569   TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL,
6570   TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_SHUFFLEBYTES,
6571   TILEGX_OPC_SUBXSC,
6572   BITFIELD(12, 2) /* index 688 */,
6573   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(693),
6574   BITFIELD(14, 2) /* index 693 */,
6575   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(698),
6576   BITFIELD(16, 2) /* index 698 */,
6577   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
6578   BITFIELD(18, 4) /* index 703 */,
6579   TILEGX_OPC_SUBX, TILEGX_OPC_SUB, CHILD(720), TILEGX_OPC_V1ADDUC,
6580   TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADIFFU, TILEGX_OPC_V1AVGU,
6581   TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU,
6582   TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE,
6583   TILEGX_OPC_V1DDOTPUSA, TILEGX_OPC_V1DDOTPUS, TILEGX_OPC_V1DOTPA,
6584   BITFIELD(12, 4) /* index 720 */,
6585   TILEGX_OPC_NONE, CHILD(737), CHILD(742), CHILD(747), CHILD(752), CHILD(757),
6586   CHILD(762), CHILD(767), CHILD(772), CHILD(777), CHILD(782), CHILD(787),
6587   CHILD(792), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6588   BITFIELD(16, 2) /* index 737 */,
6589   TILEGX_OPC_CLZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6590   BITFIELD(16, 2) /* index 742 */,
6591   TILEGX_OPC_CTZ, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6592   BITFIELD(16, 2) /* index 747 */,
6593   TILEGX_OPC_FNOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6594   BITFIELD(16, 2) /* index 752 */,
6595   TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6596   BITFIELD(16, 2) /* index 757 */,
6597   TILEGX_OPC_NOP, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6598   BITFIELD(16, 2) /* index 762 */,
6599   TILEGX_OPC_PCNT, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6600   BITFIELD(16, 2) /* index 767 */,
6601   TILEGX_OPC_REVBITS, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6602   BITFIELD(16, 2) /* index 772 */,
6603   TILEGX_OPC_REVBYTES, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6604   BITFIELD(16, 2) /* index 777 */,
6605   TILEGX_OPC_TBLIDXB0, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6606   BITFIELD(16, 2) /* index 782 */,
6607   TILEGX_OPC_TBLIDXB1, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6608   BITFIELD(16, 2) /* index 787 */,
6609   TILEGX_OPC_TBLIDXB2, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6610   BITFIELD(16, 2) /* index 792 */,
6611   TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6612   BITFIELD(18, 4) /* index 797 */,
6613   TILEGX_OPC_V1DOTPUSA, TILEGX_OPC_V1DOTPUS, TILEGX_OPC_V1DOTP,
6614   TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1MAXU,
6615   TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MULTU, TILEGX_OPC_V1MULUS,
6616   TILEGX_OPC_V1MULU, TILEGX_OPC_V1MZ, TILEGX_OPC_V1SADAU, TILEGX_OPC_V1SADU,
6617   TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS,
6618   BITFIELD(18, 4) /* index 814 */,
6619   TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC, TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC,
6620   TILEGX_OPC_V2ADD, TILEGX_OPC_V2ADIFFS, TILEGX_OPC_V2AVGS,
6621   TILEGX_OPC_V2CMPEQ, TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU,
6622   TILEGX_OPC_V2CMPLTS, TILEGX_OPC_V2CMPLTU, TILEGX_OPC_V2CMPNE,
6623   TILEGX_OPC_V2DOTPA, TILEGX_OPC_V2DOTP, TILEGX_OPC_V2INT_H,
6624   BITFIELD(18, 4) /* index 831 */,
6625   TILEGX_OPC_V2INT_L, TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ,
6626   TILEGX_OPC_V2MULFSC, TILEGX_OPC_V2MULS, TILEGX_OPC_V2MULTS, TILEGX_OPC_V2MZ,
6627   TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC,
6628   TILEGX_OPC_V2SADAS, TILEGX_OPC_V2SADAU, TILEGX_OPC_V2SADS,
6629   TILEGX_OPC_V2SADU, TILEGX_OPC_V2SHLSC,
6630   BITFIELD(18, 4) /* index 848 */,
6631   TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU, TILEGX_OPC_V2SUBSC,
6632   TILEGX_OPC_V2SUB, TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H,
6633   TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC,
6634   TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC,
6635   TILEGX_OPC_V4SUB,
6636   BITFIELD(18, 3) /* index 865 */,
6637   CHILD(874), CHILD(877), CHILD(880), CHILD(883), CHILD(886), TILEGX_OPC_NONE,
6638   TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6639   BITFIELD(21, 1) /* index 874 */,
6640   TILEGX_OPC_XOR, TILEGX_OPC_NONE,
6641   BITFIELD(21, 1) /* index 877 */,
6642   TILEGX_OPC_V1DDOTPUA, TILEGX_OPC_NONE,
6643   BITFIELD(21, 1) /* index 880 */,
6644   TILEGX_OPC_V1DDOTPU, TILEGX_OPC_NONE,
6645   BITFIELD(21, 1) /* index 883 */,
6646   TILEGX_OPC_V1DOTPUA, TILEGX_OPC_NONE,
6647   BITFIELD(21, 1) /* index 886 */,
6648   TILEGX_OPC_V1DOTPU, TILEGX_OPC_NONE,
6649   BITFIELD(18, 4) /* index 889 */,
6650   TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI,
6651   TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI,
6652   TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI,
6653   TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6654   TILEGX_OPC_NONE,
6655   BITFIELD(0, 2) /* index 906 */,
6656   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6657   CHILD(911),
6658   BITFIELD(2, 2) /* index 911 */,
6659   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6660   CHILD(916),
6661   BITFIELD(4, 2) /* index 916 */,
6662   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6663   CHILD(921),
6664   BITFIELD(6, 2) /* index 921 */,
6665   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6666   CHILD(926),
6667   BITFIELD(8, 2) /* index 926 */,
6668   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6669   CHILD(931),
6670   BITFIELD(10, 2) /* index 931 */,
6671   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
6672   TILEGX_OPC_INFOL,
6673 };
6674
6675 static const unsigned short decode_X1_fsm[1206] =
6676 {
6677   BITFIELD(53, 9) /* index 0 */,
6678   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6679   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6680   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6681   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6682   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6683   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6684   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6685   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6686   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6687   CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513), CHILD(513),
6688   CHILD(513), CHILD(513), CHILD(513), CHILD(513), TILEGX_OPC_ADDXLI,
6689   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6690   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6691   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6692   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6693   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6694   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6695   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6696   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6697   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6698   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6699   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6700   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6701   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6702   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6703   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI,
6704   TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_ADDXLI, TILEGX_OPC_NONE,
6705   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6706   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6707   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6708   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6709   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6710   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6711   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6712   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_BEQZT,
6713   TILEGX_OPC_BEQZT, TILEGX_OPC_BEQZ, TILEGX_OPC_BEQZ, TILEGX_OPC_BGEZT,
6714   TILEGX_OPC_BGEZT, TILEGX_OPC_BGEZ, TILEGX_OPC_BGEZ, TILEGX_OPC_BGTZT,
6715   TILEGX_OPC_BGTZT, TILEGX_OPC_BGTZ, TILEGX_OPC_BGTZ, TILEGX_OPC_BLBCT,
6716   TILEGX_OPC_BLBCT, TILEGX_OPC_BLBC, TILEGX_OPC_BLBC, TILEGX_OPC_BLBST,
6717   TILEGX_OPC_BLBST, TILEGX_OPC_BLBS, TILEGX_OPC_BLBS, TILEGX_OPC_BLEZT,
6718   TILEGX_OPC_BLEZT, TILEGX_OPC_BLEZ, TILEGX_OPC_BLEZ, TILEGX_OPC_BLTZT,
6719   TILEGX_OPC_BLTZT, TILEGX_OPC_BLTZ, TILEGX_OPC_BLTZ, TILEGX_OPC_BNEZT,
6720   TILEGX_OPC_BNEZT, TILEGX_OPC_BNEZ, TILEGX_OPC_BNEZ, CHILD(528), CHILD(578),
6721   CHILD(598), CHILD(663), CHILD(683), CHILD(688), CHILD(693), CHILD(698),
6722   CHILD(703), CHILD(708), CHILD(713), CHILD(718), TILEGX_OPC_NONE,
6723   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6724   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6725   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6726   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6727   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6728   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6729   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6730   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6731   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6732   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6733   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6734   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6735   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_JAL,
6736   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6737   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6738   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6739   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6740   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6741   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6742   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL,
6743   TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_JAL, TILEGX_OPC_J, TILEGX_OPC_J,
6744   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6745   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6746   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6747   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6748   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6749   TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J, TILEGX_OPC_J,
6750   CHILD(723), CHILD(740), CHILD(772), CHILD(789), CHILD(1108), CHILD(1125),
6751   CHILD(1142), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6752   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6753   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6754   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6755   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6756   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6757   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6758   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6759   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6760   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6761   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6762   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6763   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6764   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6765   TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1159), TILEGX_OPC_NONE,
6766   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6767   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6768   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6769   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6770   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6771   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6772   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6773   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6774   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6775   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6776   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6777   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6778   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6779   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6780   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6781   TILEGX_OPC_NONE, TILEGX_OPC_NONE, CHILD(1176), CHILD(1176), CHILD(1176),
6782   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6783   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6784   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6785   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6786   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6787   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6788   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6789   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6790   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6791   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6792   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6793   CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176), CHILD(1176),
6794   CHILD(1176),
6795   BITFIELD(37, 2) /* index 513 */,
6796   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(518),
6797   BITFIELD(39, 2) /* index 518 */,
6798   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, CHILD(523),
6799   BITFIELD(41, 2) /* index 523 */,
6800   TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_ADDLI, TILEGX_OPC_MOVELI,
6801   BITFIELD(51, 2) /* index 528 */,
6802   TILEGX_OPC_NONE, CHILD(533), TILEGX_OPC_ADDXI, CHILD(548),
6803   BITFIELD(37, 2) /* index 533 */,
6804   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(538),
6805   BITFIELD(39, 2) /* index 538 */,
6806   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(543),
6807   BITFIELD(41, 2) /* index 543 */,
6808   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
6809   BITFIELD(31, 2) /* index 548 */,
6810   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(553),
6811   BITFIELD(33, 2) /* index 553 */,
6812   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(558),
6813   BITFIELD(35, 2) /* index 558 */,
6814   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(563),
6815   BITFIELD(37, 2) /* index 563 */,
6816   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(568),
6817   BITFIELD(39, 2) /* index 568 */,
6818   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(573),
6819   BITFIELD(41, 2) /* index 573 */,
6820   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
6821   BITFIELD(51, 2) /* index 578 */,
6822   TILEGX_OPC_CMPEQI, TILEGX_OPC_CMPLTSI, TILEGX_OPC_CMPLTUI, CHILD(583),
6823   BITFIELD(31, 2) /* index 583 */,
6824   TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(588),
6825   BITFIELD(33, 2) /* index 588 */,
6826   TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, CHILD(593),
6827   BITFIELD(35, 2) /* index 593 */,
6828   TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD, TILEGX_OPC_LD1S_ADD,
6829   TILEGX_OPC_PREFETCH_ADD_L1_FAULT,
6830   BITFIELD(51, 2) /* index 598 */,
6831   CHILD(603), CHILD(618), CHILD(633), CHILD(648),
6832   BITFIELD(31, 2) /* index 603 */,
6833   TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(608),
6834   BITFIELD(33, 2) /* index 608 */,
6835   TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, CHILD(613),
6836   BITFIELD(35, 2) /* index 613 */,
6837   TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD, TILEGX_OPC_LD1U_ADD,
6838   TILEGX_OPC_PREFETCH_ADD_L1,
6839   BITFIELD(31, 2) /* index 618 */,
6840   TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(623),
6841   BITFIELD(33, 2) /* index 623 */,
6842   TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, CHILD(628),
6843   BITFIELD(35, 2) /* index 628 */,
6844   TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD, TILEGX_OPC_LD2S_ADD,
6845   TILEGX_OPC_PREFETCH_ADD_L2_FAULT,
6846   BITFIELD(31, 2) /* index 633 */,
6847   TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(638),
6848   BITFIELD(33, 2) /* index 638 */,
6849   TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, CHILD(643),
6850   BITFIELD(35, 2) /* index 643 */,
6851   TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD, TILEGX_OPC_LD2U_ADD,
6852   TILEGX_OPC_PREFETCH_ADD_L2,
6853   BITFIELD(31, 2) /* index 648 */,
6854   TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, CHILD(653),
6855   BITFIELD(33, 2) /* index 653 */,
6856   TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, CHILD(658),
6857   BITFIELD(35, 2) /* index 658 */,
6858   TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD, TILEGX_OPC_LD4S_ADD,
6859   TILEGX_OPC_PREFETCH_ADD_L3_FAULT,
6860   BITFIELD(51, 2) /* index 663 */,
6861   CHILD(668), TILEGX_OPC_LDNT1S_ADD, TILEGX_OPC_LDNT1U_ADD,
6862   TILEGX_OPC_LDNT2S_ADD,
6863   BITFIELD(31, 2) /* index 668 */,
6864   TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(673),
6865   BITFIELD(33, 2) /* index 673 */,
6866   TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, CHILD(678),
6867   BITFIELD(35, 2) /* index 678 */,
6868   TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD, TILEGX_OPC_LD4U_ADD,
6869   TILEGX_OPC_PREFETCH_ADD_L3,
6870   BITFIELD(51, 2) /* index 683 */,
6871   TILEGX_OPC_LDNT2U_ADD, TILEGX_OPC_LDNT4S_ADD, TILEGX_OPC_LDNT4U_ADD,
6872   TILEGX_OPC_LDNT_ADD,
6873   BITFIELD(51, 2) /* index 688 */,
6874   TILEGX_OPC_LD_ADD, TILEGX_OPC_LDNA_ADD, TILEGX_OPC_MFSPR, TILEGX_OPC_MTSPR,
6875   BITFIELD(51, 2) /* index 693 */,
6876   TILEGX_OPC_ORI, TILEGX_OPC_ST1_ADD, TILEGX_OPC_ST2_ADD, TILEGX_OPC_ST4_ADD,
6877   BITFIELD(51, 2) /* index 698 */,
6878   TILEGX_OPC_STNT1_ADD, TILEGX_OPC_STNT2_ADD, TILEGX_OPC_STNT4_ADD,
6879   TILEGX_OPC_STNT_ADD,
6880   BITFIELD(51, 2) /* index 703 */,
6881   TILEGX_OPC_ST_ADD, TILEGX_OPC_V1ADDI, TILEGX_OPC_V1CMPEQI,
6882   TILEGX_OPC_V1CMPLTSI,
6883   BITFIELD(51, 2) /* index 708 */,
6884   TILEGX_OPC_V1CMPLTUI, TILEGX_OPC_V1MAXUI, TILEGX_OPC_V1MINUI,
6885   TILEGX_OPC_V2ADDI,
6886   BITFIELD(51, 2) /* index 713 */,
6887   TILEGX_OPC_V2CMPEQI, TILEGX_OPC_V2CMPLTSI, TILEGX_OPC_V2CMPLTUI,
6888   TILEGX_OPC_V2MAXSI,
6889   BITFIELD(51, 2) /* index 718 */,
6890   TILEGX_OPC_V2MINSI, TILEGX_OPC_XORI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6891   BITFIELD(49, 4) /* index 723 */,
6892   TILEGX_OPC_NONE, TILEGX_OPC_ADDXSC, TILEGX_OPC_ADDX, TILEGX_OPC_ADD,
6893   TILEGX_OPC_AND, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPEXCH4, TILEGX_OPC_CMPEXCH,
6894   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
6895   TILEGX_OPC_CMPNE, TILEGX_OPC_DBLALIGN2, TILEGX_OPC_DBLALIGN4,
6896   TILEGX_OPC_DBLALIGN6,
6897   BITFIELD(49, 4) /* index 740 */,
6898   TILEGX_OPC_EXCH4, TILEGX_OPC_EXCH, TILEGX_OPC_FETCHADD4,
6899   TILEGX_OPC_FETCHADDGEZ4, TILEGX_OPC_FETCHADDGEZ, TILEGX_OPC_FETCHADD,
6900   TILEGX_OPC_FETCHAND4, TILEGX_OPC_FETCHAND, TILEGX_OPC_FETCHOR4,
6901   TILEGX_OPC_FETCHOR, TILEGX_OPC_MNZ, TILEGX_OPC_MZ, TILEGX_OPC_NOR,
6902   CHILD(757), TILEGX_OPC_ROTL, TILEGX_OPC_SHL1ADDX,
6903   BITFIELD(43, 2) /* index 757 */,
6904   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(762),
6905   BITFIELD(45, 2) /* index 762 */,
6906   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(767),
6907   BITFIELD(47, 2) /* index 767 */,
6908   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
6909   BITFIELD(49, 4) /* index 772 */,
6910   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADDX, TILEGX_OPC_SHL2ADD,
6911   TILEGX_OPC_SHL3ADDX, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHLX, TILEGX_OPC_SHL,
6912   TILEGX_OPC_SHRS, TILEGX_OPC_SHRUX, TILEGX_OPC_SHRU, TILEGX_OPC_ST1,
6913   TILEGX_OPC_ST2, TILEGX_OPC_ST4, TILEGX_OPC_STNT1, TILEGX_OPC_STNT2,
6914   TILEGX_OPC_STNT4,
6915   BITFIELD(46, 7) /* index 789 */,
6916   TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT,
6917   TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT, TILEGX_OPC_STNT,
6918   TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST,
6919   TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_ST, TILEGX_OPC_SUBXSC,
6920   TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC,
6921   TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBXSC, TILEGX_OPC_SUBX,
6922   TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX,
6923   TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
6924   TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB,
6925   TILEGX_OPC_SUB, TILEGX_OPC_SUB, TILEGX_OPC_SUB, CHILD(918), CHILD(927),
6926   CHILD(1006), CHILD(1090), CHILD(1099), TILEGX_OPC_NONE, TILEGX_OPC_NONE,
6927   TILEGX_OPC_NONE, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC,
6928   TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC,
6929   TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADDUC, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD,
6930   TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD,
6931   TILEGX_OPC_V1ADD, TILEGX_OPC_V1ADD, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
6932   TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
6933   TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ, TILEGX_OPC_V1CMPEQ,
6934   TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES,
6935   TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES,
6936   TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLES, TILEGX_OPC_V1CMPLEU,
6937   TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU,
6938   TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLEU,
6939   TILEGX_OPC_V1CMPLEU, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
6940   TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
6941   TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS, TILEGX_OPC_V1CMPLTS,
6942   TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU,
6943   TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU,
6944   TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPLTU, TILEGX_OPC_V1CMPNE,
6945   TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE,
6946   TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1CMPNE,
6947   TILEGX_OPC_V1CMPNE, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
6948   TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
6949   TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H, TILEGX_OPC_V1INT_H,
6950   TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
6951   TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
6952   TILEGX_OPC_V1INT_L, TILEGX_OPC_V1INT_L,
6953   BITFIELD(43, 3) /* index 918 */,
6954   TILEGX_OPC_NONE, TILEGX_OPC_DRAIN, TILEGX_OPC_DTLBPR, TILEGX_OPC_FINV,
6955   TILEGX_OPC_FLUSHWB, TILEGX_OPC_FLUSH, TILEGX_OPC_FNOP, TILEGX_OPC_ICOH,
6956   BITFIELD(43, 3) /* index 927 */,
6957   CHILD(936), TILEGX_OPC_INV, TILEGX_OPC_IRET, TILEGX_OPC_JALRP,
6958   TILEGX_OPC_JALR, TILEGX_OPC_JRP, TILEGX_OPC_JR, CHILD(991),
6959   BITFIELD(31, 2) /* index 936 */,
6960   CHILD(941), CHILD(966), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
6961   BITFIELD(33, 2) /* index 941 */,
6962   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(946),
6963   BITFIELD(35, 2) /* index 946 */,
6964   TILEGX_OPC_ILL, CHILD(951), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
6965   BITFIELD(37, 2) /* index 951 */,
6966   TILEGX_OPC_ILL, CHILD(956), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
6967   BITFIELD(39, 2) /* index 956 */,
6968   TILEGX_OPC_ILL, CHILD(961), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
6969   BITFIELD(41, 2) /* index 961 */,
6970   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_BPT, TILEGX_OPC_ILL,
6971   BITFIELD(33, 2) /* index 966 */,
6972   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_ILL, CHILD(971),
6973   BITFIELD(35, 2) /* index 971 */,
6974   TILEGX_OPC_ILL, CHILD(976), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
6975   BITFIELD(37, 2) /* index 976 */,
6976   TILEGX_OPC_ILL, CHILD(981), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
6977   BITFIELD(39, 2) /* index 981 */,
6978   TILEGX_OPC_ILL, CHILD(986), TILEGX_OPC_ILL, TILEGX_OPC_ILL,
6979   BITFIELD(41, 2) /* index 986 */,
6980   TILEGX_OPC_ILL, TILEGX_OPC_ILL, TILEGX_OPC_RAISE, TILEGX_OPC_ILL,
6981   BITFIELD(31, 2) /* index 991 */,
6982   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(996),
6983   BITFIELD(33, 2) /* index 996 */,
6984   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(1001),
6985   BITFIELD(35, 2) /* index 1001 */,
6986   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S,
6987   TILEGX_OPC_PREFETCH_L1_FAULT,
6988   BITFIELD(43, 3) /* index 1006 */,
6989   CHILD(1015), CHILD(1030), CHILD(1045), CHILD(1060), CHILD(1075),
6990   TILEGX_OPC_LDNA, TILEGX_OPC_LDNT1S, TILEGX_OPC_LDNT1U,
6991   BITFIELD(31, 2) /* index 1015 */,
6992   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1020),
6993   BITFIELD(33, 2) /* index 1020 */,
6994   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(1025),
6995   BITFIELD(35, 2) /* index 1025 */,
6996   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH,
6997   BITFIELD(31, 2) /* index 1030 */,
6998   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1035),
6999   BITFIELD(33, 2) /* index 1035 */,
7000   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(1040),
7001   BITFIELD(35, 2) /* index 1040 */,
7002   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S,
7003   TILEGX_OPC_PREFETCH_L2_FAULT,
7004   BITFIELD(31, 2) /* index 1045 */,
7005   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1050),
7006   BITFIELD(33, 2) /* index 1050 */,
7007   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(1055),
7008   BITFIELD(35, 2) /* index 1055 */,
7009   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2,
7010   BITFIELD(31, 2) /* index 1060 */,
7011   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1065),
7012   BITFIELD(33, 2) /* index 1065 */,
7013   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(1070),
7014   BITFIELD(35, 2) /* index 1070 */,
7015   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S,
7016   TILEGX_OPC_PREFETCH_L3_FAULT,
7017   BITFIELD(31, 2) /* index 1075 */,
7018   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1080),
7019   BITFIELD(33, 2) /* index 1080 */,
7020   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(1085),
7021   BITFIELD(35, 2) /* index 1085 */,
7022   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3,
7023   BITFIELD(43, 3) /* index 1090 */,
7024   TILEGX_OPC_LDNT2S, TILEGX_OPC_LDNT2U, TILEGX_OPC_LDNT4S, TILEGX_OPC_LDNT4U,
7025   TILEGX_OPC_LDNT, TILEGX_OPC_LD, TILEGX_OPC_LNK, TILEGX_OPC_MF,
7026   BITFIELD(43, 3) /* index 1099 */,
7027   TILEGX_OPC_NAP, TILEGX_OPC_NOP, TILEGX_OPC_SWINT0, TILEGX_OPC_SWINT1,
7028   TILEGX_OPC_SWINT2, TILEGX_OPC_SWINT3, TILEGX_OPC_WH64, TILEGX_OPC_NONE,
7029   BITFIELD(49, 4) /* index 1108 */,
7030   TILEGX_OPC_V1MAXU, TILEGX_OPC_V1MINU, TILEGX_OPC_V1MNZ, TILEGX_OPC_V1MZ,
7031   TILEGX_OPC_V1SHL, TILEGX_OPC_V1SHRS, TILEGX_OPC_V1SHRU, TILEGX_OPC_V1SUBUC,
7032   TILEGX_OPC_V1SUB, TILEGX_OPC_V2ADDSC, TILEGX_OPC_V2ADD, TILEGX_OPC_V2CMPEQ,
7033   TILEGX_OPC_V2CMPLES, TILEGX_OPC_V2CMPLEU, TILEGX_OPC_V2CMPLTS,
7034   TILEGX_OPC_V2CMPLTU,
7035   BITFIELD(49, 4) /* index 1125 */,
7036   TILEGX_OPC_V2CMPNE, TILEGX_OPC_V2INT_H, TILEGX_OPC_V2INT_L,
7037   TILEGX_OPC_V2MAXS, TILEGX_OPC_V2MINS, TILEGX_OPC_V2MNZ, TILEGX_OPC_V2MZ,
7038   TILEGX_OPC_V2PACKH, TILEGX_OPC_V2PACKL, TILEGX_OPC_V2PACKUC,
7039   TILEGX_OPC_V2SHLSC, TILEGX_OPC_V2SHL, TILEGX_OPC_V2SHRS, TILEGX_OPC_V2SHRU,
7040   TILEGX_OPC_V2SUBSC, TILEGX_OPC_V2SUB,
7041   BITFIELD(49, 4) /* index 1142 */,
7042   TILEGX_OPC_V4ADDSC, TILEGX_OPC_V4ADD, TILEGX_OPC_V4INT_H,
7043   TILEGX_OPC_V4INT_L, TILEGX_OPC_V4PACKSC, TILEGX_OPC_V4SHLSC,
7044   TILEGX_OPC_V4SHL, TILEGX_OPC_V4SHRS, TILEGX_OPC_V4SHRU, TILEGX_OPC_V4SUBSC,
7045   TILEGX_OPC_V4SUB, TILEGX_OPC_XOR, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7046   TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7047   BITFIELD(49, 4) /* index 1159 */,
7048   TILEGX_OPC_NONE, TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHLXI,
7049   TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI, TILEGX_OPC_SHRUXI, TILEGX_OPC_V1SHLI,
7050   TILEGX_OPC_V1SHRSI, TILEGX_OPC_V1SHRUI, TILEGX_OPC_V2SHLI,
7051   TILEGX_OPC_V2SHRSI, TILEGX_OPC_V2SHRUI, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7052   TILEGX_OPC_NONE,
7053   BITFIELD(31, 2) /* index 1176 */,
7054   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7055   CHILD(1181),
7056   BITFIELD(33, 2) /* index 1181 */,
7057   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7058   CHILD(1186),
7059   BITFIELD(35, 2) /* index 1186 */,
7060   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7061   CHILD(1191),
7062   BITFIELD(37, 2) /* index 1191 */,
7063   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7064   CHILD(1196),
7065   BITFIELD(39, 2) /* index 1196 */,
7066   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7067   CHILD(1201),
7068   BITFIELD(41, 2) /* index 1201 */,
7069   TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI, TILEGX_OPC_SHL16INSLI,
7070   TILEGX_OPC_INFOL,
7071 };
7072
7073 static const unsigned short decode_Y0_fsm[178] =
7074 {
7075   BITFIELD(27, 4) /* index 0 */,
7076   CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI,
7077   TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(118), CHILD(123),
7078   CHILD(128), CHILD(133), CHILD(153), CHILD(158), CHILD(163), CHILD(168),
7079   CHILD(173),
7080   BITFIELD(6, 2) /* index 17 */,
7081   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22),
7082   BITFIELD(8, 2) /* index 22 */,
7083   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27),
7084   BITFIELD(10, 2) /* index 27 */,
7085   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
7086   BITFIELD(0, 2) /* index 32 */,
7087   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37),
7088   BITFIELD(2, 2) /* index 37 */,
7089   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42),
7090   BITFIELD(4, 2) /* index 42 */,
7091   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47),
7092   BITFIELD(6, 2) /* index 47 */,
7093   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52),
7094   BITFIELD(8, 2) /* index 52 */,
7095   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57),
7096   BITFIELD(10, 2) /* index 57 */,
7097   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
7098   BITFIELD(18, 2) /* index 62 */,
7099   TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
7100   BITFIELD(15, 5) /* index 67 */,
7101   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
7102   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
7103   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD,
7104   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
7105   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
7106   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD,
7107   TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD,
7108   TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(100),
7109   CHILD(109), TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7110   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7111   BITFIELD(12, 3) /* index 100 */,
7112   TILEGX_OPC_NONE, TILEGX_OPC_CLZ, TILEGX_OPC_CTZ, TILEGX_OPC_FNOP,
7113   TILEGX_OPC_FSINGLE_PACK1, TILEGX_OPC_NOP, TILEGX_OPC_PCNT,
7114   TILEGX_OPC_REVBITS,
7115   BITFIELD(12, 3) /* index 109 */,
7116   TILEGX_OPC_REVBYTES, TILEGX_OPC_TBLIDXB0, TILEGX_OPC_TBLIDXB1,
7117   TILEGX_OPC_TBLIDXB2, TILEGX_OPC_TBLIDXB3, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7118   TILEGX_OPC_NONE,
7119   BITFIELD(18, 2) /* index 118 */,
7120   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
7121   BITFIELD(18, 2) /* index 123 */,
7122   TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE, TILEGX_OPC_MULAX, TILEGX_OPC_MULX,
7123   BITFIELD(18, 2) /* index 128 */,
7124   TILEGX_OPC_CMOVEQZ, TILEGX_OPC_CMOVNEZ, TILEGX_OPC_MNZ, TILEGX_OPC_MZ,
7125   BITFIELD(18, 2) /* index 133 */,
7126   TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(138), TILEGX_OPC_XOR,
7127   BITFIELD(12, 2) /* index 138 */,
7128   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(143),
7129   BITFIELD(14, 2) /* index 143 */,
7130   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(148),
7131   BITFIELD(16, 2) /* index 148 */,
7132   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
7133   BITFIELD(18, 2) /* index 153 */,
7134   TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU,
7135   BITFIELD(18, 2) /* index 158 */,
7136   TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX,
7137   TILEGX_OPC_SHL3ADDX,
7138   BITFIELD(18, 2) /* index 163 */,
7139   TILEGX_OPC_MUL_HS_HS, TILEGX_OPC_MUL_HU_HU, TILEGX_OPC_MUL_LS_LS,
7140   TILEGX_OPC_MUL_LU_LU,
7141   BITFIELD(18, 2) /* index 168 */,
7142   TILEGX_OPC_MULA_HS_HS, TILEGX_OPC_MULA_HU_HU, TILEGX_OPC_MULA_LS_LS,
7143   TILEGX_OPC_MULA_LU_LU,
7144   BITFIELD(18, 2) /* index 173 */,
7145   TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI,
7146 };
7147
7148 static const unsigned short decode_Y1_fsm[167] =
7149 {
7150   BITFIELD(58, 4) /* index 0 */,
7151   TILEGX_OPC_NONE, CHILD(17), TILEGX_OPC_ADDXI, CHILD(32), TILEGX_OPC_CMPEQI,
7152   TILEGX_OPC_CMPLTSI, CHILD(62), CHILD(67), CHILD(117), CHILD(122),
7153   CHILD(127), CHILD(132), CHILD(152), CHILD(157), CHILD(162), TILEGX_OPC_NONE,
7154   BITFIELD(37, 2) /* index 17 */,
7155   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(22),
7156   BITFIELD(39, 2) /* index 22 */,
7157   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, CHILD(27),
7158   BITFIELD(41, 2) /* index 27 */,
7159   TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_ADDI, TILEGX_OPC_MOVEI,
7160   BITFIELD(31, 2) /* index 32 */,
7161   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(37),
7162   BITFIELD(33, 2) /* index 37 */,
7163   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(42),
7164   BITFIELD(35, 2) /* index 42 */,
7165   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(47),
7166   BITFIELD(37, 2) /* index 47 */,
7167   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(52),
7168   BITFIELD(39, 2) /* index 52 */,
7169   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, CHILD(57),
7170   BITFIELD(41, 2) /* index 57 */,
7171   TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_ANDI, TILEGX_OPC_INFO,
7172   BITFIELD(49, 2) /* index 62 */,
7173   TILEGX_OPC_ADDX, TILEGX_OPC_ADD, TILEGX_OPC_SUBX, TILEGX_OPC_SUB,
7174   BITFIELD(47, 4) /* index 67 */,
7175   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL1ADD,
7176   TILEGX_OPC_SHL1ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD,
7177   TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL2ADD, TILEGX_OPC_SHL3ADD,
7178   TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, TILEGX_OPC_SHL3ADD, CHILD(84),
7179   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_NONE,
7180   BITFIELD(43, 3) /* index 84 */,
7181   CHILD(93), CHILD(96), CHILD(99), CHILD(102), CHILD(105), CHILD(108),
7182   CHILD(111), CHILD(114),
7183   BITFIELD(46, 1) /* index 93 */,
7184   TILEGX_OPC_NONE, TILEGX_OPC_FNOP,
7185   BITFIELD(46, 1) /* index 96 */,
7186   TILEGX_OPC_NONE, TILEGX_OPC_ILL,
7187   BITFIELD(46, 1) /* index 99 */,
7188   TILEGX_OPC_NONE, TILEGX_OPC_JALRP,
7189   BITFIELD(46, 1) /* index 102 */,
7190   TILEGX_OPC_NONE, TILEGX_OPC_JALR,
7191   BITFIELD(46, 1) /* index 105 */,
7192   TILEGX_OPC_NONE, TILEGX_OPC_JRP,
7193   BITFIELD(46, 1) /* index 108 */,
7194   TILEGX_OPC_NONE, TILEGX_OPC_JR,
7195   BITFIELD(46, 1) /* index 111 */,
7196   TILEGX_OPC_NONE, TILEGX_OPC_LNK,
7197   BITFIELD(46, 1) /* index 114 */,
7198   TILEGX_OPC_NONE, TILEGX_OPC_NOP,
7199   BITFIELD(49, 2) /* index 117 */,
7200   TILEGX_OPC_CMPLES, TILEGX_OPC_CMPLEU, TILEGX_OPC_CMPLTS, TILEGX_OPC_CMPLTU,
7201   BITFIELD(49, 2) /* index 122 */,
7202   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_CMPEQ, TILEGX_OPC_CMPNE,
7203   BITFIELD(49, 2) /* index 127 */,
7204   TILEGX_OPC_NONE, TILEGX_OPC_NONE, TILEGX_OPC_MNZ, TILEGX_OPC_MZ,
7205   BITFIELD(49, 2) /* index 132 */,
7206   TILEGX_OPC_AND, TILEGX_OPC_NOR, CHILD(137), TILEGX_OPC_XOR,
7207   BITFIELD(43, 2) /* index 137 */,
7208   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(142),
7209   BITFIELD(45, 2) /* index 142 */,
7210   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, CHILD(147),
7211   BITFIELD(47, 2) /* index 147 */,
7212   TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_OR, TILEGX_OPC_MOVE,
7213   BITFIELD(49, 2) /* index 152 */,
7214   TILEGX_OPC_ROTL, TILEGX_OPC_SHL, TILEGX_OPC_SHRS, TILEGX_OPC_SHRU,
7215   BITFIELD(49, 2) /* index 157 */,
7216   TILEGX_OPC_NONE, TILEGX_OPC_SHL1ADDX, TILEGX_OPC_SHL2ADDX,
7217   TILEGX_OPC_SHL3ADDX,
7218   BITFIELD(49, 2) /* index 162 */,
7219   TILEGX_OPC_ROTLI, TILEGX_OPC_SHLI, TILEGX_OPC_SHRSI, TILEGX_OPC_SHRUI,
7220 };
7221
7222 static const unsigned short decode_Y2_fsm[118] =
7223 {
7224   BITFIELD(62, 2) /* index 0 */,
7225   TILEGX_OPC_NONE, CHILD(5), CHILD(66), CHILD(109),
7226   BITFIELD(55, 3) /* index 5 */,
7227   CHILD(14), CHILD(14), CHILD(14), CHILD(17), CHILD(40), CHILD(40), CHILD(40),
7228   CHILD(43),
7229   BITFIELD(26, 1) /* index 14 */,
7230   TILEGX_OPC_LD1S, TILEGX_OPC_LD1U,
7231   BITFIELD(26, 1) /* index 17 */,
7232   CHILD(20), CHILD(30),
7233   BITFIELD(51, 2) /* index 20 */,
7234   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, CHILD(25),
7235   BITFIELD(53, 2) /* index 25 */,
7236   TILEGX_OPC_LD1S, TILEGX_OPC_LD1S, TILEGX_OPC_LD1S,
7237   TILEGX_OPC_PREFETCH_L1_FAULT,
7238   BITFIELD(51, 2) /* index 30 */,
7239   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, CHILD(35),
7240   BITFIELD(53, 2) /* index 35 */,
7241   TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_LD1U, TILEGX_OPC_PREFETCH,
7242   BITFIELD(26, 1) /* index 40 */,
7243   TILEGX_OPC_LD2S, TILEGX_OPC_LD2U,
7244   BITFIELD(26, 1) /* index 43 */,
7245   CHILD(46), CHILD(56),
7246   BITFIELD(51, 2) /* index 46 */,
7247   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, CHILD(51),
7248   BITFIELD(53, 2) /* index 51 */,
7249   TILEGX_OPC_LD2S, TILEGX_OPC_LD2S, TILEGX_OPC_LD2S,
7250   TILEGX_OPC_PREFETCH_L2_FAULT,
7251   BITFIELD(51, 2) /* index 56 */,
7252   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, CHILD(61),
7253   BITFIELD(53, 2) /* index 61 */,
7254   TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_LD2U, TILEGX_OPC_PREFETCH_L2,
7255   BITFIELD(56, 2) /* index 66 */,
7256   CHILD(71), CHILD(74), CHILD(90), CHILD(93),
7257   BITFIELD(26, 1) /* index 71 */,
7258   TILEGX_OPC_NONE, TILEGX_OPC_LD4S,
7259   BITFIELD(26, 1) /* index 74 */,
7260   TILEGX_OPC_NONE, CHILD(77),
7261   BITFIELD(51, 2) /* index 77 */,
7262   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(82),
7263   BITFIELD(53, 2) /* index 82 */,
7264   TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, TILEGX_OPC_LD4S, CHILD(87),
7265   BITFIELD(55, 1) /* index 87 */,
7266   TILEGX_OPC_LD4S, TILEGX_OPC_PREFETCH_L3_FAULT,
7267   BITFIELD(26, 1) /* index 90 */,
7268   TILEGX_OPC_LD4U, TILEGX_OPC_LD,
7269   BITFIELD(26, 1) /* index 93 */,
7270   CHILD(96), TILEGX_OPC_LD,
7271   BITFIELD(51, 2) /* index 96 */,
7272   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(101),
7273   BITFIELD(53, 2) /* index 101 */,
7274   TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, TILEGX_OPC_LD4U, CHILD(106),
7275   BITFIELD(55, 1) /* index 106 */,
7276   TILEGX_OPC_LD4U, TILEGX_OPC_PREFETCH_L3,
7277   BITFIELD(26, 1) /* index 109 */,
7278   CHILD(112), CHILD(115),
7279   BITFIELD(57, 1) /* index 112 */,
7280   TILEGX_OPC_ST1, TILEGX_OPC_ST4,
7281   BITFIELD(57, 1) /* index 115 */,
7282   TILEGX_OPC_ST2, TILEGX_OPC_ST,
7283 };
7284
7285 #undef BITFIELD
7286 #undef CHILD
7287 const unsigned short * const
7288 tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS] =
7289 {
7290   decode_X0_fsm,
7291   decode_X1_fsm,
7292   decode_Y0_fsm,
7293   decode_Y1_fsm,
7294   decode_Y2_fsm
7295 };
7296 const struct tilegx_operand tilegx_operands[35] =
7297 {
7298   {
7299     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X0),
7300     8, 1, 0, 0, 0, 0,
7301     create_Imm8_X0, get_Imm8_X0
7302   },
7303   {
7304     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_X1),
7305     8, 1, 0, 0, 0, 0,
7306     create_Imm8_X1, get_Imm8_X1
7307   },
7308   {
7309     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y0),
7310     8, 1, 0, 0, 0, 0,
7311     create_Imm8_Y0, get_Imm8_Y0
7312   },
7313   {
7314     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM8_Y1),
7315     8, 1, 0, 0, 0, 0,
7316     create_Imm8_Y1, get_Imm8_Y1
7317   },
7318   {
7319     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X0_HW0_LAST),
7320     16, 1, 0, 0, 0, 0,
7321     create_Imm16_X0, get_Imm16_X0
7322   },
7323   {
7324     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_IMM16_X1_HW0_LAST),
7325     16, 1, 0, 0, 0, 0,
7326     create_Imm16_X1, get_Imm16_X1
7327   },
7328   {
7329     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7330     6, 0, 0, 1, 0, 0,
7331     create_Dest_X0, get_Dest_X0
7332   },
7333   {
7334     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7335     6, 0, 1, 0, 0, 0,
7336     create_SrcA_X0, get_SrcA_X0
7337   },
7338   {
7339     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7340     6, 0, 0, 1, 0, 0,
7341     create_Dest_X1, get_Dest_X1
7342   },
7343   {
7344     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7345     6, 0, 1, 0, 0, 0,
7346     create_SrcA_X1, get_SrcA_X1
7347   },
7348   {
7349     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7350     6, 0, 0, 1, 0, 0,
7351     create_Dest_Y0, get_Dest_Y0
7352   },
7353   {
7354     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7355     6, 0, 1, 0, 0, 0,
7356     create_SrcA_Y0, get_SrcA_Y0
7357   },
7358   {
7359     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7360     6, 0, 0, 1, 0, 0,
7361     create_Dest_Y1, get_Dest_Y1
7362   },
7363   {
7364     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7365     6, 0, 1, 0, 0, 0,
7366     create_SrcA_Y1, get_SrcA_Y1
7367   },
7368   {
7369     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7370     6, 0, 1, 0, 0, 0,
7371     create_SrcA_Y2, get_SrcA_Y2
7372   },
7373   {
7374     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7375     6, 0, 1, 1, 0, 0,
7376     create_SrcA_X1, get_SrcA_X1
7377   },
7378   {
7379     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7380     6, 0, 1, 0, 0, 0,
7381     create_SrcB_X0, get_SrcB_X0
7382   },
7383   {
7384     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7385     6, 0, 1, 0, 0, 0,
7386     create_SrcB_X1, get_SrcB_X1
7387   },
7388   {
7389     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7390     6, 0, 1, 0, 0, 0,
7391     create_SrcB_Y0, get_SrcB_Y0
7392   },
7393   {
7394     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7395     6, 0, 1, 0, 0, 0,
7396     create_SrcB_Y1, get_SrcB_Y1
7397   },
7398   {
7399     TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_BROFF_X1),
7400     17, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
7401     create_BrOff_X1, get_BrOff_X1
7402   },
7403   {
7404     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMSTART_X0),
7405     6, 0, 0, 0, 0, 0,
7406     create_BFStart_X0, get_BFStart_X0
7407   },
7408   {
7409     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_MMEND_X0),
7410     6, 0, 0, 0, 0, 0,
7411     create_BFEnd_X0, get_BFEnd_X0
7412   },
7413   {
7414     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7415     6, 0, 1, 1, 0, 0,
7416     create_Dest_X0, get_Dest_X0
7417   },
7418   {
7419     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7420     6, 0, 1, 1, 0, 0,
7421     create_Dest_Y0, get_Dest_Y0
7422   },
7423   {
7424     TILEGX_OP_TYPE_ADDRESS, BFD_RELOC(TILEGX_JUMPOFF_X1),
7425     27, 1, 0, 0, 1, TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES,
7426     create_JumpOff_X1, get_JumpOff_X1
7427   },
7428   {
7429     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7430     6, 0, 0, 1, 0, 0,
7431     create_SrcBDest_Y2, get_SrcBDest_Y2
7432   },
7433   {
7434     TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MF_IMM14_X1),
7435     14, 0, 0, 0, 0, 0,
7436     create_MF_Imm14_X1, get_MF_Imm14_X1
7437   },
7438   {
7439     TILEGX_OP_TYPE_SPR, BFD_RELOC(TILEGX_MT_IMM14_X1),
7440     14, 0, 0, 0, 0, 0,
7441     create_MT_Imm14_X1, get_MT_Imm14_X1
7442   },
7443   {
7444     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X0),
7445     6, 0, 0, 0, 0, 0,
7446     create_ShAmt_X0, get_ShAmt_X0
7447   },
7448   {
7449     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_X1),
7450     6, 0, 0, 0, 0, 0,
7451     create_ShAmt_X1, get_ShAmt_X1
7452   },
7453   {
7454     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y0),
7455     6, 0, 0, 0, 0, 0,
7456     create_ShAmt_Y0, get_ShAmt_Y0
7457   },
7458   {
7459     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_SHAMT_Y1),
7460     6, 0, 0, 0, 0, 0,
7461     create_ShAmt_Y1, get_ShAmt_Y1
7462   },
7463   {
7464     TILEGX_OP_TYPE_REGISTER, BFD_RELOC(NONE),
7465     6, 0, 1, 0, 0, 0,
7466     create_SrcBDest_Y2, get_SrcBDest_Y2
7467   },
7468   {
7469     TILEGX_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEGX_DEST_IMM8_X1),
7470     8, 1, 0, 0, 0, 0,
7471     create_Dest_Imm8_X1, get_Dest_Imm8_X1
7472   }
7473 };
7474
7475 #ifndef DISASM_ONLY
7476 const struct tilegx_spr tilegx_sprs[] = {
7477   { 0, "MPL_MEM_ERROR_SET_0" },
7478   { 1, "MPL_MEM_ERROR_SET_1" },
7479   { 2, "MPL_MEM_ERROR_SET_2" },
7480   { 3, "MPL_MEM_ERROR_SET_3" },
7481   { 4, "MPL_MEM_ERROR" },
7482   { 5, "MEM_ERROR_CBOX_ADDR" },
7483   { 6, "MEM_ERROR_CBOX_STATUS" },
7484   { 7, "MEM_ERROR_ENABLE" },
7485   { 8, "MEM_ERROR_MBOX_ADDR" },
7486   { 9, "MEM_ERROR_MBOX_STATUS" },
7487   { 10, "SBOX_ERROR" },
7488   { 11, "XDN_DEMUX_ERROR" },
7489   { 256, "MPL_SINGLE_STEP_3_SET_0" },
7490   { 257, "MPL_SINGLE_STEP_3_SET_1" },
7491   { 258, "MPL_SINGLE_STEP_3_SET_2" },
7492   { 259, "MPL_SINGLE_STEP_3_SET_3" },
7493   { 260, "MPL_SINGLE_STEP_3" },
7494   { 261, "SINGLE_STEP_CONTROL_3" },
7495   { 512, "MPL_SINGLE_STEP_2_SET_0" },
7496   { 513, "MPL_SINGLE_STEP_2_SET_1" },
7497   { 514, "MPL_SINGLE_STEP_2_SET_2" },
7498   { 515, "MPL_SINGLE_STEP_2_SET_3" },
7499   { 516, "MPL_SINGLE_STEP_2" },
7500   { 517, "SINGLE_STEP_CONTROL_2" },
7501   { 768, "MPL_SINGLE_STEP_1_SET_0" },
7502   { 769, "MPL_SINGLE_STEP_1_SET_1" },
7503   { 770, "MPL_SINGLE_STEP_1_SET_2" },
7504   { 771, "MPL_SINGLE_STEP_1_SET_3" },
7505   { 772, "MPL_SINGLE_STEP_1" },
7506   { 773, "SINGLE_STEP_CONTROL_1" },
7507   { 1024, "MPL_SINGLE_STEP_0_SET_0" },
7508   { 1025, "MPL_SINGLE_STEP_0_SET_1" },
7509   { 1026, "MPL_SINGLE_STEP_0_SET_2" },
7510   { 1027, "MPL_SINGLE_STEP_0_SET_3" },
7511   { 1028, "MPL_SINGLE_STEP_0" },
7512   { 1029, "SINGLE_STEP_CONTROL_0" },
7513   { 1280, "MPL_IDN_COMPLETE_SET_0" },
7514   { 1281, "MPL_IDN_COMPLETE_SET_1" },
7515   { 1282, "MPL_IDN_COMPLETE_SET_2" },
7516   { 1283, "MPL_IDN_COMPLETE_SET_3" },
7517   { 1284, "MPL_IDN_COMPLETE" },
7518   { 1285, "IDN_COMPLETE_PENDING" },
7519   { 1536, "MPL_UDN_COMPLETE_SET_0" },
7520   { 1537, "MPL_UDN_COMPLETE_SET_1" },
7521   { 1538, "MPL_UDN_COMPLETE_SET_2" },
7522   { 1539, "MPL_UDN_COMPLETE_SET_3" },
7523   { 1540, "MPL_UDN_COMPLETE" },
7524   { 1541, "UDN_COMPLETE_PENDING" },
7525   { 1792, "MPL_ITLB_MISS_SET_0" },
7526   { 1793, "MPL_ITLB_MISS_SET_1" },
7527   { 1794, "MPL_ITLB_MISS_SET_2" },
7528   { 1795, "MPL_ITLB_MISS_SET_3" },
7529   { 1796, "MPL_ITLB_MISS" },
7530   { 1797, "ITLB_TSB_BASE_ADDR_0" },
7531   { 1798, "ITLB_TSB_BASE_ADDR_1" },
7532   { 1920, "ITLB_CURRENT_ATTR" },
7533   { 1921, "ITLB_CURRENT_PA" },
7534   { 1922, "ITLB_CURRENT_VA" },
7535   { 1923, "ITLB_INDEX" },
7536   { 1924, "ITLB_MATCH_0" },
7537   { 1925, "ITLB_PERF" },
7538   { 1926, "ITLB_PR" },
7539   { 1927, "ITLB_TSB_ADDR_0" },
7540   { 1928, "ITLB_TSB_ADDR_1" },
7541   { 1929, "ITLB_TSB_FILL_CURRENT_ATTR" },
7542   { 1930, "ITLB_TSB_FILL_MATCH" },
7543   { 1931, "NUMBER_ITLB" },
7544   { 1932, "REPLACEMENT_ITLB" },
7545   { 1933, "WIRED_ITLB" },
7546   { 2048, "MPL_ILL_SET_0" },
7547   { 2049, "MPL_ILL_SET_1" },
7548   { 2050, "MPL_ILL_SET_2" },
7549   { 2051, "MPL_ILL_SET_3" },
7550   { 2052, "MPL_ILL" },
7551   { 2304, "MPL_GPV_SET_0" },
7552   { 2305, "MPL_GPV_SET_1" },
7553   { 2306, "MPL_GPV_SET_2" },
7554   { 2307, "MPL_GPV_SET_3" },
7555   { 2308, "MPL_GPV" },
7556   { 2309, "GPV_REASON" },
7557   { 2560, "MPL_IDN_ACCESS_SET_0" },
7558   { 2561, "MPL_IDN_ACCESS_SET_1" },
7559   { 2562, "MPL_IDN_ACCESS_SET_2" },
7560   { 2563, "MPL_IDN_ACCESS_SET_3" },
7561   { 2564, "MPL_IDN_ACCESS" },
7562   { 2565, "IDN_DEMUX_COUNT_0" },
7563   { 2566, "IDN_DEMUX_COUNT_1" },
7564   { 2567, "IDN_FLUSH_EGRESS" },
7565   { 2568, "IDN_PENDING" },
7566   { 2569, "IDN_ROUTE_ORDER" },
7567   { 2570, "IDN_SP_FIFO_CNT" },
7568   { 2688, "IDN_DATA_AVAIL" },
7569   { 2816, "MPL_UDN_ACCESS_SET_0" },
7570   { 2817, "MPL_UDN_ACCESS_SET_1" },
7571   { 2818, "MPL_UDN_ACCESS_SET_2" },
7572   { 2819, "MPL_UDN_ACCESS_SET_3" },
7573   { 2820, "MPL_UDN_ACCESS" },
7574   { 2821, "UDN_DEMUX_COUNT_0" },
7575   { 2822, "UDN_DEMUX_COUNT_1" },
7576   { 2823, "UDN_DEMUX_COUNT_2" },
7577   { 2824, "UDN_DEMUX_COUNT_3" },
7578   { 2825, "UDN_FLUSH_EGRESS" },
7579   { 2826, "UDN_PENDING" },
7580   { 2827, "UDN_ROUTE_ORDER" },
7581   { 2828, "UDN_SP_FIFO_CNT" },
7582   { 2944, "UDN_DATA_AVAIL" },
7583   { 3072, "MPL_SWINT_3_SET_0" },
7584   { 3073, "MPL_SWINT_3_SET_1" },
7585   { 3074, "MPL_SWINT_3_SET_2" },
7586   { 3075, "MPL_SWINT_3_SET_3" },
7587   { 3076, "MPL_SWINT_3" },
7588   { 3328, "MPL_SWINT_2_SET_0" },
7589   { 3329, "MPL_SWINT_2_SET_1" },
7590   { 3330, "MPL_SWINT_2_SET_2" },
7591   { 3331, "MPL_SWINT_2_SET_3" },
7592   { 3332, "MPL_SWINT_2" },
7593   { 3584, "MPL_SWINT_1_SET_0" },
7594   { 3585, "MPL_SWINT_1_SET_1" },
7595   { 3586, "MPL_SWINT_1_SET_2" },
7596   { 3587, "MPL_SWINT_1_SET_3" },
7597   { 3588, "MPL_SWINT_1" },
7598   { 3840, "MPL_SWINT_0_SET_0" },
7599   { 3841, "MPL_SWINT_0_SET_1" },
7600   { 3842, "MPL_SWINT_0_SET_2" },
7601   { 3843, "MPL_SWINT_0_SET_3" },
7602   { 3844, "MPL_SWINT_0" },
7603   { 4096, "MPL_ILL_TRANS_SET_0" },
7604   { 4097, "MPL_ILL_TRANS_SET_1" },
7605   { 4098, "MPL_ILL_TRANS_SET_2" },
7606   { 4099, "MPL_ILL_TRANS_SET_3" },
7607   { 4100, "MPL_ILL_TRANS" },
7608   { 4101, "ILL_TRANS_REASON" },
7609   { 4102, "ILL_VA_PC" },
7610   { 4352, "MPL_UNALIGN_DATA_SET_0" },
7611   { 4353, "MPL_UNALIGN_DATA_SET_1" },
7612   { 4354, "MPL_UNALIGN_DATA_SET_2" },
7613   { 4355, "MPL_UNALIGN_DATA_SET_3" },
7614   { 4356, "MPL_UNALIGN_DATA" },
7615   { 4608, "MPL_DTLB_MISS_SET_0" },
7616   { 4609, "MPL_DTLB_MISS_SET_1" },
7617   { 4610, "MPL_DTLB_MISS_SET_2" },
7618   { 4611, "MPL_DTLB_MISS_SET_3" },
7619   { 4612, "MPL_DTLB_MISS" },
7620   { 4613, "DTLB_TSB_BASE_ADDR_0" },
7621   { 4614, "DTLB_TSB_BASE_ADDR_1" },
7622   { 4736, "AAR" },
7623   { 4737, "CACHE_PINNED_WAYS" },
7624   { 4738, "DTLB_BAD_ADDR" },
7625   { 4739, "DTLB_BAD_ADDR_REASON" },
7626   { 4740, "DTLB_CURRENT_ATTR" },
7627   { 4741, "DTLB_CURRENT_PA" },
7628   { 4742, "DTLB_CURRENT_VA" },
7629   { 4743, "DTLB_INDEX" },
7630   { 4744, "DTLB_MATCH_0" },
7631   { 4745, "DTLB_PERF" },
7632   { 4746, "DTLB_TSB_ADDR_0" },
7633   { 4747, "DTLB_TSB_ADDR_1" },
7634   { 4748, "DTLB_TSB_FILL_CURRENT_ATTR" },
7635   { 4749, "DTLB_TSB_FILL_MATCH" },
7636   { 4750, "NUMBER_DTLB" },
7637   { 4751, "REPLACEMENT_DTLB" },
7638   { 4752, "WIRED_DTLB" },
7639   { 4864, "MPL_DTLB_ACCESS_SET_0" },
7640   { 4865, "MPL_DTLB_ACCESS_SET_1" },
7641   { 4866, "MPL_DTLB_ACCESS_SET_2" },
7642   { 4867, "MPL_DTLB_ACCESS_SET_3" },
7643   { 4868, "MPL_DTLB_ACCESS" },
7644   { 5120, "MPL_IDN_FIREWALL_SET_0" },
7645   { 5121, "MPL_IDN_FIREWALL_SET_1" },
7646   { 5122, "MPL_IDN_FIREWALL_SET_2" },
7647   { 5123, "MPL_IDN_FIREWALL_SET_3" },
7648   { 5124, "MPL_IDN_FIREWALL" },
7649   { 5125, "IDN_DIRECTION_PROTECT" },
7650   { 5376, "MPL_UDN_FIREWALL_SET_0" },
7651   { 5377, "MPL_UDN_FIREWALL_SET_1" },
7652   { 5378, "MPL_UDN_FIREWALL_SET_2" },
7653   { 5379, "MPL_UDN_FIREWALL_SET_3" },
7654   { 5380, "MPL_UDN_FIREWALL" },
7655   { 5381, "UDN_DIRECTION_PROTECT" },
7656   { 5632, "MPL_TILE_TIMER_SET_0" },
7657   { 5633, "MPL_TILE_TIMER_SET_1" },
7658   { 5634, "MPL_TILE_TIMER_SET_2" },
7659   { 5635, "MPL_TILE_TIMER_SET_3" },
7660   { 5636, "MPL_TILE_TIMER" },
7661   { 5637, "TILE_TIMER_CONTROL" },
7662   { 5888, "MPL_AUX_TILE_TIMER_SET_0" },
7663   { 5889, "MPL_AUX_TILE_TIMER_SET_1" },
7664   { 5890, "MPL_AUX_TILE_TIMER_SET_2" },
7665   { 5891, "MPL_AUX_TILE_TIMER_SET_3" },
7666   { 5892, "MPL_AUX_TILE_TIMER" },
7667   { 5893, "AUX_TILE_TIMER_CONTROL" },
7668   { 6144, "MPL_IDN_TIMER_SET_0" },
7669   { 6145, "MPL_IDN_TIMER_SET_1" },
7670   { 6146, "MPL_IDN_TIMER_SET_2" },
7671   { 6147, "MPL_IDN_TIMER_SET_3" },
7672   { 6148, "MPL_IDN_TIMER" },
7673   { 6149, "IDN_DEADLOCK_COUNT" },
7674   { 6150, "IDN_DEADLOCK_TIMEOUT" },
7675   { 6400, "MPL_UDN_TIMER_SET_0" },
7676   { 6401, "MPL_UDN_TIMER_SET_1" },
7677   { 6402, "MPL_UDN_TIMER_SET_2" },
7678   { 6403, "MPL_UDN_TIMER_SET_3" },
7679   { 6404, "MPL_UDN_TIMER" },
7680   { 6405, "UDN_DEADLOCK_COUNT" },
7681   { 6406, "UDN_DEADLOCK_TIMEOUT" },
7682   { 6656, "MPL_IDN_AVAIL_SET_0" },
7683   { 6657, "MPL_IDN_AVAIL_SET_1" },
7684   { 6658, "MPL_IDN_AVAIL_SET_2" },
7685   { 6659, "MPL_IDN_AVAIL_SET_3" },
7686   { 6660, "MPL_IDN_AVAIL" },
7687   { 6661, "IDN_AVAIL_EN" },
7688   { 6912, "MPL_UDN_AVAIL_SET_0" },
7689   { 6913, "MPL_UDN_AVAIL_SET_1" },
7690   { 6914, "MPL_UDN_AVAIL_SET_2" },
7691   { 6915, "MPL_UDN_AVAIL_SET_3" },
7692   { 6916, "MPL_UDN_AVAIL" },
7693   { 6917, "UDN_AVAIL_EN" },
7694   { 7168, "MPL_IPI_3_SET_0" },
7695   { 7169, "MPL_IPI_3_SET_1" },
7696   { 7170, "MPL_IPI_3_SET_2" },
7697   { 7171, "MPL_IPI_3_SET_3" },
7698   { 7172, "MPL_IPI_3" },
7699   { 7173, "IPI_EVENT_3" },
7700   { 7174, "IPI_EVENT_RESET_3" },
7701   { 7175, "IPI_EVENT_SET_3" },
7702   { 7176, "IPI_MASK_3" },
7703   { 7177, "IPI_MASK_RESET_3" },
7704   { 7178, "IPI_MASK_SET_3" },
7705   { 7424, "MPL_IPI_2_SET_0" },
7706   { 7425, "MPL_IPI_2_SET_1" },
7707   { 7426, "MPL_IPI_2_SET_2" },
7708   { 7427, "MPL_IPI_2_SET_3" },
7709   { 7428, "MPL_IPI_2" },
7710   { 7429, "IPI_EVENT_2" },
7711   { 7430, "IPI_EVENT_RESET_2" },
7712   { 7431, "IPI_EVENT_SET_2" },
7713   { 7432, "IPI_MASK_2" },
7714   { 7433, "IPI_MASK_RESET_2" },
7715   { 7434, "IPI_MASK_SET_2" },
7716   { 7680, "MPL_IPI_1_SET_0" },
7717   { 7681, "MPL_IPI_1_SET_1" },
7718   { 7682, "MPL_IPI_1_SET_2" },
7719   { 7683, "MPL_IPI_1_SET_3" },
7720   { 7684, "MPL_IPI_1" },
7721   { 7685, "IPI_EVENT_1" },
7722   { 7686, "IPI_EVENT_RESET_1" },
7723   { 7687, "IPI_EVENT_SET_1" },
7724   { 7688, "IPI_MASK_1" },
7725   { 7689, "IPI_MASK_RESET_1" },
7726   { 7690, "IPI_MASK_SET_1" },
7727   { 7936, "MPL_IPI_0_SET_0" },
7728   { 7937, "MPL_IPI_0_SET_1" },
7729   { 7938, "MPL_IPI_0_SET_2" },
7730   { 7939, "MPL_IPI_0_SET_3" },
7731   { 7940, "MPL_IPI_0" },
7732   { 7941, "IPI_EVENT_0" },
7733   { 7942, "IPI_EVENT_RESET_0" },
7734   { 7943, "IPI_EVENT_SET_0" },
7735   { 7944, "IPI_MASK_0" },
7736   { 7945, "IPI_MASK_RESET_0" },
7737   { 7946, "IPI_MASK_SET_0" },
7738   { 8192, "MPL_PERF_COUNT_SET_0" },
7739   { 8193, "MPL_PERF_COUNT_SET_1" },
7740   { 8194, "MPL_PERF_COUNT_SET_2" },
7741   { 8195, "MPL_PERF_COUNT_SET_3" },
7742   { 8196, "MPL_PERF_COUNT" },
7743   { 8197, "PERF_COUNT_0" },
7744   { 8198, "PERF_COUNT_1" },
7745   { 8199, "PERF_COUNT_CTL" },
7746   { 8200, "PERF_COUNT_DN_CTL" },
7747   { 8201, "PERF_COUNT_STS" },
7748   { 8202, "WATCH_MASK" },
7749   { 8203, "WATCH_VAL" },
7750   { 8448, "MPL_AUX_PERF_COUNT_SET_0" },
7751   { 8449, "MPL_AUX_PERF_COUNT_SET_1" },
7752   { 8450, "MPL_AUX_PERF_COUNT_SET_2" },
7753   { 8451, "MPL_AUX_PERF_COUNT_SET_3" },
7754   { 8452, "MPL_AUX_PERF_COUNT" },
7755   { 8453, "AUX_PERF_COUNT_0" },
7756   { 8454, "AUX_PERF_COUNT_1" },
7757   { 8455, "AUX_PERF_COUNT_CTL" },
7758   { 8456, "AUX_PERF_COUNT_STS" },
7759   { 8704, "MPL_INTCTRL_3_SET_0" },
7760   { 8705, "MPL_INTCTRL_3_SET_1" },
7761   { 8706, "MPL_INTCTRL_3_SET_2" },
7762   { 8707, "MPL_INTCTRL_3_SET_3" },
7763   { 8708, "MPL_INTCTRL_3" },
7764   { 8709, "INTCTRL_3_STATUS" },
7765   { 8710, "INTERRUPT_MASK_3" },
7766   { 8711, "INTERRUPT_MASK_RESET_3" },
7767   { 8712, "INTERRUPT_MASK_SET_3" },
7768   { 8713, "INTERRUPT_VECTOR_BASE_3" },
7769   { 8714, "SINGLE_STEP_EN_0_3" },
7770   { 8715, "SINGLE_STEP_EN_1_3" },
7771   { 8716, "SINGLE_STEP_EN_2_3" },
7772   { 8717, "SINGLE_STEP_EN_3_3" },
7773   { 8832, "EX_CONTEXT_3_0" },
7774   { 8833, "EX_CONTEXT_3_1" },
7775   { 8834, "SYSTEM_SAVE_3_0" },
7776   { 8835, "SYSTEM_SAVE_3_1" },
7777   { 8836, "SYSTEM_SAVE_3_2" },
7778   { 8837, "SYSTEM_SAVE_3_3" },
7779   { 8960, "MPL_INTCTRL_2_SET_0" },
7780   { 8961, "MPL_INTCTRL_2_SET_1" },
7781   { 8962, "MPL_INTCTRL_2_SET_2" },
7782   { 8963, "MPL_INTCTRL_2_SET_3" },
7783   { 8964, "MPL_INTCTRL_2" },
7784   { 8965, "INTCTRL_2_STATUS" },
7785   { 8966, "INTERRUPT_MASK_2" },
7786   { 8967, "INTERRUPT_MASK_RESET_2" },
7787   { 8968, "INTERRUPT_MASK_SET_2" },
7788   { 8969, "INTERRUPT_VECTOR_BASE_2" },
7789   { 8970, "SINGLE_STEP_EN_0_2" },
7790   { 8971, "SINGLE_STEP_EN_1_2" },
7791   { 8972, "SINGLE_STEP_EN_2_2" },
7792   { 8973, "SINGLE_STEP_EN_3_2" },
7793   { 9088, "EX_CONTEXT_2_0" },
7794   { 9089, "EX_CONTEXT_2_1" },
7795   { 9090, "SYSTEM_SAVE_2_0" },
7796   { 9091, "SYSTEM_SAVE_2_1" },
7797   { 9092, "SYSTEM_SAVE_2_2" },
7798   { 9093, "SYSTEM_SAVE_2_3" },
7799   { 9216, "MPL_INTCTRL_1_SET_0" },
7800   { 9217, "MPL_INTCTRL_1_SET_1" },
7801   { 9218, "MPL_INTCTRL_1_SET_2" },
7802   { 9219, "MPL_INTCTRL_1_SET_3" },
7803   { 9220, "MPL_INTCTRL_1" },
7804   { 9221, "INTCTRL_1_STATUS" },
7805   { 9222, "INTERRUPT_MASK_1" },
7806   { 9223, "INTERRUPT_MASK_RESET_1" },
7807   { 9224, "INTERRUPT_MASK_SET_1" },
7808   { 9225, "INTERRUPT_VECTOR_BASE_1" },
7809   { 9226, "SINGLE_STEP_EN_0_1" },
7810   { 9227, "SINGLE_STEP_EN_1_1" },
7811   { 9228, "SINGLE_STEP_EN_2_1" },
7812   { 9229, "SINGLE_STEP_EN_3_1" },
7813   { 9344, "EX_CONTEXT_1_0" },
7814   { 9345, "EX_CONTEXT_1_1" },
7815   { 9346, "SYSTEM_SAVE_1_0" },
7816   { 9347, "SYSTEM_SAVE_1_1" },
7817   { 9348, "SYSTEM_SAVE_1_2" },
7818   { 9349, "SYSTEM_SAVE_1_3" },
7819   { 9472, "MPL_INTCTRL_0_SET_0" },
7820   { 9473, "MPL_INTCTRL_0_SET_1" },
7821   { 9474, "MPL_INTCTRL_0_SET_2" },
7822   { 9475, "MPL_INTCTRL_0_SET_3" },
7823   { 9476, "MPL_INTCTRL_0" },
7824   { 9477, "INTCTRL_0_STATUS" },
7825   { 9478, "INTERRUPT_MASK_0" },
7826   { 9479, "INTERRUPT_MASK_RESET_0" },
7827   { 9480, "INTERRUPT_MASK_SET_0" },
7828   { 9481, "INTERRUPT_VECTOR_BASE_0" },
7829   { 9482, "SINGLE_STEP_EN_0_0" },
7830   { 9483, "SINGLE_STEP_EN_1_0" },
7831   { 9484, "SINGLE_STEP_EN_2_0" },
7832   { 9485, "SINGLE_STEP_EN_3_0" },
7833   { 9600, "EX_CONTEXT_0_0" },
7834   { 9601, "EX_CONTEXT_0_1" },
7835   { 9602, "SYSTEM_SAVE_0_0" },
7836   { 9603, "SYSTEM_SAVE_0_1" },
7837   { 9604, "SYSTEM_SAVE_0_2" },
7838   { 9605, "SYSTEM_SAVE_0_3" },
7839   { 9728, "MPL_BOOT_ACCESS_SET_0" },
7840   { 9729, "MPL_BOOT_ACCESS_SET_1" },
7841   { 9730, "MPL_BOOT_ACCESS_SET_2" },
7842   { 9731, "MPL_BOOT_ACCESS_SET_3" },
7843   { 9732, "MPL_BOOT_ACCESS" },
7844   { 9733, "BIG_ENDIAN_CONFIG" },
7845   { 9734, "CACHE_INVALIDATION_COMPRESSION_MODE" },
7846   { 9735, "CACHE_INVALIDATION_MASK_0" },
7847   { 9736, "CACHE_INVALIDATION_MASK_1" },
7848   { 9737, "CACHE_INVALIDATION_MASK_2" },
7849   { 9738, "CBOX_CACHEASRAM_CONFIG" },
7850   { 9739, "CBOX_CACHE_CONFIG" },
7851   { 9740, "CBOX_HOME_MAP_ADDR" },
7852   { 9741, "CBOX_HOME_MAP_DATA" },
7853   { 9742, "CBOX_MMAP_0" },
7854   { 9743, "CBOX_MMAP_1" },
7855   { 9744, "CBOX_MMAP_2" },
7856   { 9745, "CBOX_MMAP_3" },
7857   { 9746, "CBOX_MSR" },
7858   { 9747, "DIAG_BCST_CTL" },
7859   { 9748, "DIAG_BCST_MASK" },
7860   { 9749, "DIAG_BCST_TRIGGER" },
7861   { 9750, "DIAG_MUX_CTL" },
7862   { 9751, "DIAG_TRACE_CTL" },
7863   { 9752, "DIAG_TRACE_DATA" },
7864   { 9753, "DIAG_TRACE_STS" },
7865   { 9754, "IDN_DEMUX_BUF_THRESH" },
7866   { 9755, "L1_I_PIN_WAY_0" },
7867   { 9756, "MEM_ROUTE_ORDER" },
7868   { 9757, "MEM_STRIPE_CONFIG" },
7869   { 9758, "PERF_COUNT_PLS" },
7870   { 9759, "PSEUDO_RANDOM_NUMBER_MODIFY" },
7871   { 9760, "QUIESCE_CTL" },
7872   { 9761, "RSHIM_COORD" },
7873   { 9762, "SBOX_CONFIG" },
7874   { 9763, "UDN_DEMUX_BUF_THRESH" },
7875   { 9764, "XDN_CORE_STARVATION_COUNT" },
7876   { 9765, "XDN_ROUND_ROBIN_ARB_CTL" },
7877   { 9856, "CYCLE_MODIFY" },
7878   { 9857, "I_AAR" },
7879   { 9984, "MPL_WORLD_ACCESS_SET_0" },
7880   { 9985, "MPL_WORLD_ACCESS_SET_1" },
7881   { 9986, "MPL_WORLD_ACCESS_SET_2" },
7882   { 9987, "MPL_WORLD_ACCESS_SET_3" },
7883   { 9988, "MPL_WORLD_ACCESS" },
7884   { 9989, "DONE" },
7885   { 9990, "DSTREAM_PF" },
7886   { 9991, "FAIL" },
7887   { 9992, "INTERRUPT_CRITICAL_SECTION" },
7888   { 9993, "PASS" },
7889   { 9994, "PSEUDO_RANDOM_NUMBER" },
7890   { 9995, "TILE_COORD" },
7891   { 9996, "TILE_RTF_HWM" },
7892   { 10112, "CMPEXCH_VALUE" },
7893   { 10113, "CYCLE" },
7894   { 10114, "EVENT_BEGIN" },
7895   { 10115, "EVENT_END" },
7896   { 10116, "PROC_STATUS" },
7897   { 10117, "SIM_CONTROL" },
7898   { 10118, "SIM_SOCKET" },
7899   { 10119, "STATUS_SATURATE" },
7900   { 10240, "MPL_I_ASID_SET_0" },
7901   { 10241, "MPL_I_ASID_SET_1" },
7902   { 10242, "MPL_I_ASID_SET_2" },
7903   { 10243, "MPL_I_ASID_SET_3" },
7904   { 10244, "MPL_I_ASID" },
7905   { 10245, "I_ASID" },
7906   { 10496, "MPL_D_ASID_SET_0" },
7907   { 10497, "MPL_D_ASID_SET_1" },
7908   { 10498, "MPL_D_ASID_SET_2" },
7909   { 10499, "MPL_D_ASID_SET_3" },
7910   { 10500, "MPL_D_ASID" },
7911   { 10501, "D_ASID" },
7912   { 10752, "MPL_DOUBLE_FAULT_SET_0" },
7913   { 10753, "MPL_DOUBLE_FAULT_SET_1" },
7914   { 10754, "MPL_DOUBLE_FAULT_SET_2" },
7915   { 10755, "MPL_DOUBLE_FAULT_SET_3" },
7916   { 10756, "MPL_DOUBLE_FAULT" },
7917   { 10757, "LAST_INTERRUPT_REASON" },
7918 };
7919
7920 const int tilegx_num_sprs = 441;
7921
7922 #endif /* DISASM_ONLY */
7923
7924 #ifndef DISASM_ONLY
7925
7926 #include <stdlib.h>
7927
7928 static int
7929 tilegx_spr_compare (const void *a_ptr, const void *b_ptr)
7930 {
7931   const struct tilegx_spr *a = (const struct tilegx_spr *) a_ptr;
7932   const struct tilegx_spr *b = (const struct tilegx_spr *) b_ptr;
7933   return (a->number - b->number);
7934 }
7935
7936 const char *
7937 get_tilegx_spr_name (int num)
7938 {
7939   void *result;
7940   struct tilegx_spr key;
7941
7942   key.number = num;
7943   result = bsearch ((const void *) &key, (const void *) tilegx_sprs,
7944                     tilegx_num_sprs, sizeof (struct tilegx_spr),
7945                     tilegx_spr_compare);
7946
7947   if (result == NULL)
7948     return NULL;
7949
7950   {
7951     struct tilegx_spr *result_ptr = (struct tilegx_spr *) result;
7952
7953     return result_ptr->name;
7954   }
7955 }
7956
7957 /* Canonical name of each register.  */
7958 const char * const tilegx_register_names[] =
7959 {
7960   "r0",   "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
7961   "r8",   "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
7962   "r16",  "r17", "r18", "r19", "r20", "r21", "r22", "r23",
7963   "r24",  "r25", "r26", "r27", "r28", "r29", "r30", "r31",
7964   "r32",  "r33", "r34", "r35", "r36", "r37", "r38", "r39",
7965   "r40",  "r41", "r42", "r43", "r44", "r45", "r46", "r47",
7966   "r48",  "r49", "r50", "r51", "r52", "tp",  "sp",  "lr",
7967   "sn",  "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero"
7968 };
7969
7970 #endif /* not DISASM_ONLY */
7971
7972
7973 /* Given a set of bundle bits and the lookup FSM for a specific pipe,
7974    returns which instruction the bundle contains in that pipe.  */
7975
7976 static const struct tilegx_opcode *
7977 find_opcode (tilegx_bundle_bits bits, const unsigned short *table)
7978 {
7979   int i = 0;
7980
7981   while (1)
7982     {
7983       unsigned short bitspec = table[i];
7984       unsigned int bitfield =
7985         ((unsigned int)(bits >> (bitspec & 63))) & (bitspec >> 6);
7986
7987       unsigned short next = table[i + 1 + bitfield];
7988       if (next <= TILEGX_OPC_NONE)
7989         return & tilegx_opcodes[next];
7990
7991       i = next - TILEGX_OPC_NONE;
7992     }
7993 }
7994
7995 int
7996 parse_insn_tilegx (tilegx_bundle_bits bits,
7997                    unsigned long long pc,
7998                    struct tilegx_decoded_instruction
7999                    decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE])
8000 {
8001   int num_instructions = 0;
8002   int pipe;
8003   int min_pipe, max_pipe;
8004
8005   if ((bits & TILEGX_BUNDLE_MODE_MASK) == 0)
8006     {
8007       min_pipe = TILEGX_PIPELINE_X0;
8008       max_pipe = TILEGX_PIPELINE_X1;
8009     }
8010   else
8011     {
8012       min_pipe = TILEGX_PIPELINE_Y0;
8013       max_pipe = TILEGX_PIPELINE_Y2;
8014     }
8015
8016   /* For each pipe, find an instruction that fits.  */
8017   for (pipe = min_pipe; pipe <= max_pipe; pipe++)
8018     {
8019       const struct tilegx_opcode *opc;
8020       struct tilegx_decoded_instruction *d;
8021       int i;
8022
8023       d = &decoded[num_instructions++];
8024       opc = find_opcode (bits, tilegx_bundle_decoder_fsms[pipe]);
8025       d->opcode = opc;
8026
8027       /* Decode each operand, sign extending, etc. as appropriate.  */
8028       for (i = 0; i < opc->num_operands; i++)
8029         {
8030           const struct tilegx_operand *op =
8031             &tilegx_operands[opc->operands[pipe][i]];
8032           int raw_opval = op->extract (bits);
8033           long long opval;
8034
8035           if (op->is_signed)
8036             {
8037               /* Sign-extend the operand.  */
8038               int shift = (int)((sizeof(int) * 8) - op->num_bits);
8039               raw_opval = (raw_opval << shift) >> shift;
8040             }
8041
8042           /* Adjust PC-relative scaled branch offsets.  */
8043           if (op->type == TILEGX_OP_TYPE_ADDRESS)
8044             opval = (raw_opval * TILEGX_BUNDLE_SIZE_IN_BYTES) + pc;
8045           else
8046             opval = raw_opval;
8047
8048           /* Record the final value.  */
8049           d->operands[i] = op;
8050           d->operand_values[i] = opval;
8051         }
8052     }
8053
8054   return num_instructions;
8055 }