gas/testsuite/gas/arm/sp-pc-usage-t.s

   1 .arch armv7-r
   2 .syntax unified
   3 .text
   4 .thumb
   5         .global foo
   6 foo:
   7 @ Section A6.1.3 "Use of 0b1101 as a register specifier".
   8
   9 @ R13 as the source or destination register of a mov instruction.
  10 @ only register to register transfers without shifts are supported,
  11 @ with no flag setting
  12
  13 mov     sp,r0
  14 mov     r0,sp
  15
  16 @ Using the following instructions to adjust r13 up or down by a
  17 @ multiple of 4:
  18
  19 add     sp,sp,#0
  20 addw    sp,sp,#0
  21 sub     sp,sp,#0
  22 subw    sp,sp,#0
  23 add     sp,sp,r0
  24 add     sp,sp,r0,lsl #1
  25 sub     sp,sp,r0
  26 sub     sp,sp,r0,lsl #1
  27
  28 @ R13 as a base register <Rn> of any load/store instruction.
  29
  30 ldr     r0, [sp]
  31 ldr     r0, [pc]
  32 ldr     pc, [r0]
  33 ldr     sp, [r0]
  34 ldr     pc, [pc]
  35 ldr     sp, [sp]
  36 ldr     pc, [sp]
  37 ldr     sp, [pc]
  38 ldr     sp, [r0, +pc]
  39
  40 str     r0, [sp]
  41 str     sp, [r0]
  42 str     sp, [sp]
  43 str     sp, [r0, +pc]
  44
  45 @ R13 as the first operand <Rn> in any add{s}, cmn, cmp, or sub{s} instruction.
  46
  47 add     r0, sp, r0
  48 adds    r0, sp, r0
  49 add     r0, sp, r0, lsl #1
  50 adds    r0, sp, r0, lsl #1
  51
  52 cmn     sp, #0
  53 cmn     sp, r0
  54 cmn     sp, r0, lsl #1
  55 cmp     sp, #0
  56 cmp     sp, r0
  57 cmp     sp, r0, lsl #1
  58
  59 sub     sp, #0
  60 subs    sp, #0
  61 sub     r0, sp, #0
  62 subs    r0, sp, #0
  63
  64 @ ADD (sp plus immediate).
  65
  66 add     sp, #4
  67 add     r0, sp, #4
  68 adds    sp, #4
  69 adds    r0, sp, #4
  70 addw    r0, sp, #4
  71
  72 add     sp, sp, #4
  73 adds    sp, sp, #4
  74 addw    sp, sp, #4
  75
  76 @ ADD (sp plus register).
  77
  78 add     sp, r0
  79 add     r0, sp, r0
  80 add     r0, sp, r0, lsl #1
  81 adds    sp, r0
  82 adds    r0, sp, r0
  83 adds    r0, sp, r0, lsl #1
  84
  85 add     sp, sp, r0
  86 add     sp, sp, r0, lsl #1
  87 adds    sp, sp, r0
  88 adds    sp, sp, r0, lsl #1
  89
  90 add     sp, sp, sp
  91
  92 @ SUB (sp minus immediate).
  93
  94 sub     r0, sp , #0
  95 subs    r0, sp , #0
  96 subw    r0, sp , #0
  97
  98 sub     sp, sp , #0
  99 subs    sp, sp , #0
 100 subw    sp, sp , #0
 101
 102 @ SUB (sp minus register).
 103
 104 sub     sp, #0
 105 subs    sp, #0
 106 sub     r0, sp, r0, lsl #1
 107 subs    r0, sp, r0, lsl #1
 108
 109 sub     sp, sp, r0, lsl #1
 110 subs    sp, sp, r0, lsl #1
 111
 112 @ PC-related insns (equivalent to adr).
 113
 114 add     r0, pc, #4
 115 sub     r0, pc, #4
 116 adds    r0, pc, #4
 117 subs    r0, pc, #4
 118 addw    r0, pc, #4
 119 subw    r0, pc, #4
 120
 121 @ nops to pad the section out to an alignment boundary.
 122
 123 nop
 124 nop
 125 nop