opcodes/fr30-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4    THIS FILE IS MACHINE GENERATED WITH CGEN.
   5    - the resultant file is machine generated, cgen-dis.in isn't
   6
   7    Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
   8    2008  Free Software Foundation, Inc.
   9
  10    This file is part of libopcodes.
  11
  12    This library is free software; you can redistribute it and/or modify
  13    it under the terms of the GNU General Public License as published by
  14    the Free Software Foundation; either version 3, or (at your option)
  15    any later version.
  16
  17    It is distributed in the hope that it will be useful, but WITHOUT
  18    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  19    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  20    License for more details.
  21
  22    You should have received a copy of the GNU General Public License
  23    along with this program; if not, write to the Free Software Foundation, Inc.,
  24    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  25
  26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  27    Keep that in mind.  */
  28
  29 #include "sysdep.h"
  30 #include <stdio.h>
  31 #include "ansidecl.h"
  32 #include "dis-asm.h"
  33 #include "bfd.h"
  34 #include "symcat.h"
  35 #include "libiberty.h"
  36 #include "fr30-desc.h"
  37 #include "fr30-opc.h"
  38 #include "opintl.h"
  39
  40 /* Default text to print if an instruction isn't recognized.  */
  41 #define UNKNOWN_INSN_MSG _("*unknown*")
  42
  43 static void print_normal
  44   (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
  45 static void print_address
  46   (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
  47 static void print_keyword
  48   (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
  49 static void print_insn_normal
  50   (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
  51 static int print_insn
  52   (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
  53 static int default_print_insn
  54   (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
  55 static int read_insn
  56   (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
  57    unsigned long *);
  58 \f
  59 /* -- disassembler routines inserted here.  */
  60
  61 /* -- dis.c */
  62 static void
  63 print_register_list (void * dis_info,
  64                      long value,
  65                      long offset,
  66                      int load_store) /* 0 == load, 1 == store.  */
  67 {
  68   disassemble_info *info = dis_info;
  69   int mask;
  70   int reg_index = 0;
  71   char * comma = "";
  72
  73   if (load_store)
  74     mask = 0x80;
  75   else
  76     mask = 1;
  77
  78   if (value & mask)
  79     {
  80       (*info->fprintf_func) (info->stream, "r%li", reg_index + offset);
  81       comma = ",";
  82     }
  83
  84   for (reg_index = 1; reg_index <= 7; ++reg_index)
  85     {
  86       if (load_store)
  87         mask >>= 1;
  88       else
  89         mask <<= 1;
  90
  91       if (value & mask)
  92         {
  93           (*info->fprintf_func) (info->stream, "%sr%li", comma, reg_index + offset);
  94           comma = ",";
  95         }
  96     }
  97 }
  98
  99 static void
 100 print_hi_register_list_ld (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 101                            void * dis_info,
 102                            long value,
 103                            unsigned int attrs ATTRIBUTE_UNUSED,
 104                            bfd_vma pc ATTRIBUTE_UNUSED,
 105                            int length ATTRIBUTE_UNUSED)
 106 {
 107   print_register_list (dis_info, value, 8, 0 /* Load.  */);
 108 }
 109
 110 static void
 111 print_low_register_list_ld (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 112                             void * dis_info,
 113                             long value,
 114                             unsigned int attrs ATTRIBUTE_UNUSED,
 115                             bfd_vma pc ATTRIBUTE_UNUSED,
 116                             int length ATTRIBUTE_UNUSED)
 117 {
 118   print_register_list (dis_info, value, 0, 0 /* Load.  */);
 119 }
 120
 121 static void
 122 print_hi_register_list_st (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 123                            void * dis_info,
 124                            long value,
 125                            unsigned int attrs ATTRIBUTE_UNUSED,
 126                            bfd_vma pc ATTRIBUTE_UNUSED,
 127                            int length ATTRIBUTE_UNUSED)
 128 {
 129   print_register_list (dis_info, value, 8, 1 /* Store.  */);
 130 }
 131
 132 static void
 133 print_low_register_list_st (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 134                             void * dis_info,
 135                             long value,
 136                             unsigned int attrs ATTRIBUTE_UNUSED,
 137                             bfd_vma pc ATTRIBUTE_UNUSED,
 138                             int length ATTRIBUTE_UNUSED)
 139 {
 140   print_register_list (dis_info, value, 0, 1 /* Store.  */);
 141 }
 142
 143 static void
 144 print_m4 (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 145           void * dis_info,
 146           long value,
 147           unsigned int attrs ATTRIBUTE_UNUSED,
 148           bfd_vma pc ATTRIBUTE_UNUSED,
 149           int length ATTRIBUTE_UNUSED)
 150 {
 151   disassemble_info *info = (disassemble_info *) dis_info;
 152
 153   (*info->fprintf_func) (info->stream, "%ld", value);
 154 }
 155 /* -- */
 156
 157 void fr30_cgen_print_operand
 158   (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
 159
 160 /* Main entry point for printing operands.
 161    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
 162    of dis-asm.h on cgen.h.
 163
 164    This function is basically just a big switch statement.  Earlier versions
 165    used tables to look up the function to use, but
 166    - if the table contains both assembler and disassembler functions then
 167      the disassembler contains much of the assembler and vice-versa,
 168    - there's a lot of inlining possibilities as things grow,
 169    - using a switch statement avoids the function call overhead.
 170
 171    This function could be moved into `print_insn_normal', but keeping it
 172    separate makes clear the interface between `print_insn_normal' and each of
 173    the handlers.  */
 174
 175 void
 176 fr30_cgen_print_operand (CGEN_CPU_DESC cd,
 177                            int opindex,
 178                            void * xinfo,
 179                            CGEN_FIELDS *fields,
 180                            void const *attrs ATTRIBUTE_UNUSED,
 181                            bfd_vma pc,
 182                            int length)
 183 {
 184   disassemble_info *info = (disassemble_info *) xinfo;
 185
 186   switch (opindex)
 187     {
 188     case FR30_OPERAND_CRI :
 189       print_keyword (cd, info, & fr30_cgen_opval_cr_names, fields->f_CRi, 0);
 190       break;
 191     case FR30_OPERAND_CRJ :
 192       print_keyword (cd, info, & fr30_cgen_opval_cr_names, fields->f_CRj, 0);
 193       break;
 194     case FR30_OPERAND_R13 :
 195       print_keyword (cd, info, & fr30_cgen_opval_h_r13, 0, 0);
 196       break;
 197     case FR30_OPERAND_R14 :
 198       print_keyword (cd, info, & fr30_cgen_opval_h_r14, 0, 0);
 199       break;
 200     case FR30_OPERAND_R15 :
 201       print_keyword (cd, info, & fr30_cgen_opval_h_r15, 0, 0);
 202       break;
 203     case FR30_OPERAND_RI :
 204       print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Ri, 0);
 205       break;
 206     case FR30_OPERAND_RIC :
 207       print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Ric, 0);
 208       break;
 209     case FR30_OPERAND_RJ :
 210       print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Rj, 0);
 211       break;
 212     case FR30_OPERAND_RJC :
 213       print_keyword (cd, info, & fr30_cgen_opval_gr_names, fields->f_Rjc, 0);
 214       break;
 215     case FR30_OPERAND_RS1 :
 216       print_keyword (cd, info, & fr30_cgen_opval_dr_names, fields->f_Rs1, 0);
 217       break;
 218     case FR30_OPERAND_RS2 :
 219       print_keyword (cd, info, & fr30_cgen_opval_dr_names, fields->f_Rs2, 0);
 220       break;
 221     case FR30_OPERAND_CC :
 222       print_normal (cd, info, fields->f_cc, 0, pc, length);
 223       break;
 224     case FR30_OPERAND_CCC :
 225       print_normal (cd, info, fields->f_ccc, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 226       break;
 227     case FR30_OPERAND_DIR10 :
 228       print_normal (cd, info, fields->f_dir10, 0, pc, length);
 229       break;
 230     case FR30_OPERAND_DIR8 :
 231       print_normal (cd, info, fields->f_dir8, 0, pc, length);
 232       break;
 233     case FR30_OPERAND_DIR9 :
 234       print_normal (cd, info, fields->f_dir9, 0, pc, length);
 235       break;
 236     case FR30_OPERAND_DISP10 :
 237       print_normal (cd, info, fields->f_disp10, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 238       break;
 239     case FR30_OPERAND_DISP8 :
 240       print_normal (cd, info, fields->f_disp8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 241       break;
 242     case FR30_OPERAND_DISP9 :
 243       print_normal (cd, info, fields->f_disp9, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 244       break;
 245     case FR30_OPERAND_I20 :
 246       print_normal (cd, info, fields->f_i20, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 247       break;
 248     case FR30_OPERAND_I32 :
 249       print_normal (cd, info, fields->f_i32, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
 250       break;
 251     case FR30_OPERAND_I8 :
 252       print_normal (cd, info, fields->f_i8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 253       break;
 254     case FR30_OPERAND_LABEL12 :
 255       print_address (cd, info, fields->f_rel12, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 256       break;
 257     case FR30_OPERAND_LABEL9 :
 258       print_address (cd, info, fields->f_rel9, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 259       break;
 260     case FR30_OPERAND_M4 :
 261       print_m4 (cd, info, fields->f_m4, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 262       break;
 263     case FR30_OPERAND_PS :
 264       print_keyword (cd, info, & fr30_cgen_opval_h_ps, 0, 0);
 265       break;
 266     case FR30_OPERAND_REGLIST_HI_LD :
 267       print_hi_register_list_ld (cd, info, fields->f_reglist_hi_ld, 0, pc, length);
 268       break;
 269     case FR30_OPERAND_REGLIST_HI_ST :
 270       print_hi_register_list_st (cd, info, fields->f_reglist_hi_st, 0, pc, length);
 271       break;
 272     case FR30_OPERAND_REGLIST_LOW_LD :
 273       print_low_register_list_ld (cd, info, fields->f_reglist_low_ld, 0, pc, length);
 274       break;
 275     case FR30_OPERAND_REGLIST_LOW_ST :
 276       print_low_register_list_st (cd, info, fields->f_reglist_low_st, 0, pc, length);
 277       break;
 278     case FR30_OPERAND_S10 :
 279       print_normal (cd, info, fields->f_s10, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 280       break;
 281     case FR30_OPERAND_U10 :
 282       print_normal (cd, info, fields->f_u10, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 283       break;
 284     case FR30_OPERAND_U4 :
 285       print_normal (cd, info, fields->f_u4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 286       break;
 287     case FR30_OPERAND_U4C :
 288       print_normal (cd, info, fields->f_u4c, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 289       break;
 290     case FR30_OPERAND_U8 :
 291       print_normal (cd, info, fields->f_u8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 292       break;
 293     case FR30_OPERAND_UDISP6 :
 294       print_normal (cd, info, fields->f_udisp6, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 295       break;
 296
 297     default :
 298       /* xgettext:c-format */
 299       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 300                opindex);
 301     abort ();
 302   }
 303 }
 304
 305 cgen_print_fn * const fr30_cgen_print_handlers[] =
 306 {
 307   print_insn_normal,
 308 };
 309
 310
 311 void
 312 fr30_cgen_init_dis (CGEN_CPU_DESC cd)
 313 {
 314   fr30_cgen_init_opcode_table (cd);
 315   fr30_cgen_init_ibld_table (cd);
 316   cd->print_handlers = & fr30_cgen_print_handlers[0];
 317   cd->print_operand = fr30_cgen_print_operand;
 318 }
 319
 320 \f
 321 /* Default print handler.  */
 322
 323 static void
 324 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 325               void *dis_info,
 326               long value,
 327               unsigned int attrs,
 328               bfd_vma pc ATTRIBUTE_UNUSED,
 329               int length ATTRIBUTE_UNUSED)
 330 {
 331   disassemble_info *info = (disassemble_info *) dis_info;
 332
 333 #ifdef CGEN_PRINT_NORMAL
 334   CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
 335 #endif
 336
 337   /* Print the operand as directed by the attributes.  */
 338   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 339     ; /* nothing to do */
 340   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 341     (*info->fprintf_func) (info->stream, "%ld", value);
 342   else
 343     (*info->fprintf_func) (info->stream, "0x%lx", value);
 344 }
 345
 346 /* Default address handler.  */
 347
 348 static void
 349 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 350                void *dis_info,
 351                bfd_vma value,
 352                unsigned int attrs,
 353                bfd_vma pc ATTRIBUTE_UNUSED,
 354                int length ATTRIBUTE_UNUSED)
 355 {
 356   disassemble_info *info = (disassemble_info *) dis_info;
 357
 358 #ifdef CGEN_PRINT_ADDRESS
 359   CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
 360 #endif
 361
 362   /* Print the operand as directed by the attributes.  */
 363   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 364     ; /* Nothing to do.  */
 365   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 366     (*info->print_address_func) (value, info);
 367   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 368     (*info->print_address_func) (value, info);
 369   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 370     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 371   else
 372     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 373 }
 374
 375 /* Keyword print handler.  */
 376
 377 static void
 378 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 379                void *dis_info,
 380                CGEN_KEYWORD *keyword_table,
 381                long value,
 382                unsigned int attrs ATTRIBUTE_UNUSED)
 383 {
 384   disassemble_info *info = (disassemble_info *) dis_info;
 385   const CGEN_KEYWORD_ENTRY *ke;
 386
 387   ke = cgen_keyword_lookup_value (keyword_table, value);
 388   if (ke != NULL)
 389     (*info->fprintf_func) (info->stream, "%s", ke->name);
 390   else
 391     (*info->fprintf_func) (info->stream, "???");
 392 }
 393 \f
 394 /* Default insn printer.
 395
 396    DIS_INFO is defined as `void *' so the disassembler needn't know anything
 397    about disassemble_info.  */
 398
 399 static void
 400 print_insn_normal (CGEN_CPU_DESC cd,
 401                    void *dis_info,
 402                    const CGEN_INSN *insn,
 403                    CGEN_FIELDS *fields,
 404                    bfd_vma pc,
 405                    int length)
 406 {
 407   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 408   disassemble_info *info = (disassemble_info *) dis_info;
 409   const CGEN_SYNTAX_CHAR_TYPE *syn;
 410
 411   CGEN_INIT_PRINT (cd);
 412
 413   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 414     {
 415       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 416         {
 417           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
 418           continue;
 419         }
 420       if (CGEN_SYNTAX_CHAR_P (*syn))
 421         {
 422           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
 423           continue;
 424         }
 425
 426       /* We have an operand.  */
 427       fr30_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
 428                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
 429     }
 430 }
 431 \f
 432 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
 433    the extract info.
 434    Returns 0 if all is well, non-zero otherwise.  */
 435
 436 static int
 437 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 438            bfd_vma pc,
 439            disassemble_info *info,
 440            bfd_byte *buf,
 441            int buflen,
 442            CGEN_EXTRACT_INFO *ex_info,
 443            unsigned long *insn_value)
 444 {
 445   int status = (*info->read_memory_func) (pc, buf, buflen, info);
 446
 447   if (status != 0)
 448     {
 449       (*info->memory_error_func) (status, pc, info);
 450       return -1;
 451     }
 452
 453   ex_info->dis_info = info;
 454   ex_info->valid = (1 << buflen) - 1;
 455   ex_info->insn_bytes = buf;
 456
 457   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
 458   return 0;
 459 }
 460
 461 /* Utility to print an insn.
 462    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
 463    The result is the size of the insn in bytes or zero for an unknown insn
 464    or -1 if an error occurs fetching data (memory_error_func will have
 465    been called).  */
 466
 467 static int
 468 print_insn (CGEN_CPU_DESC cd,
 469             bfd_vma pc,
 470             disassemble_info *info,
 471             bfd_byte *buf,
 472             unsigned int buflen)
 473 {
 474   CGEN_INSN_INT insn_value;
 475   const CGEN_INSN_LIST *insn_list;
 476   CGEN_EXTRACT_INFO ex_info;
 477   int basesize;
 478
 479   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
 480   basesize = cd->base_insn_bitsize < buflen * 8 ?
 481                                      cd->base_insn_bitsize : buflen * 8;
 482   insn_value = cgen_get_insn_value (cd, buf, basesize);
 483
 484
 485   /* Fill in ex_info fields like read_insn would.  Don't actually call
 486      read_insn, since the incoming buffer is already read (and possibly
 487      modified a la m32r).  */
 488   ex_info.valid = (1 << buflen) - 1;
 489   ex_info.dis_info = info;
 490   ex_info.insn_bytes = buf;
 491
 492   /* The instructions are stored in hash lists.
 493      Pick the first one and keep trying until we find the right one.  */
 494
 495   insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
 496   while (insn_list != NULL)
 497     {
 498       const CGEN_INSN *insn = insn_list->insn;
 499       CGEN_FIELDS fields;
 500       int length;
 501       unsigned long insn_value_cropped;
 502
 503 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 504       /* Not needed as insn shouldn't be in hash lists if not supported.  */
 505       /* Supported by this cpu?  */
 506       if (! fr30_cgen_insn_supported (cd, insn))
 507         {
 508           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 509           continue;
 510         }
 511 #endif
 512
 513       /* Basic bit mask must be correct.  */
 514       /* ??? May wish to allow target to defer this check until the extract
 515          handler.  */
 516
 517       /* Base size may exceed this instruction's size.  Extract the
 518          relevant part from the buffer. */
 519       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
 520           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 521         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
 522                                            info->endian == BFD_ENDIAN_BIG);
 523       else
 524         insn_value_cropped = insn_value;
 525
 526       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
 527           == CGEN_INSN_BASE_VALUE (insn))
 528         {
 529           /* Printing is handled in two passes.  The first pass parses the
 530              machine insn and extracts the fields.  The second pass prints
 531              them.  */
 532
 533           /* Make sure the entire insn is loaded into insn_value, if it
 534              can fit.  */
 535           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
 536               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 537             {
 538               unsigned long full_insn_value;
 539               int rc = read_insn (cd, pc, info, buf,
 540                                   CGEN_INSN_BITSIZE (insn) / 8,
 541                                   & ex_info, & full_insn_value);
 542               if (rc != 0)
 543                 return rc;
 544               length = CGEN_EXTRACT_FN (cd, insn)
 545                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
 546             }
 547           else
 548             length = CGEN_EXTRACT_FN (cd, insn)
 549               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
 550
 551           /* Length < 0 -> error.  */
 552           if (length < 0)
 553             return length;
 554           if (length > 0)
 555             {
 556               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
 557               /* Length is in bits, result is in bytes.  */
 558               return length / 8;
 559             }
 560         }
 561
 562       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 563     }
 564
 565   return 0;
 566 }
 567
 568 /* Default value for CGEN_PRINT_INSN.
 569    The result is the size of the insn in bytes or zero for an unknown insn
 570    or -1 if an error occured fetching bytes.  */
 571
 572 #ifndef CGEN_PRINT_INSN
 573 #define CGEN_PRINT_INSN default_print_insn
 574 #endif
 575
 576 static int
 577 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
 578 {
 579   bfd_byte buf[CGEN_MAX_INSN_SIZE];
 580   int buflen;
 581   int status;
 582
 583   /* Attempt to read the base part of the insn.  */
 584   buflen = cd->base_insn_bitsize / 8;
 585   status = (*info->read_memory_func) (pc, buf, buflen, info);
 586
 587   /* Try again with the minimum part, if min < base.  */
 588   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
 589     {
 590       buflen = cd->min_insn_bitsize / 8;
 591       status = (*info->read_memory_func) (pc, buf, buflen, info);
 592     }
 593
 594   if (status != 0)
 595     {
 596       (*info->memory_error_func) (status, pc, info);
 597       return -1;
 598     }
 599
 600   return print_insn (cd, pc, info, buf, buflen);
 601 }
 602
 603 /* Main entry point.
 604    Print one instruction from PC on INFO->STREAM.
 605    Return the size of the instruction (in bytes).  */
 606
 607 typedef struct cpu_desc_list
 608 {
 609   struct cpu_desc_list *next;
 610   CGEN_BITSET *isa;
 611   int mach;
 612   int endian;
 613   CGEN_CPU_DESC cd;
 614 } cpu_desc_list;
 615
 616 int
 617 print_insn_fr30 (bfd_vma pc, disassemble_info *info)
 618 {
 619   static cpu_desc_list *cd_list = 0;
 620   cpu_desc_list *cl = 0;
 621   static CGEN_CPU_DESC cd = 0;
 622   static CGEN_BITSET *prev_isa;
 623   static int prev_mach;
 624   static int prev_endian;
 625   int length;
 626   CGEN_BITSET *isa;
 627   int mach;
 628   int endian = (info->endian == BFD_ENDIAN_BIG
 629                 ? CGEN_ENDIAN_BIG
 630                 : CGEN_ENDIAN_LITTLE);
 631   enum bfd_architecture arch;
 632
 633   /* ??? gdb will set mach but leave the architecture as "unknown" */
 634 #ifndef CGEN_BFD_ARCH
 635 #define CGEN_BFD_ARCH bfd_arch_fr30
 636 #endif
 637   arch = info->arch;
 638   if (arch == bfd_arch_unknown)
 639     arch = CGEN_BFD_ARCH;
 640
 641   /* There's no standard way to compute the machine or isa number
 642      so we leave it to the target.  */
 643 #ifdef CGEN_COMPUTE_MACH
 644   mach = CGEN_COMPUTE_MACH (info);
 645 #else
 646   mach = info->mach;
 647 #endif
 648
 649 #ifdef CGEN_COMPUTE_ISA
 650   {
 651     static CGEN_BITSET *permanent_isa;
 652
 653     if (!permanent_isa)
 654       permanent_isa = cgen_bitset_create (MAX_ISAS);
 655     isa = permanent_isa;
 656     cgen_bitset_clear (isa);
 657     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
 658   }
 659 #else
 660   isa = info->insn_sets;
 661 #endif
 662
 663   /* If we've switched cpu's, try to find a handle we've used before */
 664   if (cd
 665       && (cgen_bitset_compare (isa, prev_isa) != 0
 666           || mach != prev_mach
 667           || endian != prev_endian))
 668     {
 669       cd = 0;
 670       for (cl = cd_list; cl; cl = cl->next)
 671         {
 672           if (cgen_bitset_compare (cl->isa, isa) == 0 &&
 673               cl->mach == mach &&
 674               cl->endian == endian)
 675             {
 676               cd = cl->cd;
 677               prev_isa = cd->isas;
 678               break;
 679             }
 680         }
 681     }
 682
 683   /* If we haven't initialized yet, initialize the opcode table.  */
 684   if (! cd)
 685     {
 686       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
 687       const char *mach_name;
 688
 689       if (!arch_type)
 690         abort ();
 691       mach_name = arch_type->printable_name;
 692
 693       prev_isa = cgen_bitset_copy (isa);
 694       prev_mach = mach;
 695       prev_endian = endian;
 696       cd = fr30_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
 697                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
 698                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
 699                                  CGEN_CPU_OPEN_END);
 700       if (!cd)
 701         abort ();
 702
 703       /* Save this away for future reference.  */
 704       cl = xmalloc (sizeof (struct cpu_desc_list));
 705       cl->cd = cd;
 706       cl->isa = prev_isa;
 707       cl->mach = mach;
 708       cl->endian = endian;
 709       cl->next = cd_list;
 710       cd_list = cl;
 711
 712       fr30_cgen_init_dis (cd);
 713     }
 714
 715   /* We try to have as much common code as possible.
 716      But at this point some targets need to take over.  */
 717   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
 718      but if not possible try to move this hook elsewhere rather than
 719      have two hooks.  */
 720   length = CGEN_PRINT_INSN (cd, pc, info);
 721   if (length > 0)
 722     return length;
 723   if (length < 0)
 724     return -1;
 725
 726   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 727   return cd->default_insn_bitsize / 8;
 728 }