1 2008-08-28 Jan Beulich <jbeulich@novell.com>
3 * i386-dis.c (dis386): Adjust far return mnemonics.
4 * i386-opc.tbl: Add retf.
5 * i386-tbl.h: Re-generate.
7 2008-08-28 Jan Beulich <jbeulich@novell.com>
9 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
11 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
13 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
14 * ia64-gen.c (lookup_specifier): Likewise.
16 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
17 * ia64-raw.tbl: Likewise.
18 * ia64-waw.tbl: Likewise.
19 * ia64-asmtab.c: Regenerated.
21 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
23 * i386-opc.tbl: Correct fidivr operand size.
25 * i386-tbl.h: Regenerated.
27 2008-08-24 Alan Modra <amodra@bigpond.net.au>
29 * configure.in: Update a number of obsolete autoconf macros.
30 * aclocal.m4: Regenerate.
32 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
34 AVX Programming Reference (August, 2008)
35 * i386-dis.c (PREFIX_VEX_38DB): New.
36 (PREFIX_VEX_38DC): Likewise.
37 (PREFIX_VEX_38DD): Likewise.
38 (PREFIX_VEX_38DE): Likewise.
39 (PREFIX_VEX_38DF): Likewise.
40 (PREFIX_VEX_3ADF): Likewise.
41 (VEX_LEN_38DB_P_2): Likewise.
42 (VEX_LEN_38DC_P_2): Likewise.
43 (VEX_LEN_38DD_P_2): Likewise.
44 (VEX_LEN_38DE_P_2): Likewise.
45 (VEX_LEN_38DF_P_2): Likewise.
46 (VEX_LEN_3ADF_P_2): Likewise.
47 (PREFIX_VEX_3A04): Updated.
48 (VEX_LEN_3A06_P_2): Likewise.
49 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
50 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
51 (x86_64_table): Likewise.
52 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
53 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
56 * i386-opc.tbl: Add AES + AVX instructions.
57 * i386-init.h: Regenerated.
58 * i386-tbl.h: Likewise.
60 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
62 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
63 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
65 2008-08-15 Alan Modra <amodra@bigpond.net.au>
68 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
69 * Makefile.in: Regenerate.
70 * aclocal.m4: Regenerate.
71 * config.in: Regenerate.
72 * configure: Regenerate.
74 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
77 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
79 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
81 * i386-opc.tbl: Add syscall and sysret for Cpu64.
83 * i386-tbl.h: Regenerated.
85 2008-08-04 Alan Modra <amodra@bigpond.net.au>
87 * Makefile.am (POTFILES.in): Set LC_ALL=C.
88 * Makefile.in: Regenerate.
89 * po/POTFILES.in: Regenerate.
91 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
93 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
94 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
95 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
96 * ppc-opc.c (insert_xt6): New static function.
97 (extract_xt6): Likewise.
98 (insert_xa6): Likewise.
99 (extract_xa6: Likewise.
100 (insert_xb6): Likewise.
101 (extract_xb6): Likewise.
102 (insert_xb6s): Likewise.
103 (extract_xb6s): Likewise.
104 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
105 XX3DM_MASK, PPCVSX): New.
106 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
107 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
109 2008-08-01 Pedro Alves <pedro@codesourcery.com>
111 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
112 * Makefile.in: Regenerate.
114 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
116 * i386-reg.tbl: Use Dw2Inval on AVX registers.
117 * i386-tbl.h: Regenerated.
119 2008-07-30 Michael J. Eager <eager@eagercon.com>
121 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
122 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
123 (insert_sprg, PPC405): Use PPC_OPCODE_405.
124 (powerpc_opcodes): Add Xilinx APU related opcodes.
126 2008-07-30 Alan Modra <amodra@bigpond.net.au>
128 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
130 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
132 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
134 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
136 * mips-opc.c (CP): New macro.
137 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
138 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
139 dmtc2 Octeon instructions.
141 2008-07-07 Stan Shebs <stan@codesourcery.com>
143 * dis-init.c (init_disassemble_info): Init endian_code field.
144 * arm-dis.c (print_insn): Disassemble code according to
145 setting of endian_code.
146 (print_insn_big_arm): Detect when BE8 extension flag has been set.
148 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
150 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
153 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
155 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
156 (print_ppc_disassembler_options): Likewise.
157 * ppc-opc.c (PPC464): Define.
158 (powerpc_opcodes): Add mfdcrux and mtdcrux.
160 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
162 * configure: Regenerate.
164 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
166 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
168 (struct dis_private): New.
169 (POWERPC_DIALECT): New define.
170 (powerpc_dialect): Renamed to...
171 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
173 (print_insn_big_powerpc): Update for using structure in
175 (print_insn_little_powerpc): Likewise.
176 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
177 (skip_optional_operands): Likewise.
178 (print_insn_powerpc): Likewise. Remove initialization of dialect.
179 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
180 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
181 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
182 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
183 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
184 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
185 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
186 param to be of type ppc_cpu_t. Update prototype.
188 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
190 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
192 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
193 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
194 syncw, syncws, vm3mulu, vm0 and vmulu.
196 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
197 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
200 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
202 * i386-opc.tbl: Add vmovd with 64bit operand.
203 * i386-tbl.h: Regenerated.
205 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
207 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
209 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
211 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
212 * i386-tbl.h: Regenerated.
214 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
217 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
218 into 32bit and 64bit. Remove Reg64|Qword and add
219 IgnoreSize|No_qSuf on 32bit version.
220 * i386-tbl.h: Regenerated.
222 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
224 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
225 * i386-tbl.h: Regenerated.
227 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
229 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
231 2008-05-14 Alan Modra <amodra@bigpond.net.au>
233 * Makefile.am: Run "make dep-am".
234 * Makefile.in: Regenerate.
236 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
238 * i386-dis.c (MOVBE_Fixup): New.
240 (PREFIX_0F3880): Likewise.
241 (PREFIX_0F3881): Likewise.
242 (PREFIX_0F38F0): Updated.
243 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
244 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
245 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
247 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
249 (cpu_flags): Add CpuMovbe and CpuEPT.
251 * i386-opc.h (CpuMovbe): New.
254 (i386_cpu_flags): Add cpumovbe and cpuept.
256 * i386-opc.tbl: Add entries for movbe and EPT instructions.
257 * i386-init.h: Regenerated.
258 * i386-tbl.h: Likewise.
260 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
262 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
263 the two drem and the two dremu macros.
265 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
267 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
268 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
269 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
270 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
272 2008-04-25 David S. Miller <davem@davemloft.net>
274 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
275 instead of %sys_tick_cmpr, as suggested in architecture manuals.
277 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
279 * aclocal.m4: Regenerate.
280 * configure: Regenerate.
282 2008-04-23 David S. Miller <davem@davemloft.net>
284 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
286 (prefetch_table): Add missing values.
288 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
290 * i386-gen.c (opcode_modifiers): Add NoAVX.
292 * i386-opc.h (NoAVX): New.
294 (i386_opcode_modifier): Add noavx.
296 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
297 instructions which don't have AVX equivalent.
298 * i386-tbl.h: Regenerated.
300 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
302 * i386-dis.c (OP_VEX_FMA): New.
303 (OP_EX_VexImmW): Likewise.
305 (Vex128FMA): Likewise.
306 (EXVexImmW): Likewise.
307 (get_vex_imm8): Likewise.
308 (OP_EX_VexReg): Likewise.
309 (vex_i4_done): Renamed to ...
311 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
312 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
314 (print_insn): Updated.
315 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
316 (OP_REG_VexI4): Check invalid high registers.
318 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
319 Michael Meissner <michael.meissner@amd.com>
321 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
322 * i386-tbl.h: Regenerate from i386-opc.tbl.
324 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
326 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
327 accept Power E500MC instructions.
328 (print_ppc_disassembler_options): Document -Me500mc.
329 * ppc-opc.c (DUIS, DUI, T): New.
330 (XRT, XRTRA): Likewise.
332 (powerpc_opcodes): Add new Power E500MC instructions.
334 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
336 * s390-dis.c (init_disasm): Evaluate disassembler_options.
337 (print_s390_disassembler_options): New function.
338 * disassemble.c (disassembler_usage): Invoke
339 print_s390_disassembler_options.
341 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
343 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
344 of local variables used for mnemonic parsing: prefix, suffix and
347 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
349 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
350 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
351 (s390_crb_extensions): New extensions table.
352 (insertExpandedMnemonic): Handle '$' tag.
353 * s390-opc.txt: Remove conditional jump variants which can now
354 be expanded automatically.
355 Replace '*' tag with '$' in the compare and branch instructions.
357 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
359 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
360 (PREFIX_VEX_3AXX): Likewis.
362 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
364 * i386-opc.tbl: Remove 4 extra blank lines.
366 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
368 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
369 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
370 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
371 * i386-opc.tbl: Likewise.
373 * i386-opc.h (CpuCLMUL): Renamed to ...
376 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
378 * i386-init.h: Regenerated.
380 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
382 * i386-dis.c (OP_E_register): New.
383 (OP_E_memory): Likewise.
385 (OP_EX_Vex): Likewise.
386 (OP_EX_VexW): Likewise.
387 (OP_XMM_Vex): Likewise.
388 (OP_XMM_VexW): Likewise.
389 (OP_REG_VexI4): Likewise.
390 (PCLMUL_Fixup): Likewise.
391 (VEXI4_Fixup): Likewise.
392 (VZERO_Fixup): Likewise.
393 (VCMP_Fixup): Likewise.
394 (VPERMIL2_Fixup): Likewise.
395 (rex_original): Likewise.
396 (rex_ignored): Likewise.
417 (VPERMIL2): Likewise.
418 (xmm_mode): Likewise.
419 (xmmq_mode): Likewise.
420 (ymmq_mode): Likewise.
421 (vex_mode): Likewise.
422 (vex128_mode): Likewise.
423 (vex256_mode): Likewise.
424 (USE_VEX_C4_TABLE): Likewise.
425 (USE_VEX_C5_TABLE): Likewise.
426 (USE_VEX_LEN_TABLE): Likewise.
427 (VEX_C4_TABLE): Likewise.
428 (VEX_C5_TABLE): Likewise.
429 (VEX_LEN_TABLE): Likewise.
430 (REG_VEX_XX): Likewise.
431 (MOD_VEX_XXX): Likewise.
432 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
433 (PREFIX_0F3A44): Likewise.
434 (PREFIX_0F3ADF): Likewise.
435 (PREFIX_VEX_XXX): Likewise.
437 (VEX_OF38): Likewise.
438 (VEX_OF3A): Likewise.
439 (VEX_LEN_XXX): Likewise.
441 (need_vex): Likewise.
442 (need_vex_reg): Likewise.
443 (vex_i4_done): Likewise.
444 (vex_table): Likewise.
445 (vex_len_table): Likewise.
446 (OP_REG_VexI4): Likewise.
447 (vex_cmp_op): Likewise.
448 (pclmul_op): Likewise.
449 (vpermil2_op): Likewise.
452 (PREFIX_0F38F0): Likewise.
453 (PREFIX_0F3A60): Likewise.
454 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
455 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
456 and PREFIX_VEX_XXX entries.
457 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
458 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
460 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
461 Add MOD_VEX_XXX entries.
462 (ckprefix): Initialize rex_original and rex_ignored. Store the
463 REX byte in rex_original.
464 (get_valid_dis386): Handle the implicit prefix in VEX prefix
465 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
466 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
467 calling get_valid_dis386. Use rex_original and rex_ignored when
469 (putop): Handle "XY".
470 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
472 (OP_E_extended): Updated to use OP_E_register and
474 (OP_XMM): Handle VEX.
476 (XMM_Fixup): Likewise.
477 (CMP_Fixup): Use ARRAY_SIZE.
479 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
480 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
481 (operand_type_init): Add OPERAND_TYPE_REGYMM and
482 OPERAND_TYPE_VEX_IMM4.
483 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
484 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
485 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
486 VexImmExt and SSE2AVX.
487 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
489 * i386-opc.h (CpuAVX): New.
491 (CpuCLMUL): Likewise.
502 (Vex3Sources): Likewise.
503 (VexImmExt): Likewise.
507 (Vex_Imm4): Likewise.
508 (Implicit1stXmm0): Likewise.
511 (ByteOkIntel): Likewise.
514 (Unspecified): Likewise.
516 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
517 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
518 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
519 vex3sources, veximmext and sse2avx.
520 (i386_operand_type): Add regymm, ymmword and vex_imm4.
522 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
524 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
526 * i386-init.h: Regenerated.
527 * i386-tbl.h: Likewise.
529 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
531 From Robin Getz <robin.getz@analog.com>
532 * bfin-dis.c (bu32): Typedef.
533 (enum const_forms_t): Add c_uimm32 and c_huimm32.
534 (constant_formats[]): Add uimm32 and huimm16.
539 (luimm16_val): Define.
540 (struct saved_state): Define.
541 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
542 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
543 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
545 (decode_LDIMMhalf_0): Print out the whole register value.
547 From Jie Zhang <jie.zhang@analog.com>
548 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
549 multiply and multiply-accumulate to data register instruction.
551 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
552 c_imm32, c_huimm32e): Define.
553 (constant_formats): Add flags for printing decimal, leading spaces, and
555 (comment, parallel): Add global flags in all disassembly.
556 (fmtconst): Take advantage of new flags, and print default in hex.
557 (fmtconst_val): Likewise.
558 (decode_macfunc): Be consistant with spaces, tabs, comments,
559 capitalization in disassembly, fix minor coding style issues.
560 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
561 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
562 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
563 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
564 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
565 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
566 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
567 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
568 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
569 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
570 _print_insn_bfin, print_insn_bfin): Likewise.
572 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
574 * aclocal.m4: Regenerate.
575 * configure: Likewise.
576 * Makefile.in: Likewise.
578 2008-03-13 Alan Modra <amodra@bigpond.net.au>
580 * Makefile.am: Run "make dep-am".
581 * Makefile.in: Regenerate.
582 * configure: Regenerate.
584 2008-03-07 Alan Modra <amodra@bigpond.net.au>
586 * ppc-opc.c (powerpc_opcodes): Order and format.
588 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
590 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
591 * i386-tbl.h: Regenerated.
593 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
595 * i386-opc.tbl: Disallow 16-bit near indirect branches for
597 * i386-tbl.h: Regenerated.
599 2008-02-21 Jan Beulich <jbeulich@novell.com>
601 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
602 and Fword for far indirect jmp. Allow Reg16 and Word for near
603 indirect jmp on x86-64. Disallow Fword for lcall.
604 * i386-tbl.h: Re-generate.
606 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
608 * cr16-opc.c (cr16_num_optab): Defined
610 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
612 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
613 * i386-init.h: Regenerated.
615 2008-02-14 Nick Clifton <nickc@redhat.com>
618 * configure.in (SHARED_LIBADD): Select the correct host specific
619 file extension for shared libraries.
620 * configure: Regenerate.
622 2008-02-13 Jan Beulich <jbeulich@novell.com>
624 * i386-opc.h (RegFlat): New.
625 * i386-reg.tbl (flat): Add.
626 * i386-tbl.h: Re-generate.
628 2008-02-13 Jan Beulich <jbeulich@novell.com>
630 * i386-dis.c (a_mode): New.
631 (cond_jump_mode): Adjust.
632 (Ma): Change to a_mode.
633 (intel_operand_size): Handle a_mode.
634 * i386-opc.tbl: Allow Dword and Qword for bound.
635 * i386-tbl.h: Re-generate.
637 2008-02-13 Jan Beulich <jbeulich@novell.com>
639 * i386-gen.c (process_i386_registers): Process new fields.
640 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
641 unsigned char. Add dw2_regnum and Dw2Inval.
642 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
644 * i386-tbl.h: Re-generate.
646 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
648 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
649 * i386-init.h: Updated.
651 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
653 * i386-gen.c (cpu_flags): Add CpuXsave.
655 * i386-opc.h (CpuXsave): New.
657 (i386_cpu_flags): Add cpuxsave.
659 * i386-dis.c (MOD_0FAE_REG_4): New.
660 (RM_0F01_REG_2): Likewise.
661 (MOD_0FAE_REG_5): Updated.
662 (RM_0F01_REG_3): Likewise.
663 (reg_table): Use MOD_0FAE_REG_4.
664 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
666 (rm_table): Add RM_0F01_REG_2.
668 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
669 * i386-init.h: Regenerated.
670 * i386-tbl.h: Likewise.
672 2008-02-11 Jan Beulich <jbeulich@novell.com>
674 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
675 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
676 * i386-tbl.h: Re-generate.
678 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
681 * configure: Regenerated.
683 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
685 * mips-dis.c: Update copyright.
686 (mips_arch_choices): Add Octeon.
687 * mips-opc.c: Update copyright.
689 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
691 2008-01-29 Alan Modra <amodra@bigpond.net.au>
693 * ppc-opc.c: Support optional L form mtmsr.
695 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
697 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
699 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
701 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
702 * i386-init.h: Regenerated.
704 2008-01-23 Tristan Gingold <gingold@adacore.com>
706 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
707 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
709 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
711 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
712 (cpu_flags): Likewise.
714 * i386-opc.h (CpuMMX2): Removed.
717 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
718 * i386-init.h: Regenerated.
719 * i386-tbl.h: Likewise.
721 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
723 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
725 * i386-init.h: Regenerated.
727 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
729 * i386-opc.tbl: Use Qword on movddup.
730 * i386-tbl.h: Regenerated.
732 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
734 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
735 * i386-tbl.h: Regenerated.
737 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
739 * i386-dis.c (Mx): New.
740 (PREFIX_0FC3): Likewise.
741 (PREFIX_0FC7_REG_6): Updated.
742 (dis386_twobyte): Use PREFIX_0FC3.
743 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
744 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
747 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
749 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
750 (operand_types): Add Mem.
752 * i386-opc.h (IntelSyntax): New.
753 * i386-opc.h (Mem): New.
755 (Opcode_Modifier_Max): Updated.
756 (i386_opcode_modifier): Add intelsyntax.
757 (i386_operand_type): Add mem.
759 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
762 * i386-reg.tbl: Add size for accumulator.
764 * i386-init.h: Regenerated.
765 * i386-tbl.h: Likewise.
767 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
769 * i386-opc.h (Byte): Fix a typo.
771 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
774 * i386-gen.c (operand_type_init): Add Dword to
775 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
776 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
778 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
779 Xmmword, Unspecified and Anysize.
780 (set_bitfield): Make Mmword an alias of Qword. Make Oword
783 * i386-opc.h (CheckSize): Removed.
791 (i386_opcode_modifier): Remove checksize, byte, word, dword,
795 (Unspecified): Likewise.
797 (i386_operand_type): Add byte, word, dword, fword, qword,
798 tbyte xmmword, unspecified and anysize.
800 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
801 Tbyte, Xmmword, Unspecified and Anysize.
803 * i386-reg.tbl: Add size for accumulator.
805 * i386-init.h: Regenerated.
806 * i386-tbl.h: Likewise.
808 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
810 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
812 (reg_table): Updated.
813 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
814 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
816 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
818 * i386-gen.c (set_bitfield): Use fail () on error.
820 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
822 * i386-gen.c (lineno): New.
823 (filename): Likewise.
824 (set_bitfield): Report filename and line numer on error.
825 (process_i386_opcodes): Set filename and update lineno.
826 (process_i386_registers): Likewise.
828 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
830 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
833 * i386-opc.h (IntelMnemonic): Renamed to ..
835 (Opcode_Modifier_Max): Updated.
836 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
839 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
840 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
841 * i386-tbl.h: Regenerated.
843 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
845 * i386-gen.c: Update copyright to 2008.
846 * i386-opc.h: Likewise.
847 * i386-opc.tbl: Likewise.
849 * i386-init.h: Regenerated.
850 * i386-tbl.h: Likewise.
852 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
854 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
855 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
856 * i386-tbl.h: Regenerated.
858 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
860 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
862 (cpu_flags): Likewise.
864 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
865 (CpuSSE4_2_Or_ABM): Likewise.
867 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
869 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
870 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
871 and CpuPadLock, respectively.
872 * i386-init.h: Regenerated.
873 * i386-tbl.h: Likewise.
875 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
877 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
879 * i386-opc.h (No_xSuf): Removed.
880 (CheckSize): Updated.
882 * i386-tbl.h: Regenerated.
884 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
886 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
887 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
889 (cpu_flags): Add CpuSSE4_2_Or_ABM.
891 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
893 (i386_cpu_flags): Add cpusse4_2_or_abm.
895 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
896 CpuABM|CpuSSE4_2 on popcnt.
897 * i386-init.h: Regenerated.
898 * i386-tbl.h: Likewise.
900 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
902 * i386-opc.h: Update comments.
904 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
906 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
907 * i386-opc.h: Likewise.
908 * i386-opc.tbl: Likewise.
910 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
913 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
914 Byte, Word, Dword, QWord and Xmmword.
916 * i386-opc.h (No_xSuf): New.
917 (CheckSize): Likewise.
924 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
925 Dword, QWord and Xmmword.
927 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
929 * i386-tbl.h: Regenerated.
931 2008-01-02 Mark Kettenis <kettenis@gnu.org>
933 * m88k-dis.c (instructions): Fix fcvt.* instructions.
936 For older changes see ChangeLog-2007
942 version-control: never