1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
59 template<bool big_endian
>
60 class Output_data_plt_arm
;
62 template<bool big_endian
>
65 template<bool big_endian
>
66 class Arm_input_section
;
68 class Arm_exidx_cantunwind
;
70 class Arm_exidx_merged_section
;
72 class Arm_exidx_fixup
;
74 template<bool big_endian
>
75 class Arm_output_section
;
77 class Arm_exidx_input_section
;
79 template<bool big_endian
>
82 template<bool big_endian
>
86 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
88 // Maximum branch offsets for ARM, THUMB and THUMB2.
89 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
90 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
91 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
92 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
93 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
94 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
96 // The arm target class.
98 // This is a very simple port of gold for ARM-EABI. It is intended for
99 // supporting Android only for the time being.
102 // - Support the following relocation types as needed:
105 // R_ARM_LDR_SBREL_11_0_NC
106 // R_ARM_ALU_SBREL_19_12_NC
107 // R_ARM_ALU_SBREL_27_20_CK
109 // R_ARM_THM_ALU_PREL_11_0
112 // R_ARM_MOVW_BREL_NC
115 // R_ARM_THM_MOVW_BREL_NC
116 // R_ARM_THM_MOVT_BREL
117 // R_ARM_THM_MOVW_BREL
131 // - Make PLTs more flexible for different architecture features like
133 // There are probably a lot more.
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE
,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data
)
159 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data
)
169 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data
, int reloc_addend
)
174 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
178 static const Insn_template
179 arm_insn(uint32_t data
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data
, int reloc_addend
)
184 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
186 static const Insn_template
187 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
188 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_
; }
197 // Return the instruction sequence type of this.
200 { return this->type_
; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_
; }
209 { return this->reloc_addend_
; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
224 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_
;
234 // Relocation addend.
235 int32_t reloc_addend_
;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
270 // Last reloc stub type.
271 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
279 arm_stub_type_last
= arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type
, const Insn_template
*, size_t);
298 { return this->type_
; }
300 // Return an array of instruction templates.
303 { return this->insns_
; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_
; }
310 // Return size of template in bytes.
313 { return this->size_
; }
315 // Return alignment of the stub template.
318 { return this->alignment_
; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_
; }
325 // Return number of relocations in this template.
328 { return this->relocs_
.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i
) const
334 gold_assert(i
< this->relocs_
.size());
335 return this->relocs_
[i
].first
;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i
) const
343 gold_assert(i
< this->relocs_
.size());
344 return this->relocs_
[i
].second
;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair
<size_t, section_size_type
> Reloc
;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template
&);
355 Stub_template
& operator=(const Stub_template
&);
359 // Points to an array of Insn_templates.
360 const Insn_template
* insns_
;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_
;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector
<Reloc
> relocs_
;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset
=
384 static_cast<section_offset_type
>(-1);
387 Stub(const Stub_template
* stub_template
)
388 : stub_template_(stub_template
), offset_(invalid_offset
)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_
; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_
!= invalid_offset
);
405 return this->offset_
;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset
)
411 { this->offset_
= offset
; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i
)
417 { return this->do_reloc_target(i
); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
422 { this->do_write(view
, view_size
, big_endian
); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i
)
428 { return this->do_thumb16_special(i
); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
440 this->do_fixed_endian_write
<true>(view
, view_size
);
442 this->do_fixed_endian_write
<false>(view
, view_size
);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian
>
455 do_fixed_endian_write(unsigned char*, section_size_type
);
458 const Stub_template
* stub_template_
;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_
;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub
: public Stub
469 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_
!= this->invalid_address
);
478 return this->destination_address_
;
481 // Set destination address.
483 set_destination_address(Arm_address address
)
485 gold_assert(address
!= this->invalid_address
);
486 this->destination_address_
= address
;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_
= this->invalid_address
; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
500 Arm_address branch_target
, bool target_is_thumb
);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
513 unsigned int r_sym
, int32_t addend
)
514 : stub_type_(stub_type
), addend_(addend
)
518 this->r_sym_
= Reloc_stub::invalid_index
;
519 this->u_
.symbol
= symbol
;
523 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
524 this->r_sym_
= r_sym
;
525 this->u_
.relobj
= relobj
;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_
; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_
; }
545 // Return the symbol if there is one.
548 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
550 // Return the relobj if there is one.
553 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
555 // Whether this equals to another key k.
557 eq(const Key
& k
) const
559 return ((this->stub_type_
== k
.stub_type_
)
560 && (this->r_sym_
== k
.r_sym_
)
561 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
562 ? (this->u_
.relobj
== k
.u_
.relobj
)
563 : (this->u_
.symbol
== k
.u_
.symbol
))
564 && (this->addend_
== k
.addend_
));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash
<char>(
574 (this->r_sym_
!= Reloc_stub::invalid_index
)
575 ? this->u_
.relobj
->name().c_str()
576 : this->u_
.symbol
->name())
580 // Functors for STL associative containers.
584 operator()(const Key
& k
) const
585 { return k
.hash_value(); }
591 operator()(const Key
& k1
, const Key
& k2
) const
592 { return k1
.eq(k2
); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_
;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is invalid index. This points to a global symbol.
606 // Otherwise, this points a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj. This is done to avoid making the stub class a template
609 // as most of the stub machinery is endianity-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol
* symbol
;
614 const Relobj
* relobj
;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template
* stub_template
)
623 : Stub(stub_template
), destination_address_(invalid_address
)
629 friend class Stub_factory
;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i
)
636 // All reloc stub have only one relocation.
638 return this->destination_address_
;
642 // Address of destination.
643 Arm_address destination_address_
;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub
: public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_
; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_
; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_
; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_
; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_
; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
705 unsigned int shndx
, Arm_address source_address
,
706 Arm_address destination_address
, uint32_t original_insn
)
707 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
708 source_address_(source_address
| 1U),
709 destination_address_(destination_address
),
710 original_insn_(original_insn
)
713 friend class Stub_factory
;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i
)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
722 // The conditional branch veneer has two relocations.
724 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_
;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_
;
745 // Destination address of the original branch.
746 Arm_address destination_address_
;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_
;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub
: public Stub
759 // Return the associated register.
762 { return this->reg_
; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
767 : Stub(stub_template
), reg_(reg
)
770 friend class Stub_factory
;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
783 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
785 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
789 // A template to implement do_write.
790 template<bool big_endian
>
792 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
794 const Insn_template
* insns
= this->stub_template()->insns();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
797 + (this->reg_
<< 16)));
798 view
+= insns
[0].size();
799 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 (insns
[1].data() + this->reg_
));
801 view
+= insns
[1].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[2].data() + this->reg_
));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory
&
819 static Stub_factory singleton
;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type
) const
827 gold_assert(stub_type
>= arm_stub_reloc_first
828 && stub_type
<= arm_stub_reloc_last
);
829 return new Reloc_stub(this->stub_templates_
[stub_type
]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
835 Arm_address source
, Arm_address destination
,
836 uint32_t original_insn
) const
838 gold_assert(stub_type
>= arm_stub_cortex_a8_first
839 && stub_type
<= arm_stub_cortex_a8_last
);
840 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
841 source
, destination
, original_insn
);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg
) const
849 gold_assert(reg
< 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory
&);
862 Stub_factory
& operator=(Stub_factory
&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian
>
871 class Stub_table
: public Output_data
874 Stub_table(Arm_input_section
<big_endian
>* owner
)
875 : Output_data(), owner_(owner
), reloc_stubs_(), cortex_a8_stubs_(),
876 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
882 // Owner of this stub table.
883 Arm_input_section
<big_endian
>*
885 { return this->owner_
; }
887 // Whether this stub table is empty.
891 return (this->reloc_stubs_
.empty()
892 && this->cortex_a8_stubs_
.empty()
893 && this->arm_v4bx_stubs_
.empty());
896 // Return the current data size.
898 current_data_size() const
899 { return this->current_data_size_for_child(); }
901 // Add a STUB with using KEY. Caller is reponsible for avoid adding
902 // if already a STUB with the same key has been added.
904 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
906 const Stub_template
* stub_template
= stub
->stub_template();
907 gold_assert(stub_template
->type() == key
.stub_type());
908 this->reloc_stubs_
[key
] = stub
;
911 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
912 // Caller is reponsible for avoid adding if already a STUB with the same
913 // address has been added.
915 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
917 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
918 this->cortex_a8_stubs_
.insert(value
);
921 // Add an ARM V4BX relocation stub. A register index will be retrieved
924 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
926 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
927 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
930 // Remove all Cortex-A8 stubs.
932 remove_all_cortex_a8_stubs();
934 // Look up a relocation stub using KEY. Return NULL if there is none.
936 find_reloc_stub(const Reloc_stub::Key
& key
) const
938 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
939 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
942 // Look up an arm v4bx relocation stub using the register index.
943 // Return NULL if there is none.
945 find_arm_v4bx_stub(const uint32_t reg
) const
947 gold_assert(reg
< 0xf);
948 return this->arm_v4bx_stubs_
[reg
];
951 // Relocate stubs in this stub table.
953 relocate_stubs(const Relocate_info
<32, big_endian
>*,
954 Target_arm
<big_endian
>*, Output_section
*,
955 unsigned char*, Arm_address
, section_size_type
);
957 // Update data size and alignment at the end of a relaxation pass. Return
958 // true if either data size or alignment is different from that of the
959 // previous relaxation pass.
961 update_data_size_and_addralign();
963 // Finalize stubs. Set the offsets of all stubs and mark input sections
964 // needing the Cortex-A8 workaround.
968 // Apply Cortex-A8 workaround to an address range.
970 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
971 unsigned char*, Arm_address
,
975 // Write out section contents.
977 do_write(Output_file
*);
979 // Return the required alignment.
982 { return this->prev_addralign_
; }
984 // Reset address and file offset.
986 do_reset_address_and_file_offset()
987 { this->set_current_data_size_for_child(this->prev_data_size_
); }
989 // Set final data size.
991 set_final_data_size()
992 { this->set_data_size(this->current_data_size()); }
995 // Relocate one stub.
997 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
998 Target_arm
<big_endian
>*, Output_section
*,
999 unsigned char*, Arm_address
, section_size_type
);
1001 // Unordered map of relocation stubs.
1003 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1004 Reloc_stub::Key::equal_to
>
1007 // List of Cortex-A8 stubs ordered by addresses of branches being
1008 // fixed up in output.
1009 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1010 // List of Arm V4BX relocation stubs ordered by associated registers.
1011 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1013 // Owner of this stub table.
1014 Arm_input_section
<big_endian
>* owner_
;
1015 // The relocation stubs.
1016 Reloc_stub_map reloc_stubs_
;
1017 // The cortex_a8_stubs.
1018 Cortex_a8_stub_list cortex_a8_stubs_
;
1019 // The Arm V4BX relocation stubs.
1020 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1021 // data size of this in the previous pass.
1022 off_t prev_data_size_
;
1023 // address alignment of this in the previous pass.
1024 uint64_t prev_addralign_
;
1027 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1028 // we add to the end of an EXIDX input section that goes into the output.
1030 class Arm_exidx_cantunwind
: public Output_section_data
1033 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1034 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1037 // Return the object containing the section pointed by this.
1040 { return this->relobj_
; }
1042 // Return the section index of the section pointed by this.
1045 { return this->shndx_
; }
1049 do_write(Output_file
* of
)
1051 if (parameters
->target().is_big_endian())
1052 this->do_fixed_endian_write
<true>(of
);
1054 this->do_fixed_endian_write
<false>(of
);
1058 // Implement do_write for a given endianity.
1059 template<bool big_endian
>
1061 do_fixed_endian_write(Output_file
*);
1063 // The object containing the section pointed by this.
1065 // The section index of the section pointed by this.
1066 unsigned int shndx_
;
1069 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1070 // Offset map is used to map input section offset within the EXIDX section
1071 // to the output offset from the start of this EXIDX section.
1073 typedef std::map
<section_offset_type
, section_offset_type
>
1074 Arm_exidx_section_offset_map
;
1076 // Arm_exidx_merged_section class. This represents an EXIDX input section
1077 // with some of its entries merged.
1079 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1082 // Constructor for Arm_exidx_merged_section.
1083 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1084 // SECTION_OFFSET_MAP points to a section offset map describing how
1085 // parts of the input section are mapped to output. DELETED_BYTES is
1086 // the number of bytes deleted from the EXIDX input section.
1087 Arm_exidx_merged_section(
1088 const Arm_exidx_input_section
& exidx_input_section
,
1089 const Arm_exidx_section_offset_map
& section_offset_map
,
1090 uint32_t deleted_bytes
);
1092 // Return the original EXIDX input section.
1093 const Arm_exidx_input_section
&
1094 exidx_input_section() const
1095 { return this->exidx_input_section_
; }
1097 // Return the section offset map.
1098 const Arm_exidx_section_offset_map
&
1099 section_offset_map() const
1100 { return this->section_offset_map_
; }
1103 // Write merged section into file OF.
1105 do_write(Output_file
* of
);
1108 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1109 section_offset_type
*) const;
1112 // Original EXIDX input section.
1113 const Arm_exidx_input_section
& exidx_input_section_
;
1114 // Section offset map.
1115 const Arm_exidx_section_offset_map
& section_offset_map_
;
1118 // A class to wrap an ordinary input section containing executable code.
1120 template<bool big_endian
>
1121 class Arm_input_section
: public Output_relaxed_input_section
1124 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1125 : Output_relaxed_input_section(relobj
, shndx
, 1),
1126 original_addralign_(1), original_size_(0), stub_table_(NULL
)
1129 ~Arm_input_section()
1136 // Whether this is a stub table owner.
1138 is_stub_table_owner() const
1139 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1141 // Return the stub table.
1142 Stub_table
<big_endian
>*
1144 { return this->stub_table_
; }
1146 // Set the stub_table.
1148 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1149 { this->stub_table_
= stub_table
; }
1151 // Downcast a base pointer to an Arm_input_section pointer. This is
1152 // not type-safe but we only use Arm_input_section not the base class.
1153 static Arm_input_section
<big_endian
>*
1154 as_arm_input_section(Output_relaxed_input_section
* poris
)
1155 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1158 // Write data to output file.
1160 do_write(Output_file
*);
1162 // Return required alignment of this.
1164 do_addralign() const
1166 if (this->is_stub_table_owner())
1167 return std::max(this->stub_table_
->addralign(),
1168 this->original_addralign_
);
1170 return this->original_addralign_
;
1173 // Finalize data size.
1175 set_final_data_size();
1177 // Reset address and file offset.
1179 do_reset_address_and_file_offset();
1183 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1184 section_offset_type offset
,
1185 section_offset_type
* poutput
) const
1187 if ((object
== this->relobj())
1188 && (shndx
== this->shndx())
1190 && (convert_types
<uint64_t, section_offset_type
>(offset
)
1191 <= this->original_size_
))
1201 // Copying is not allowed.
1202 Arm_input_section(const Arm_input_section
&);
1203 Arm_input_section
& operator=(const Arm_input_section
&);
1205 // Address alignment of the original input section.
1206 uint64_t original_addralign_
;
1207 // Section size of the original input section.
1208 uint64_t original_size_
;
1210 Stub_table
<big_endian
>* stub_table_
;
1213 // Arm_exidx_fixup class. This is used to define a number of methods
1214 // and keep states for fixing up EXIDX coverage.
1216 class Arm_exidx_fixup
1219 Arm_exidx_fixup(Output_section
* exidx_output_section
)
1220 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1221 last_inlined_entry_(0), last_input_section_(NULL
),
1222 section_offset_map_(NULL
)
1226 { delete this->section_offset_map_
; }
1228 // Process an EXIDX section for entry merging. Return number of bytes to
1229 // be deleted in output. If parts of the input EXIDX section are merged
1230 // a heap allocated Arm_exidx_section_offset_map is store in the located
1231 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1233 template<bool big_endian
>
1235 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1236 Arm_exidx_section_offset_map
** psection_offset_map
);
1238 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1239 // input section, if there is not one already.
1241 add_exidx_cantunwind_as_needed();
1244 // Copying is not allowed.
1245 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1246 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1248 // Type of EXIDX unwind entry.
1253 // EXIDX_CANTUNWIND.
1254 UT_EXIDX_CANTUNWIND
,
1261 // Process an EXIDX entry. We only care about the second word of the
1262 // entry. Return true if the entry can be deleted.
1264 process_exidx_entry(uint32_t second_word
);
1266 // Update the current section offset map during EXIDX section fix-up.
1267 // If there is no map, create one. INPUT_OFFSET is the offset of a
1268 // reference point, DELETED_BYTES is the number of deleted by in the
1269 // section so far. If DELETE_ENTRY is true, the reference point and
1270 // all offsets after the previous reference point are discarded.
1272 update_offset_map(section_offset_type input_offset
,
1273 section_size_type deleted_bytes
, bool delete_entry
);
1275 // EXIDX output section.
1276 Output_section
* exidx_output_section_
;
1277 // Unwind type of the last EXIDX entry processed.
1278 Unwind_type last_unwind_type_
;
1279 // Last seen inlined EXIDX entry.
1280 uint32_t last_inlined_entry_
;
1281 // Last processed EXIDX input section.
1282 const Arm_exidx_input_section
* last_input_section_
;
1283 // Section offset map created in process_exidx_section.
1284 Arm_exidx_section_offset_map
* section_offset_map_
;
1287 // Arm output section class. This is defined mainly to add a number of
1288 // stub generation methods.
1290 template<bool big_endian
>
1291 class Arm_output_section
: public Output_section
1294 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1296 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1297 elfcpp::Elf_Xword flags
)
1298 : Output_section(name
, type
, flags
)
1301 ~Arm_output_section()
1304 // Group input sections for stub generation.
1306 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*);
1308 // Downcast a base pointer to an Arm_output_section pointer. This is
1309 // not type-safe but we only use Arm_output_section not the base class.
1310 static Arm_output_section
<big_endian
>*
1311 as_arm_output_section(Output_section
* os
)
1312 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1314 // Append all input text sections in this into LIST.
1316 append_text_sections_to_list(Text_section_list
* list
);
1318 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1319 // is a list of text input sections sorted in ascending order of their
1320 // output addresses.
1322 fix_exidx_coverage(const Text_section_list
& sorted_text_section
,
1323 Symbol_table
* symtab
);
1327 typedef Output_section::Input_section Input_section
;
1328 typedef Output_section::Input_section_list Input_section_list
;
1330 // Create a stub group.
1331 void create_stub_group(Input_section_list::const_iterator
,
1332 Input_section_list::const_iterator
,
1333 Input_section_list::const_iterator
,
1334 Target_arm
<big_endian
>*,
1335 std::vector
<Output_relaxed_input_section
*>*);
1338 // Arm_exidx_input_section class. This represents an EXIDX input section.
1340 class Arm_exidx_input_section
1343 static const section_offset_type invalid_offset
=
1344 static_cast<section_offset_type
>(-1);
1346 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1347 unsigned int link
, uint32_t size
, uint32_t addralign
)
1348 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1349 addralign_(addralign
)
1352 ~Arm_exidx_input_section()
1355 // Accessors: This is a read-only class.
1357 // Return the object containing this EXIDX input section.
1360 { return this->relobj_
; }
1362 // Return the section index of this EXIDX input section.
1365 { return this->shndx_
; }
1367 // Return the section index of linked text section in the same object.
1370 { return this->link_
; }
1372 // Return size of the EXIDX input section.
1375 { return this->size_
; }
1377 // Reutnr address alignment of EXIDX input section.
1380 { return this->addralign_
; }
1383 // Object containing this.
1385 // Section index of this.
1386 unsigned int shndx_
;
1387 // text section linked to this in the same object.
1389 // Size of this. For ARM 32-bit is sufficient.
1391 // Address alignment of this. For ARM 32-bit is sufficient.
1392 uint32_t addralign_
;
1395 // Arm_relobj class.
1397 template<bool big_endian
>
1398 class Arm_relobj
: public Sized_relobj
<32, big_endian
>
1401 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1403 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1404 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1405 : Sized_relobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1406 stub_tables_(), local_symbol_is_thumb_function_(),
1407 attributes_section_data_(NULL
), mapping_symbols_info_(),
1408 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_()
1412 { delete this->attributes_section_data_
; }
1414 // Return the stub table of the SHNDX-th section if there is one.
1415 Stub_table
<big_endian
>*
1416 stub_table(unsigned int shndx
) const
1418 gold_assert(shndx
< this->stub_tables_
.size());
1419 return this->stub_tables_
[shndx
];
1422 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1424 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1426 gold_assert(shndx
< this->stub_tables_
.size());
1427 this->stub_tables_
[shndx
] = stub_table
;
1430 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1431 // index. This is only valid after do_count_local_symbol is called.
1433 local_symbol_is_thumb_function(unsigned int r_sym
) const
1435 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1436 return this->local_symbol_is_thumb_function_
[r_sym
];
1439 // Scan all relocation sections for stub generation.
1441 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1444 // Convert regular input section with index SHNDX to a relaxed section.
1446 convert_input_section_to_relaxed_section(unsigned shndx
)
1448 // The stubs have relocations and we need to process them after writing
1449 // out the stubs. So relocation now must follow section write.
1450 this->set_section_offset(shndx
, -1ULL);
1451 this->set_relocs_must_follow_section_writes();
1454 // Downcast a base pointer to an Arm_relobj pointer. This is
1455 // not type-safe but we only use Arm_relobj not the base class.
1456 static Arm_relobj
<big_endian
>*
1457 as_arm_relobj(Relobj
* relobj
)
1458 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1460 // Processor-specific flags in ELF file header. This is valid only after
1463 processor_specific_flags() const
1464 { return this->processor_specific_flags_
; }
1466 // Attribute section data This is the contents of the .ARM.attribute section
1468 const Attributes_section_data
*
1469 attributes_section_data() const
1470 { return this->attributes_section_data_
; }
1472 // Mapping symbol location.
1473 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1475 // Functor for STL container.
1476 struct Mapping_symbol_position_less
1479 operator()(const Mapping_symbol_position
& p1
,
1480 const Mapping_symbol_position
& p2
) const
1482 return (p1
.first
< p2
.first
1483 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1487 // We only care about the first character of a mapping symbol, so
1488 // we only store that instead of the whole symbol name.
1489 typedef std::map
<Mapping_symbol_position
, char,
1490 Mapping_symbol_position_less
> Mapping_symbols_info
;
1492 // Whether a section contains any Cortex-A8 workaround.
1494 section_has_cortex_a8_workaround(unsigned int shndx
) const
1496 return (this->section_has_cortex_a8_workaround_
!= NULL
1497 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1500 // Mark a section that has Cortex-A8 workaround.
1502 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1504 if (this->section_has_cortex_a8_workaround_
== NULL
)
1505 this->section_has_cortex_a8_workaround_
=
1506 new std::vector
<bool>(this->shnum(), false);
1507 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1510 // Return the EXIDX section of an text section with index SHNDX or NULL
1511 // if the text section has no associated EXIDX section.
1512 const Arm_exidx_input_section
*
1513 exidx_input_section_by_link(unsigned int shndx
) const
1515 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1516 return ((p
!= this->exidx_section_map_
.end()
1517 && p
->second
->link() == shndx
)
1522 // Return the EXIDX section with index SHNDX or NULL if there is none.
1523 const Arm_exidx_input_section
*
1524 exidx_input_section_by_shndx(unsigned shndx
) const
1526 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1527 return ((p
!= this->exidx_section_map_
.end()
1528 && p
->second
->shndx() == shndx
)
1534 // Post constructor setup.
1538 // Call parent's setup method.
1539 Sized_relobj
<32, big_endian
>::do_setup();
1541 // Initialize look-up tables.
1542 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1543 this->stub_tables_
.swap(empty_stub_table_list
);
1546 // Count the local symbols.
1548 do_count_local_symbols(Stringpool_template
<char>*,
1549 Stringpool_template
<char>*);
1552 do_relocate_sections(const Symbol_table
* symtab
, const Layout
* layout
,
1553 const unsigned char* pshdrs
,
1554 typename Sized_relobj
<32, big_endian
>::Views
* pivews
);
1556 // Read the symbol information.
1558 do_read_symbols(Read_symbols_data
* sd
);
1560 // Process relocs for garbage collection.
1562 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1566 // Whether a section needs to be scanned for relocation stubs.
1568 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1569 const Relobj::Output_sections
&,
1570 const Symbol_table
*, const unsigned char*);
1572 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1574 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1575 unsigned int, Output_section
*,
1576 const Symbol_table
*);
1578 // Scan a section for the Cortex-A8 erratum.
1580 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1581 unsigned int, Output_section
*,
1582 Target_arm
<big_endian
>*);
1584 // Make a new Arm_exidx_input_section object for EXIDX section with
1585 // index SHNDX and section header SHDR.
1587 make_exidx_input_section(unsigned int shndx
,
1588 const elfcpp::Shdr
<32, big_endian
>& shdr
);
1590 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1591 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1594 // List of stub tables.
1595 Stub_table_list stub_tables_
;
1596 // Bit vector to tell if a local symbol is a thumb function or not.
1597 // This is only valid after do_count_local_symbol is called.
1598 std::vector
<bool> local_symbol_is_thumb_function_
;
1599 // processor-specific flags in ELF file header.
1600 elfcpp::Elf_Word processor_specific_flags_
;
1601 // Object attributes if there is an .ARM.attributes section or NULL.
1602 Attributes_section_data
* attributes_section_data_
;
1603 // Mapping symbols information.
1604 Mapping_symbols_info mapping_symbols_info_
;
1605 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1606 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1607 // Map a text section to its associated .ARM.exidx section, if there is one.
1608 Exidx_section_map exidx_section_map_
;
1611 // Arm_dynobj class.
1613 template<bool big_endian
>
1614 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1617 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1618 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1619 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1620 processor_specific_flags_(0), attributes_section_data_(NULL
)
1624 { delete this->attributes_section_data_
; }
1626 // Downcast a base pointer to an Arm_relobj pointer. This is
1627 // not type-safe but we only use Arm_relobj not the base class.
1628 static Arm_dynobj
<big_endian
>*
1629 as_arm_dynobj(Dynobj
* dynobj
)
1630 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1632 // Processor-specific flags in ELF file header. This is valid only after
1635 processor_specific_flags() const
1636 { return this->processor_specific_flags_
; }
1638 // Attributes section data.
1639 const Attributes_section_data
*
1640 attributes_section_data() const
1641 { return this->attributes_section_data_
; }
1644 // Read the symbol information.
1646 do_read_symbols(Read_symbols_data
* sd
);
1649 // processor-specific flags in ELF file header.
1650 elfcpp::Elf_Word processor_specific_flags_
;
1651 // Object attributes if there is an .ARM.attributes section or NULL.
1652 Attributes_section_data
* attributes_section_data_
;
1655 // Functor to read reloc addends during stub generation.
1657 template<int sh_type
, bool big_endian
>
1658 struct Stub_addend_reader
1660 // Return the addend for a relocation of a particular type. Depending
1661 // on whether this is a REL or RELA relocation, read the addend from a
1662 // view or from a Reloc object.
1663 elfcpp::Elf_types
<32>::Elf_Swxword
1665 unsigned int /* r_type */,
1666 const unsigned char* /* view */,
1667 const typename Reloc_types
<sh_type
,
1668 32, big_endian
>::Reloc
& /* reloc */) const;
1671 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1673 template<bool big_endian
>
1674 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1676 elfcpp::Elf_types
<32>::Elf_Swxword
1679 const unsigned char*,
1680 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1683 // Specialized Stub_addend_reader for RELA type relocation sections.
1684 // We currently do not handle RELA type relocation sections but it is trivial
1685 // to implement the addend reader. This is provided for completeness and to
1686 // make it easier to add support for RELA relocation sections in the future.
1688 template<bool big_endian
>
1689 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1691 elfcpp::Elf_types
<32>::Elf_Swxword
1694 const unsigned char*,
1695 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1696 big_endian
>::Reloc
& reloc
) const
1697 { return reloc
.get_r_addend(); }
1700 // Cortex_a8_reloc class. We keep record of relocation that may need
1701 // the Cortex-A8 erratum workaround.
1703 class Cortex_a8_reloc
1706 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1707 Arm_address destination
)
1708 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1714 // Accessors: This is a read-only class.
1716 // Return the relocation stub associated with this relocation if there is
1720 { return this->reloc_stub_
; }
1722 // Return the relocation type.
1725 { return this->r_type_
; }
1727 // Return the destination address of the relocation. LSB stores the THUMB
1731 { return this->destination_
; }
1734 // Associated relocation stub if there is one, or NULL.
1735 const Reloc_stub
* reloc_stub_
;
1737 unsigned int r_type_
;
1738 // Destination address of this relocation. LSB is used to distinguish
1740 Arm_address destination_
;
1743 // Utilities for manipulating integers of up to 32-bits
1747 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1748 // an int32_t. NO_BITS must be between 1 to 32.
1749 template<int no_bits
>
1750 static inline int32_t
1751 sign_extend(uint32_t bits
)
1753 gold_assert(no_bits
>= 0 && no_bits
<= 32);
1755 return static_cast<int32_t>(bits
);
1756 uint32_t mask
= (~((uint32_t) 0)) >> (32 - no_bits
);
1758 uint32_t top_bit
= 1U << (no_bits
- 1);
1759 int32_t as_signed
= static_cast<int32_t>(bits
);
1760 return (bits
& top_bit
) ? as_signed
+ (-top_bit
* 2) : as_signed
;
1763 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1764 template<int no_bits
>
1766 has_overflow(uint32_t bits
)
1768 gold_assert(no_bits
>= 0 && no_bits
<= 32);
1771 int32_t max
= (1 << (no_bits
- 1)) - 1;
1772 int32_t min
= -(1 << (no_bits
- 1));
1773 int32_t as_signed
= static_cast<int32_t>(bits
);
1774 return as_signed
> max
|| as_signed
< min
;
1777 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1778 // fits in the given number of bits as either a signed or unsigned value.
1779 // For example, has_signed_unsigned_overflow<8> would check
1780 // -128 <= bits <= 255
1781 template<int no_bits
>
1783 has_signed_unsigned_overflow(uint32_t bits
)
1785 gold_assert(no_bits
>= 2 && no_bits
<= 32);
1788 int32_t max
= static_cast<int32_t>((1U << no_bits
) - 1);
1789 int32_t min
= -(1 << (no_bits
- 1));
1790 int32_t as_signed
= static_cast<int32_t>(bits
);
1791 return as_signed
> max
|| as_signed
< min
;
1794 // Select bits from A and B using bits in MASK. For each n in [0..31],
1795 // the n-th bit in the result is chosen from the n-th bits of A and B.
1796 // A zero selects A and a one selects B.
1797 static inline uint32_t
1798 bit_select(uint32_t a
, uint32_t b
, uint32_t mask
)
1799 { return (a
& ~mask
) | (b
& mask
); }
1802 template<bool big_endian
>
1803 class Target_arm
: public Sized_target
<32, big_endian
>
1806 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
1809 // When were are relocating a stub, we pass this as the relocation number.
1810 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
1813 : Sized_target
<32, big_endian
>(&arm_info
),
1814 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
1815 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
), stub_tables_(),
1816 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1817 should_force_pic_veneer_(false), arm_input_section_map_(),
1818 attributes_section_data_(NULL
), fix_cortex_a8_(false),
1819 cortex_a8_relocs_info_()
1822 // Whether we can use BLX.
1825 { return this->may_use_blx_
; }
1827 // Set use-BLX flag.
1829 set_may_use_blx(bool value
)
1830 { this->may_use_blx_
= value
; }
1832 // Whether we force PCI branch veneers.
1834 should_force_pic_veneer() const
1835 { return this->should_force_pic_veneer_
; }
1837 // Set PIC veneer flag.
1839 set_should_force_pic_veneer(bool value
)
1840 { this->should_force_pic_veneer_
= value
; }
1842 // Whether we use THUMB-2 instructions.
1844 using_thumb2() const
1846 Object_attribute
* attr
=
1847 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1848 int arch
= attr
->int_value();
1849 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
1852 // Whether we use THUMB/THUMB-2 instructions only.
1854 using_thumb_only() const
1856 Object_attribute
* attr
=
1857 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1858 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
1859 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
1861 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
1862 return attr
->int_value() == 'M';
1865 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1867 may_use_arm_nop() const
1869 Object_attribute
* attr
=
1870 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1871 int arch
= attr
->int_value();
1872 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
1873 || arch
== elfcpp::TAG_CPU_ARCH_V6K
1874 || arch
== elfcpp::TAG_CPU_ARCH_V7
1875 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
1878 // Whether we have THUMB-2 NOP.W instruction.
1880 may_use_thumb2_nop() const
1882 Object_attribute
* attr
=
1883 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1884 int arch
= attr
->int_value();
1885 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
1886 || arch
== elfcpp::TAG_CPU_ARCH_V7
1887 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
1890 // Process the relocations to determine unreferenced sections for
1891 // garbage collection.
1893 gc_process_relocs(Symbol_table
* symtab
,
1895 Sized_relobj
<32, big_endian
>* object
,
1896 unsigned int data_shndx
,
1897 unsigned int sh_type
,
1898 const unsigned char* prelocs
,
1900 Output_section
* output_section
,
1901 bool needs_special_offset_handling
,
1902 size_t local_symbol_count
,
1903 const unsigned char* plocal_symbols
);
1905 // Scan the relocations to look for symbol adjustments.
1907 scan_relocs(Symbol_table
* symtab
,
1909 Sized_relobj
<32, big_endian
>* object
,
1910 unsigned int data_shndx
,
1911 unsigned int sh_type
,
1912 const unsigned char* prelocs
,
1914 Output_section
* output_section
,
1915 bool needs_special_offset_handling
,
1916 size_t local_symbol_count
,
1917 const unsigned char* plocal_symbols
);
1919 // Finalize the sections.
1921 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
1923 // Return the value to use for a dynamic symbol which requires special
1926 do_dynsym_value(const Symbol
*) const;
1928 // Relocate a section.
1930 relocate_section(const Relocate_info
<32, big_endian
>*,
1931 unsigned int sh_type
,
1932 const unsigned char* prelocs
,
1934 Output_section
* output_section
,
1935 bool needs_special_offset_handling
,
1936 unsigned char* view
,
1937 Arm_address view_address
,
1938 section_size_type view_size
,
1939 const Reloc_symbol_changes
*);
1941 // Scan the relocs during a relocatable link.
1943 scan_relocatable_relocs(Symbol_table
* symtab
,
1945 Sized_relobj
<32, big_endian
>* object
,
1946 unsigned int data_shndx
,
1947 unsigned int sh_type
,
1948 const unsigned char* prelocs
,
1950 Output_section
* output_section
,
1951 bool needs_special_offset_handling
,
1952 size_t local_symbol_count
,
1953 const unsigned char* plocal_symbols
,
1954 Relocatable_relocs
*);
1956 // Relocate a section during a relocatable link.
1958 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
1959 unsigned int sh_type
,
1960 const unsigned char* prelocs
,
1962 Output_section
* output_section
,
1963 off_t offset_in_output_section
,
1964 const Relocatable_relocs
*,
1965 unsigned char* view
,
1966 Arm_address view_address
,
1967 section_size_type view_size
,
1968 unsigned char* reloc_view
,
1969 section_size_type reloc_view_size
);
1971 // Return whether SYM is defined by the ABI.
1973 do_is_defined_by_abi(Symbol
* sym
) const
1974 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
1976 // Return the size of the GOT section.
1980 gold_assert(this->got_
!= NULL
);
1981 return this->got_
->data_size();
1984 // Map platform-specific reloc types
1986 get_real_reloc_type (unsigned int r_type
);
1989 // Methods to support stub-generations.
1992 // Return the stub factory
1994 stub_factory() const
1995 { return this->stub_factory_
; }
1997 // Make a new Arm_input_section object.
1998 Arm_input_section
<big_endian
>*
1999 new_arm_input_section(Relobj
*, unsigned int);
2001 // Find the Arm_input_section object corresponding to the SHNDX-th input
2002 // section of RELOBJ.
2003 Arm_input_section
<big_endian
>*
2004 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2006 // Make a new Stub_table
2007 Stub_table
<big_endian
>*
2008 new_stub_table(Arm_input_section
<big_endian
>*);
2010 // Scan a section for stub generation.
2012 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2013 const unsigned char*, size_t, Output_section
*,
2014 bool, const unsigned char*, Arm_address
,
2019 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2020 Output_section
*, unsigned char*, Arm_address
,
2023 // Get the default ARM target.
2024 static Target_arm
<big_endian
>*
2027 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2028 && parameters
->target().is_big_endian() == big_endian
);
2029 return static_cast<Target_arm
<big_endian
>*>(
2030 parameters
->sized_target
<32, big_endian
>());
2033 // Whether relocation type uses LSB to distinguish THUMB addresses.
2035 reloc_uses_thumb_bit(unsigned int r_type
);
2037 // Whether NAME belongs to a mapping symbol.
2039 is_mapping_symbol_name(const char* name
)
2043 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2044 && (name
[2] == '\0' || name
[2] == '.'));
2047 // Whether we work around the Cortex-A8 erratum.
2049 fix_cortex_a8() const
2050 { return this->fix_cortex_a8_
; }
2052 // Whether we fix R_ARM_V4BX relocation.
2054 // 1 - replace with MOV instruction (armv4 target)
2055 // 2 - make interworking veneer (>= armv4t targets only)
2056 General_options::Fix_v4bx
2058 { return parameters
->options().fix_v4bx(); }
2060 // Scan a span of THUMB code section for Cortex-A8 erratum.
2062 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2063 section_size_type
, section_size_type
,
2064 const unsigned char*, Arm_address
);
2066 // Apply Cortex-A8 workaround to a branch.
2068 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2069 unsigned char*, Arm_address
);
2072 // Make an ELF object.
2074 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2075 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2078 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2079 const elfcpp::Ehdr
<32, !big_endian
>&)
2080 { gold_unreachable(); }
2083 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2084 const elfcpp::Ehdr
<64, false>&)
2085 { gold_unreachable(); }
2088 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2089 const elfcpp::Ehdr
<64, true>&)
2090 { gold_unreachable(); }
2092 // Make an output section.
2094 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2095 elfcpp::Elf_Xword flags
)
2096 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2099 do_adjust_elf_header(unsigned char* view
, int len
) const;
2101 // We only need to generate stubs, and hence perform relaxation if we are
2102 // not doing relocatable linking.
2104 do_may_relax() const
2105 { return !parameters
->options().relocatable(); }
2108 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*);
2110 // Determine whether an object attribute tag takes an integer, a
2113 do_attribute_arg_type(int tag
) const;
2115 // Reorder tags during output.
2117 do_attributes_order(int num
) const;
2120 // The class which scans relocations.
2125 : issued_non_pic_error_(false)
2129 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2130 Sized_relobj
<32, big_endian
>* object
,
2131 unsigned int data_shndx
,
2132 Output_section
* output_section
,
2133 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2134 const elfcpp::Sym
<32, big_endian
>& lsym
);
2137 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2138 Sized_relobj
<32, big_endian
>* object
,
2139 unsigned int data_shndx
,
2140 Output_section
* output_section
,
2141 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2146 unsupported_reloc_local(Sized_relobj
<32, big_endian
>*,
2147 unsigned int r_type
);
2150 unsupported_reloc_global(Sized_relobj
<32, big_endian
>*,
2151 unsigned int r_type
, Symbol
*);
2154 check_non_pic(Relobj
*, unsigned int r_type
);
2156 // Almost identical to Symbol::needs_plt_entry except that it also
2157 // handles STT_ARM_TFUNC.
2159 symbol_needs_plt_entry(const Symbol
* sym
)
2161 // An undefined symbol from an executable does not need a PLT entry.
2162 if (sym
->is_undefined() && !parameters
->options().shared())
2165 return (!parameters
->doing_static_link()
2166 && (sym
->type() == elfcpp::STT_FUNC
2167 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2168 && (sym
->is_from_dynobj()
2169 || sym
->is_undefined()
2170 || sym
->is_preemptible()));
2173 // Whether we have issued an error about a non-PIC compilation.
2174 bool issued_non_pic_error_
;
2177 // The class which implements relocation.
2187 // Return whether the static relocation needs to be applied.
2189 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2192 Output_section
* output_section
);
2194 // Do a relocation. Return false if the caller should not issue
2195 // any warnings about this relocation.
2197 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2198 Output_section
*, size_t relnum
,
2199 const elfcpp::Rel
<32, big_endian
>&,
2200 unsigned int r_type
, const Sized_symbol
<32>*,
2201 const Symbol_value
<32>*,
2202 unsigned char*, Arm_address
,
2205 // Return whether we want to pass flag NON_PIC_REF for this
2206 // reloc. This means the relocation type accesses a symbol not via
2209 reloc_is_non_pic (unsigned int r_type
)
2213 // These relocation types reference GOT or PLT entries explicitly.
2214 case elfcpp::R_ARM_GOT_BREL
:
2215 case elfcpp::R_ARM_GOT_ABS
:
2216 case elfcpp::R_ARM_GOT_PREL
:
2217 case elfcpp::R_ARM_GOT_BREL12
:
2218 case elfcpp::R_ARM_PLT32_ABS
:
2219 case elfcpp::R_ARM_TLS_GD32
:
2220 case elfcpp::R_ARM_TLS_LDM32
:
2221 case elfcpp::R_ARM_TLS_IE32
:
2222 case elfcpp::R_ARM_TLS_IE12GP
:
2224 // These relocate types may use PLT entries.
2225 case elfcpp::R_ARM_CALL
:
2226 case elfcpp::R_ARM_THM_CALL
:
2227 case elfcpp::R_ARM_JUMP24
:
2228 case elfcpp::R_ARM_THM_JUMP24
:
2229 case elfcpp::R_ARM_THM_JUMP19
:
2230 case elfcpp::R_ARM_PLT32
:
2231 case elfcpp::R_ARM_THM_XPC22
:
2239 // Return whether we need to calculate the addressing origin of
2240 // the output segment defining the symbol - B(S).
2242 reloc_needs_sym_origin(unsigned int r_type
)
2246 case elfcpp::R_ARM_SBREL32
:
2247 case elfcpp::R_ARM_BASE_PREL
:
2248 case elfcpp::R_ARM_BASE_ABS
:
2249 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
2250 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
2251 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
2252 case elfcpp::R_ARM_SBREL31
:
2253 case elfcpp::R_ARM_ALU_SB_G0_NC
:
2254 case elfcpp::R_ARM_ALU_SB_G0
:
2255 case elfcpp::R_ARM_ALU_SB_G1_NC
:
2256 case elfcpp::R_ARM_ALU_SB_G1
:
2257 case elfcpp::R_ARM_ALU_SB_G2
:
2258 case elfcpp::R_ARM_LDR_SB_G0
:
2259 case elfcpp::R_ARM_LDR_SB_G1
:
2260 case elfcpp::R_ARM_LDR_SB_G2
:
2261 case elfcpp::R_ARM_LDRS_SB_G0
:
2262 case elfcpp::R_ARM_LDRS_SB_G1
:
2263 case elfcpp::R_ARM_LDRS_SB_G2
:
2264 case elfcpp::R_ARM_LDC_SB_G0
:
2265 case elfcpp::R_ARM_LDC_SB_G1
:
2266 case elfcpp::R_ARM_LDC_SB_G2
:
2267 case elfcpp::R_ARM_MOVW_BREL_NC
:
2268 case elfcpp::R_ARM_MOVT_BREL
:
2269 case elfcpp::R_ARM_MOVW_BREL
:
2270 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
2271 case elfcpp::R_ARM_THM_MOVT_BREL
:
2272 case elfcpp::R_ARM_THM_MOVW_BREL
:
2281 // A class which returns the size required for a relocation type,
2282 // used while scanning relocs during a relocatable link.
2283 class Relocatable_size_for_reloc
2287 get_size_for_reloc(unsigned int, Relobj
*);
2290 // Get the GOT section, creating it if necessary.
2291 Output_data_got
<32, big_endian
>*
2292 got_section(Symbol_table
*, Layout
*);
2294 // Get the GOT PLT section.
2296 got_plt_section() const
2298 gold_assert(this->got_plt_
!= NULL
);
2299 return this->got_plt_
;
2302 // Create a PLT entry for a global symbol.
2304 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2306 // Get the PLT section.
2307 const Output_data_plt_arm
<big_endian
>*
2310 gold_assert(this->plt_
!= NULL
);
2314 // Get the dynamic reloc section, creating it if necessary.
2316 rel_dyn_section(Layout
*);
2318 // Return true if the symbol may need a COPY relocation.
2319 // References from an executable object to non-function symbols
2320 // defined in a dynamic object may need a COPY relocation.
2322 may_need_copy_reloc(Symbol
* gsym
)
2324 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2325 && gsym
->may_need_copy_reloc());
2328 // Add a potential copy relocation.
2330 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2331 Sized_relobj
<32, big_endian
>* object
,
2332 unsigned int shndx
, Output_section
* output_section
,
2333 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2335 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2336 symtab
->get_sized_symbol
<32>(sym
),
2337 object
, shndx
, output_section
, reloc
,
2338 this->rel_dyn_section(layout
));
2341 // Whether two EABI versions are compatible.
2343 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2345 // Merge processor-specific flags from input object and those in the ELF
2346 // header of the output.
2348 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2350 // Get the secondary compatible architecture.
2352 get_secondary_compatible_arch(const Attributes_section_data
*);
2354 // Set the secondary compatible architecture.
2356 set_secondary_compatible_arch(Attributes_section_data
*, int);
2359 tag_cpu_arch_combine(const char*, int, int*, int, int);
2361 // Helper to print AEABI enum tag value.
2363 aeabi_enum_name(unsigned int);
2365 // Return string value for TAG_CPU_name.
2367 tag_cpu_name_value(unsigned int);
2369 // Merge object attributes from input object and those in the output.
2371 merge_object_attributes(const char*, const Attributes_section_data
*);
2373 // Helper to get an AEABI object attribute
2375 get_aeabi_object_attribute(int tag
) const
2377 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2378 gold_assert(pasd
!= NULL
);
2379 Object_attribute
* attr
=
2380 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2381 gold_assert(attr
!= NULL
);
2386 // Methods to support stub-generations.
2389 // Group input sections for stub generation.
2391 group_sections(Layout
*, section_size_type
, bool);
2393 // Scan a relocation for stub generation.
2395 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2396 const Sized_symbol
<32>*, unsigned int,
2397 const Symbol_value
<32>*,
2398 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2400 // Scan a relocation section for stub.
2401 template<int sh_type
>
2403 scan_reloc_section_for_stubs(
2404 const Relocate_info
<32, big_endian
>* relinfo
,
2405 const unsigned char* prelocs
,
2407 Output_section
* output_section
,
2408 bool needs_special_offset_handling
,
2409 const unsigned char* view
,
2410 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2413 // Fix .ARM.exidx section coverage.
2415 fix_exidx_coverage(Layout
*, Arm_output_section
<big_endian
>*, Symbol_table
*);
2417 // Functors for STL set.
2418 struct output_section_address_less_than
2421 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2422 { return s1
->address() < s2
->address(); }
2425 // Information about this specific target which we pass to the
2426 // general Target structure.
2427 static const Target::Target_info arm_info
;
2429 // The types of GOT entries needed for this platform.
2432 GOT_TYPE_STANDARD
= 0 // GOT entry for a regular symbol
2435 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2437 // Map input section to Arm_input_section.
2438 typedef Unordered_map
<Section_id
,
2439 Arm_input_section
<big_endian
>*,
2441 Arm_input_section_map
;
2443 // Map output addresses to relocs for Cortex-A8 erratum.
2444 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2445 Cortex_a8_relocs_info
;
2448 Output_data_got
<32, big_endian
>* got_
;
2450 Output_data_plt_arm
<big_endian
>* plt_
;
2451 // The GOT PLT section.
2452 Output_data_space
* got_plt_
;
2453 // The dynamic reloc section.
2454 Reloc_section
* rel_dyn_
;
2455 // Relocs saved to avoid a COPY reloc.
2456 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2457 // Space for variables copied with a COPY reloc.
2458 Output_data_space
* dynbss_
;
2459 // Vector of Stub_tables created.
2460 Stub_table_list stub_tables_
;
2462 const Stub_factory
&stub_factory_
;
2463 // Whether we can use BLX.
2465 // Whether we force PIC branch veneers.
2466 bool should_force_pic_veneer_
;
2467 // Map for locating Arm_input_sections.
2468 Arm_input_section_map arm_input_section_map_
;
2469 // Attributes section data in output.
2470 Attributes_section_data
* attributes_section_data_
;
2471 // Whether we want to fix code for Cortex-A8 erratum.
2472 bool fix_cortex_a8_
;
2473 // Map addresses to relocs for Cortex-A8 erratum.
2474 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2477 template<bool big_endian
>
2478 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2481 big_endian
, // is_big_endian
2482 elfcpp::EM_ARM
, // machine_code
2483 false, // has_make_symbol
2484 false, // has_resolve
2485 false, // has_code_fill
2486 true, // is_default_stack_executable
2488 "/usr/lib/libc.so.1", // dynamic_linker
2489 0x8000, // default_text_segment_address
2490 0x1000, // abi_pagesize (overridable by -z max-page-size)
2491 0x1000, // common_pagesize (overridable by -z common-page-size)
2492 elfcpp::SHN_UNDEF
, // small_common_shndx
2493 elfcpp::SHN_UNDEF
, // large_common_shndx
2494 0, // small_common_section_flags
2495 0, // large_common_section_flags
2496 ".ARM.attributes", // attributes_section
2497 "aeabi" // attributes_vendor
2500 // Arm relocate functions class
2503 template<bool big_endian
>
2504 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2509 STATUS_OKAY
, // No error during relocation.
2510 STATUS_OVERFLOW
, // Relocation oveflow.
2511 STATUS_BAD_RELOC
// Relocation cannot be applied.
2515 typedef Relocate_functions
<32, big_endian
> Base
;
2516 typedef Arm_relocate_functions
<big_endian
> This
;
2518 // Encoding of imm16 argument for movt and movw ARM instructions
2521 // imm16 := imm4 | imm12
2523 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2524 // +-------+---------------+-------+-------+-----------------------+
2525 // | | |imm4 | |imm12 |
2526 // +-------+---------------+-------+-------+-----------------------+
2528 // Extract the relocation addend from VAL based on the ARM
2529 // instruction encoding described above.
2530 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2531 extract_arm_movw_movt_addend(
2532 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2534 // According to the Elf ABI for ARM Architecture the immediate
2535 // field is sign-extended to form the addend.
2536 return utils::sign_extend
<16>(((val
>> 4) & 0xf000) | (val
& 0xfff));
2539 // Insert X into VAL based on the ARM instruction encoding described
2541 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2542 insert_val_arm_movw_movt(
2543 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2544 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2548 val
|= (x
& 0xf000) << 4;
2552 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2555 // imm16 := imm4 | i | imm3 | imm8
2557 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2558 // +---------+-+-----------+-------++-+-----+-------+---------------+
2559 // | |i| |imm4 || |imm3 | |imm8 |
2560 // +---------+-+-----------+-------++-+-----+-------+---------------+
2562 // Extract the relocation addend from VAL based on the Thumb2
2563 // instruction encoding described above.
2564 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2565 extract_thumb_movw_movt_addend(
2566 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2568 // According to the Elf ABI for ARM Architecture the immediate
2569 // field is sign-extended to form the addend.
2570 return utils::sign_extend
<16>(((val
>> 4) & 0xf000)
2571 | ((val
>> 15) & 0x0800)
2572 | ((val
>> 4) & 0x0700)
2576 // Insert X into VAL based on the Thumb2 instruction encoding
2578 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2579 insert_val_thumb_movw_movt(
2580 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2581 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2584 val
|= (x
& 0xf000) << 4;
2585 val
|= (x
& 0x0800) << 15;
2586 val
|= (x
& 0x0700) << 4;
2587 val
|= (x
& 0x00ff);
2591 // Calculate the smallest constant Kn for the specified residual.
2592 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2594 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
2600 // Determine the most significant bit in the residual and
2601 // align the resulting value to a 2-bit boundary.
2602 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
2604 // The desired shift is now (msb - 6), or zero, whichever
2606 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
2609 // Calculate the final residual for the specified group index.
2610 // If the passed group index is less than zero, the method will return
2611 // the value of the specified residual without any change.
2612 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2613 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2614 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2617 for (int n
= 0; n
<= group
; n
++)
2619 // Calculate which part of the value to mask.
2620 uint32_t shift
= calc_grp_kn(residual
);
2621 // Calculate the residual for the next time around.
2622 residual
&= ~(residual
& (0xff << shift
));
2628 // Calculate the value of Gn for the specified group index.
2629 // We return it in the form of an encoded constant-and-rotation.
2630 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2631 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2632 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2635 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
2638 for (int n
= 0; n
<= group
; n
++)
2640 // Calculate which part of the value to mask.
2641 shift
= calc_grp_kn(residual
);
2642 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2643 gn
= residual
& (0xff << shift
);
2644 // Calculate the residual for the next time around.
2647 // Return Gn in the form of an encoded constant-and-rotation.
2648 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
2651 // Handle ARM long branches.
2652 static typename
This::Status
2653 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
2654 unsigned char *, const Sized_symbol
<32>*,
2655 const Arm_relobj
<big_endian
>*, unsigned int,
2656 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
2658 // Handle THUMB long branches.
2659 static typename
This::Status
2660 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
2661 unsigned char *, const Sized_symbol
<32>*,
2662 const Arm_relobj
<big_endian
>*, unsigned int,
2663 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
2667 // Return the branch offset of a 32-bit THUMB branch.
2668 static inline int32_t
2669 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
2671 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2672 // involving the J1 and J2 bits.
2673 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
2674 uint32_t upper
= upper_insn
& 0x3ffU
;
2675 uint32_t lower
= lower_insn
& 0x7ffU
;
2676 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
2677 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
2678 uint32_t i1
= j1
^ s
? 0 : 1;
2679 uint32_t i2
= j2
^ s
? 0 : 1;
2681 return utils::sign_extend
<25>((s
<< 24) | (i1
<< 23) | (i2
<< 22)
2682 | (upper
<< 12) | (lower
<< 1));
2685 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2686 // UPPER_INSN is the original upper instruction of the branch. Caller is
2687 // responsible for overflow checking and BLX offset adjustment.
2688 static inline uint16_t
2689 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
2691 uint32_t s
= offset
< 0 ? 1 : 0;
2692 uint32_t bits
= static_cast<uint32_t>(offset
);
2693 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
2696 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2697 // LOWER_INSN is the original lower instruction of the branch. Caller is
2698 // responsible for overflow checking and BLX offset adjustment.
2699 static inline uint16_t
2700 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
2702 uint32_t s
= offset
< 0 ? 1 : 0;
2703 uint32_t bits
= static_cast<uint32_t>(offset
);
2704 return ((lower_insn
& ~0x2fffU
)
2705 | ((((bits
>> 23) & 1) ^ !s
) << 13)
2706 | ((((bits
>> 22) & 1) ^ !s
) << 11)
2707 | ((bits
>> 1) & 0x7ffU
));
2710 // Return the branch offset of a 32-bit THUMB conditional branch.
2711 static inline int32_t
2712 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
2714 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
2715 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
2716 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
2717 uint32_t lower
= (lower_insn
& 0x07ffU
);
2718 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
2720 return utils::sign_extend
<21>((upper
<< 12) | (lower
<< 1));
2723 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2724 // instruction. UPPER_INSN is the original upper instruction of the branch.
2725 // Caller is responsible for overflow checking.
2726 static inline uint16_t
2727 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
2729 uint32_t s
= offset
< 0 ? 1 : 0;
2730 uint32_t bits
= static_cast<uint32_t>(offset
);
2731 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
2734 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2735 // instruction. LOWER_INSN is the original lower instruction of the branch.
2736 // Caller is reponsible for overflow checking.
2737 static inline uint16_t
2738 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
2740 uint32_t bits
= static_cast<uint32_t>(offset
);
2741 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
2742 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
2743 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
2745 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
2748 // R_ARM_ABS8: S + A
2749 static inline typename
This::Status
2750 abs8(unsigned char *view
,
2751 const Sized_relobj
<32, big_endian
>* object
,
2752 const Symbol_value
<32>* psymval
)
2754 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
2755 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2756 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2757 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
2758 Reltype addend
= utils::sign_extend
<8>(val
);
2759 Reltype x
= psymval
->value(object
, addend
);
2760 val
= utils::bit_select(val
, x
, 0xffU
);
2761 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
2762 return (utils::has_signed_unsigned_overflow
<8>(x
)
2763 ? This::STATUS_OVERFLOW
2764 : This::STATUS_OKAY
);
2767 // R_ARM_THM_ABS5: S + A
2768 static inline typename
This::Status
2769 thm_abs5(unsigned char *view
,
2770 const Sized_relobj
<32, big_endian
>* object
,
2771 const Symbol_value
<32>* psymval
)
2773 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2774 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2775 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2776 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2777 Reltype addend
= (val
& 0x7e0U
) >> 6;
2778 Reltype x
= psymval
->value(object
, addend
);
2779 val
= utils::bit_select(val
, x
<< 6, 0x7e0U
);
2780 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2781 return (utils::has_overflow
<5>(x
)
2782 ? This::STATUS_OVERFLOW
2783 : This::STATUS_OKAY
);
2786 // R_ARM_ABS12: S + A
2787 static inline typename
This::Status
2788 abs12(unsigned char *view
,
2789 const Sized_relobj
<32, big_endian
>* object
,
2790 const Symbol_value
<32>* psymval
)
2792 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2793 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2794 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2795 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2796 Reltype addend
= val
& 0x0fffU
;
2797 Reltype x
= psymval
->value(object
, addend
);
2798 val
= utils::bit_select(val
, x
, 0x0fffU
);
2799 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
2800 return (utils::has_overflow
<12>(x
)
2801 ? This::STATUS_OVERFLOW
2802 : This::STATUS_OKAY
);
2805 // R_ARM_ABS16: S + A
2806 static inline typename
This::Status
2807 abs16(unsigned char *view
,
2808 const Sized_relobj
<32, big_endian
>* object
,
2809 const Symbol_value
<32>* psymval
)
2811 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2812 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2813 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2814 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2815 Reltype addend
= utils::sign_extend
<16>(val
);
2816 Reltype x
= psymval
->value(object
, addend
);
2817 val
= utils::bit_select(val
, x
, 0xffffU
);
2818 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2819 return (utils::has_signed_unsigned_overflow
<16>(x
)
2820 ? This::STATUS_OVERFLOW
2821 : This::STATUS_OKAY
);
2824 // R_ARM_ABS32: (S + A) | T
2825 static inline typename
This::Status
2826 abs32(unsigned char *view
,
2827 const Sized_relobj
<32, big_endian
>* object
,
2828 const Symbol_value
<32>* psymval
,
2829 Arm_address thumb_bit
)
2831 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2832 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2833 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2834 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
2835 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
2836 return This::STATUS_OKAY
;
2839 // R_ARM_REL32: (S + A) | T - P
2840 static inline typename
This::Status
2841 rel32(unsigned char *view
,
2842 const Sized_relobj
<32, big_endian
>* object
,
2843 const Symbol_value
<32>* psymval
,
2844 Arm_address address
,
2845 Arm_address thumb_bit
)
2847 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2848 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2849 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2850 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
2851 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
2852 return This::STATUS_OKAY
;
2855 // R_ARM_THM_CALL: (S + A) | T - P
2856 static inline typename
This::Status
2857 thm_call(const Relocate_info
<32, big_endian
>* relinfo
, unsigned char *view
,
2858 const Sized_symbol
<32>* gsym
, const Arm_relobj
<big_endian
>* object
,
2859 unsigned int r_sym
, const Symbol_value
<32>* psymval
,
2860 Arm_address address
, Arm_address thumb_bit
,
2861 bool is_weakly_undefined_without_plt
)
2863 return thumb_branch_common(elfcpp::R_ARM_THM_CALL
, relinfo
, view
, gsym
,
2864 object
, r_sym
, psymval
, address
, thumb_bit
,
2865 is_weakly_undefined_without_plt
);
2868 // R_ARM_THM_JUMP24: (S + A) | T - P
2869 static inline typename
This::Status
2870 thm_jump24(const Relocate_info
<32, big_endian
>* relinfo
, unsigned char *view
,
2871 const Sized_symbol
<32>* gsym
, const Arm_relobj
<big_endian
>* object
,
2872 unsigned int r_sym
, const Symbol_value
<32>* psymval
,
2873 Arm_address address
, Arm_address thumb_bit
,
2874 bool is_weakly_undefined_without_plt
)
2876 return thumb_branch_common(elfcpp::R_ARM_THM_JUMP24
, relinfo
, view
, gsym
,
2877 object
, r_sym
, psymval
, address
, thumb_bit
,
2878 is_weakly_undefined_without_plt
);
2881 // R_ARM_THM_JUMP24: (S + A) | T - P
2882 static typename
This::Status
2883 thm_jump19(unsigned char *view
, const Arm_relobj
<big_endian
>* object
,
2884 const Symbol_value
<32>* psymval
, Arm_address address
,
2885 Arm_address thumb_bit
);
2887 // R_ARM_THM_XPC22: (S + A) | T - P
2888 static inline typename
This::Status
2889 thm_xpc22(const Relocate_info
<32, big_endian
>* relinfo
, unsigned char *view
,
2890 const Sized_symbol
<32>* gsym
, const Arm_relobj
<big_endian
>* object
,
2891 unsigned int r_sym
, const Symbol_value
<32>* psymval
,
2892 Arm_address address
, Arm_address thumb_bit
,
2893 bool is_weakly_undefined_without_plt
)
2895 return thumb_branch_common(elfcpp::R_ARM_THM_XPC22
, relinfo
, view
, gsym
,
2896 object
, r_sym
, psymval
, address
, thumb_bit
,
2897 is_weakly_undefined_without_plt
);
2900 // R_ARM_THM_JUMP6: S + A – P
2901 static inline typename
This::Status
2902 thm_jump6(unsigned char *view
,
2903 const Sized_relobj
<32, big_endian
>* object
,
2904 const Symbol_value
<32>* psymval
,
2905 Arm_address address
)
2907 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2908 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2909 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2910 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2911 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2912 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
2913 Reltype x
= (psymval
->value(object
, addend
) - address
);
2914 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
2915 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2916 // CZB does only forward jumps.
2917 return ((x
> 0x007e)
2918 ? This::STATUS_OVERFLOW
2919 : This::STATUS_OKAY
);
2922 // R_ARM_THM_JUMP8: S + A – P
2923 static inline typename
This::Status
2924 thm_jump8(unsigned char *view
,
2925 const Sized_relobj
<32, big_endian
>* object
,
2926 const Symbol_value
<32>* psymval
,
2927 Arm_address address
)
2929 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2930 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2931 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2932 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2933 Reltype addend
= utils::sign_extend
<8>((val
& 0x00ff) << 1);
2934 Reltype x
= (psymval
->value(object
, addend
) - address
);
2935 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xff00) | ((x
& 0x01fe) >> 1));
2936 return (utils::has_overflow
<8>(x
)
2937 ? This::STATUS_OVERFLOW
2938 : This::STATUS_OKAY
);
2941 // R_ARM_THM_JUMP11: S + A – P
2942 static inline typename
This::Status
2943 thm_jump11(unsigned char *view
,
2944 const Sized_relobj
<32, big_endian
>* object
,
2945 const Symbol_value
<32>* psymval
,
2946 Arm_address address
)
2948 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2949 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2950 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2951 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2952 Reltype addend
= utils::sign_extend
<11>((val
& 0x07ff) << 1);
2953 Reltype x
= (psymval
->value(object
, addend
) - address
);
2954 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xf800) | ((x
& 0x0ffe) >> 1));
2955 return (utils::has_overflow
<11>(x
)
2956 ? This::STATUS_OVERFLOW
2957 : This::STATUS_OKAY
);
2960 // R_ARM_BASE_PREL: B(S) + A - P
2961 static inline typename
This::Status
2962 base_prel(unsigned char* view
,
2964 Arm_address address
)
2966 Base::rel32(view
, origin
- address
);
2970 // R_ARM_BASE_ABS: B(S) + A
2971 static inline typename
This::Status
2972 base_abs(unsigned char* view
,
2975 Base::rel32(view
, origin
);
2979 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2980 static inline typename
This::Status
2981 got_brel(unsigned char* view
,
2982 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
2984 Base::rel32(view
, got_offset
);
2985 return This::STATUS_OKAY
;
2988 // R_ARM_GOT_PREL: GOT(S) + A - P
2989 static inline typename
This::Status
2990 got_prel(unsigned char *view
,
2991 Arm_address got_entry
,
2992 Arm_address address
)
2994 Base::rel32(view
, got_entry
- address
);
2995 return This::STATUS_OKAY
;
2998 // R_ARM_PLT32: (S + A) | T - P
2999 static inline typename
This::Status
3000 plt32(const Relocate_info
<32, big_endian
>* relinfo
,
3001 unsigned char *view
,
3002 const Sized_symbol
<32>* gsym
,
3003 const Arm_relobj
<big_endian
>* object
,
3005 const Symbol_value
<32>* psymval
,
3006 Arm_address address
,
3007 Arm_address thumb_bit
,
3008 bool is_weakly_undefined_without_plt
)
3010 return arm_branch_common(elfcpp::R_ARM_PLT32
, relinfo
, view
, gsym
,
3011 object
, r_sym
, psymval
, address
, thumb_bit
,
3012 is_weakly_undefined_without_plt
);
3015 // R_ARM_XPC25: (S + A) | T - P
3016 static inline typename
This::Status
3017 xpc25(const Relocate_info
<32, big_endian
>* relinfo
,
3018 unsigned char *view
,
3019 const Sized_symbol
<32>* gsym
,
3020 const Arm_relobj
<big_endian
>* object
,
3022 const Symbol_value
<32>* psymval
,
3023 Arm_address address
,
3024 Arm_address thumb_bit
,
3025 bool is_weakly_undefined_without_plt
)
3027 return arm_branch_common(elfcpp::R_ARM_XPC25
, relinfo
, view
, gsym
,
3028 object
, r_sym
, psymval
, address
, thumb_bit
,
3029 is_weakly_undefined_without_plt
);
3032 // R_ARM_CALL: (S + A) | T - P
3033 static inline typename
This::Status
3034 call(const Relocate_info
<32, big_endian
>* relinfo
,
3035 unsigned char *view
,
3036 const Sized_symbol
<32>* gsym
,
3037 const Arm_relobj
<big_endian
>* object
,
3039 const Symbol_value
<32>* psymval
,
3040 Arm_address address
,
3041 Arm_address thumb_bit
,
3042 bool is_weakly_undefined_without_plt
)
3044 return arm_branch_common(elfcpp::R_ARM_CALL
, relinfo
, view
, gsym
,
3045 object
, r_sym
, psymval
, address
, thumb_bit
,
3046 is_weakly_undefined_without_plt
);
3049 // R_ARM_JUMP24: (S + A) | T - P
3050 static inline typename
This::Status
3051 jump24(const Relocate_info
<32, big_endian
>* relinfo
,
3052 unsigned char *view
,
3053 const Sized_symbol
<32>* gsym
,
3054 const Arm_relobj
<big_endian
>* object
,
3056 const Symbol_value
<32>* psymval
,
3057 Arm_address address
,
3058 Arm_address thumb_bit
,
3059 bool is_weakly_undefined_without_plt
)
3061 return arm_branch_common(elfcpp::R_ARM_JUMP24
, relinfo
, view
, gsym
,
3062 object
, r_sym
, psymval
, address
, thumb_bit
,
3063 is_weakly_undefined_without_plt
);
3066 // R_ARM_PREL: (S + A) | T - P
3067 static inline typename
This::Status
3068 prel31(unsigned char *view
,
3069 const Sized_relobj
<32, big_endian
>* object
,
3070 const Symbol_value
<32>* psymval
,
3071 Arm_address address
,
3072 Arm_address thumb_bit
)
3074 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3075 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3076 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3077 Valtype addend
= utils::sign_extend
<31>(val
);
3078 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3079 val
= utils::bit_select(val
, x
, 0x7fffffffU
);
3080 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3081 return (utils::has_overflow
<31>(x
) ?
3082 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3085 // R_ARM_MOVW_ABS_NC: (S + A) | T
3086 static inline typename
This::Status
3087 movw_abs_nc(unsigned char *view
,
3088 const Sized_relobj
<32, big_endian
>* object
,
3089 const Symbol_value
<32>* psymval
,
3090 Arm_address thumb_bit
)
3092 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3093 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3094 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3095 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3096 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3097 val
= This::insert_val_arm_movw_movt(val
, x
);
3098 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3099 return This::STATUS_OKAY
;
3102 // R_ARM_MOVT_ABS: S + A
3103 static inline typename
This::Status
3104 movt_abs(unsigned char *view
,
3105 const Sized_relobj
<32, big_endian
>* object
,
3106 const Symbol_value
<32>* psymval
)
3108 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3109 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3110 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3111 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3112 Valtype x
= psymval
->value(object
, addend
) >> 16;
3113 val
= This::insert_val_arm_movw_movt(val
, x
);
3114 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3115 return This::STATUS_OKAY
;
3118 // R_ARM_THM_MOVW_ABS_NC: S + A | T
3119 static inline typename
This::Status
3120 thm_movw_abs_nc(unsigned char *view
,
3121 const Sized_relobj
<32, big_endian
>* object
,
3122 const Symbol_value
<32>* psymval
,
3123 Arm_address thumb_bit
)
3125 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3126 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3127 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3128 Reltype val
= ((elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3129 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1));
3130 Reltype addend
= extract_thumb_movw_movt_addend(val
);
3131 Reltype x
= psymval
->value(object
, addend
) | thumb_bit
;
3132 val
= This::insert_val_thumb_movw_movt(val
, x
);
3133 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3134 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3135 return This::STATUS_OKAY
;
3138 // R_ARM_THM_MOVT_ABS: S + A
3139 static inline typename
This::Status
3140 thm_movt_abs(unsigned char *view
,
3141 const Sized_relobj
<32, big_endian
>* object
,
3142 const Symbol_value
<32>* psymval
)
3144 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3145 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3146 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3147 Reltype val
= ((elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3148 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1));
3149 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3150 Reltype x
= psymval
->value(object
, addend
) >> 16;
3151 val
= This::insert_val_thumb_movw_movt(val
, x
);
3152 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3153 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3154 return This::STATUS_OKAY
;
3157 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3158 static inline typename
This::Status
3159 movw_prel_nc(unsigned char *view
,
3160 const Sized_relobj
<32, big_endian
>* object
,
3161 const Symbol_value
<32>* psymval
,
3162 Arm_address address
,
3163 Arm_address thumb_bit
)
3165 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3166 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3167 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3168 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3169 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3170 val
= This::insert_val_arm_movw_movt(val
, x
);
3171 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3172 return This::STATUS_OKAY
;
3175 // R_ARM_MOVT_PREL: S + A - P
3176 static inline typename
This::Status
3177 movt_prel(unsigned char *view
,
3178 const Sized_relobj
<32, big_endian
>* object
,
3179 const Symbol_value
<32>* psymval
,
3180 Arm_address address
)
3182 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3183 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3184 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3185 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3186 Valtype x
= (psymval
->value(object
, addend
) - address
) >> 16;
3187 val
= This::insert_val_arm_movw_movt(val
, x
);
3188 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3189 return This::STATUS_OKAY
;
3192 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3193 static inline typename
This::Status
3194 thm_movw_prel_nc(unsigned char *view
,
3195 const Sized_relobj
<32, big_endian
>* object
,
3196 const Symbol_value
<32>* psymval
,
3197 Arm_address address
,
3198 Arm_address thumb_bit
)
3200 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3201 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3202 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3203 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3204 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3205 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3206 Reltype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3207 val
= This::insert_val_thumb_movw_movt(val
, x
);
3208 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3209 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3210 return This::STATUS_OKAY
;
3213 // R_ARM_THM_MOVT_PREL: S + A - P
3214 static inline typename
This::Status
3215 thm_movt_prel(unsigned char *view
,
3216 const Sized_relobj
<32, big_endian
>* object
,
3217 const Symbol_value
<32>* psymval
,
3218 Arm_address address
)
3220 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3221 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3222 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3223 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3224 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3225 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3226 Reltype x
= (psymval
->value(object
, addend
) - address
) >> 16;
3227 val
= This::insert_val_thumb_movw_movt(val
, x
);
3228 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3229 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3230 return This::STATUS_OKAY
;
3234 static inline typename
This::Status
3235 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3236 unsigned char *view
,
3237 const Arm_relobj
<big_endian
>* object
,
3238 const Arm_address address
,
3239 const bool is_interworking
)
3242 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3243 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3244 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3246 // Ensure that we have a BX instruction.
3247 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3248 const uint32_t reg
= (val
& 0xf);
3249 if (is_interworking
&& reg
!= 0xf)
3251 Stub_table
<big_endian
>* stub_table
=
3252 object
->stub_table(relinfo
->data_shndx
);
3253 gold_assert(stub_table
!= NULL
);
3255 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3256 gold_assert(stub
!= NULL
);
3258 int32_t veneer_address
=
3259 stub_table
->address() + stub
->offset() - 8 - address
;
3260 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3261 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3262 // Replace with a branch to veneer (B <addr>)
3263 val
= (val
& 0xf0000000) | 0x0a000000
3264 | ((veneer_address
>> 2) & 0x00ffffff);
3268 // Preserve Rm (lowest four bits) and the condition code
3269 // (highest four bits). Other bits encode MOV PC,Rm.
3270 val
= (val
& 0xf000000f) | 0x01a0f000;
3272 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3273 return This::STATUS_OKAY
;
3276 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3277 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3278 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3279 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3280 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3281 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3282 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3283 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3284 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3285 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3286 static inline typename
This::Status
3287 arm_grp_alu(unsigned char* view
,
3288 const Sized_relobj
<32, big_endian
>* object
,
3289 const Symbol_value
<32>* psymval
,
3291 Arm_address address
,
3292 Arm_address thumb_bit
,
3293 bool check_overflow
)
3295 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3296 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3297 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3299 // ALU group relocations are allowed only for the ADD/SUB instructions.
3300 // (0x00800000 - ADD, 0x00400000 - SUB)
3301 const Valtype opcode
= insn
& 0x01e00000;
3302 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3303 return This::STATUS_BAD_RELOC
;
3305 // Determine a sign for the addend.
3306 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3307 // shifter = rotate_imm * 2
3308 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3309 // Initial addend value.
3310 int32_t addend
= insn
& 0xff;
3311 // Rotate addend right by shifter.
3312 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3313 // Apply a sign to the added.
3316 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3317 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3318 // Check for overflow if required
3320 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3321 return This::STATUS_OVERFLOW
;
3323 // Mask out the value and the ADD/SUB part of the opcode; take care
3324 // not to destroy the S bit.
3326 // Set the opcode according to whether the value to go in the
3327 // place is negative.
3328 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3329 // Encode the offset (encoded Gn).
3332 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3333 return This::STATUS_OKAY
;
3336 // R_ARM_LDR_PC_G0: S + A - P
3337 // R_ARM_LDR_PC_G1: S + A - P
3338 // R_ARM_LDR_PC_G2: S + A - P
3339 // R_ARM_LDR_SB_G0: S + A - B(S)
3340 // R_ARM_LDR_SB_G1: S + A - B(S)
3341 // R_ARM_LDR_SB_G2: S + A - B(S)
3342 static inline typename
This::Status
3343 arm_grp_ldr(unsigned char* view
,
3344 const Sized_relobj
<32, big_endian
>* object
,
3345 const Symbol_value
<32>* psymval
,
3347 Arm_address address
)
3349 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3350 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3351 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3353 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3354 int32_t addend
= (insn
& 0xfff) * sign
;
3355 int32_t x
= (psymval
->value(object
, addend
) - address
);
3356 // Calculate the relevant G(n-1) value to obtain this stage residual.
3358 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3359 if (residual
>= 0x1000)
3360 return This::STATUS_OVERFLOW
;
3362 // Mask out the value and U bit.
3364 // Set the U bit for non-negative values.
3369 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3370 return This::STATUS_OKAY
;
3373 // R_ARM_LDRS_PC_G0: S + A - P
3374 // R_ARM_LDRS_PC_G1: S + A - P
3375 // R_ARM_LDRS_PC_G2: S + A - P
3376 // R_ARM_LDRS_SB_G0: S + A - B(S)
3377 // R_ARM_LDRS_SB_G1: S + A - B(S)
3378 // R_ARM_LDRS_SB_G2: S + A - B(S)
3379 static inline typename
This::Status
3380 arm_grp_ldrs(unsigned char* view
,
3381 const Sized_relobj
<32, big_endian
>* object
,
3382 const Symbol_value
<32>* psymval
,
3384 Arm_address address
)
3386 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3387 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3388 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3390 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3391 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3392 int32_t x
= (psymval
->value(object
, addend
) - address
);
3393 // Calculate the relevant G(n-1) value to obtain this stage residual.
3395 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3396 if (residual
>= 0x100)
3397 return This::STATUS_OVERFLOW
;
3399 // Mask out the value and U bit.
3401 // Set the U bit for non-negative values.
3404 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3406 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3407 return This::STATUS_OKAY
;
3410 // R_ARM_LDC_PC_G0: S + A - P
3411 // R_ARM_LDC_PC_G1: S + A - P
3412 // R_ARM_LDC_PC_G2: S + A - P
3413 // R_ARM_LDC_SB_G0: S + A - B(S)
3414 // R_ARM_LDC_SB_G1: S + A - B(S)
3415 // R_ARM_LDC_SB_G2: S + A - B(S)
3416 static inline typename
This::Status
3417 arm_grp_ldc(unsigned char* view
,
3418 const Sized_relobj
<32, big_endian
>* object
,
3419 const Symbol_value
<32>* psymval
,
3421 Arm_address address
)
3423 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3424 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3425 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3427 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3428 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3429 int32_t x
= (psymval
->value(object
, addend
) - address
);
3430 // Calculate the relevant G(n-1) value to obtain this stage residual.
3432 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3433 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3434 return This::STATUS_OVERFLOW
;
3436 // Mask out the value and U bit.
3438 // Set the U bit for non-negative values.
3441 insn
|= (residual
>> 2);
3443 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3444 return This::STATUS_OKAY
;
3448 // Relocate ARM long branches. This handles relocation types
3449 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3450 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3451 // undefined and we do not use PLT in this relocation. In such a case,
3452 // the branch is converted into an NOP.
3454 template<bool big_endian
>
3455 typename Arm_relocate_functions
<big_endian
>::Status
3456 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3457 unsigned int r_type
,
3458 const Relocate_info
<32, big_endian
>* relinfo
,
3459 unsigned char *view
,
3460 const Sized_symbol
<32>* gsym
,
3461 const Arm_relobj
<big_endian
>* object
,
3463 const Symbol_value
<32>* psymval
,
3464 Arm_address address
,
3465 Arm_address thumb_bit
,
3466 bool is_weakly_undefined_without_plt
)
3468 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3469 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3470 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3472 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3473 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3474 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3475 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3476 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3477 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3478 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3480 // Check that the instruction is valid.
3481 if (r_type
== elfcpp::R_ARM_CALL
)
3483 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3484 return This::STATUS_BAD_RELOC
;
3486 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3488 if (!insn_is_b
&& !insn_is_cond_bl
)
3489 return This::STATUS_BAD_RELOC
;
3491 else if (r_type
== elfcpp::R_ARM_PLT32
)
3493 if (!insn_is_any_branch
)
3494 return This::STATUS_BAD_RELOC
;
3496 else if (r_type
== elfcpp::R_ARM_XPC25
)
3498 // FIXME: AAELF document IH0044C does not say much about it other
3499 // than it being obsolete.
3500 if (!insn_is_any_branch
)
3501 return This::STATUS_BAD_RELOC
;
3506 // A branch to an undefined weak symbol is turned into a jump to
3507 // the next instruction unless a PLT entry will be created.
3508 // Do the same for local undefined symbols.
3509 // The jump to the next instruction is optimized as a NOP depending
3510 // on the architecture.
3511 const Target_arm
<big_endian
>* arm_target
=
3512 Target_arm
<big_endian
>::default_target();
3513 if (is_weakly_undefined_without_plt
)
3515 Valtype cond
= val
& 0xf0000000U
;
3516 if (arm_target
->may_use_arm_nop())
3517 val
= cond
| 0x0320f000;
3519 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3520 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3521 return This::STATUS_OKAY
;
3524 Valtype addend
= utils::sign_extend
<26>(val
<< 2);
3525 Valtype branch_target
= psymval
->value(object
, addend
);
3526 int32_t branch_offset
= branch_target
- address
;
3528 // We need a stub if the branch offset is too large or if we need
3530 bool may_use_blx
= arm_target
->may_use_blx();
3531 Reloc_stub
* stub
= NULL
;
3532 if ((branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
)
3533 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
3534 || ((thumb_bit
!= 0) && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
)))
3536 Stub_type stub_type
=
3537 Reloc_stub::stub_type_for_reloc(r_type
, address
, branch_target
,
3539 if (stub_type
!= arm_stub_none
)
3541 Stub_table
<big_endian
>* stub_table
=
3542 object
->stub_table(relinfo
->data_shndx
);
3543 gold_assert(stub_table
!= NULL
);
3545 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3546 stub
= stub_table
->find_reloc_stub(stub_key
);
3547 gold_assert(stub
!= NULL
);
3548 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3549 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3550 branch_offset
= branch_target
- address
;
3551 gold_assert((branch_offset
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3552 && (branch_offset
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3556 // At this point, if we still need to switch mode, the instruction
3557 // must either be a BLX or a BL that can be converted to a BLX.
3561 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3562 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3565 val
= utils::bit_select(val
, (branch_offset
>> 2), 0xffffffUL
);
3566 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3567 return (utils::has_overflow
<26>(branch_offset
)
3568 ? This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3571 // Relocate THUMB long branches. This handles relocation types
3572 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3573 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3574 // undefined and we do not use PLT in this relocation. In such a case,
3575 // the branch is converted into an NOP.
3577 template<bool big_endian
>
3578 typename Arm_relocate_functions
<big_endian
>::Status
3579 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3580 unsigned int r_type
,
3581 const Relocate_info
<32, big_endian
>* relinfo
,
3582 unsigned char *view
,
3583 const Sized_symbol
<32>* gsym
,
3584 const Arm_relobj
<big_endian
>* object
,
3586 const Symbol_value
<32>* psymval
,
3587 Arm_address address
,
3588 Arm_address thumb_bit
,
3589 bool is_weakly_undefined_without_plt
)
3591 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3592 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3593 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3594 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3596 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3598 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
3599 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
3601 // Check that the instruction is valid.
3602 if (r_type
== elfcpp::R_ARM_THM_CALL
)
3604 if (!is_bl_insn
&& !is_blx_insn
)
3605 return This::STATUS_BAD_RELOC
;
3607 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
3609 // This cannot be a BLX.
3611 return This::STATUS_BAD_RELOC
;
3613 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
3615 // Check for Thumb to Thumb call.
3617 return This::STATUS_BAD_RELOC
;
3620 gold_warning(_("%s: Thumb BLX instruction targets "
3621 "thumb function '%s'."),
3622 object
->name().c_str(),
3623 (gsym
? gsym
->name() : "(local)"));
3624 // Convert BLX to BL.
3625 lower_insn
|= 0x1000U
;
3631 // A branch to an undefined weak symbol is turned into a jump to
3632 // the next instruction unless a PLT entry will be created.
3633 // The jump to the next instruction is optimized as a NOP.W for
3634 // Thumb-2 enabled architectures.
3635 const Target_arm
<big_endian
>* arm_target
=
3636 Target_arm
<big_endian
>::default_target();
3637 if (is_weakly_undefined_without_plt
)
3639 if (arm_target
->may_use_thumb2_nop())
3641 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
3642 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
3646 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
3647 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
3649 return This::STATUS_OKAY
;
3652 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
3653 Arm_address branch_target
= psymval
->value(object
, addend
);
3654 int32_t branch_offset
= branch_target
- address
;
3656 // We need a stub if the branch offset is too large or if we need
3658 bool may_use_blx
= arm_target
->may_use_blx();
3659 bool thumb2
= arm_target
->using_thumb2();
3661 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3662 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3664 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3665 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3666 || ((thumb_bit
== 0)
3667 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
3668 || r_type
== elfcpp::R_ARM_THM_JUMP24
)))
3670 Stub_type stub_type
=
3671 Reloc_stub::stub_type_for_reloc(r_type
, address
, branch_target
,
3673 if (stub_type
!= arm_stub_none
)
3675 Stub_table
<big_endian
>* stub_table
=
3676 object
->stub_table(relinfo
->data_shndx
);
3677 gold_assert(stub_table
!= NULL
);
3679 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3680 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
3681 gold_assert(stub
!= NULL
);
3682 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3683 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3684 branch_offset
= branch_target
- address
;
3688 // At this point, if we still need to switch mode, the instruction
3689 // must either be a BLX or a BL that can be converted to a BLX.
3692 gold_assert(may_use_blx
3693 && (r_type
== elfcpp::R_ARM_THM_CALL
3694 || r_type
== elfcpp::R_ARM_THM_XPC22
));
3695 // Make sure this is a BLX.
3696 lower_insn
&= ~0x1000U
;
3700 // Make sure this is a BL.
3701 lower_insn
|= 0x1000U
;
3704 if ((lower_insn
& 0x5000U
) == 0x4000U
)
3705 // For a BLX instruction, make sure that the relocation is rounded up
3706 // to a word boundary. This follows the semantics of the instruction
3707 // which specifies that bit 1 of the target address will come from bit
3708 // 1 of the base address.
3709 branch_offset
= (branch_offset
+ 2) & ~3;
3711 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3712 // We use the Thumb-2 encoding, which is safe even if dealing with
3713 // a Thumb-1 instruction by virtue of our overflow check above. */
3714 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
3715 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
3717 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
3718 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
3721 ? utils::has_overflow
<25>(branch_offset
)
3722 : utils::has_overflow
<23>(branch_offset
))
3723 ? This::STATUS_OVERFLOW
3724 : This::STATUS_OKAY
);
3727 // Relocate THUMB-2 long conditional branches.
3728 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3729 // undefined and we do not use PLT in this relocation. In such a case,
3730 // the branch is converted into an NOP.
3732 template<bool big_endian
>
3733 typename Arm_relocate_functions
<big_endian
>::Status
3734 Arm_relocate_functions
<big_endian
>::thm_jump19(
3735 unsigned char *view
,
3736 const Arm_relobj
<big_endian
>* object
,
3737 const Symbol_value
<32>* psymval
,
3738 Arm_address address
,
3739 Arm_address thumb_bit
)
3741 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3742 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3743 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3744 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3745 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
3747 Arm_address branch_target
= psymval
->value(object
, addend
);
3748 int32_t branch_offset
= branch_target
- address
;
3750 // ??? Should handle interworking? GCC might someday try to
3751 // use this for tail calls.
3752 // FIXME: We do support thumb entry to PLT yet.
3755 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3756 return This::STATUS_BAD_RELOC
;
3759 // Put RELOCATION back into the insn.
3760 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
3761 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
3763 // Put the relocated value back in the object file:
3764 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
3765 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
3767 return (utils::has_overflow
<21>(branch_offset
)
3768 ? This::STATUS_OVERFLOW
3769 : This::STATUS_OKAY
);
3772 // Get the GOT section, creating it if necessary.
3774 template<bool big_endian
>
3775 Output_data_got
<32, big_endian
>*
3776 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
3778 if (this->got_
== NULL
)
3780 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
3782 this->got_
= new Output_data_got
<32, big_endian
>();
3785 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
3787 | elfcpp::SHF_WRITE
),
3788 this->got_
, false, true, true,
3791 // The old GNU linker creates a .got.plt section. We just
3792 // create another set of data in the .got section. Note that we
3793 // always create a PLT if we create a GOT, although the PLT
3795 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
3796 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
3798 | elfcpp::SHF_WRITE
),
3799 this->got_plt_
, false, false,
3802 // The first three entries are reserved.
3803 this->got_plt_
->set_current_data_size(3 * 4);
3805 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3806 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
3807 Symbol_table::PREDEFINED
,
3809 0, 0, elfcpp::STT_OBJECT
,
3811 elfcpp::STV_HIDDEN
, 0,
3817 // Get the dynamic reloc section, creating it if necessary.
3819 template<bool big_endian
>
3820 typename Target_arm
<big_endian
>::Reloc_section
*
3821 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
3823 if (this->rel_dyn_
== NULL
)
3825 gold_assert(layout
!= NULL
);
3826 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
3827 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
3828 elfcpp::SHF_ALLOC
, this->rel_dyn_
, true,
3829 false, false, false);
3831 return this->rel_dyn_
;
3834 // Insn_template methods.
3836 // Return byte size of an instruction template.
3839 Insn_template::size() const
3841 switch (this->type())
3844 case THUMB16_SPECIAL_TYPE
:
3855 // Return alignment of an instruction template.
3858 Insn_template::alignment() const
3860 switch (this->type())
3863 case THUMB16_SPECIAL_TYPE
:
3874 // Stub_template methods.
3876 Stub_template::Stub_template(
3877 Stub_type type
, const Insn_template
* insns
,
3879 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
3880 entry_in_thumb_mode_(false), relocs_()
3884 // Compute byte size and alignment of stub template.
3885 for (size_t i
= 0; i
< insn_count
; i
++)
3887 unsigned insn_alignment
= insns
[i
].alignment();
3888 size_t insn_size
= insns
[i
].size();
3889 gold_assert((offset
& (insn_alignment
- 1)) == 0);
3890 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
3891 switch (insns
[i
].type())
3893 case Insn_template::THUMB16_TYPE
:
3894 case Insn_template::THUMB16_SPECIAL_TYPE
:
3896 this->entry_in_thumb_mode_
= true;
3899 case Insn_template::THUMB32_TYPE
:
3900 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
3901 this->relocs_
.push_back(Reloc(i
, offset
));
3903 this->entry_in_thumb_mode_
= true;
3906 case Insn_template::ARM_TYPE
:
3907 // Handle cases where the target is encoded within the
3909 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
3910 this->relocs_
.push_back(Reloc(i
, offset
));
3913 case Insn_template::DATA_TYPE
:
3914 // Entry point cannot be data.
3915 gold_assert(i
!= 0);
3916 this->relocs_
.push_back(Reloc(i
, offset
));
3922 offset
+= insn_size
;
3924 this->size_
= offset
;
3929 // Template to implement do_write for a specific target endianity.
3931 template<bool big_endian
>
3933 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
3935 const Stub_template
* stub_template
= this->stub_template();
3936 const Insn_template
* insns
= stub_template
->insns();
3938 // FIXME: We do not handle BE8 encoding yet.
3939 unsigned char* pov
= view
;
3940 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
3942 switch (insns
[i
].type())
3944 case Insn_template::THUMB16_TYPE
:
3945 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
3947 case Insn_template::THUMB16_SPECIAL_TYPE
:
3948 elfcpp::Swap
<16, big_endian
>::writeval(
3950 this->thumb16_special(i
));
3952 case Insn_template::THUMB32_TYPE
:
3954 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
3955 uint32_t lo
= insns
[i
].data() & 0xffff;
3956 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
3957 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
3960 case Insn_template::ARM_TYPE
:
3961 case Insn_template::DATA_TYPE
:
3962 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
3967 pov
+= insns
[i
].size();
3969 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
3972 // Reloc_stub::Key methods.
3974 // Dump a Key as a string for debugging.
3977 Reloc_stub::Key::name() const
3979 if (this->r_sym_
== invalid_index
)
3981 // Global symbol key name
3982 // <stub-type>:<symbol name>:<addend>.
3983 const std::string sym_name
= this->u_
.symbol
->name();
3984 // We need to print two hex number and two colons. So just add 100 bytes
3985 // to the symbol name size.
3986 size_t len
= sym_name
.size() + 100;
3987 char* buffer
= new char[len
];
3988 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
3989 sym_name
.c_str(), this->addend_
);
3990 gold_assert(c
> 0 && c
< static_cast<int>(len
));
3992 return std::string(buffer
);
3996 // local symbol key name
3997 // <stub-type>:<object>:<r_sym>:<addend>.
3998 const size_t len
= 200;
4000 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4001 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4002 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4003 return std::string(buffer
);
4007 // Reloc_stub methods.
4009 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4010 // LOCATION to DESTINATION.
4011 // This code is based on the arm_type_of_stub function in
4012 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
4016 Reloc_stub::stub_type_for_reloc(
4017 unsigned int r_type
,
4018 Arm_address location
,
4019 Arm_address destination
,
4020 bool target_is_thumb
)
4022 Stub_type stub_type
= arm_stub_none
;
4024 // This is a bit ugly but we want to avoid using a templated class for
4025 // big and little endianities.
4027 bool should_force_pic_veneer
;
4030 if (parameters
->target().is_big_endian())
4032 const Target_arm
<true>* big_endian_target
=
4033 Target_arm
<true>::default_target();
4034 may_use_blx
= big_endian_target
->may_use_blx();
4035 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4036 thumb2
= big_endian_target
->using_thumb2();
4037 thumb_only
= big_endian_target
->using_thumb_only();
4041 const Target_arm
<false>* little_endian_target
=
4042 Target_arm
<false>::default_target();
4043 may_use_blx
= little_endian_target
->may_use_blx();
4044 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4045 thumb2
= little_endian_target
->using_thumb2();
4046 thumb_only
= little_endian_target
->using_thumb_only();
4049 int64_t branch_offset
= (int64_t)destination
- location
;
4051 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4053 // Handle cases where:
4054 // - this call goes too far (different Thumb/Thumb2 max
4056 // - it's a Thumb->Arm call and blx is not available, or it's a
4057 // Thumb->Arm branch (not bl). A stub is needed in this case.
4059 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4060 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4062 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4063 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4064 || ((!target_is_thumb
)
4065 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4066 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4068 if (target_is_thumb
)
4073 stub_type
= (parameters
->options().shared()
4074 || should_force_pic_veneer
)
4077 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4078 // V5T and above. Stub starts with ARM code, so
4079 // we must be able to switch mode before
4080 // reaching it, which is only possible for 'bl'
4081 // (ie R_ARM_THM_CALL relocation).
4082 ? arm_stub_long_branch_any_thumb_pic
4083 // On V4T, use Thumb code only.
4084 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4088 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4089 ? arm_stub_long_branch_any_any
// V5T and above.
4090 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4094 stub_type
= (parameters
->options().shared()
4095 || should_force_pic_veneer
)
4096 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4097 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4104 // FIXME: We should check that the input section is from an
4105 // object that has interwork enabled.
4107 stub_type
= (parameters
->options().shared()
4108 || should_force_pic_veneer
)
4111 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4112 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4113 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4117 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4118 ? arm_stub_long_branch_any_any
// V5T and above.
4119 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4121 // Handle v4t short branches.
4122 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4123 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4124 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4125 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4129 else if (r_type
== elfcpp::R_ARM_CALL
4130 || r_type
== elfcpp::R_ARM_JUMP24
4131 || r_type
== elfcpp::R_ARM_PLT32
)
4133 if (target_is_thumb
)
4137 // FIXME: We should check that the input section is from an
4138 // object that has interwork enabled.
4140 // We have an extra 2-bytes reach because of
4141 // the mode change (bit 24 (H) of BLX encoding).
4142 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4143 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4144 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4145 || (r_type
== elfcpp::R_ARM_JUMP24
)
4146 || (r_type
== elfcpp::R_ARM_PLT32
))
4148 stub_type
= (parameters
->options().shared()
4149 || should_force_pic_veneer
)
4152 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4153 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4157 ? arm_stub_long_branch_any_any
// V5T and above.
4158 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4164 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4165 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4167 stub_type
= (parameters
->options().shared()
4168 || should_force_pic_veneer
)
4169 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4170 : arm_stub_long_branch_any_any
; /// non-PIC.
4178 // Cortex_a8_stub methods.
4180 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4181 // I is the position of the instruction template in the stub template.
4184 Cortex_a8_stub::do_thumb16_special(size_t i
)
4186 // The only use of this is to copy condition code from a conditional
4187 // branch being worked around to the corresponding conditional branch in
4189 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4191 uint16_t data
= this->stub_template()->insns()[i
].data();
4192 gold_assert((data
& 0xff00U
) == 0xd000U
);
4193 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4197 // Stub_factory methods.
4199 Stub_factory::Stub_factory()
4201 // The instruction template sequences are declared as static
4202 // objects and initialized first time the constructor runs.
4204 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4205 // to reach the stub if necessary.
4206 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4208 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4209 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4210 // dcd R_ARM_ABS32(X)
4213 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4215 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4217 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4218 Insn_template::arm_insn(0xe12fff1c), // bx ip
4219 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4220 // dcd R_ARM_ABS32(X)
4223 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4224 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4226 Insn_template::thumb16_insn(0xb401), // push {r0}
4227 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4228 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4229 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4230 Insn_template::thumb16_insn(0x4760), // bx ip
4231 Insn_template::thumb16_insn(0xbf00), // nop
4232 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4233 // dcd R_ARM_ABS32(X)
4236 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4238 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4240 Insn_template::thumb16_insn(0x4778), // bx pc
4241 Insn_template::thumb16_insn(0x46c0), // nop
4242 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4243 Insn_template::arm_insn(0xe12fff1c), // bx ip
4244 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4245 // dcd R_ARM_ABS32(X)
4248 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4250 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4252 Insn_template::thumb16_insn(0x4778), // bx pc
4253 Insn_template::thumb16_insn(0x46c0), // nop
4254 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4255 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4256 // dcd R_ARM_ABS32(X)
4259 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4260 // one, when the destination is close enough.
4261 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4263 Insn_template::thumb16_insn(0x4778), // bx pc
4264 Insn_template::thumb16_insn(0x46c0), // nop
4265 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4268 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4269 // blx to reach the stub if necessary.
4270 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4272 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4273 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4274 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4275 // dcd R_ARM_REL32(X-4)
4278 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4279 // blx to reach the stub if necessary. We can not add into pc;
4280 // it is not guaranteed to mode switch (different in ARMv6 and
4282 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4284 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4285 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4286 Insn_template::arm_insn(0xe12fff1c), // bx ip
4287 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4288 // dcd R_ARM_REL32(X)
4291 // V4T ARM -> ARM long branch stub, PIC.
4292 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4294 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4295 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4296 Insn_template::arm_insn(0xe12fff1c), // bx ip
4297 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4298 // dcd R_ARM_REL32(X)
4301 // V4T Thumb -> ARM long branch stub, PIC.
4302 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4304 Insn_template::thumb16_insn(0x4778), // bx pc
4305 Insn_template::thumb16_insn(0x46c0), // nop
4306 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4307 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4308 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4309 // dcd R_ARM_REL32(X)
4312 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4314 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4316 Insn_template::thumb16_insn(0xb401), // push {r0}
4317 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4318 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4319 Insn_template::thumb16_insn(0x4484), // add ip, r0
4320 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4321 Insn_template::thumb16_insn(0x4760), // bx ip
4322 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4323 // dcd R_ARM_REL32(X)
4326 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4328 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4330 Insn_template::thumb16_insn(0x4778), // bx pc
4331 Insn_template::thumb16_insn(0x46c0), // nop
4332 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4333 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4334 Insn_template::arm_insn(0xe12fff1c), // bx ip
4335 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4336 // dcd R_ARM_REL32(X)
4339 // Cortex-A8 erratum-workaround stubs.
4341 // Stub used for conditional branches (which may be beyond +/-1MB away,
4342 // so we can't use a conditional branch to reach this stub).
4349 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4351 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4352 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4353 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4357 // Stub used for b.w and bl.w instructions.
4359 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4361 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4364 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4366 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4369 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4370 // instruction (which switches to ARM mode) to point to this stub. Jump to
4371 // the real destination using an ARM-mode branch.
4372 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4374 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4377 // Stub used to provide an interworking for R_ARM_V4BX relocation
4378 // (bx r[n] instruction).
4379 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4381 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4382 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4383 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4386 // Fill in the stub template look-up table. Stub templates are constructed
4387 // per instance of Stub_factory for fast look-up without locking
4388 // in a thread-enabled environment.
4390 this->stub_templates_
[arm_stub_none
] =
4391 new Stub_template(arm_stub_none
, NULL
, 0);
4393 #define DEF_STUB(x) \
4397 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4398 Stub_type type = arm_stub_##x; \
4399 this->stub_templates_[type] = \
4400 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4408 // Stub_table methods.
4410 // Removel all Cortex-A8 stub.
4412 template<bool big_endian
>
4414 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4416 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4417 p
!= this->cortex_a8_stubs_
.end();
4420 this->cortex_a8_stubs_
.clear();
4423 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4425 template<bool big_endian
>
4427 Stub_table
<big_endian
>::relocate_stub(
4429 const Relocate_info
<32, big_endian
>* relinfo
,
4430 Target_arm
<big_endian
>* arm_target
,
4431 Output_section
* output_section
,
4432 unsigned char* view
,
4433 Arm_address address
,
4434 section_size_type view_size
)
4436 const Stub_template
* stub_template
= stub
->stub_template();
4437 if (stub_template
->reloc_count() != 0)
4439 // Adjust view to cover the stub only.
4440 section_size_type offset
= stub
->offset();
4441 section_size_type stub_size
= stub_template
->size();
4442 gold_assert(offset
+ stub_size
<= view_size
);
4444 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4445 address
+ offset
, stub_size
);
4449 // Relocate all stubs in this stub table.
4451 template<bool big_endian
>
4453 Stub_table
<big_endian
>::relocate_stubs(
4454 const Relocate_info
<32, big_endian
>* relinfo
,
4455 Target_arm
<big_endian
>* arm_target
,
4456 Output_section
* output_section
,
4457 unsigned char* view
,
4458 Arm_address address
,
4459 section_size_type view_size
)
4461 // If we are passed a view bigger than the stub table's. we need to
4463 gold_assert(address
== this->address()
4465 == static_cast<section_size_type
>(this->data_size())));
4467 // Relocate all relocation stubs.
4468 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4469 p
!= this->reloc_stubs_
.end();
4471 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4472 address
, view_size
);
4474 // Relocate all Cortex-A8 stubs.
4475 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4476 p
!= this->cortex_a8_stubs_
.end();
4478 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4479 address
, view_size
);
4481 // Relocate all ARM V4BX stubs.
4482 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4483 p
!= this->arm_v4bx_stubs_
.end();
4487 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4488 address
, view_size
);
4492 // Write out the stubs to file.
4494 template<bool big_endian
>
4496 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4498 off_t offset
= this->offset();
4499 const section_size_type oview_size
=
4500 convert_to_section_size_type(this->data_size());
4501 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4503 // Write relocation stubs.
4504 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4505 p
!= this->reloc_stubs_
.end();
4508 Reloc_stub
* stub
= p
->second
;
4509 Arm_address address
= this->address() + stub
->offset();
4511 == align_address(address
,
4512 stub
->stub_template()->alignment()));
4513 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4517 // Write Cortex-A8 stubs.
4518 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4519 p
!= this->cortex_a8_stubs_
.end();
4522 Cortex_a8_stub
* stub
= p
->second
;
4523 Arm_address address
= this->address() + stub
->offset();
4525 == align_address(address
,
4526 stub
->stub_template()->alignment()));
4527 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4531 // Write ARM V4BX relocation stubs.
4532 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4533 p
!= this->arm_v4bx_stubs_
.end();
4539 Arm_address address
= this->address() + (*p
)->offset();
4541 == align_address(address
,
4542 (*p
)->stub_template()->alignment()));
4543 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4547 of
->write_output_view(this->offset(), oview_size
, oview
);
4550 // Update the data size and address alignment of the stub table at the end
4551 // of a relaxation pass. Return true if either the data size or the
4552 // alignment changed in this relaxation pass.
4554 template<bool big_endian
>
4556 Stub_table
<big_endian
>::update_data_size_and_addralign()
4559 unsigned addralign
= 1;
4561 // Go over all stubs in table to compute data size and address alignment.
4563 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4564 p
!= this->reloc_stubs_
.end();
4567 const Stub_template
* stub_template
= p
->second
->stub_template();
4568 addralign
= std::max(addralign
, stub_template
->alignment());
4569 size
= (align_address(size
, stub_template
->alignment())
4570 + stub_template
->size());
4573 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4574 p
!= this->cortex_a8_stubs_
.end();
4577 const Stub_template
* stub_template
= p
->second
->stub_template();
4578 addralign
= std::max(addralign
, stub_template
->alignment());
4579 size
= (align_address(size
, stub_template
->alignment())
4580 + stub_template
->size());
4583 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4584 p
!= this->arm_v4bx_stubs_
.end();
4590 const Stub_template
* stub_template
= (*p
)->stub_template();
4591 addralign
= std::max(addralign
, stub_template
->alignment());
4592 size
= (align_address(size
, stub_template
->alignment())
4593 + stub_template
->size());
4596 // Check if either data size or alignment changed in this pass.
4597 // Update prev_data_size_ and prev_addralign_. These will be used
4598 // as the current data size and address alignment for the next pass.
4599 bool changed
= size
!= this->prev_data_size_
;
4600 this->prev_data_size_
= size
;
4602 if (addralign
!= this->prev_addralign_
)
4604 this->prev_addralign_
= addralign
;
4609 // Finalize the stubs. This sets the offsets of the stubs within the stub
4610 // table. It also marks all input sections needing Cortex-A8 workaround.
4612 template<bool big_endian
>
4614 Stub_table
<big_endian
>::finalize_stubs()
4617 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4618 p
!= this->reloc_stubs_
.end();
4621 Reloc_stub
* stub
= p
->second
;
4622 const Stub_template
* stub_template
= stub
->stub_template();
4623 uint64_t stub_addralign
= stub_template
->alignment();
4624 off
= align_address(off
, stub_addralign
);
4625 stub
->set_offset(off
);
4626 off
+= stub_template
->size();
4629 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4630 p
!= this->cortex_a8_stubs_
.end();
4633 Cortex_a8_stub
* stub
= p
->second
;
4634 const Stub_template
* stub_template
= stub
->stub_template();
4635 uint64_t stub_addralign
= stub_template
->alignment();
4636 off
= align_address(off
, stub_addralign
);
4637 stub
->set_offset(off
);
4638 off
+= stub_template
->size();
4640 // Mark input section so that we can determine later if a code section
4641 // needs the Cortex-A8 workaround quickly.
4642 Arm_relobj
<big_endian
>* arm_relobj
=
4643 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
4644 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
4647 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4648 p
!= this->arm_v4bx_stubs_
.end();
4654 const Stub_template
* stub_template
= (*p
)->stub_template();
4655 uint64_t stub_addralign
= stub_template
->alignment();
4656 off
= align_address(off
, stub_addralign
);
4657 (*p
)->set_offset(off
);
4658 off
+= stub_template
->size();
4661 gold_assert(off
<= this->prev_data_size_
);
4664 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4665 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4666 // of the address range seen by the linker.
4668 template<bool big_endian
>
4670 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
4671 Target_arm
<big_endian
>* arm_target
,
4672 unsigned char* view
,
4673 Arm_address view_address
,
4674 section_size_type view_size
)
4676 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4677 for (Cortex_a8_stub_list::const_iterator p
=
4678 this->cortex_a8_stubs_
.lower_bound(view_address
);
4679 ((p
!= this->cortex_a8_stubs_
.end())
4680 && (p
->first
< (view_address
+ view_size
)));
4683 // We do not store the THUMB bit in the LSB of either the branch address
4684 // or the stub offset. There is no need to strip the LSB.
4685 Arm_address branch_address
= p
->first
;
4686 const Cortex_a8_stub
* stub
= p
->second
;
4687 Arm_address stub_address
= this->address() + stub
->offset();
4689 // Offset of the branch instruction relative to this view.
4690 section_size_type offset
=
4691 convert_to_section_size_type(branch_address
- view_address
);
4692 gold_assert((offset
+ 4) <= view_size
);
4694 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
4695 view
+ offset
, branch_address
);
4699 // Arm_input_section methods.
4701 // Initialize an Arm_input_section.
4703 template<bool big_endian
>
4705 Arm_input_section
<big_endian
>::init()
4707 Relobj
* relobj
= this->relobj();
4708 unsigned int shndx
= this->shndx();
4710 // Cache these to speed up size and alignment queries. It is too slow
4711 // to call section_addraglin and section_size every time.
4712 this->original_addralign_
= relobj
->section_addralign(shndx
);
4713 this->original_size_
= relobj
->section_size(shndx
);
4715 // We want to make this look like the original input section after
4716 // output sections are finalized.
4717 Output_section
* os
= relobj
->output_section(shndx
);
4718 off_t offset
= relobj
->output_section_offset(shndx
);
4719 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
4720 this->set_address(os
->address() + offset
);
4721 this->set_file_offset(os
->offset() + offset
);
4723 this->set_current_data_size(this->original_size_
);
4724 this->finalize_data_size();
4727 template<bool big_endian
>
4729 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
4731 // We have to write out the original section content.
4732 section_size_type section_size
;
4733 const unsigned char* section_contents
=
4734 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
4735 of
->write(this->offset(), section_contents
, section_size
);
4737 // If this owns a stub table and it is not empty, write it.
4738 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
4739 this->stub_table_
->write(of
);
4742 // Finalize data size.
4744 template<bool big_endian
>
4746 Arm_input_section
<big_endian
>::set_final_data_size()
4748 // If this owns a stub table, finalize its data size as well.
4749 if (this->is_stub_table_owner())
4751 uint64_t address
= this->address();
4753 // The stub table comes after the original section contents.
4754 address
+= this->original_size_
;
4755 address
= align_address(address
, this->stub_table_
->addralign());
4756 off_t offset
= this->offset() + (address
- this->address());
4757 this->stub_table_
->set_address_and_file_offset(address
, offset
);
4758 address
+= this->stub_table_
->data_size();
4759 gold_assert(address
== this->address() + this->current_data_size());
4762 this->set_data_size(this->current_data_size());
4765 // Reset address and file offset.
4767 template<bool big_endian
>
4769 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
4771 // Size of the original input section contents.
4772 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
4774 // If this is a stub table owner, account for the stub table size.
4775 if (this->is_stub_table_owner())
4777 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
4779 // Reset the stub table's address and file offset. The
4780 // current data size for child will be updated after that.
4781 stub_table_
->reset_address_and_file_offset();
4782 off
= align_address(off
, stub_table_
->addralign());
4783 off
+= stub_table
->current_data_size();
4786 this->set_current_data_size(off
);
4789 // Arm_exidx_cantunwind methods.
4791 // Write this to Output file OF for a fixed endianity.
4793 template<bool big_endian
>
4795 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
4797 off_t offset
= this->offset();
4798 const section_size_type oview_size
= 8;
4799 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4801 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
4802 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
);
4804 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
4805 gold_assert(os
!= NULL
);
4807 Arm_relobj
<big_endian
>* arm_relobj
=
4808 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
4809 Arm_address output_offset
=
4810 arm_relobj
->get_output_section_offset(this->shndx_
);
4811 Arm_address section_start
;
4812 if(output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
4813 section_start
= os
->address() + output_offset
;
4816 // Currently this only happens for a relaxed section.
4817 const Output_relaxed_input_section
* poris
=
4818 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
4819 gold_assert(poris
!= NULL
);
4820 section_start
= poris
->address();
4823 // We always append this to the end of an EXIDX section.
4824 Arm_address output_address
=
4825 section_start
+ this->relobj_
->section_size(this->shndx_
);
4827 // Write out the entry. The first word either points to the beginning
4828 // or after the end of a text section. The second word is the special
4829 // EXIDX_CANTUNWIND value.
4830 elfcpp::Swap
<32, big_endian
>::writeval(wv
, output_address
);
4831 elfcpp::Swap
<32, big_endian
>::writeval(wv
+ 1, elfcpp::EXIDX_CANTUNWIND
);
4833 of
->write_output_view(this->offset(), oview_size
, oview
);
4836 // Arm_exidx_merged_section methods.
4838 // Constructor for Arm_exidx_merged_section.
4839 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4840 // SECTION_OFFSET_MAP points to a section offset map describing how
4841 // parts of the input section are mapped to output. DELETED_BYTES is
4842 // the number of bytes deleted from the EXIDX input section.
4844 Arm_exidx_merged_section::Arm_exidx_merged_section(
4845 const Arm_exidx_input_section
& exidx_input_section
,
4846 const Arm_exidx_section_offset_map
& section_offset_map
,
4847 uint32_t deleted_bytes
)
4848 : Output_relaxed_input_section(exidx_input_section
.relobj(),
4849 exidx_input_section
.shndx(),
4850 exidx_input_section
.addralign()),
4851 exidx_input_section_(exidx_input_section
),
4852 section_offset_map_(section_offset_map
)
4854 // Fix size here so that we do not need to implement set_final_data_size.
4855 this->set_data_size(exidx_input_section
.size() - deleted_bytes
);
4856 this->fix_data_size();
4859 // Given an input OBJECT, an input section index SHNDX within that
4860 // object, and an OFFSET relative to the start of that input
4861 // section, return whether or not the corresponding offset within
4862 // the output section is known. If this function returns true, it
4863 // sets *POUTPUT to the output offset. The value -1 indicates that
4864 // this input offset is being discarded.
4867 Arm_exidx_merged_section::do_output_offset(
4868 const Relobj
* relobj
,
4870 section_offset_type offset
,
4871 section_offset_type
* poutput
) const
4873 // We only handle offsets for the original EXIDX input section.
4874 if (relobj
!= this->exidx_input_section_
.relobj()
4875 || shndx
!= this->exidx_input_section_
.shndx())
4878 section_offset_type section_size
=
4879 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
4880 if (offset
< 0 || offset
>= section_size
)
4881 // Input offset is out of valid range.
4885 // We need to look up the section offset map to determine the output
4886 // offset. Find the reference point in map that is first offset
4887 // bigger than or equal to this offset.
4888 Arm_exidx_section_offset_map::const_iterator p
=
4889 this->section_offset_map_
.lower_bound(offset
);
4891 // The section offset maps are build such that this should not happen if
4892 // input offset is in the valid range.
4893 gold_assert(p
!= this->section_offset_map_
.end());
4895 // We need to check if this is dropped.
4896 section_offset_type ref
= p
->first
;
4897 section_offset_type mapped_ref
= p
->second
;
4899 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
4900 // Offset is present in output.
4901 *poutput
= mapped_ref
+ (offset
- ref
);
4903 // Offset is discarded owing to EXIDX entry merging.
4910 // Write this to output file OF.
4913 Arm_exidx_merged_section::do_write(Output_file
* of
)
4915 // If we retain or discard the whole EXIDX input section, we would
4917 gold_assert(this->data_size() != this->exidx_input_section_
.size()
4918 && this->data_size() != 0);
4920 off_t offset
= this->offset();
4921 const section_size_type oview_size
= this->data_size();
4922 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4924 Output_section
* os
= this->relobj()->output_section(this->shndx());
4925 gold_assert(os
!= NULL
);
4927 // Get contents of EXIDX input section.
4928 section_size_type section_size
;
4929 const unsigned char* section_contents
=
4930 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
4931 gold_assert(section_size
== this->exidx_input_section_
.size());
4933 // Go over spans of input offsets and write only those that are not
4935 section_offset_type in_start
= 0;
4936 section_offset_type out_start
= 0;
4937 for(Arm_exidx_section_offset_map::const_iterator p
=
4938 this->section_offset_map_
.begin();
4939 p
!= this->section_offset_map_
.end();
4942 section_offset_type in_end
= p
->first
;
4943 gold_assert(in_end
>= in_start
);
4944 section_offset_type out_end
= p
->second
;
4945 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
4948 size_t out_chunk_size
=
4949 convert_types
<size_t>(out_end
- out_start
+ 1);
4950 gold_assert(out_chunk_size
== in_chunk_size
);
4951 memcpy(oview
+ out_start
, section_contents
+ in_start
,
4953 out_start
+= out_chunk_size
;
4955 in_start
+= in_chunk_size
;
4958 gold_assert(convert_to_section_size_type(out_start
) == oview_size
);
4959 of
->write_output_view(this->offset(), oview_size
, oview
);
4962 // Arm_exidx_fixup methods.
4964 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
4965 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
4966 // points to the end of the last seen EXIDX section.
4969 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
4971 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
4972 && this->last_input_section_
!= NULL
)
4974 Relobj
* relobj
= this->last_input_section_
->relobj();
4975 unsigned int text_shndx
= this->last_input_section_
->link();
4976 Arm_exidx_cantunwind
* cantunwind
=
4977 new Arm_exidx_cantunwind(relobj
, text_shndx
);
4978 this->exidx_output_section_
->add_output_section_data(cantunwind
);
4979 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
4983 // Process an EXIDX section entry in input. Return whether this entry
4984 // can be deleted in the output. SECOND_WORD in the second word of the
4988 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
4991 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
4993 // Merge if previous entry is also an EXIDX_CANTUNWIND.
4994 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
4995 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
4997 else if ((second_word
& 0x80000000) != 0)
4999 // Inlined unwinding data. Merge if equal to previous.
5000 delete_entry
= (this->last_unwind_type_
== UT_INLINED_ENTRY
5001 && this->last_inlined_entry_
== second_word
);
5002 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5003 this->last_inlined_entry_
= second_word
;
5007 // Normal table entry. In theory we could merge these too,
5008 // but duplicate entries are likely to be much less common.
5009 delete_entry
= false;
5010 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5012 return delete_entry
;
5015 // Update the current section offset map during EXIDX section fix-up.
5016 // If there is no map, create one. INPUT_OFFSET is the offset of a
5017 // reference point, DELETED_BYTES is the number of deleted by in the
5018 // section so far. If DELETE_ENTRY is true, the reference point and
5019 // all offsets after the previous reference point are discarded.
5022 Arm_exidx_fixup::update_offset_map(
5023 section_offset_type input_offset
,
5024 section_size_type deleted_bytes
,
5027 if (this->section_offset_map_
== NULL
)
5028 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5029 section_offset_type output_offset
= (delete_entry
5031 : input_offset
- deleted_bytes
);
5032 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5035 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5036 // bytes deleted. If some entries are merged, also store a pointer to a newly
5037 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
5038 // caller owns the map and is responsible for releasing it after use.
5040 template<bool big_endian
>
5042 Arm_exidx_fixup::process_exidx_section(
5043 const Arm_exidx_input_section
* exidx_input_section
,
5044 Arm_exidx_section_offset_map
** psection_offset_map
)
5046 Relobj
* relobj
= exidx_input_section
->relobj();
5047 unsigned shndx
= exidx_input_section
->shndx();
5048 section_size_type section_size
;
5049 const unsigned char* section_contents
=
5050 relobj
->section_contents(shndx
, §ion_size
, false);
5052 if ((section_size
% 8) != 0)
5054 // Something is wrong with this section. Better not touch it.
5055 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5056 relobj
->name().c_str(), shndx
);
5057 this->last_input_section_
= exidx_input_section
;
5058 this->last_unwind_type_
= UT_NONE
;
5062 uint32_t deleted_bytes
= 0;
5063 bool prev_delete_entry
= false;
5064 gold_assert(this->section_offset_map_
== NULL
);
5066 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5068 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5070 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5071 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5073 bool delete_entry
= this->process_exidx_entry(second_word
);
5075 // Entry deletion causes changes in output offsets. We use a std::map
5076 // to record these. And entry (x, y) means input offset x
5077 // is mapped to output offset y. If y is invalid_offset, then x is
5078 // dropped in the output. Because of the way std::map::lower_bound
5079 // works, we record the last offset in a region w.r.t to keeping or
5080 // dropping. If there is no entry (x0, y0) for an input offset x0,
5081 // the output offset y0 of it is determined by the output offset y1 of
5082 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5083 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5085 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5086 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5088 // Update total deleted bytes for this entry.
5092 prev_delete_entry
= delete_entry
;
5095 // If section offset map is not NULL, make an entry for the end of
5097 if (this->section_offset_map_
!= NULL
)
5098 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5100 *psection_offset_map
= this->section_offset_map_
;
5101 this->section_offset_map_
= NULL
;
5102 this->last_input_section_
= exidx_input_section
;
5104 return deleted_bytes
;
5107 // Arm_output_section methods.
5109 // Create a stub group for input sections from BEGIN to END. OWNER
5110 // points to the input section to be the owner a new stub table.
5112 template<bool big_endian
>
5114 Arm_output_section
<big_endian
>::create_stub_group(
5115 Input_section_list::const_iterator begin
,
5116 Input_section_list::const_iterator end
,
5117 Input_section_list::const_iterator owner
,
5118 Target_arm
<big_endian
>* target
,
5119 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
)
5121 // We use a different kind of relaxed section in an EXIDX section.
5122 // The static casting from Output_relaxed_input_section to
5123 // Arm_input_section is invalid in an EXIDX section. We are okay
5124 // because we should not be calling this for an EXIDX section.
5125 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5127 // Currently we convert ordinary input sections into relaxed sections only
5128 // at this point but we may want to support creating relaxed input section
5129 // very early. So we check here to see if owner is already a relaxed
5132 Arm_input_section
<big_endian
>* arm_input_section
;
5133 if (owner
->is_relaxed_input_section())
5136 Arm_input_section
<big_endian
>::as_arm_input_section(
5137 owner
->relaxed_input_section());
5141 gold_assert(owner
->is_input_section());
5142 // Create a new relaxed input section.
5144 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5145 new_relaxed_sections
->push_back(arm_input_section
);
5148 // Create a stub table.
5149 Stub_table
<big_endian
>* stub_table
=
5150 target
->new_stub_table(arm_input_section
);
5152 arm_input_section
->set_stub_table(stub_table
);
5154 Input_section_list::const_iterator p
= begin
;
5155 Input_section_list::const_iterator prev_p
;
5157 // Look for input sections or relaxed input sections in [begin ... end].
5160 if (p
->is_input_section() || p
->is_relaxed_input_section())
5162 // The stub table information for input sections live
5163 // in their objects.
5164 Arm_relobj
<big_endian
>* arm_relobj
=
5165 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5166 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5170 while (prev_p
!= end
);
5173 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5174 // of stub groups. We grow a stub group by adding input section until the
5175 // size is just below GROUP_SIZE. The last input section will be converted
5176 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5177 // input section after the stub table, effectively double the group size.
5179 // This is similar to the group_sections() function in elf32-arm.c but is
5180 // implemented differently.
5182 template<bool big_endian
>
5184 Arm_output_section
<big_endian
>::group_sections(
5185 section_size_type group_size
,
5186 bool stubs_always_after_branch
,
5187 Target_arm
<big_endian
>* target
)
5189 // We only care about sections containing code.
5190 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5193 // States for grouping.
5196 // No group is being built.
5198 // A group is being built but the stub table is not found yet.
5199 // We keep group a stub group until the size is just under GROUP_SIZE.
5200 // The last input section in the group will be used as the stub table.
5201 FINDING_STUB_SECTION
,
5202 // A group is being built and we have already found a stub table.
5203 // We enter this state to grow a stub group by adding input section
5204 // after the stub table. This effectively doubles the group size.
5208 // Any newly created relaxed sections are stored here.
5209 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5211 State state
= NO_GROUP
;
5212 section_size_type off
= 0;
5213 section_size_type group_begin_offset
= 0;
5214 section_size_type group_end_offset
= 0;
5215 section_size_type stub_table_end_offset
= 0;
5216 Input_section_list::const_iterator group_begin
=
5217 this->input_sections().end();
5218 Input_section_list::const_iterator stub_table
=
5219 this->input_sections().end();
5220 Input_section_list::const_iterator group_end
= this->input_sections().end();
5221 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5222 p
!= this->input_sections().end();
5225 section_size_type section_begin_offset
=
5226 align_address(off
, p
->addralign());
5227 section_size_type section_end_offset
=
5228 section_begin_offset
+ p
->data_size();
5230 // Check to see if we should group the previously seens sections.
5236 case FINDING_STUB_SECTION
:
5237 // Adding this section makes the group larger than GROUP_SIZE.
5238 if (section_end_offset
- group_begin_offset
>= group_size
)
5240 if (stubs_always_after_branch
)
5242 gold_assert(group_end
!= this->input_sections().end());
5243 this->create_stub_group(group_begin
, group_end
, group_end
,
5244 target
, &new_relaxed_sections
);
5249 // But wait, there's more! Input sections up to
5250 // stub_group_size bytes after the stub table can be
5251 // handled by it too.
5252 state
= HAS_STUB_SECTION
;
5253 stub_table
= group_end
;
5254 stub_table_end_offset
= group_end_offset
;
5259 case HAS_STUB_SECTION
:
5260 // Adding this section makes the post stub-section group larger
5262 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5264 gold_assert(group_end
!= this->input_sections().end());
5265 this->create_stub_group(group_begin
, group_end
, stub_table
,
5266 target
, &new_relaxed_sections
);
5275 // If we see an input section and currently there is no group, start
5276 // a new one. Skip any empty sections.
5277 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5278 && (p
->relobj()->section_size(p
->shndx()) != 0))
5280 if (state
== NO_GROUP
)
5282 state
= FINDING_STUB_SECTION
;
5284 group_begin_offset
= section_begin_offset
;
5287 // Keep track of the last input section seen.
5289 group_end_offset
= section_end_offset
;
5292 off
= section_end_offset
;
5295 // Create a stub group for any ungrouped sections.
5296 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5298 gold_assert(group_end
!= this->input_sections().end());
5299 this->create_stub_group(group_begin
, group_end
,
5300 (state
== FINDING_STUB_SECTION
5303 target
, &new_relaxed_sections
);
5306 // Convert input section into relaxed input section in a batch.
5307 if (!new_relaxed_sections
.empty())
5308 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5310 // Update the section offsets
5311 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5313 Arm_relobj
<big_endian
>* arm_relobj
=
5314 Arm_relobj
<big_endian
>::as_arm_relobj(
5315 new_relaxed_sections
[i
]->relobj());
5316 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5317 // Tell Arm_relobj that this input section is converted.
5318 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5322 // Append non empty text sections in this to LIST in ascending
5323 // order of their position in this.
5325 template<bool big_endian
>
5327 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5328 Text_section_list
* list
)
5330 // We only care about text sections.
5331 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5334 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5336 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5337 p
!= this->input_sections().end();
5340 // We only care about plain or relaxed input sections. We also
5341 // ignore any merged sections.
5342 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5343 && p
->data_size() != 0)
5344 list
->push_back(Text_section_list::value_type(p
->relobj(),
5349 template<bool big_endian
>
5351 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5352 const Text_section_list
& sorted_text_sections
,
5353 Symbol_table
* symtab
)
5355 // We should only do this for the EXIDX output section.
5356 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5358 // We don't want the relaxation loop to undo these changes, so we discard
5359 // the current saved states and take another one after the fix-up.
5360 this->discard_states();
5362 // Remove all input sections.
5363 uint64_t address
= this->address();
5364 typedef std::list
<Simple_input_section
> Simple_input_section_list
;
5365 Simple_input_section_list input_sections
;
5366 this->reset_address_and_file_offset();
5367 this->get_input_sections(address
, std::string(""), &input_sections
);
5369 if (!this->input_sections().empty())
5370 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5372 // Go through all the known input sections and record them.
5373 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5374 Section_id_set known_input_sections
;
5375 for (Simple_input_section_list::const_iterator p
= input_sections
.begin();
5376 p
!= input_sections
.end();
5379 // This should never happen. At this point, we should only see
5380 // plain EXIDX input sections.
5381 gold_assert(!p
->is_relaxed_input_section());
5382 known_input_sections
.insert(Section_id(p
->relobj(), p
->shndx()));
5385 Arm_exidx_fixup
exidx_fixup(this);
5387 // Go over the sorted text sections.
5388 Section_id_set processed_input_sections
;
5389 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5390 p
!= sorted_text_sections
.end();
5393 Relobj
* relobj
= p
->first
;
5394 unsigned int shndx
= p
->second
;
5396 Arm_relobj
<big_endian
>* arm_relobj
=
5397 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5398 const Arm_exidx_input_section
* exidx_input_section
=
5399 arm_relobj
->exidx_input_section_by_link(shndx
);
5401 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5402 // entry pointing to the end of the last seen EXIDX section.
5403 if (exidx_input_section
== NULL
)
5405 exidx_fixup
.add_exidx_cantunwind_as_needed();
5409 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5410 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5411 Section_id
sid(exidx_relobj
, exidx_shndx
);
5412 if (known_input_sections
.find(sid
) == known_input_sections
.end())
5414 // This is odd. We have not seen this EXIDX input section before.
5415 // We cannot do fix-up.
5416 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5417 exidx_shndx
, exidx_relobj
->name().c_str());
5418 exidx_fixup
.add_exidx_cantunwind_as_needed();
5422 // Fix up coverage and append input section to output data list.
5423 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5424 uint32_t deleted_bytes
=
5425 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5426 §ion_offset_map
);
5428 if (deleted_bytes
== exidx_input_section
->size())
5430 // The whole EXIDX section got merged. Remove it from output.
5431 gold_assert(section_offset_map
== NULL
);
5432 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5434 else if (deleted_bytes
> 0)
5436 // Some entries are merged. We need to convert this EXIDX input
5437 // section into a relaxed section.
5438 gold_assert(section_offset_map
!= NULL
);
5439 Arm_exidx_merged_section
* merged_section
=
5440 new Arm_exidx_merged_section(*exidx_input_section
,
5441 *section_offset_map
, deleted_bytes
);
5442 this->add_relaxed_input_section(merged_section
);
5443 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5447 // Just add back the EXIDX input section.
5448 gold_assert(section_offset_map
== NULL
);
5449 Output_section::Simple_input_section
sis(exidx_relobj
, exidx_shndx
);
5450 this->add_simple_input_section(sis
, exidx_input_section
->size(),
5451 exidx_input_section
->addralign());
5454 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5457 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5458 exidx_fixup
.add_exidx_cantunwind_as_needed();
5460 // Remove any known EXIDX input sections that are not processed.
5461 for (Simple_input_section_list::const_iterator p
= input_sections
.begin();
5462 p
!= input_sections
.end();
5465 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5466 == processed_input_sections
.end())
5468 // We only discard a known EXIDX section because its linked
5469 // text section has been folded by ICF.
5470 Arm_relobj
<big_endian
>* arm_relobj
=
5471 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5472 const Arm_exidx_input_section
* exidx_input_section
=
5473 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5474 gold_assert(exidx_input_section
!= NULL
);
5475 unsigned int text_shndx
= exidx_input_section
->link();
5476 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5478 // Remove this from link.
5479 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5483 // Make changes permanent.
5484 this->save_states();
5485 this->set_section_offsets_need_adjustment();
5488 // Arm_relobj methods.
5490 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5491 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5493 template<bool big_endian
>
5495 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
5496 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5497 const Relobj::Output_sections
& out_sections
,
5498 const Symbol_table
*symtab
,
5499 const unsigned char* pshdrs
)
5501 unsigned int sh_type
= shdr
.get_sh_type();
5502 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
5505 // Ignore empty section.
5506 off_t sh_size
= shdr
.get_sh_size();
5510 // Ignore reloc section with bad info. This error will be
5511 // reported in the final link.
5512 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
5513 if (index
>= this->shnum())
5516 // This relocation section is against a section which we
5517 // discarded or if the section is folded into another
5518 // section due to ICF.
5519 if (out_sections
[index
] == NULL
|| symtab
->is_section_folded(this, index
))
5522 // Check the section to which relocations are applied. Ignore relocations
5523 // to unallocated sections or EXIDX sections.
5524 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5525 const elfcpp::Shdr
<32, big_endian
> data_shdr(pshdrs
+ index
* shdr_size
);
5526 if ((data_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
5527 || data_shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
5530 // Ignore reloc section with unexpected symbol table. The
5531 // error will be reported in the final link.
5532 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
5535 unsigned int reloc_size
;
5536 if (sh_type
== elfcpp::SHT_REL
)
5537 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
5539 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
5541 // Ignore reloc section with unexpected entsize or uneven size.
5542 // The error will be reported in the final link.
5543 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
5549 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5550 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5552 template<bool big_endian
>
5554 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
5555 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5558 const Symbol_table
* symtab
)
5560 // We only scan non-empty code sections.
5561 if ((shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0
5562 || shdr
.get_sh_size() == 0)
5565 // Ignore discarded or ICF'ed sections.
5566 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
5569 // Find output address of section.
5570 Arm_address address
= os
->output_address(this, shndx
, 0);
5572 // If the section does not cross any 4K-boundaries, it does not need to
5574 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
5580 // Scan a section for Cortex-A8 workaround.
5582 template<bool big_endian
>
5584 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
5585 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5588 Target_arm
<big_endian
>* arm_target
)
5590 Arm_address output_address
= os
->output_address(this, shndx
, 0);
5592 // Get the section contents.
5593 section_size_type input_view_size
= 0;
5594 const unsigned char* input_view
=
5595 this->section_contents(shndx
, &input_view_size
, false);
5597 // We need to go through the mapping symbols to determine what to
5598 // scan. There are two reasons. First, we should look at THUMB code and
5599 // THUMB code only. Second, we only want to look at the 4K-page boundary
5600 // to speed up the scanning.
5602 // Look for the first mapping symbol in this section. It should be
5604 Mapping_symbol_position
section_start(shndx
, 0);
5605 typename
Mapping_symbols_info::const_iterator p
=
5606 this->mapping_symbols_info_
.lower_bound(section_start
);
5608 if (p
== this->mapping_symbols_info_
.end()
5609 || p
->first
!= section_start
)
5611 gold_warning(_("Cortex-A8 erratum scanning failed because there "
5612 "is no mapping symbols for section %u of %s"),
5613 shndx
, this->name().c_str());
5617 while (p
!= this->mapping_symbols_info_
.end()
5618 && p
->first
.first
== shndx
)
5620 typename
Mapping_symbols_info::const_iterator next
=
5621 this->mapping_symbols_info_
.upper_bound(p
->first
);
5623 // Only scan part of a section with THUMB code.
5624 if (p
->second
== 't')
5626 // Determine the end of this range.
5627 section_size_type span_start
=
5628 convert_to_section_size_type(p
->first
.second
);
5629 section_size_type span_end
;
5630 if (next
!= this->mapping_symbols_info_
.end()
5631 && next
->first
.first
== shndx
)
5632 span_end
= convert_to_section_size_type(next
->first
.second
);
5634 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
5636 if (((span_start
+ output_address
) & ~0xfffUL
)
5637 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
5639 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
5640 span_start
, span_end
,
5650 // Scan relocations for stub generation.
5652 template<bool big_endian
>
5654 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
5655 Target_arm
<big_endian
>* arm_target
,
5656 const Symbol_table
* symtab
,
5657 const Layout
* layout
)
5659 unsigned int shnum
= this->shnum();
5660 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5662 // Read the section headers.
5663 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
5667 // To speed up processing, we set up hash tables for fast lookup of
5668 // input offsets to output addresses.
5669 this->initialize_input_to_output_maps();
5671 const Relobj::Output_sections
& out_sections(this->output_sections());
5673 Relocate_info
<32, big_endian
> relinfo
;
5674 relinfo
.symtab
= symtab
;
5675 relinfo
.layout
= layout
;
5676 relinfo
.object
= this;
5678 // Do relocation stubs scanning.
5679 const unsigned char* p
= pshdrs
+ shdr_size
;
5680 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
5682 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
5683 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
5686 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
5687 Arm_address output_offset
= this->get_output_section_offset(index
);
5688 Arm_address output_address
;
5689 if(output_offset
!= invalid_address
)
5690 output_address
= out_sections
[index
]->address() + output_offset
;
5693 // Currently this only happens for a relaxed section.
5694 const Output_relaxed_input_section
* poris
=
5695 out_sections
[index
]->find_relaxed_input_section(this, index
);
5696 gold_assert(poris
!= NULL
);
5697 output_address
= poris
->address();
5700 // Get the relocations.
5701 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
5705 // Get the section contents. This does work for the case in which
5706 // we modify the contents of an input section. We need to pass the
5707 // output view under such circumstances.
5708 section_size_type input_view_size
= 0;
5709 const unsigned char* input_view
=
5710 this->section_contents(index
, &input_view_size
, false);
5712 relinfo
.reloc_shndx
= i
;
5713 relinfo
.data_shndx
= index
;
5714 unsigned int sh_type
= shdr
.get_sh_type();
5715 unsigned int reloc_size
;
5716 if (sh_type
== elfcpp::SHT_REL
)
5717 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
5719 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
5721 Output_section
* os
= out_sections
[index
];
5722 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
5723 shdr
.get_sh_size() / reloc_size
,
5725 output_offset
== invalid_address
,
5726 input_view
, output_address
,
5731 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5732 // after its relocation section, if there is one, is processed for
5733 // relocation stubs. Merging this loop with the one above would have been
5734 // complicated since we would have had to make sure that relocation stub
5735 // scanning is done first.
5736 if (arm_target
->fix_cortex_a8())
5738 const unsigned char* p
= pshdrs
+ shdr_size
;
5739 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
5741 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
5742 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
5745 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
5750 // After we've done the relocations, we release the hash tables,
5751 // since we no longer need them.
5752 this->free_input_to_output_maps();
5755 // Count the local symbols. The ARM backend needs to know if a symbol
5756 // is a THUMB function or not. For global symbols, it is easy because
5757 // the Symbol object keeps the ELF symbol type. For local symbol it is
5758 // harder because we cannot access this information. So we override the
5759 // do_count_local_symbol in parent and scan local symbols to mark
5760 // THUMB functions. This is not the most efficient way but I do not want to
5761 // slow down other ports by calling a per symbol targer hook inside
5762 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5764 template<bool big_endian
>
5766 Arm_relobj
<big_endian
>::do_count_local_symbols(
5767 Stringpool_template
<char>* pool
,
5768 Stringpool_template
<char>* dynpool
)
5770 // We need to fix-up the values of any local symbols whose type are
5773 // Ask parent to count the local symbols.
5774 Sized_relobj
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
5775 const unsigned int loccount
= this->local_symbol_count();
5779 // Intialize the thumb function bit-vector.
5780 std::vector
<bool> empty_vector(loccount
, false);
5781 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
5783 // Read the symbol table section header.
5784 const unsigned int symtab_shndx
= this->symtab_shndx();
5785 elfcpp::Shdr
<32, big_endian
>
5786 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
5787 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
5789 // Read the local symbols.
5790 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
5791 gold_assert(loccount
== symtabshdr
.get_sh_info());
5792 off_t locsize
= loccount
* sym_size
;
5793 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
5794 locsize
, true, true);
5796 // For mapping symbol processing, we need to read the symbol names.
5797 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
5798 if (strtab_shndx
>= this->shnum())
5800 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
5804 elfcpp::Shdr
<32, big_endian
>
5805 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
5806 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
5808 this->error(_("symbol table name section has wrong type: %u"),
5809 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
5812 const char* pnames
=
5813 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
5814 strtabshdr
.get_sh_size(),
5817 // Loop over the local symbols and mark any local symbols pointing
5818 // to THUMB functions.
5820 // Skip the first dummy symbol.
5822 typename Sized_relobj
<32, big_endian
>::Local_values
* plocal_values
=
5823 this->local_values();
5824 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
5826 elfcpp::Sym
<32, big_endian
> sym(psyms
);
5827 elfcpp::STT st_type
= sym
.get_st_type();
5828 Symbol_value
<32>& lv((*plocal_values
)[i
]);
5829 Arm_address input_value
= lv
.input_value();
5831 // Check to see if this is a mapping symbol.
5832 const char* sym_name
= pnames
+ sym
.get_st_name();
5833 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
5835 unsigned int input_shndx
= sym
.get_st_shndx();
5837 // Strip of LSB in case this is a THUMB symbol.
5838 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
5839 this->mapping_symbols_info_
[msp
] = sym_name
[1];
5842 if (st_type
== elfcpp::STT_ARM_TFUNC
5843 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
5845 // This is a THUMB function. Mark this and canonicalize the
5846 // symbol value by setting LSB.
5847 this->local_symbol_is_thumb_function_
[i
] = true;
5848 if ((input_value
& 1) == 0)
5849 lv
.set_input_value(input_value
| 1);
5854 // Relocate sections.
5855 template<bool big_endian
>
5857 Arm_relobj
<big_endian
>::do_relocate_sections(
5858 const Symbol_table
* symtab
,
5859 const Layout
* layout
,
5860 const unsigned char* pshdrs
,
5861 typename Sized_relobj
<32, big_endian
>::Views
* pviews
)
5863 // Call parent to relocate sections.
5864 Sized_relobj
<32, big_endian
>::do_relocate_sections(symtab
, layout
, pshdrs
,
5867 // We do not generate stubs if doing a relocatable link.
5868 if (parameters
->options().relocatable())
5871 // Relocate stub tables.
5872 unsigned int shnum
= this->shnum();
5874 Target_arm
<big_endian
>* arm_target
=
5875 Target_arm
<big_endian
>::default_target();
5877 Relocate_info
<32, big_endian
> relinfo
;
5878 relinfo
.symtab
= symtab
;
5879 relinfo
.layout
= layout
;
5880 relinfo
.object
= this;
5882 for (unsigned int i
= 1; i
< shnum
; ++i
)
5884 Arm_input_section
<big_endian
>* arm_input_section
=
5885 arm_target
->find_arm_input_section(this, i
);
5887 if (arm_input_section
!= NULL
5888 && arm_input_section
->is_stub_table_owner()
5889 && !arm_input_section
->stub_table()->empty())
5891 // We cannot discard a section if it owns a stub table.
5892 Output_section
* os
= this->output_section(i
);
5893 gold_assert(os
!= NULL
);
5895 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
5896 relinfo
.reloc_shdr
= NULL
;
5897 relinfo
.data_shndx
= i
;
5898 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
5900 gold_assert((*pviews
)[i
].view
!= NULL
);
5902 // We are passed the output section view. Adjust it to cover the
5904 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
5905 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
5906 && ((stub_table
->address() + stub_table
->data_size())
5907 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
5909 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
5910 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
5911 Arm_address address
= stub_table
->address();
5912 section_size_type view_size
= stub_table
->data_size();
5914 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
5918 // Apply Cortex A8 workaround if applicable.
5919 if (this->section_has_cortex_a8_workaround(i
))
5921 unsigned char* view
= (*pviews
)[i
].view
;
5922 Arm_address view_address
= (*pviews
)[i
].address
;
5923 section_size_type view_size
= (*pviews
)[i
].view_size
;
5924 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
5926 // Adjust view to cover section.
5927 Output_section
* os
= this->output_section(i
);
5928 gold_assert(os
!= NULL
);
5929 Arm_address section_address
= os
->output_address(this, i
, 0);
5930 uint64_t section_size
= this->section_size(i
);
5932 gold_assert(section_address
>= view_address
5933 && ((section_address
+ section_size
)
5934 <= (view_address
+ view_size
)));
5936 unsigned char* section_view
= view
+ (section_address
- view_address
);
5938 // Apply the Cortex-A8 workaround to the output address range
5939 // corresponding to this input section.
5940 stub_table
->apply_cortex_a8_workaround_to_address_range(
5949 // Create a new EXIDX input section object for EXIDX section SHNDX with
5952 template<bool big_endian
>
5954 Arm_relobj
<big_endian
>::make_exidx_input_section(
5956 const elfcpp::Shdr
<32, big_endian
>& shdr
)
5958 // Link .text section to its .ARM.exidx section in the same object.
5959 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
5961 // Issue an error and ignore this EXIDX section if it does not point
5962 // to any text section.
5963 if (text_shndx
== elfcpp::SHN_UNDEF
)
5965 gold_error(_("EXIDX section %u in %s has no linked text section"),
5966 shndx
, this->name().c_str());
5970 // Issue an error and ignore this EXIDX section if it points to a text
5971 // section already has an EXIDX section.
5972 if (this->exidx_section_map_
[text_shndx
] != NULL
)
5974 gold_error(_("EXIDX sections %u and %u both link to text section %u "
5976 shndx
, this->exidx_section_map_
[text_shndx
]->shndx(),
5977 text_shndx
, this->name().c_str());
5981 // Create an Arm_exidx_input_section object for this EXIDX section.
5982 Arm_exidx_input_section
* exidx_input_section
=
5983 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
5984 shdr
.get_sh_addralign());
5985 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
5987 // Also map the EXIDX section index to this.
5988 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
5989 this->exidx_section_map_
[shndx
] = exidx_input_section
;
5992 // Read the symbol information.
5994 template<bool big_endian
>
5996 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
5998 // Call parent class to read symbol information.
5999 Sized_relobj
<32, big_endian
>::do_read_symbols(sd
);
6001 // Read processor-specific flags in ELF file header.
6002 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6003 elfcpp::Elf_sizes
<32>::ehdr_size
,
6005 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6006 this->processor_specific_flags_
= ehdr
.get_e_flags();
6008 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6010 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6011 const unsigned char *ps
=
6012 sd
->section_headers
->data() + shdr_size
;
6013 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6015 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6016 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6018 gold_assert(this->attributes_section_data_
== NULL
);
6019 section_offset_type section_offset
= shdr
.get_sh_offset();
6020 section_size_type section_size
=
6021 convert_to_section_size_type(shdr
.get_sh_size());
6022 File_view
* view
= this->get_lasting_view(section_offset
,
6023 section_size
, true, false);
6024 this->attributes_section_data_
=
6025 new Attributes_section_data(view
->data(), section_size
);
6027 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6028 this->make_exidx_input_section(i
, shdr
);
6032 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6033 // sections for unwinding. These sections are referenced implicitly by
6034 // text sections linked in the section headers. If we ignore these implict
6035 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6036 // will be garbage-collected incorrectly. Hence we override the same function
6037 // in the base class to handle these implicit references.
6039 template<bool big_endian
>
6041 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6043 Read_relocs_data
* rd
)
6045 // First, call base class method to process relocations in this object.
6046 Sized_relobj
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6048 unsigned int shnum
= this->shnum();
6049 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6050 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6054 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6055 // to these from the linked text sections.
6056 const unsigned char* ps
= pshdrs
+ shdr_size
;
6057 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6059 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6060 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6062 // Found an .ARM.exidx section, add it to the set of reachable
6063 // sections from its linked text section.
6064 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6065 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6070 // Arm_dynobj methods.
6072 // Read the symbol information.
6074 template<bool big_endian
>
6076 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6078 // Call parent class to read symbol information.
6079 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6081 // Read processor-specific flags in ELF file header.
6082 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6083 elfcpp::Elf_sizes
<32>::ehdr_size
,
6085 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6086 this->processor_specific_flags_
= ehdr
.get_e_flags();
6088 // Read the attributes section if there is one.
6089 // We read from the end because gas seems to put it near the end of
6090 // the section headers.
6091 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6092 const unsigned char *ps
=
6093 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6094 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6096 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6097 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6099 section_offset_type section_offset
= shdr
.get_sh_offset();
6100 section_size_type section_size
=
6101 convert_to_section_size_type(shdr
.get_sh_size());
6102 File_view
* view
= this->get_lasting_view(section_offset
,
6103 section_size
, true, false);
6104 this->attributes_section_data_
=
6105 new Attributes_section_data(view
->data(), section_size
);
6111 // Stub_addend_reader methods.
6113 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6115 template<bool big_endian
>
6116 elfcpp::Elf_types
<32>::Elf_Swxword
6117 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
6118 unsigned int r_type
,
6119 const unsigned char* view
,
6120 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
6122 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
6126 case elfcpp::R_ARM_CALL
:
6127 case elfcpp::R_ARM_JUMP24
:
6128 case elfcpp::R_ARM_PLT32
:
6130 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
6131 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6132 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
6133 return utils::sign_extend
<26>(val
<< 2);
6136 case elfcpp::R_ARM_THM_CALL
:
6137 case elfcpp::R_ARM_THM_JUMP24
:
6138 case elfcpp::R_ARM_THM_XPC22
:
6140 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6141 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6142 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6143 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6144 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
6147 case elfcpp::R_ARM_THM_JUMP19
:
6149 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6150 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6151 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6152 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6153 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
6161 // A class to handle the PLT data.
6163 template<bool big_endian
>
6164 class Output_data_plt_arm
: public Output_section_data
6167 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
6170 Output_data_plt_arm(Layout
*, Output_data_space
*);
6172 // Add an entry to the PLT.
6174 add_entry(Symbol
* gsym
);
6176 // Return the .rel.plt section data.
6177 const Reloc_section
*
6179 { return this->rel_
; }
6183 do_adjust_output_section(Output_section
* os
);
6185 // Write to a map file.
6187 do_print_to_mapfile(Mapfile
* mapfile
) const
6188 { mapfile
->print_output_data(this, _("** PLT")); }
6191 // Template for the first PLT entry.
6192 static const uint32_t first_plt_entry
[5];
6194 // Template for subsequent PLT entries.
6195 static const uint32_t plt_entry
[3];
6197 // Set the final size.
6199 set_final_data_size()
6201 this->set_data_size(sizeof(first_plt_entry
)
6202 + this->count_
* sizeof(plt_entry
));
6205 // Write out the PLT data.
6207 do_write(Output_file
*);
6209 // The reloc section.
6210 Reloc_section
* rel_
;
6211 // The .got.plt section.
6212 Output_data_space
* got_plt_
;
6213 // The number of PLT entries.
6214 unsigned int count_
;
6217 // Create the PLT section. The ordinary .got section is an argument,
6218 // since we need to refer to the start. We also create our own .got
6219 // section just for PLT entries.
6221 template<bool big_endian
>
6222 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
6223 Output_data_space
* got_plt
)
6224 : Output_section_data(4), got_plt_(got_plt
), count_(0)
6226 this->rel_
= new Reloc_section(false);
6227 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
6228 elfcpp::SHF_ALLOC
, this->rel_
, true, false,
6232 template<bool big_endian
>
6234 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
6239 // Add an entry to the PLT.
6241 template<bool big_endian
>
6243 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
6245 gold_assert(!gsym
->has_plt_offset());
6247 // Note that when setting the PLT offset we skip the initial
6248 // reserved PLT entry.
6249 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
6250 + sizeof(first_plt_entry
));
6254 section_offset_type got_offset
= this->got_plt_
->current_data_size();
6256 // Every PLT entry needs a GOT entry which points back to the PLT
6257 // entry (this will be changed by the dynamic linker, normally
6258 // lazily when the function is called).
6259 this->got_plt_
->set_current_data_size(got_offset
+ 4);
6261 // Every PLT entry needs a reloc.
6262 gsym
->set_needs_dynsym_entry();
6263 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
6266 // Note that we don't need to save the symbol. The contents of the
6267 // PLT are independent of which symbols are used. The symbols only
6268 // appear in the relocations.
6272 // FIXME: This is not very flexible. Right now this has only been tested
6273 // on armv5te. If we are to support additional architecture features like
6274 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6276 // The first entry in the PLT.
6277 template<bool big_endian
>
6278 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
6280 0xe52de004, // str lr, [sp, #-4]!
6281 0xe59fe004, // ldr lr, [pc, #4]
6282 0xe08fe00e, // add lr, pc, lr
6283 0xe5bef008, // ldr pc, [lr, #8]!
6284 0x00000000, // &GOT[0] - .
6287 // Subsequent entries in the PLT.
6289 template<bool big_endian
>
6290 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
6292 0xe28fc600, // add ip, pc, #0xNN00000
6293 0xe28cca00, // add ip, ip, #0xNN000
6294 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6297 // Write out the PLT. This uses the hand-coded instructions above,
6298 // and adjusts them as needed. This is all specified by the arm ELF
6299 // Processor Supplement.
6301 template<bool big_endian
>
6303 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
6305 const off_t offset
= this->offset();
6306 const section_size_type oview_size
=
6307 convert_to_section_size_type(this->data_size());
6308 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
6310 const off_t got_file_offset
= this->got_plt_
->offset();
6311 const section_size_type got_size
=
6312 convert_to_section_size_type(this->got_plt_
->data_size());
6313 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
6315 unsigned char* pov
= oview
;
6317 Arm_address plt_address
= this->address();
6318 Arm_address got_address
= this->got_plt_
->address();
6320 // Write first PLT entry. All but the last word are constants.
6321 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
6322 / sizeof(plt_entry
[0]));
6323 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
6324 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
6325 // Last word in first PLT entry is &GOT[0] - .
6326 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
6327 got_address
- (plt_address
+ 16));
6328 pov
+= sizeof(first_plt_entry
);
6330 unsigned char* got_pov
= got_view
;
6332 memset(got_pov
, 0, 12);
6335 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6336 unsigned int plt_offset
= sizeof(first_plt_entry
);
6337 unsigned int plt_rel_offset
= 0;
6338 unsigned int got_offset
= 12;
6339 const unsigned int count
= this->count_
;
6340 for (unsigned int i
= 0;
6343 pov
+= sizeof(plt_entry
),
6345 plt_offset
+= sizeof(plt_entry
),
6346 plt_rel_offset
+= rel_size
,
6349 // Set and adjust the PLT entry itself.
6350 int32_t offset
= ((got_address
+ got_offset
)
6351 - (plt_address
+ plt_offset
+ 8));
6353 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
6354 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
6355 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
6356 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
6357 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
6358 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
6359 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
6361 // Set the entry in the GOT.
6362 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
6365 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
6366 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
6368 of
->write_output_view(offset
, oview_size
, oview
);
6369 of
->write_output_view(got_file_offset
, got_size
, got_view
);
6372 // Create a PLT entry for a global symbol.
6374 template<bool big_endian
>
6376 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
6379 if (gsym
->has_plt_offset())
6382 if (this->plt_
== NULL
)
6384 // Create the GOT sections first.
6385 this->got_section(symtab
, layout
);
6387 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
6388 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
6390 | elfcpp::SHF_EXECINSTR
),
6391 this->plt_
, false, false, false, false);
6393 this->plt_
->add_entry(gsym
);
6396 // Report an unsupported relocation against a local symbol.
6398 template<bool big_endian
>
6400 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
6401 Sized_relobj
<32, big_endian
>* object
,
6402 unsigned int r_type
)
6404 gold_error(_("%s: unsupported reloc %u against local symbol"),
6405 object
->name().c_str(), r_type
);
6408 // We are about to emit a dynamic relocation of type R_TYPE. If the
6409 // dynamic linker does not support it, issue an error. The GNU linker
6410 // only issues a non-PIC error for an allocated read-only section.
6411 // Here we know the section is allocated, but we don't know that it is
6412 // read-only. But we check for all the relocation types which the
6413 // glibc dynamic linker supports, so it seems appropriate to issue an
6414 // error even if the section is not read-only.
6416 template<bool big_endian
>
6418 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
6419 unsigned int r_type
)
6423 // These are the relocation types supported by glibc for ARM.
6424 case elfcpp::R_ARM_RELATIVE
:
6425 case elfcpp::R_ARM_COPY
:
6426 case elfcpp::R_ARM_GLOB_DAT
:
6427 case elfcpp::R_ARM_JUMP_SLOT
:
6428 case elfcpp::R_ARM_ABS32
:
6429 case elfcpp::R_ARM_ABS32_NOI
:
6430 case elfcpp::R_ARM_PC24
:
6431 // FIXME: The following 3 types are not supported by Android's dynamic
6433 case elfcpp::R_ARM_TLS_DTPMOD32
:
6434 case elfcpp::R_ARM_TLS_DTPOFF32
:
6435 case elfcpp::R_ARM_TLS_TPOFF32
:
6439 // This prevents us from issuing more than one error per reloc
6440 // section. But we can still wind up issuing more than one
6441 // error per object file.
6442 if (this->issued_non_pic_error_
)
6444 object
->error(_("requires unsupported dynamic reloc; "
6445 "recompile with -fPIC"));
6446 this->issued_non_pic_error_
= true;
6449 case elfcpp::R_ARM_NONE
:
6454 // Scan a relocation for a local symbol.
6455 // FIXME: This only handles a subset of relocation types used by Android
6456 // on ARM v5te devices.
6458 template<bool big_endian
>
6460 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
6463 Sized_relobj
<32, big_endian
>* object
,
6464 unsigned int data_shndx
,
6465 Output_section
* output_section
,
6466 const elfcpp::Rel
<32, big_endian
>& reloc
,
6467 unsigned int r_type
,
6468 const elfcpp::Sym
<32, big_endian
>&)
6470 r_type
= get_real_reloc_type(r_type
);
6473 case elfcpp::R_ARM_NONE
:
6476 case elfcpp::R_ARM_ABS32
:
6477 case elfcpp::R_ARM_ABS32_NOI
:
6478 // If building a shared library (or a position-independent
6479 // executable), we need to create a dynamic relocation for
6480 // this location. The relocation applied at link time will
6481 // apply the link-time value, so we flag the location with
6482 // an R_ARM_RELATIVE relocation so the dynamic loader can
6483 // relocate it easily.
6484 if (parameters
->options().output_is_position_independent())
6486 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6487 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6488 // If we are to add more other reloc types than R_ARM_ABS32,
6489 // we need to add check_non_pic(object, r_type) here.
6490 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
6491 output_section
, data_shndx
,
6492 reloc
.get_r_offset());
6496 case elfcpp::R_ARM_REL32
:
6497 case elfcpp::R_ARM_THM_CALL
:
6498 case elfcpp::R_ARM_CALL
:
6499 case elfcpp::R_ARM_PREL31
:
6500 case elfcpp::R_ARM_JUMP24
:
6501 case elfcpp::R_ARM_THM_JUMP24
:
6502 case elfcpp::R_ARM_THM_JUMP19
:
6503 case elfcpp::R_ARM_PLT32
:
6504 case elfcpp::R_ARM_THM_ABS5
:
6505 case elfcpp::R_ARM_ABS8
:
6506 case elfcpp::R_ARM_ABS12
:
6507 case elfcpp::R_ARM_ABS16
:
6508 case elfcpp::R_ARM_BASE_ABS
:
6509 case elfcpp::R_ARM_MOVW_ABS_NC
:
6510 case elfcpp::R_ARM_MOVT_ABS
:
6511 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
6512 case elfcpp::R_ARM_THM_MOVT_ABS
:
6513 case elfcpp::R_ARM_MOVW_PREL_NC
:
6514 case elfcpp::R_ARM_MOVT_PREL
:
6515 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
6516 case elfcpp::R_ARM_THM_MOVT_PREL
:
6517 case elfcpp::R_ARM_THM_JUMP6
:
6518 case elfcpp::R_ARM_THM_JUMP8
:
6519 case elfcpp::R_ARM_THM_JUMP11
:
6520 case elfcpp::R_ARM_V4BX
:
6521 case elfcpp::R_ARM_ALU_PC_G0_NC
:
6522 case elfcpp::R_ARM_ALU_PC_G0
:
6523 case elfcpp::R_ARM_ALU_PC_G1_NC
:
6524 case elfcpp::R_ARM_ALU_PC_G1
:
6525 case elfcpp::R_ARM_ALU_PC_G2
:
6526 case elfcpp::R_ARM_ALU_SB_G0_NC
:
6527 case elfcpp::R_ARM_ALU_SB_G0
:
6528 case elfcpp::R_ARM_ALU_SB_G1_NC
:
6529 case elfcpp::R_ARM_ALU_SB_G1
:
6530 case elfcpp::R_ARM_ALU_SB_G2
:
6531 case elfcpp::R_ARM_LDR_PC_G0
:
6532 case elfcpp::R_ARM_LDR_PC_G1
:
6533 case elfcpp::R_ARM_LDR_PC_G2
:
6534 case elfcpp::R_ARM_LDR_SB_G0
:
6535 case elfcpp::R_ARM_LDR_SB_G1
:
6536 case elfcpp::R_ARM_LDR_SB_G2
:
6537 case elfcpp::R_ARM_LDRS_PC_G0
:
6538 case elfcpp::R_ARM_LDRS_PC_G1
:
6539 case elfcpp::R_ARM_LDRS_PC_G2
:
6540 case elfcpp::R_ARM_LDRS_SB_G0
:
6541 case elfcpp::R_ARM_LDRS_SB_G1
:
6542 case elfcpp::R_ARM_LDRS_SB_G2
:
6543 case elfcpp::R_ARM_LDC_PC_G0
:
6544 case elfcpp::R_ARM_LDC_PC_G1
:
6545 case elfcpp::R_ARM_LDC_PC_G2
:
6546 case elfcpp::R_ARM_LDC_SB_G0
:
6547 case elfcpp::R_ARM_LDC_SB_G1
:
6548 case elfcpp::R_ARM_LDC_SB_G2
:
6551 case elfcpp::R_ARM_GOTOFF32
:
6552 // We need a GOT section:
6553 target
->got_section(symtab
, layout
);
6556 case elfcpp::R_ARM_BASE_PREL
:
6557 // FIXME: What about this?
6560 case elfcpp::R_ARM_GOT_BREL
:
6561 case elfcpp::R_ARM_GOT_PREL
:
6563 // The symbol requires a GOT entry.
6564 Output_data_got
<32, big_endian
>* got
=
6565 target
->got_section(symtab
, layout
);
6566 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6567 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
6569 // If we are generating a shared object, we need to add a
6570 // dynamic RELATIVE relocation for this symbol's GOT entry.
6571 if (parameters
->options().output_is_position_independent())
6573 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6574 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6575 rel_dyn
->add_local_relative(
6576 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
6577 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
6583 case elfcpp::R_ARM_TARGET1
:
6584 // This should have been mapped to another type already.
6586 case elfcpp::R_ARM_COPY
:
6587 case elfcpp::R_ARM_GLOB_DAT
:
6588 case elfcpp::R_ARM_JUMP_SLOT
:
6589 case elfcpp::R_ARM_RELATIVE
:
6590 // These are relocations which should only be seen by the
6591 // dynamic linker, and should never be seen here.
6592 gold_error(_("%s: unexpected reloc %u in object file"),
6593 object
->name().c_str(), r_type
);
6597 unsupported_reloc_local(object
, r_type
);
6602 // Report an unsupported relocation against a global symbol.
6604 template<bool big_endian
>
6606 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
6607 Sized_relobj
<32, big_endian
>* object
,
6608 unsigned int r_type
,
6611 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6612 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
6615 // Scan a relocation for a global symbol.
6616 // FIXME: This only handles a subset of relocation types used by Android
6617 // on ARM v5te devices.
6619 template<bool big_endian
>
6621 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
6624 Sized_relobj
<32, big_endian
>* object
,
6625 unsigned int data_shndx
,
6626 Output_section
* output_section
,
6627 const elfcpp::Rel
<32, big_endian
>& reloc
,
6628 unsigned int r_type
,
6631 r_type
= get_real_reloc_type(r_type
);
6634 case elfcpp::R_ARM_NONE
:
6637 case elfcpp::R_ARM_ABS32
:
6638 case elfcpp::R_ARM_ABS32_NOI
:
6640 // Make a dynamic relocation if necessary.
6641 if (gsym
->needs_dynamic_reloc(Symbol::ABSOLUTE_REF
))
6643 if (target
->may_need_copy_reloc(gsym
))
6645 target
->copy_reloc(symtab
, layout
, object
,
6646 data_shndx
, output_section
, gsym
, reloc
);
6648 else if (gsym
->can_use_relative_reloc(false))
6650 // If we are to add more other reloc types than R_ARM_ABS32,
6651 // we need to add check_non_pic(object, r_type) here.
6652 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6653 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
6654 output_section
, object
,
6655 data_shndx
, reloc
.get_r_offset());
6659 // If we are to add more other reloc types than R_ARM_ABS32,
6660 // we need to add check_non_pic(object, r_type) here.
6661 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6662 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
6663 data_shndx
, reloc
.get_r_offset());
6669 case elfcpp::R_ARM_MOVW_ABS_NC
:
6670 case elfcpp::R_ARM_MOVT_ABS
:
6671 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
6672 case elfcpp::R_ARM_THM_MOVT_ABS
:
6673 case elfcpp::R_ARM_MOVW_PREL_NC
:
6674 case elfcpp::R_ARM_MOVT_PREL
:
6675 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
6676 case elfcpp::R_ARM_THM_MOVT_PREL
:
6677 case elfcpp::R_ARM_THM_JUMP6
:
6678 case elfcpp::R_ARM_THM_JUMP8
:
6679 case elfcpp::R_ARM_THM_JUMP11
:
6680 case elfcpp::R_ARM_V4BX
:
6681 case elfcpp::R_ARM_ALU_PC_G0_NC
:
6682 case elfcpp::R_ARM_ALU_PC_G0
:
6683 case elfcpp::R_ARM_ALU_PC_G1_NC
:
6684 case elfcpp::R_ARM_ALU_PC_G1
:
6685 case elfcpp::R_ARM_ALU_PC_G2
:
6686 case elfcpp::R_ARM_ALU_SB_G0_NC
:
6687 case elfcpp::R_ARM_ALU_SB_G0
:
6688 case elfcpp::R_ARM_ALU_SB_G1_NC
:
6689 case elfcpp::R_ARM_ALU_SB_G1
:
6690 case elfcpp::R_ARM_ALU_SB_G2
:
6691 case elfcpp::R_ARM_LDR_PC_G0
:
6692 case elfcpp::R_ARM_LDR_PC_G1
:
6693 case elfcpp::R_ARM_LDR_PC_G2
:
6694 case elfcpp::R_ARM_LDR_SB_G0
:
6695 case elfcpp::R_ARM_LDR_SB_G1
:
6696 case elfcpp::R_ARM_LDR_SB_G2
:
6697 case elfcpp::R_ARM_LDRS_PC_G0
:
6698 case elfcpp::R_ARM_LDRS_PC_G1
:
6699 case elfcpp::R_ARM_LDRS_PC_G2
:
6700 case elfcpp::R_ARM_LDRS_SB_G0
:
6701 case elfcpp::R_ARM_LDRS_SB_G1
:
6702 case elfcpp::R_ARM_LDRS_SB_G2
:
6703 case elfcpp::R_ARM_LDC_PC_G0
:
6704 case elfcpp::R_ARM_LDC_PC_G1
:
6705 case elfcpp::R_ARM_LDC_PC_G2
:
6706 case elfcpp::R_ARM_LDC_SB_G0
:
6707 case elfcpp::R_ARM_LDC_SB_G1
:
6708 case elfcpp::R_ARM_LDC_SB_G2
:
6711 case elfcpp::R_ARM_THM_ABS5
:
6712 case elfcpp::R_ARM_ABS8
:
6713 case elfcpp::R_ARM_ABS12
:
6714 case elfcpp::R_ARM_ABS16
:
6715 case elfcpp::R_ARM_BASE_ABS
:
6717 // No dynamic relocs of this kinds.
6718 // Report the error in case of PIC.
6719 int flags
= Symbol::NON_PIC_REF
;
6720 if (gsym
->type() == elfcpp::STT_FUNC
6721 || gsym
->type() == elfcpp::STT_ARM_TFUNC
)
6722 flags
|= Symbol::FUNCTION_CALL
;
6723 if (gsym
->needs_dynamic_reloc(flags
))
6724 check_non_pic(object
, r_type
);
6728 case elfcpp::R_ARM_REL32
:
6729 case elfcpp::R_ARM_PREL31
:
6731 // Make a dynamic relocation if necessary.
6732 int flags
= Symbol::NON_PIC_REF
;
6733 if (gsym
->needs_dynamic_reloc(flags
))
6735 if (target
->may_need_copy_reloc(gsym
))
6737 target
->copy_reloc(symtab
, layout
, object
,
6738 data_shndx
, output_section
, gsym
, reloc
);
6742 check_non_pic(object
, r_type
);
6743 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6744 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
6745 data_shndx
, reloc
.get_r_offset());
6751 case elfcpp::R_ARM_JUMP24
:
6752 case elfcpp::R_ARM_THM_JUMP24
:
6753 case elfcpp::R_ARM_THM_JUMP19
:
6754 case elfcpp::R_ARM_CALL
:
6755 case elfcpp::R_ARM_THM_CALL
:
6757 if (Target_arm
<big_endian
>::Scan::symbol_needs_plt_entry(gsym
))
6758 target
->make_plt_entry(symtab
, layout
, gsym
);
6761 // Check to see if this is a function that would need a PLT
6762 // but does not get one because the function symbol is untyped.
6763 // This happens in assembly code missing a proper .type directive.
6764 if ((!gsym
->is_undefined() || parameters
->options().shared())
6765 && !parameters
->doing_static_link()
6766 && gsym
->type() == elfcpp::STT_NOTYPE
6767 && (gsym
->is_from_dynobj()
6768 || gsym
->is_undefined()
6769 || gsym
->is_preemptible()))
6770 gold_error(_("%s is not a function."),
6771 gsym
->demangled_name().c_str());
6775 case elfcpp::R_ARM_PLT32
:
6776 // If the symbol is fully resolved, this is just a relative
6777 // local reloc. Otherwise we need a PLT entry.
6778 if (gsym
->final_value_is_known())
6780 // If building a shared library, we can also skip the PLT entry
6781 // if the symbol is defined in the output file and is protected
6783 if (gsym
->is_defined()
6784 && !gsym
->is_from_dynobj()
6785 && !gsym
->is_preemptible())
6787 target
->make_plt_entry(symtab
, layout
, gsym
);
6790 case elfcpp::R_ARM_GOTOFF32
:
6791 // We need a GOT section.
6792 target
->got_section(symtab
, layout
);
6795 case elfcpp::R_ARM_BASE_PREL
:
6796 // FIXME: What about this?
6799 case elfcpp::R_ARM_GOT_BREL
:
6800 case elfcpp::R_ARM_GOT_PREL
:
6802 // The symbol requires a GOT entry.
6803 Output_data_got
<32, big_endian
>* got
=
6804 target
->got_section(symtab
, layout
);
6805 if (gsym
->final_value_is_known())
6806 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
6809 // If this symbol is not fully resolved, we need to add a
6810 // GOT entry with a dynamic relocation.
6811 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6812 if (gsym
->is_from_dynobj()
6813 || gsym
->is_undefined()
6814 || gsym
->is_preemptible())
6815 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
6816 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
6819 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
6820 rel_dyn
->add_global_relative(
6821 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
6822 gsym
->got_offset(GOT_TYPE_STANDARD
));
6828 case elfcpp::R_ARM_TARGET1
:
6829 // This should have been mapped to another type already.
6831 case elfcpp::R_ARM_COPY
:
6832 case elfcpp::R_ARM_GLOB_DAT
:
6833 case elfcpp::R_ARM_JUMP_SLOT
:
6834 case elfcpp::R_ARM_RELATIVE
:
6835 // These are relocations which should only be seen by the
6836 // dynamic linker, and should never be seen here.
6837 gold_error(_("%s: unexpected reloc %u in object file"),
6838 object
->name().c_str(), r_type
);
6842 unsupported_reloc_global(object
, r_type
, gsym
);
6847 // Process relocations for gc.
6849 template<bool big_endian
>
6851 Target_arm
<big_endian
>::gc_process_relocs(Symbol_table
* symtab
,
6853 Sized_relobj
<32, big_endian
>* object
,
6854 unsigned int data_shndx
,
6856 const unsigned char* prelocs
,
6858 Output_section
* output_section
,
6859 bool needs_special_offset_handling
,
6860 size_t local_symbol_count
,
6861 const unsigned char* plocal_symbols
)
6863 typedef Target_arm
<big_endian
> Arm
;
6864 typedef typename Target_arm
<big_endian
>::Scan Scan
;
6866 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
>(
6875 needs_special_offset_handling
,
6880 // Scan relocations for a section.
6882 template<bool big_endian
>
6884 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
6886 Sized_relobj
<32, big_endian
>* object
,
6887 unsigned int data_shndx
,
6888 unsigned int sh_type
,
6889 const unsigned char* prelocs
,
6891 Output_section
* output_section
,
6892 bool needs_special_offset_handling
,
6893 size_t local_symbol_count
,
6894 const unsigned char* plocal_symbols
)
6896 typedef typename Target_arm
<big_endian
>::Scan Scan
;
6897 if (sh_type
== elfcpp::SHT_RELA
)
6899 gold_error(_("%s: unsupported RELA reloc section"),
6900 object
->name().c_str());
6904 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
6913 needs_special_offset_handling
,
6918 // Finalize the sections.
6920 template<bool big_endian
>
6922 Target_arm
<big_endian
>::do_finalize_sections(
6924 const Input_objects
* input_objects
,
6925 Symbol_table
* symtab
)
6927 // Merge processor-specific flags.
6928 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
6929 p
!= input_objects
->relobj_end();
6932 Arm_relobj
<big_endian
>* arm_relobj
=
6933 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
6934 this->merge_processor_specific_flags(
6936 arm_relobj
->processor_specific_flags());
6937 this->merge_object_attributes(arm_relobj
->name().c_str(),
6938 arm_relobj
->attributes_section_data());
6942 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
6943 p
!= input_objects
->dynobj_end();
6946 Arm_dynobj
<big_endian
>* arm_dynobj
=
6947 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
6948 this->merge_processor_specific_flags(
6950 arm_dynobj
->processor_specific_flags());
6951 this->merge_object_attributes(arm_dynobj
->name().c_str(),
6952 arm_dynobj
->attributes_section_data());
6956 const Object_attribute
* cpu_arch_attr
=
6957 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
6958 if (cpu_arch_attr
->int_value() > elfcpp::TAG_CPU_ARCH_V4
)
6959 this->set_may_use_blx(true);
6961 // Check if we need to use Cortex-A8 workaround.
6962 if (parameters
->options().user_set_fix_cortex_a8())
6963 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
6966 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
6967 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
6969 const Object_attribute
* cpu_arch_profile_attr
=
6970 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
6971 this->fix_cortex_a8_
=
6972 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
6973 && (cpu_arch_profile_attr
->int_value() == 'A'
6974 || cpu_arch_profile_attr
->int_value() == 0));
6977 // Check if we can use V4BX interworking.
6978 // The V4BX interworking stub contains BX instruction,
6979 // which is not specified for some profiles.
6980 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
6981 && !this->may_use_blx())
6982 gold_error(_("unable to provide V4BX reloc interworking fix up; "
6983 "the target profile does not support BX instruction"));
6985 // Fill in some more dynamic tags.
6986 const Reloc_section
* rel_plt
= (this->plt_
== NULL
6988 : this->plt_
->rel_plt());
6989 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
6990 this->rel_dyn_
, true);
6992 // Emit any relocs we saved in an attempt to avoid generating COPY
6994 if (this->copy_relocs_
.any_saved_relocs())
6995 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
6997 // Handle the .ARM.exidx section.
6998 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
6999 if (exidx_section
!= NULL
7000 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
7001 && !parameters
->options().relocatable())
7003 // Create __exidx_start and __exdix_end symbols.
7004 symtab
->define_in_output_data("__exidx_start", NULL
,
7005 Symbol_table::PREDEFINED
,
7006 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
7007 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
7009 symtab
->define_in_output_data("__exidx_end", NULL
,
7010 Symbol_table::PREDEFINED
,
7011 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
7012 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
7015 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7016 // the .ARM.exidx section.
7017 if (!layout
->script_options()->saw_phdrs_clause())
7019 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0, 0)
7021 Output_segment
* exidx_segment
=
7022 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
7023 exidx_segment
->add_output_section(exidx_section
, elfcpp::PF_R
,
7028 // Create an .ARM.attributes section if there is not one already.
7029 Output_attributes_section_data
* attributes_section
=
7030 new Output_attributes_section_data(*this->attributes_section_data_
);
7031 layout
->add_output_section_data(".ARM.attributes",
7032 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
7033 attributes_section
, false, false, false,
7037 // Return whether a direct absolute static relocation needs to be applied.
7038 // In cases where Scan::local() or Scan::global() has created
7039 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7040 // of the relocation is carried in the data, and we must not
7041 // apply the static relocation.
7043 template<bool big_endian
>
7045 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
7046 const Sized_symbol
<32>* gsym
,
7049 Output_section
* output_section
)
7051 // If the output section is not allocated, then we didn't call
7052 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7054 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
7057 // For local symbols, we will have created a non-RELATIVE dynamic
7058 // relocation only if (a) the output is position independent,
7059 // (b) the relocation is absolute (not pc- or segment-relative), and
7060 // (c) the relocation is not 32 bits wide.
7062 return !(parameters
->options().output_is_position_independent()
7063 && (ref_flags
& Symbol::ABSOLUTE_REF
)
7066 // For global symbols, we use the same helper routines used in the
7067 // scan pass. If we did not create a dynamic relocation, or if we
7068 // created a RELATIVE dynamic relocation, we should apply the static
7070 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
7071 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
7072 && gsym
->can_use_relative_reloc(ref_flags
7073 & Symbol::FUNCTION_CALL
);
7074 return !has_dyn
|| is_rel
;
7077 // Perform a relocation.
7079 template<bool big_endian
>
7081 Target_arm
<big_endian
>::Relocate::relocate(
7082 const Relocate_info
<32, big_endian
>* relinfo
,
7084 Output_section
*output_section
,
7086 const elfcpp::Rel
<32, big_endian
>& rel
,
7087 unsigned int r_type
,
7088 const Sized_symbol
<32>* gsym
,
7089 const Symbol_value
<32>* psymval
,
7090 unsigned char* view
,
7091 Arm_address address
,
7092 section_size_type
/* view_size */ )
7094 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
7096 r_type
= get_real_reloc_type(r_type
);
7098 const Arm_relobj
<big_endian
>* object
=
7099 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
7101 // If the final branch target of a relocation is THUMB instruction, this
7102 // is 1. Otherwise it is 0.
7103 Arm_address thumb_bit
= 0;
7104 Symbol_value
<32> symval
;
7105 bool is_weakly_undefined_without_plt
= false;
7106 if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
7110 // This is a global symbol. Determine if we use PLT and if the
7111 // final target is THUMB.
7112 if (gsym
->use_plt_offset(reloc_is_non_pic(r_type
)))
7114 // This uses a PLT, change the symbol value.
7115 symval
.set_output_value(target
->plt_section()->address()
7116 + gsym
->plt_offset());
7119 else if (gsym
->is_weak_undefined())
7121 // This is a weakly undefined symbol and we do not use PLT
7122 // for this relocation. A branch targeting this symbol will
7123 // be converted into an NOP.
7124 is_weakly_undefined_without_plt
= true;
7128 // Set thumb bit if symbol:
7129 // -Has type STT_ARM_TFUNC or
7130 // -Has type STT_FUNC, is defined and with LSB in value set.
7132 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
7133 || (gsym
->type() == elfcpp::STT_FUNC
7134 && !gsym
->is_undefined()
7135 && ((psymval
->value(object
, 0) & 1) != 0)))
7142 // This is a local symbol. Determine if the final target is THUMB.
7143 // We saved this information when all the local symbols were read.
7144 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
7145 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
7146 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
7151 // This is a fake relocation synthesized for a stub. It does not have
7152 // a real symbol. We just look at the LSB of the symbol value to
7153 // determine if the target is THUMB or not.
7154 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
7157 // Strip LSB if this points to a THUMB target.
7159 && Target_arm
<big_endian
>::reloc_uses_thumb_bit(r_type
)
7160 && ((psymval
->value(object
, 0) & 1) != 0))
7162 Arm_address stripped_value
=
7163 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
7164 symval
.set_output_value(stripped_value
);
7168 // Get the GOT offset if needed.
7169 // The GOT pointer points to the end of the GOT section.
7170 // We need to subtract the size of the GOT section to get
7171 // the actual offset to use in the relocation.
7172 bool have_got_offset
= false;
7173 unsigned int got_offset
= 0;
7176 case elfcpp::R_ARM_GOT_BREL
:
7177 case elfcpp::R_ARM_GOT_PREL
:
7180 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
7181 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
7182 - target
->got_size());
7186 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
7187 gold_assert(object
->local_has_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7188 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
7189 - target
->got_size());
7191 have_got_offset
= true;
7198 // To look up relocation stubs, we need to pass the symbol table index of
7200 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
7202 // Get the addressing origin of the output segment defining the
7203 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7204 Arm_address sym_origin
= 0;
7205 if (Relocate::reloc_needs_sym_origin(r_type
))
7207 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
7208 // R_ARM_BASE_ABS with the NULL symbol will give the
7209 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7210 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7211 sym_origin
= target
->got_plt_section()->address();
7212 else if (gsym
== NULL
)
7214 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
7215 sym_origin
= gsym
->output_segment()->vaddr();
7216 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
7217 sym_origin
= gsym
->output_data()->address();
7219 // TODO: Assumes the segment base to be zero for the global symbols
7220 // till the proper support for the segment-base-relative addressing
7221 // will be implemented. This is consistent with GNU ld.
7224 typename
Arm_relocate_functions::Status reloc_status
=
7225 Arm_relocate_functions::STATUS_OKAY
;
7228 case elfcpp::R_ARM_NONE
:
7231 case elfcpp::R_ARM_ABS8
:
7232 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7234 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
7237 case elfcpp::R_ARM_ABS12
:
7238 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7240 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
7243 case elfcpp::R_ARM_ABS16
:
7244 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7246 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
7249 case elfcpp::R_ARM_ABS32
:
7250 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7252 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
7256 case elfcpp::R_ARM_ABS32_NOI
:
7257 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7259 // No thumb bit for this relocation: (S + A)
7260 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
7264 case elfcpp::R_ARM_MOVW_ABS_NC
:
7265 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7267 reloc_status
= Arm_relocate_functions::movw_abs_nc(view
, object
,
7271 gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making"
7272 "a shared object; recompile with -fPIC"));
7275 case elfcpp::R_ARM_MOVT_ABS
:
7276 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7278 reloc_status
= Arm_relocate_functions::movt_abs(view
, object
, psymval
);
7280 gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making"
7281 "a shared object; recompile with -fPIC"));
7284 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7285 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7287 reloc_status
= Arm_relocate_functions::thm_movw_abs_nc(view
, object
,
7291 gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when"
7292 "making a shared object; recompile with -fPIC"));
7295 case elfcpp::R_ARM_THM_MOVT_ABS
:
7296 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7298 reloc_status
= Arm_relocate_functions::thm_movt_abs(view
, object
,
7301 gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when"
7302 "making a shared object; recompile with -fPIC"));
7305 case elfcpp::R_ARM_MOVW_PREL_NC
:
7306 reloc_status
= Arm_relocate_functions::movw_prel_nc(view
, object
,
7311 case elfcpp::R_ARM_MOVT_PREL
:
7312 reloc_status
= Arm_relocate_functions::movt_prel(view
, object
,
7316 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7317 reloc_status
= Arm_relocate_functions::thm_movw_prel_nc(view
, object
,
7322 case elfcpp::R_ARM_THM_MOVT_PREL
:
7323 reloc_status
= Arm_relocate_functions::thm_movt_prel(view
, object
,
7327 case elfcpp::R_ARM_REL32
:
7328 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
7329 address
, thumb_bit
);
7332 case elfcpp::R_ARM_THM_ABS5
:
7333 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7335 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
7338 case elfcpp::R_ARM_THM_CALL
:
7340 Arm_relocate_functions::thm_call(relinfo
, view
, gsym
, object
, r_sym
,
7341 psymval
, address
, thumb_bit
,
7342 is_weakly_undefined_without_plt
);
7345 case elfcpp::R_ARM_XPC25
:
7347 Arm_relocate_functions::xpc25(relinfo
, view
, gsym
, object
, r_sym
,
7348 psymval
, address
, thumb_bit
,
7349 is_weakly_undefined_without_plt
);
7352 case elfcpp::R_ARM_THM_XPC22
:
7354 Arm_relocate_functions::thm_xpc22(relinfo
, view
, gsym
, object
, r_sym
,
7355 psymval
, address
, thumb_bit
,
7356 is_weakly_undefined_without_plt
);
7359 case elfcpp::R_ARM_GOTOFF32
:
7361 Arm_address got_origin
;
7362 got_origin
= target
->got_plt_section()->address();
7363 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
7364 got_origin
, thumb_bit
);
7368 case elfcpp::R_ARM_BASE_PREL
:
7369 gold_assert(gsym
!= NULL
);
7371 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
7374 case elfcpp::R_ARM_BASE_ABS
:
7376 if (!should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7380 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
7384 case elfcpp::R_ARM_GOT_BREL
:
7385 gold_assert(have_got_offset
);
7386 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
7389 case elfcpp::R_ARM_GOT_PREL
:
7390 gold_assert(have_got_offset
);
7391 // Get the address origin for GOT PLT, which is allocated right
7392 // after the GOT section, to calculate an absolute address of
7393 // the symbol GOT entry (got_origin + got_offset).
7394 Arm_address got_origin
;
7395 got_origin
= target
->got_plt_section()->address();
7396 reloc_status
= Arm_relocate_functions::got_prel(view
,
7397 got_origin
+ got_offset
,
7401 case elfcpp::R_ARM_PLT32
:
7402 gold_assert(gsym
== NULL
7403 || gsym
->has_plt_offset()
7404 || gsym
->final_value_is_known()
7405 || (gsym
->is_defined()
7406 && !gsym
->is_from_dynobj()
7407 && !gsym
->is_preemptible()));
7409 Arm_relocate_functions::plt32(relinfo
, view
, gsym
, object
, r_sym
,
7410 psymval
, address
, thumb_bit
,
7411 is_weakly_undefined_without_plt
);
7414 case elfcpp::R_ARM_CALL
:
7416 Arm_relocate_functions::call(relinfo
, view
, gsym
, object
, r_sym
,
7417 psymval
, address
, thumb_bit
,
7418 is_weakly_undefined_without_plt
);
7421 case elfcpp::R_ARM_JUMP24
:
7423 Arm_relocate_functions::jump24(relinfo
, view
, gsym
, object
, r_sym
,
7424 psymval
, address
, thumb_bit
,
7425 is_weakly_undefined_without_plt
);
7428 case elfcpp::R_ARM_THM_JUMP24
:
7430 Arm_relocate_functions::thm_jump24(relinfo
, view
, gsym
, object
, r_sym
,
7431 psymval
, address
, thumb_bit
,
7432 is_weakly_undefined_without_plt
);
7435 case elfcpp::R_ARM_THM_JUMP19
:
7437 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
7441 case elfcpp::R_ARM_THM_JUMP6
:
7443 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
7446 case elfcpp::R_ARM_THM_JUMP8
:
7448 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
7451 case elfcpp::R_ARM_THM_JUMP11
:
7453 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
7456 case elfcpp::R_ARM_PREL31
:
7457 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
7458 address
, thumb_bit
);
7461 case elfcpp::R_ARM_V4BX
:
7462 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
7464 const bool is_v4bx_interworking
=
7465 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
7467 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
7468 is_v4bx_interworking
);
7472 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7474 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7475 address
, thumb_bit
, false);
7478 case elfcpp::R_ARM_ALU_PC_G0
:
7480 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7481 address
, thumb_bit
, true);
7484 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7486 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7487 address
, thumb_bit
, false);
7490 case elfcpp::R_ARM_ALU_PC_G1
:
7492 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7493 address
, thumb_bit
, true);
7496 case elfcpp::R_ARM_ALU_PC_G2
:
7498 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 2,
7499 address
, thumb_bit
, true);
7502 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7504 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7505 sym_origin
, thumb_bit
, false);
7508 case elfcpp::R_ARM_ALU_SB_G0
:
7510 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7511 sym_origin
, thumb_bit
, true);
7514 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7516 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7517 sym_origin
, thumb_bit
, false);
7520 case elfcpp::R_ARM_ALU_SB_G1
:
7522 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7523 sym_origin
, thumb_bit
, true);
7526 case elfcpp::R_ARM_ALU_SB_G2
:
7528 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 2,
7529 sym_origin
, thumb_bit
, true);
7532 case elfcpp::R_ARM_LDR_PC_G0
:
7534 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 0,
7538 case elfcpp::R_ARM_LDR_PC_G1
:
7540 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 1,
7544 case elfcpp::R_ARM_LDR_PC_G2
:
7546 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 2,
7550 case elfcpp::R_ARM_LDR_SB_G0
:
7552 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 0,
7556 case elfcpp::R_ARM_LDR_SB_G1
:
7558 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 1,
7562 case elfcpp::R_ARM_LDR_SB_G2
:
7564 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 2,
7568 case elfcpp::R_ARM_LDRS_PC_G0
:
7570 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 0,
7574 case elfcpp::R_ARM_LDRS_PC_G1
:
7576 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 1,
7580 case elfcpp::R_ARM_LDRS_PC_G2
:
7582 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 2,
7586 case elfcpp::R_ARM_LDRS_SB_G0
:
7588 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 0,
7592 case elfcpp::R_ARM_LDRS_SB_G1
:
7594 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 1,
7598 case elfcpp::R_ARM_LDRS_SB_G2
:
7600 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 2,
7604 case elfcpp::R_ARM_LDC_PC_G0
:
7606 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 0,
7610 case elfcpp::R_ARM_LDC_PC_G1
:
7612 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 1,
7616 case elfcpp::R_ARM_LDC_PC_G2
:
7618 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 2,
7622 case elfcpp::R_ARM_LDC_SB_G0
:
7624 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 0,
7628 case elfcpp::R_ARM_LDC_SB_G1
:
7630 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 1,
7634 case elfcpp::R_ARM_LDC_SB_G2
:
7636 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 2,
7640 case elfcpp::R_ARM_TARGET1
:
7641 // This should have been mapped to another type already.
7643 case elfcpp::R_ARM_COPY
:
7644 case elfcpp::R_ARM_GLOB_DAT
:
7645 case elfcpp::R_ARM_JUMP_SLOT
:
7646 case elfcpp::R_ARM_RELATIVE
:
7647 // These are relocations which should only be seen by the
7648 // dynamic linker, and should never be seen here.
7649 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7650 _("unexpected reloc %u in object file"),
7655 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7656 _("unsupported reloc %u"),
7661 // Report any errors.
7662 switch (reloc_status
)
7664 case Arm_relocate_functions::STATUS_OKAY
:
7666 case Arm_relocate_functions::STATUS_OVERFLOW
:
7667 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7668 _("relocation overflow in relocation %u"),
7671 case Arm_relocate_functions::STATUS_BAD_RELOC
:
7672 gold_error_at_location(
7676 _("unexpected opcode while processing relocation %u"),
7686 // Relocate section data.
7688 template<bool big_endian
>
7690 Target_arm
<big_endian
>::relocate_section(
7691 const Relocate_info
<32, big_endian
>* relinfo
,
7692 unsigned int sh_type
,
7693 const unsigned char* prelocs
,
7695 Output_section
* output_section
,
7696 bool needs_special_offset_handling
,
7697 unsigned char* view
,
7698 Arm_address address
,
7699 section_size_type view_size
,
7700 const Reloc_symbol_changes
* reloc_symbol_changes
)
7702 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
7703 gold_assert(sh_type
== elfcpp::SHT_REL
);
7705 Arm_input_section
<big_endian
>* arm_input_section
=
7706 this->find_arm_input_section(relinfo
->object
, relinfo
->data_shndx
);
7708 // This is an ARM input section and the view covers the whole output
7710 if (arm_input_section
!= NULL
)
7712 gold_assert(needs_special_offset_handling
);
7713 Arm_address section_address
= arm_input_section
->address();
7714 section_size_type section_size
= arm_input_section
->data_size();
7716 gold_assert((arm_input_section
->address() >= address
)
7717 && ((arm_input_section
->address()
7718 + arm_input_section
->data_size())
7719 <= (address
+ view_size
)));
7721 off_t offset
= section_address
- address
;
7724 view_size
= section_size
;
7727 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
7734 needs_special_offset_handling
,
7738 reloc_symbol_changes
);
7741 // Return the size of a relocation while scanning during a relocatable
7744 template<bool big_endian
>
7746 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
7747 unsigned int r_type
,
7750 r_type
= get_real_reloc_type(r_type
);
7753 case elfcpp::R_ARM_NONE
:
7756 case elfcpp::R_ARM_ABS8
:
7759 case elfcpp::R_ARM_ABS16
:
7760 case elfcpp::R_ARM_THM_ABS5
:
7761 case elfcpp::R_ARM_THM_JUMP6
:
7762 case elfcpp::R_ARM_THM_JUMP8
:
7763 case elfcpp::R_ARM_THM_JUMP11
:
7766 case elfcpp::R_ARM_ABS32
:
7767 case elfcpp::R_ARM_ABS32_NOI
:
7768 case elfcpp::R_ARM_ABS12
:
7769 case elfcpp::R_ARM_BASE_ABS
:
7770 case elfcpp::R_ARM_REL32
:
7771 case elfcpp::R_ARM_THM_CALL
:
7772 case elfcpp::R_ARM_GOTOFF32
:
7773 case elfcpp::R_ARM_BASE_PREL
:
7774 case elfcpp::R_ARM_GOT_BREL
:
7775 case elfcpp::R_ARM_GOT_PREL
:
7776 case elfcpp::R_ARM_PLT32
:
7777 case elfcpp::R_ARM_CALL
:
7778 case elfcpp::R_ARM_JUMP24
:
7779 case elfcpp::R_ARM_PREL31
:
7780 case elfcpp::R_ARM_MOVW_ABS_NC
:
7781 case elfcpp::R_ARM_MOVT_ABS
:
7782 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7783 case elfcpp::R_ARM_THM_MOVT_ABS
:
7784 case elfcpp::R_ARM_MOVW_PREL_NC
:
7785 case elfcpp::R_ARM_MOVT_PREL
:
7786 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7787 case elfcpp::R_ARM_THM_MOVT_PREL
:
7788 case elfcpp::R_ARM_V4BX
:
7789 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7790 case elfcpp::R_ARM_ALU_PC_G0
:
7791 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7792 case elfcpp::R_ARM_ALU_PC_G1
:
7793 case elfcpp::R_ARM_ALU_PC_G2
:
7794 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7795 case elfcpp::R_ARM_ALU_SB_G0
:
7796 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7797 case elfcpp::R_ARM_ALU_SB_G1
:
7798 case elfcpp::R_ARM_ALU_SB_G2
:
7799 case elfcpp::R_ARM_LDR_PC_G0
:
7800 case elfcpp::R_ARM_LDR_PC_G1
:
7801 case elfcpp::R_ARM_LDR_PC_G2
:
7802 case elfcpp::R_ARM_LDR_SB_G0
:
7803 case elfcpp::R_ARM_LDR_SB_G1
:
7804 case elfcpp::R_ARM_LDR_SB_G2
:
7805 case elfcpp::R_ARM_LDRS_PC_G0
:
7806 case elfcpp::R_ARM_LDRS_PC_G1
:
7807 case elfcpp::R_ARM_LDRS_PC_G2
:
7808 case elfcpp::R_ARM_LDRS_SB_G0
:
7809 case elfcpp::R_ARM_LDRS_SB_G1
:
7810 case elfcpp::R_ARM_LDRS_SB_G2
:
7811 case elfcpp::R_ARM_LDC_PC_G0
:
7812 case elfcpp::R_ARM_LDC_PC_G1
:
7813 case elfcpp::R_ARM_LDC_PC_G2
:
7814 case elfcpp::R_ARM_LDC_SB_G0
:
7815 case elfcpp::R_ARM_LDC_SB_G1
:
7816 case elfcpp::R_ARM_LDC_SB_G2
:
7819 case elfcpp::R_ARM_TARGET1
:
7820 // This should have been mapped to another type already.
7822 case elfcpp::R_ARM_COPY
:
7823 case elfcpp::R_ARM_GLOB_DAT
:
7824 case elfcpp::R_ARM_JUMP_SLOT
:
7825 case elfcpp::R_ARM_RELATIVE
:
7826 // These are relocations which should only be seen by the
7827 // dynamic linker, and should never be seen here.
7828 gold_error(_("%s: unexpected reloc %u in object file"),
7829 object
->name().c_str(), r_type
);
7833 object
->error(_("unsupported reloc %u in object file"), r_type
);
7838 // Scan the relocs during a relocatable link.
7840 template<bool big_endian
>
7842 Target_arm
<big_endian
>::scan_relocatable_relocs(
7843 Symbol_table
* symtab
,
7845 Sized_relobj
<32, big_endian
>* object
,
7846 unsigned int data_shndx
,
7847 unsigned int sh_type
,
7848 const unsigned char* prelocs
,
7850 Output_section
* output_section
,
7851 bool needs_special_offset_handling
,
7852 size_t local_symbol_count
,
7853 const unsigned char* plocal_symbols
,
7854 Relocatable_relocs
* rr
)
7856 gold_assert(sh_type
== elfcpp::SHT_REL
);
7858 typedef gold::Default_scan_relocatable_relocs
<elfcpp::SHT_REL
,
7859 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
7861 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
7862 Scan_relocatable_relocs
>(
7870 needs_special_offset_handling
,
7876 // Relocate a section during a relocatable link.
7878 template<bool big_endian
>
7880 Target_arm
<big_endian
>::relocate_for_relocatable(
7881 const Relocate_info
<32, big_endian
>* relinfo
,
7882 unsigned int sh_type
,
7883 const unsigned char* prelocs
,
7885 Output_section
* output_section
,
7886 off_t offset_in_output_section
,
7887 const Relocatable_relocs
* rr
,
7888 unsigned char* view
,
7889 Arm_address view_address
,
7890 section_size_type view_size
,
7891 unsigned char* reloc_view
,
7892 section_size_type reloc_view_size
)
7894 gold_assert(sh_type
== elfcpp::SHT_REL
);
7896 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
7901 offset_in_output_section
,
7910 // Return the value to use for a dynamic symbol which requires special
7911 // treatment. This is how we support equality comparisons of function
7912 // pointers across shared library boundaries, as described in the
7913 // processor specific ABI supplement.
7915 template<bool big_endian
>
7917 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
7919 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
7920 return this->plt_section()->address() + gsym
->plt_offset();
7923 // Map platform-specific relocs to real relocs
7925 template<bool big_endian
>
7927 Target_arm
<big_endian
>::get_real_reloc_type (unsigned int r_type
)
7931 case elfcpp::R_ARM_TARGET1
:
7932 // This is either R_ARM_ABS32 or R_ARM_REL32;
7933 return elfcpp::R_ARM_ABS32
;
7935 case elfcpp::R_ARM_TARGET2
:
7936 // This can be any reloc type but ususally is R_ARM_GOT_PREL
7937 return elfcpp::R_ARM_GOT_PREL
;
7944 // Whether if two EABI versions V1 and V2 are compatible.
7946 template<bool big_endian
>
7948 Target_arm
<big_endian
>::are_eabi_versions_compatible(
7949 elfcpp::Elf_Word v1
,
7950 elfcpp::Elf_Word v2
)
7952 // v4 and v5 are the same spec before and after it was released,
7953 // so allow mixing them.
7954 if ((v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
7955 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
7961 // Combine FLAGS from an input object called NAME and the processor-specific
7962 // flags in the ELF header of the output. Much of this is adapted from the
7963 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
7964 // in bfd/elf32-arm.c.
7966 template<bool big_endian
>
7968 Target_arm
<big_endian
>::merge_processor_specific_flags(
7969 const std::string
& name
,
7970 elfcpp::Elf_Word flags
)
7972 if (this->are_processor_specific_flags_set())
7974 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
7976 // Nothing to merge if flags equal to those in output.
7977 if (flags
== out_flags
)
7980 // Complain about various flag mismatches.
7981 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
7982 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
7983 if (!this->are_eabi_versions_compatible(version1
, version2
))
7984 gold_error(_("Source object %s has EABI version %d but output has "
7985 "EABI version %d."),
7987 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
7988 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
7992 // If the input is the default architecture and had the default
7993 // flags then do not bother setting the flags for the output
7994 // architecture, instead allow future merges to do this. If no
7995 // future merges ever set these flags then they will retain their
7996 // uninitialised values, which surprise surprise, correspond
7997 // to the default values.
8001 // This is the first time, just copy the flags.
8002 // We only copy the EABI version for now.
8003 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
8007 // Adjust ELF file header.
8008 template<bool big_endian
>
8010 Target_arm
<big_endian
>::do_adjust_elf_header(
8011 unsigned char* view
,
8014 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
8016 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
8017 unsigned char e_ident
[elfcpp::EI_NIDENT
];
8018 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
8020 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
8021 == elfcpp::EF_ARM_EABI_UNKNOWN
)
8022 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
8024 e_ident
[elfcpp::EI_OSABI
] = 0;
8025 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
8027 // FIXME: Do EF_ARM_BE8 adjustment.
8029 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
8030 oehdr
.put_e_ident(e_ident
);
8033 // do_make_elf_object to override the same function in the base class.
8034 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
8035 // to store ARM specific information. Hence we need to have our own
8036 // ELF object creation.
8038 template<bool big_endian
>
8040 Target_arm
<big_endian
>::do_make_elf_object(
8041 const std::string
& name
,
8042 Input_file
* input_file
,
8043 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
8045 int et
= ehdr
.get_e_type();
8046 if (et
== elfcpp::ET_REL
)
8048 Arm_relobj
<big_endian
>* obj
=
8049 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
8053 else if (et
== elfcpp::ET_DYN
)
8055 Sized_dynobj
<32, big_endian
>* obj
=
8056 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
8062 gold_error(_("%s: unsupported ELF file type %d"),
8068 // Read the architecture from the Tag_also_compatible_with attribute, if any.
8069 // Returns -1 if no architecture could be read.
8070 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
8072 template<bool big_endian
>
8074 Target_arm
<big_endian
>::get_secondary_compatible_arch(
8075 const Attributes_section_data
* pasd
)
8077 const Object_attribute
*known_attributes
=
8078 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
8080 // Note: the tag and its argument below are uleb128 values, though
8081 // currently-defined values fit in one byte for each.
8082 const std::string
& sv
=
8083 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
8085 && sv
.data()[0] == elfcpp::Tag_CPU_arch
8086 && (sv
.data()[1] & 128) != 128)
8087 return sv
.data()[1];
8089 // This tag is "safely ignorable", so don't complain if it looks funny.
8093 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8094 // The tag is removed if ARCH is -1.
8095 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
8097 template<bool big_endian
>
8099 Target_arm
<big_endian
>::set_secondary_compatible_arch(
8100 Attributes_section_data
* pasd
,
8103 Object_attribute
*known_attributes
=
8104 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
8108 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
8112 // Note: the tag and its argument below are uleb128 values, though
8113 // currently-defined values fit in one byte for each.
8115 sv
[0] = elfcpp::Tag_CPU_arch
;
8116 gold_assert(arch
!= 0);
8120 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
8123 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8125 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8127 template<bool big_endian
>
8129 Target_arm
<big_endian
>::tag_cpu_arch_combine(
8132 int* secondary_compat_out
,
8134 int secondary_compat
)
8136 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8137 static const int v6t2
[] =
8149 static const int v6k
[] =
8162 static const int v7
[] =
8176 static const int v6_m
[] =
8191 static const int v6s_m
[] =
8207 static const int v7e_m
[] =
8224 static const int v4t_plus_v6_m
[] =
8240 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
8242 static const int *comb
[] =
8250 // Pseudo-architecture.
8254 // Check we've not got a higher architecture than we know about.
8256 if (oldtag
>= elfcpp::MAX_TAG_CPU_ARCH
|| newtag
>= elfcpp::MAX_TAG_CPU_ARCH
)
8258 gold_error(_("%s: unknown CPU architecture"), name
);
8262 // Override old tag if we have a Tag_also_compatible_with on the output.
8264 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
8265 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
8266 oldtag
= T(V4T_PLUS_V6_M
);
8268 // And override the new tag if we have a Tag_also_compatible_with on the
8271 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
8272 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
8273 newtag
= T(V4T_PLUS_V6_M
);
8275 // Architectures before V6KZ add features monotonically.
8276 int tagh
= std::max(oldtag
, newtag
);
8277 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
8280 int tagl
= std::min(oldtag
, newtag
);
8281 int result
= comb
[tagh
- T(V6T2
)][tagl
];
8283 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8284 // as the canonical version.
8285 if (result
== T(V4T_PLUS_V6_M
))
8288 *secondary_compat_out
= T(V6_M
);
8291 *secondary_compat_out
= -1;
8295 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8296 name
, oldtag
, newtag
);
8304 // Helper to print AEABI enum tag value.
8306 template<bool big_endian
>
8308 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
8310 static const char *aeabi_enum_names
[] =
8311 { "", "variable-size", "32-bit", "" };
8312 const size_t aeabi_enum_names_size
=
8313 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
8315 if (value
< aeabi_enum_names_size
)
8316 return std::string(aeabi_enum_names
[value
]);
8320 sprintf(buffer
, "<unknown value %u>", value
);
8321 return std::string(buffer
);
8325 // Return the string value to store in TAG_CPU_name.
8327 template<bool big_endian
>
8329 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
8331 static const char *name_table
[] = {
8332 // These aren't real CPU names, but we can't guess
8333 // that from the architecture version alone.
8349 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
8351 if (value
< name_table_size
)
8352 return std::string(name_table
[value
]);
8356 sprintf(buffer
, "<unknown CPU value %u>", value
);
8357 return std::string(buffer
);
8361 // Merge object attributes from input file called NAME with those of the
8362 // output. The input object attributes are in the object pointed by PASD.
8364 template<bool big_endian
>
8366 Target_arm
<big_endian
>::merge_object_attributes(
8368 const Attributes_section_data
* pasd
)
8370 // Return if there is no attributes section data.
8374 // If output has no object attributes, just copy.
8375 if (this->attributes_section_data_
== NULL
)
8377 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
8381 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
8382 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
8383 Object_attribute
* out_attr
=
8384 this->attributes_section_data_
->known_attributes(vendor
);
8386 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8387 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
8388 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
8390 // Ignore mismatches if the object doesn't use floating point. */
8391 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
8392 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
8393 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
8394 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0)
8395 gold_error(_("%s uses VFP register arguments, output does not"),
8399 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
8401 // Merge this attribute with existing attributes.
8404 case elfcpp::Tag_CPU_raw_name
:
8405 case elfcpp::Tag_CPU_name
:
8406 // These are merged after Tag_CPU_arch.
8409 case elfcpp::Tag_ABI_optimization_goals
:
8410 case elfcpp::Tag_ABI_FP_optimization_goals
:
8411 // Use the first value seen.
8414 case elfcpp::Tag_CPU_arch
:
8416 unsigned int saved_out_attr
= out_attr
->int_value();
8417 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8418 int secondary_compat
=
8419 this->get_secondary_compatible_arch(pasd
);
8420 int secondary_compat_out
=
8421 this->get_secondary_compatible_arch(
8422 this->attributes_section_data_
);
8423 out_attr
[i
].set_int_value(
8424 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
8425 &secondary_compat_out
,
8426 in_attr
[i
].int_value(),
8428 this->set_secondary_compatible_arch(this->attributes_section_data_
,
8429 secondary_compat_out
);
8431 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8432 if (out_attr
[i
].int_value() == saved_out_attr
)
8433 ; // Leave the names alone.
8434 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
8436 // The output architecture has been changed to match the
8437 // input architecture. Use the input names.
8438 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
8439 in_attr
[elfcpp::Tag_CPU_name
].string_value());
8440 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
8441 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
8445 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
8446 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
8449 // If we still don't have a value for Tag_CPU_name,
8450 // make one up now. Tag_CPU_raw_name remains blank.
8451 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
8453 const std::string cpu_name
=
8454 this->tag_cpu_name_value(out_attr
[i
].int_value());
8455 // FIXME: If we see an unknown CPU, this will be set
8456 // to "<unknown CPU n>", where n is the attribute value.
8457 // This is different from BFD, which leaves the name alone.
8458 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
8463 case elfcpp::Tag_ARM_ISA_use
:
8464 case elfcpp::Tag_THUMB_ISA_use
:
8465 case elfcpp::Tag_WMMX_arch
:
8466 case elfcpp::Tag_Advanced_SIMD_arch
:
8467 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8468 case elfcpp::Tag_ABI_FP_rounding
:
8469 case elfcpp::Tag_ABI_FP_exceptions
:
8470 case elfcpp::Tag_ABI_FP_user_exceptions
:
8471 case elfcpp::Tag_ABI_FP_number_model
:
8472 case elfcpp::Tag_VFP_HP_extension
:
8473 case elfcpp::Tag_CPU_unaligned_access
:
8474 case elfcpp::Tag_T2EE_use
:
8475 case elfcpp::Tag_Virtualization_use
:
8476 case elfcpp::Tag_MPextension_use
:
8477 // Use the largest value specified.
8478 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
8479 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8482 case elfcpp::Tag_ABI_align8_preserved
:
8483 case elfcpp::Tag_ABI_PCS_RO_data
:
8484 // Use the smallest value specified.
8485 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
8486 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8489 case elfcpp::Tag_ABI_align8_needed
:
8490 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
8491 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
8492 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
8495 // This error message should be enabled once all non-conformant
8496 // binaries in the toolchain have had the attributes set
8498 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8502 case elfcpp::Tag_ABI_FP_denormal
:
8503 case elfcpp::Tag_ABI_PCS_GOT_use
:
8505 // These tags have 0 = don't care, 1 = strong requirement,
8506 // 2 = weak requirement.
8507 static const int order_021
[3] = {0, 2, 1};
8509 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8510 // value if greater than 2 (for future-proofing).
8511 if ((in_attr
[i
].int_value() > 2
8512 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
8513 || (in_attr
[i
].int_value() <= 2
8514 && out_attr
[i
].int_value() <= 2
8515 && (order_021
[in_attr
[i
].int_value()]
8516 > order_021
[out_attr
[i
].int_value()])))
8517 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8521 case elfcpp::Tag_CPU_arch_profile
:
8522 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
8524 // 0 will merge with anything.
8525 // 'A' and 'S' merge to 'A'.
8526 // 'R' and 'S' merge to 'R'.
8527 // 'M' and 'A|R|S' is an error.
8528 if (out_attr
[i
].int_value() == 0
8529 || (out_attr
[i
].int_value() == 'S'
8530 && (in_attr
[i
].int_value() == 'A'
8531 || in_attr
[i
].int_value() == 'R')))
8532 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8533 else if (in_attr
[i
].int_value() == 0
8534 || (in_attr
[i
].int_value() == 'S'
8535 && (out_attr
[i
].int_value() == 'A'
8536 || out_attr
[i
].int_value() == 'R')))
8541 (_("conflicting architecture profiles %c/%c"),
8542 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
8543 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
8547 case elfcpp::Tag_VFP_arch
:
8564 // Values greater than 6 aren't defined, so just pick the
8566 if (in_attr
[i
].int_value() > 6
8567 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
8569 *out_attr
= *in_attr
;
8572 // The output uses the superset of input features
8573 // (ISA version) and registers.
8574 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
8575 vfp_versions
[out_attr
[i
].int_value()].ver
);
8576 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
8577 vfp_versions
[out_attr
[i
].int_value()].regs
);
8578 // This assumes all possible supersets are also a valid
8581 for (newval
= 6; newval
> 0; newval
--)
8583 if (regs
== vfp_versions
[newval
].regs
8584 && ver
== vfp_versions
[newval
].ver
)
8587 out_attr
[i
].set_int_value(newval
);
8590 case elfcpp::Tag_PCS_config
:
8591 if (out_attr
[i
].int_value() == 0)
8592 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8593 else if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
8595 // It's sometimes ok to mix different configs, so this is only
8597 gold_warning(_("%s: conflicting platform configuration"), name
);
8600 case elfcpp::Tag_ABI_PCS_R9_use
:
8601 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
8602 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
8603 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
)
8605 gold_error(_("%s: conflicting use of R9"), name
);
8607 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
8608 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8610 case elfcpp::Tag_ABI_PCS_RW_data
:
8611 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8612 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
8613 != elfcpp::AEABI_R9_SB
)
8614 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
8615 != elfcpp::AEABI_R9_unused
))
8617 gold_error(_("%s: SB relative addressing conflicts with use "
8621 // Use the smallest value specified.
8622 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
8623 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8625 case elfcpp::Tag_ABI_PCS_wchar_t
:
8626 // FIXME: Make it possible to turn off this warning.
8627 if (out_attr
[i
].int_value()
8628 && in_attr
[i
].int_value()
8629 && out_attr
[i
].int_value() != in_attr
[i
].int_value())
8631 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8632 "use %u-byte wchar_t; use of wchar_t values "
8633 "across objects may fail"),
8634 name
, in_attr
[i
].int_value(),
8635 out_attr
[i
].int_value());
8637 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
8638 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8640 case elfcpp::Tag_ABI_enum_size
:
8641 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
8643 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
8644 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
8646 // The existing object is compatible with anything.
8647 // Use whatever requirements the new object has.
8648 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8650 // FIXME: Make it possible to turn off this warning.
8651 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
8652 && out_attr
[i
].int_value() != in_attr
[i
].int_value())
8654 unsigned int in_value
= in_attr
[i
].int_value();
8655 unsigned int out_value
= out_attr
[i
].int_value();
8656 gold_warning(_("%s uses %s enums yet the output is to use "
8657 "%s enums; use of enum values across objects "
8660 this->aeabi_enum_name(in_value
).c_str(),
8661 this->aeabi_enum_name(out_value
).c_str());
8665 case elfcpp::Tag_ABI_VFP_args
:
8668 case elfcpp::Tag_ABI_WMMX_args
:
8669 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
8671 gold_error(_("%s uses iWMMXt register arguments, output does "
8676 case Object_attribute::Tag_compatibility
:
8677 // Merged in target-independent code.
8679 case elfcpp::Tag_ABI_HardFP_use
:
8680 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8681 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
8682 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
8683 out_attr
[i
].set_int_value(3);
8684 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
8685 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8687 case elfcpp::Tag_ABI_FP_16bit_format
:
8688 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
8690 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
8691 gold_error(_("fp16 format mismatch between %s and output"),
8694 if (in_attr
[i
].int_value() != 0)
8695 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8698 case elfcpp::Tag_nodefaults
:
8699 // This tag is set if it exists, but the value is unused (and is
8700 // typically zero). We don't actually need to do anything here -
8701 // the merge happens automatically when the type flags are merged
8704 case elfcpp::Tag_also_compatible_with
:
8705 // Already done in Tag_CPU_arch.
8707 case elfcpp::Tag_conformance
:
8708 // Keep the attribute if it matches. Throw it away otherwise.
8709 // No attribute means no claim to conform.
8710 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
8711 out_attr
[i
].set_string_value("");
8716 const char* err_object
= NULL
;
8718 // The "known_obj_attributes" table does contain some undefined
8719 // attributes. Ensure that there are unused.
8720 if (out_attr
[i
].int_value() != 0
8721 || out_attr
[i
].string_value() != "")
8722 err_object
= "output";
8723 else if (in_attr
[i
].int_value() != 0
8724 || in_attr
[i
].string_value() != "")
8727 if (err_object
!= NULL
)
8729 // Attribute numbers >=64 (mod 128) can be safely ignored.
8731 gold_error(_("%s: unknown mandatory EABI object attribute "
8735 gold_warning(_("%s: unknown EABI object attribute %d"),
8739 // Only pass on attributes that match in both inputs.
8740 if (!in_attr
[i
].matches(out_attr
[i
]))
8742 out_attr
[i
].set_int_value(0);
8743 out_attr
[i
].set_string_value("");
8748 // If out_attr was copied from in_attr then it won't have a type yet.
8749 if (in_attr
[i
].type() && !out_attr
[i
].type())
8750 out_attr
[i
].set_type(in_attr
[i
].type());
8753 // Merge Tag_compatibility attributes and any common GNU ones.
8754 this->attributes_section_data_
->merge(name
, pasd
);
8756 // Check for any attributes not known on ARM.
8757 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
8758 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
8759 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
8760 Other_attributes
* out_other_attributes
=
8761 this->attributes_section_data_
->other_attributes(vendor
);
8762 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
8764 while (in_iter
!= in_other_attributes
->end()
8765 || out_iter
!= out_other_attributes
->end())
8767 const char* err_object
= NULL
;
8770 // The tags for each list are in numerical order.
8771 // If the tags are equal, then merge.
8772 if (out_iter
!= out_other_attributes
->end()
8773 && (in_iter
== in_other_attributes
->end()
8774 || in_iter
->first
> out_iter
->first
))
8776 // This attribute only exists in output. We can't merge, and we
8777 // don't know what the tag means, so delete it.
8778 err_object
= "output";
8779 err_tag
= out_iter
->first
;
8780 int saved_tag
= out_iter
->first
;
8781 delete out_iter
->second
;
8782 out_other_attributes
->erase(out_iter
);
8783 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
8785 else if (in_iter
!= in_other_attributes
->end()
8786 && (out_iter
!= out_other_attributes
->end()
8787 || in_iter
->first
< out_iter
->first
))
8789 // This attribute only exists in input. We can't merge, and we
8790 // don't know what the tag means, so ignore it.
8792 err_tag
= in_iter
->first
;
8795 else // The tags are equal.
8797 // As present, all attributes in the list are unknown, and
8798 // therefore can't be merged meaningfully.
8799 err_object
= "output";
8800 err_tag
= out_iter
->first
;
8802 // Only pass on attributes that match in both inputs.
8803 if (!in_iter
->second
->matches(*(out_iter
->second
)))
8805 // No match. Delete the attribute.
8806 int saved_tag
= out_iter
->first
;
8807 delete out_iter
->second
;
8808 out_other_attributes
->erase(out_iter
);
8809 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
8813 // Matched. Keep the attribute and move to the next.
8821 // Attribute numbers >=64 (mod 128) can be safely ignored. */
8822 if ((err_tag
& 127) < 64)
8824 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
8825 err_object
, err_tag
);
8829 gold_warning(_("%s: unknown EABI object attribute %d"),
8830 err_object
, err_tag
);
8836 // Return whether a relocation type used the LSB to distinguish THUMB
8838 template<bool big_endian
>
8840 Target_arm
<big_endian
>::reloc_uses_thumb_bit(unsigned int r_type
)
8844 case elfcpp::R_ARM_PC24
:
8845 case elfcpp::R_ARM_ABS32
:
8846 case elfcpp::R_ARM_REL32
:
8847 case elfcpp::R_ARM_SBREL32
:
8848 case elfcpp::R_ARM_THM_CALL
:
8849 case elfcpp::R_ARM_GLOB_DAT
:
8850 case elfcpp::R_ARM_JUMP_SLOT
:
8851 case elfcpp::R_ARM_GOTOFF32
:
8852 case elfcpp::R_ARM_PLT32
:
8853 case elfcpp::R_ARM_CALL
:
8854 case elfcpp::R_ARM_JUMP24
:
8855 case elfcpp::R_ARM_THM_JUMP24
:
8856 case elfcpp::R_ARM_SBREL31
:
8857 case elfcpp::R_ARM_PREL31
:
8858 case elfcpp::R_ARM_MOVW_ABS_NC
:
8859 case elfcpp::R_ARM_MOVW_PREL_NC
:
8860 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8861 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8862 case elfcpp::R_ARM_THM_JUMP19
:
8863 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8864 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8865 case elfcpp::R_ARM_ALU_PC_G0
:
8866 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8867 case elfcpp::R_ARM_ALU_PC_G1
:
8868 case elfcpp::R_ARM_ALU_PC_G2
:
8869 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8870 case elfcpp::R_ARM_ALU_SB_G0
:
8871 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8872 case elfcpp::R_ARM_ALU_SB_G1
:
8873 case elfcpp::R_ARM_ALU_SB_G2
:
8874 case elfcpp::R_ARM_MOVW_BREL_NC
:
8875 case elfcpp::R_ARM_MOVW_BREL
:
8876 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8877 case elfcpp::R_ARM_THM_MOVW_BREL
:
8884 // Stub-generation methods for Target_arm.
8886 // Make a new Arm_input_section object.
8888 template<bool big_endian
>
8889 Arm_input_section
<big_endian
>*
8890 Target_arm
<big_endian
>::new_arm_input_section(
8894 Section_id
sid(relobj
, shndx
);
8896 Arm_input_section
<big_endian
>* arm_input_section
=
8897 new Arm_input_section
<big_endian
>(relobj
, shndx
);
8898 arm_input_section
->init();
8900 // Register new Arm_input_section in map for look-up.
8901 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
8902 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
8904 // Make sure that it we have not created another Arm_input_section
8905 // for this input section already.
8906 gold_assert(ins
.second
);
8908 return arm_input_section
;
8911 // Find the Arm_input_section object corresponding to the SHNDX-th input
8912 // section of RELOBJ.
8914 template<bool big_endian
>
8915 Arm_input_section
<big_endian
>*
8916 Target_arm
<big_endian
>::find_arm_input_section(
8918 unsigned int shndx
) const
8920 Section_id
sid(relobj
, shndx
);
8921 typename
Arm_input_section_map::const_iterator p
=
8922 this->arm_input_section_map_
.find(sid
);
8923 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
8926 // Make a new stub table.
8928 template<bool big_endian
>
8929 Stub_table
<big_endian
>*
8930 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
8932 Stub_table
<big_endian
>* stub_table
=
8933 new Stub_table
<big_endian
>(owner
);
8934 this->stub_tables_
.push_back(stub_table
);
8936 stub_table
->set_address(owner
->address() + owner
->data_size());
8937 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
8938 stub_table
->finalize_data_size();
8943 // Scan a relocation for stub generation.
8945 template<bool big_endian
>
8947 Target_arm
<big_endian
>::scan_reloc_for_stub(
8948 const Relocate_info
<32, big_endian
>* relinfo
,
8949 unsigned int r_type
,
8950 const Sized_symbol
<32>* gsym
,
8952 const Symbol_value
<32>* psymval
,
8953 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
8954 Arm_address address
)
8956 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
8958 const Arm_relobj
<big_endian
>* arm_relobj
=
8959 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8961 if (r_type
== elfcpp::R_ARM_V4BX
)
8963 const uint32_t reg
= (addend
& 0xf);
8964 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8967 // Try looking up an existing stub from a stub table.
8968 Stub_table
<big_endian
>* stub_table
=
8969 arm_relobj
->stub_table(relinfo
->data_shndx
);
8970 gold_assert(stub_table
!= NULL
);
8972 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
8974 // create a new stub and add it to stub table.
8975 Arm_v4bx_stub
* stub
=
8976 this->stub_factory().make_arm_v4bx_stub(reg
);
8977 gold_assert(stub
!= NULL
);
8978 stub_table
->add_arm_v4bx_stub(stub
);
8985 bool target_is_thumb
;
8986 Symbol_value
<32> symval
;
8989 // This is a global symbol. Determine if we use PLT and if the
8990 // final target is THUMB.
8991 if (gsym
->use_plt_offset(Relocate::reloc_is_non_pic(r_type
)))
8993 // This uses a PLT, change the symbol value.
8994 symval
.set_output_value(this->plt_section()->address()
8995 + gsym
->plt_offset());
8997 target_is_thumb
= false;
8999 else if (gsym
->is_undefined())
9000 // There is no need to generate a stub symbol is undefined.
9005 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
9006 || (gsym
->type() == elfcpp::STT_FUNC
9007 && !gsym
->is_undefined()
9008 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
9013 // This is a local symbol. Determine if the final target is THUMB.
9014 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
9017 // Strip LSB if this points to a THUMB target.
9019 && Target_arm
<big_endian
>::reloc_uses_thumb_bit(r_type
)
9020 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
9022 Arm_address stripped_value
=
9023 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
9024 symval
.set_output_value(stripped_value
);
9028 // Get the symbol value.
9029 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
9031 // Owing to pipelining, the PC relative branches below actually skip
9032 // two instructions when the branch offset is 0.
9033 Arm_address destination
;
9036 case elfcpp::R_ARM_CALL
:
9037 case elfcpp::R_ARM_JUMP24
:
9038 case elfcpp::R_ARM_PLT32
:
9040 destination
= value
+ addend
+ 8;
9042 case elfcpp::R_ARM_THM_CALL
:
9043 case elfcpp::R_ARM_THM_XPC22
:
9044 case elfcpp::R_ARM_THM_JUMP24
:
9045 case elfcpp::R_ARM_THM_JUMP19
:
9047 destination
= value
+ addend
+ 4;
9053 Reloc_stub
* stub
= NULL
;
9054 Stub_type stub_type
=
9055 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
9057 if (stub_type
!= arm_stub_none
)
9059 // Try looking up an existing stub from a stub table.
9060 Stub_table
<big_endian
>* stub_table
=
9061 arm_relobj
->stub_table(relinfo
->data_shndx
);
9062 gold_assert(stub_table
!= NULL
);
9064 // Locate stub by destination.
9065 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
9067 // Create a stub if there is not one already
9068 stub
= stub_table
->find_reloc_stub(stub_key
);
9071 // create a new stub and add it to stub table.
9072 stub
= this->stub_factory().make_reloc_stub(stub_type
);
9073 stub_table
->add_reloc_stub(stub
, stub_key
);
9076 // Record the destination address.
9077 stub
->set_destination_address(destination
9078 | (target_is_thumb
? 1 : 0));
9081 // For Cortex-A8, we need to record a relocation at 4K page boundary.
9082 if (this->fix_cortex_a8_
9083 && (r_type
== elfcpp::R_ARM_THM_JUMP24
9084 || r_type
== elfcpp::R_ARM_THM_JUMP19
9085 || r_type
== elfcpp::R_ARM_THM_CALL
9086 || r_type
== elfcpp::R_ARM_THM_XPC22
)
9087 && (address
& 0xfffU
) == 0xffeU
)
9089 // Found a candidate. Note we haven't checked the destination is
9090 // within 4K here: if we do so (and don't create a record) we can't
9091 // tell that a branch should have been relocated when scanning later.
9092 this->cortex_a8_relocs_info_
[address
] =
9093 new Cortex_a8_reloc(stub
, r_type
,
9094 destination
| (target_is_thumb
? 1 : 0));
9098 // This function scans a relocation sections for stub generation.
9099 // The template parameter Relocate must be a class type which provides
9100 // a single function, relocate(), which implements the machine
9101 // specific part of a relocation.
9103 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
9104 // SHT_REL or SHT_RELA.
9106 // PRELOCS points to the relocation data. RELOC_COUNT is the number
9107 // of relocs. OUTPUT_SECTION is the output section.
9108 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
9109 // mapped to output offsets.
9111 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
9112 // VIEW_SIZE is the size. These refer to the input section, unless
9113 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
9114 // the output section.
9116 template<bool big_endian
>
9117 template<int sh_type
>
9119 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
9120 const Relocate_info
<32, big_endian
>* relinfo
,
9121 const unsigned char* prelocs
,
9123 Output_section
* output_section
,
9124 bool needs_special_offset_handling
,
9125 const unsigned char* view
,
9126 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9129 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
9130 const int reloc_size
=
9131 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
9133 Arm_relobj
<big_endian
>* arm_object
=
9134 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9135 unsigned int local_count
= arm_object
->local_symbol_count();
9137 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
9139 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
9141 Reltype
reloc(prelocs
);
9143 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9144 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9145 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9147 r_type
= this->get_real_reloc_type(r_type
);
9149 // Only a few relocation types need stubs.
9150 if ((r_type
!= elfcpp::R_ARM_CALL
)
9151 && (r_type
!= elfcpp::R_ARM_JUMP24
)
9152 && (r_type
!= elfcpp::R_ARM_PLT32
)
9153 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
9154 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
9155 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
9156 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
9157 && (r_type
!= elfcpp::R_ARM_V4BX
))
9160 section_offset_type offset
=
9161 convert_to_section_size_type(reloc
.get_r_offset());
9163 if (needs_special_offset_handling
)
9165 offset
= output_section
->output_offset(relinfo
->object
,
9166 relinfo
->data_shndx
,
9172 if (r_type
== elfcpp::R_ARM_V4BX
)
9174 // Get the BX instruction.
9175 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
9176 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ offset
);
9177 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
9178 elfcpp::Swap
<32, big_endian
>::readval(wv
);
9179 this->scan_reloc_for_stub(relinfo
, r_type
, NULL
, 0, NULL
,
9185 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
9186 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
9187 stub_addend_reader(r_type
, view
+ offset
, reloc
);
9189 const Sized_symbol
<32>* sym
;
9191 Symbol_value
<32> symval
;
9192 const Symbol_value
<32> *psymval
;
9193 if (r_sym
< local_count
)
9196 psymval
= arm_object
->local_symbol(r_sym
);
9198 // If the local symbol belongs to a section we are discarding,
9199 // and that section is a debug section, try to find the
9200 // corresponding kept section and map this symbol to its
9201 // counterpart in the kept section. The symbol must not
9202 // correspond to a section we are folding.
9204 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
9206 && shndx
!= elfcpp::SHN_UNDEF
9207 && !arm_object
->is_section_included(shndx
)
9208 && !(relinfo
->symtab
->is_section_folded(arm_object
, shndx
)))
9210 if (comdat_behavior
== CB_UNDETERMINED
)
9213 arm_object
->section_name(relinfo
->data_shndx
);
9214 comdat_behavior
= get_comdat_behavior(name
.c_str());
9216 if (comdat_behavior
== CB_PRETEND
)
9219 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
9220 arm_object
->map_to_kept_section(shndx
, &found
);
9222 symval
.set_output_value(value
+ psymval
->input_value());
9224 symval
.set_output_value(0);
9228 symval
.set_output_value(0);
9230 symval
.set_no_output_symtab_entry();
9236 const Symbol
* gsym
= arm_object
->global_symbol(r_sym
);
9237 gold_assert(gsym
!= NULL
);
9238 if (gsym
->is_forwarder())
9239 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
9241 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
9242 if (sym
->has_symtab_index())
9243 symval
.set_output_symtab_index(sym
->symtab_index());
9245 symval
.set_no_output_symtab_entry();
9247 // We need to compute the would-be final value of this global
9249 const Symbol_table
* symtab
= relinfo
->symtab
;
9250 const Sized_symbol
<32>* sized_symbol
=
9251 symtab
->get_sized_symbol
<32>(gsym
);
9252 Symbol_table::Compute_final_value_status status
;
9254 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
9256 // Skip this if the symbol has not output section.
9257 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
9260 symval
.set_output_value(value
);
9264 // If symbol is a section symbol, we don't know the actual type of
9265 // destination. Give up.
9266 if (psymval
->is_section_symbol())
9269 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
9270 addend
, view_address
+ offset
);
9274 // Scan an input section for stub generation.
9276 template<bool big_endian
>
9278 Target_arm
<big_endian
>::scan_section_for_stubs(
9279 const Relocate_info
<32, big_endian
>* relinfo
,
9280 unsigned int sh_type
,
9281 const unsigned char* prelocs
,
9283 Output_section
* output_section
,
9284 bool needs_special_offset_handling
,
9285 const unsigned char* view
,
9286 Arm_address view_address
,
9287 section_size_type view_size
)
9289 if (sh_type
== elfcpp::SHT_REL
)
9290 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
9295 needs_special_offset_handling
,
9299 else if (sh_type
== elfcpp::SHT_RELA
)
9300 // We do not support RELA type relocations yet. This is provided for
9302 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
9307 needs_special_offset_handling
,
9315 // Group input sections for stub generation.
9317 // We goup input sections in an output sections so that the total size,
9318 // including any padding space due to alignment is smaller than GROUP_SIZE
9319 // unless the only input section in group is bigger than GROUP_SIZE already.
9320 // Then an ARM stub table is created to follow the last input section
9321 // in group. For each group an ARM stub table is created an is placed
9322 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9323 // extend the group after the stub table.
9325 template<bool big_endian
>
9327 Target_arm
<big_endian
>::group_sections(
9329 section_size_type group_size
,
9330 bool stubs_always_after_branch
)
9332 // Group input sections and insert stub table
9333 Layout::Section_list section_list
;
9334 layout
->get_allocated_sections(§ion_list
);
9335 for (Layout::Section_list::const_iterator p
= section_list
.begin();
9336 p
!= section_list
.end();
9339 Arm_output_section
<big_endian
>* output_section
=
9340 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9341 output_section
->group_sections(group_size
, stubs_always_after_branch
,
9346 // Relaxation hook. This is where we do stub generation.
9348 template<bool big_endian
>
9350 Target_arm
<big_endian
>::do_relax(
9352 const Input_objects
* input_objects
,
9353 Symbol_table
* symtab
,
9356 // No need to generate stubs if this is a relocatable link.
9357 gold_assert(!parameters
->options().relocatable());
9359 // If this is the first pass, we need to group input sections into
9361 bool done_exidx_fixup
= false;
9364 // Determine the stub group size. The group size is the absolute
9365 // value of the parameter --stub-group-size. If --stub-group-size
9366 // is passed a negative value, we restict stubs to be always after
9367 // the stubbed branches.
9368 int32_t stub_group_size_param
=
9369 parameters
->options().stub_group_size();
9370 bool stubs_always_after_branch
= stub_group_size_param
< 0;
9371 section_size_type stub_group_size
= abs(stub_group_size_param
);
9373 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9374 // page as the first half of a 32-bit branch straddling two 4K pages.
9375 // This is a crude way of enforcing that.
9376 if (this->fix_cortex_a8_
)
9377 stubs_always_after_branch
= true;
9379 if (stub_group_size
== 1)
9382 // Thumb branch range is +-4MB has to be used as the default
9383 // maximum size (a given section can contain both ARM and Thumb
9384 // code, so the worst case has to be taken into account).
9386 // This value is 24K less than that, which allows for 2025
9387 // 12-byte stubs. If we exceed that, then we will fail to link.
9388 // The user will have to relink with an explicit group size
9390 stub_group_size
= 4170000;
9393 group_sections(layout
, stub_group_size
, stubs_always_after_branch
);
9395 // Also fix .ARM.exidx section coverage.
9396 Output_section
* os
= layout
->find_output_section(".ARM.exidx");
9397 if (os
!= NULL
&& os
->type() == elfcpp::SHT_ARM_EXIDX
)
9399 Arm_output_section
<big_endian
>* exidx_output_section
=
9400 Arm_output_section
<big_endian
>::as_arm_output_section(os
);
9401 this->fix_exidx_coverage(layout
, exidx_output_section
, symtab
);
9402 done_exidx_fixup
= true;
9406 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9407 // beginning of each relaxation pass, just blow away all the stubs.
9408 // Alternatively, we could selectively remove only the stubs and reloc
9409 // information for code sections that have moved since the last pass.
9410 // That would require more book-keeping.
9411 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
9412 if (this->fix_cortex_a8_
)
9414 // Clear all Cortex-A8 reloc information.
9415 for (typename
Cortex_a8_relocs_info::const_iterator p
=
9416 this->cortex_a8_relocs_info_
.begin();
9417 p
!= this->cortex_a8_relocs_info_
.end();
9420 this->cortex_a8_relocs_info_
.clear();
9422 // Remove all Cortex-A8 stubs.
9423 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9424 sp
!= this->stub_tables_
.end();
9426 (*sp
)->remove_all_cortex_a8_stubs();
9429 // Scan relocs for relocation stubs
9430 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
9431 op
!= input_objects
->relobj_end();
9434 Arm_relobj
<big_endian
>* arm_relobj
=
9435 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
9436 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
9439 // Check all stub tables to see if any of them have their data sizes
9440 // or addresses alignments changed. These are the only things that
9442 bool any_stub_table_changed
= false;
9443 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
9444 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9445 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
9448 if ((*sp
)->update_data_size_and_addralign())
9450 // Update data size of stub table owner.
9451 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
9452 uint64_t address
= owner
->address();
9453 off_t offset
= owner
->offset();
9454 owner
->reset_address_and_file_offset();
9455 owner
->set_address_and_file_offset(address
, offset
);
9457 sections_needing_adjustment
.insert(owner
->output_section());
9458 any_stub_table_changed
= true;
9462 // Output_section_data::output_section() returns a const pointer but we
9463 // need to update output sections, so we record all output sections needing
9464 // update above and scan the sections here to find out what sections need
9466 for(Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9467 p
!= layout
->section_list().end();
9470 if (sections_needing_adjustment
.find(*p
)
9471 != sections_needing_adjustment
.end())
9472 (*p
)->set_section_offsets_need_adjustment();
9475 // Stop relaxation if no EXIDX fix-up and no stub table change.
9476 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
9478 // Finalize the stubs in the last relaxation pass.
9479 if (!continue_relaxation
)
9480 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9481 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
9483 (*sp
)->finalize_stubs();
9485 return continue_relaxation
;
9490 template<bool big_endian
>
9492 Target_arm
<big_endian
>::relocate_stub(
9494 const Relocate_info
<32, big_endian
>* relinfo
,
9495 Output_section
* output_section
,
9496 unsigned char* view
,
9497 Arm_address address
,
9498 section_size_type view_size
)
9501 const Stub_template
* stub_template
= stub
->stub_template();
9502 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
9504 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
9505 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
9507 unsigned int r_type
= insn
->r_type();
9508 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
9509 section_size_type reloc_size
= insn
->size();
9510 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
9512 // This is the address of the stub destination.
9513 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
9514 Symbol_value
<32> symval
;
9515 symval
.set_output_value(target
);
9517 // Synthesize a fake reloc just in case. We don't have a symbol so
9519 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
9520 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
9521 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
9522 reloc_write
.put_r_offset(reloc_offset
);
9523 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
9524 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
9526 relocate
.relocate(relinfo
, this, output_section
,
9527 this->fake_relnum_for_stubs
, rel
, r_type
,
9528 NULL
, &symval
, view
+ reloc_offset
,
9529 address
+ reloc_offset
, reloc_size
);
9533 // Determine whether an object attribute tag takes an integer, a
9536 template<bool big_endian
>
9538 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
9540 if (tag
== Object_attribute::Tag_compatibility
)
9541 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9542 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
9543 else if (tag
== elfcpp::Tag_nodefaults
)
9544 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9545 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
9546 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
9547 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
9549 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
9551 return ((tag
& 1) != 0
9552 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9553 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
9556 // Reorder attributes.
9558 // The ABI defines that Tag_conformance should be emitted first, and that
9559 // Tag_nodefaults should be second (if either is defined). This sets those
9560 // two positions, and bumps up the position of all the remaining tags to
9563 template<bool big_endian
>
9565 Target_arm
<big_endian
>::do_attributes_order(int num
) const
9567 // Reorder the known object attributes in output. We want to move
9568 // Tag_conformance to position 4 and Tag_conformance to position 5
9569 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9571 return elfcpp::Tag_conformance
;
9573 return elfcpp::Tag_nodefaults
;
9574 if ((num
- 2) < elfcpp::Tag_nodefaults
)
9576 if ((num
- 1) < elfcpp::Tag_conformance
)
9581 // Scan a span of THUMB code for Cortex-A8 erratum.
9583 template<bool big_endian
>
9585 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
9586 Arm_relobj
<big_endian
>* arm_relobj
,
9588 section_size_type span_start
,
9589 section_size_type span_end
,
9590 const unsigned char* view
,
9591 Arm_address address
)
9593 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9595 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9596 // The branch target is in the same 4KB region as the
9597 // first half of the branch.
9598 // The instruction before the branch is a 32-bit
9599 // length non-branch instruction.
9600 section_size_type i
= span_start
;
9601 bool last_was_32bit
= false;
9602 bool last_was_branch
= false;
9603 while (i
< span_end
)
9605 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
9606 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
9607 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
9608 bool is_blx
= false, is_b
= false;
9609 bool is_bl
= false, is_bcc
= false;
9611 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
9614 // Load the rest of the insn (in manual-friendly order).
9615 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
9617 // Encoding T4: B<c>.W.
9618 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
9619 // Encoding T1: BL<c>.W.
9620 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
9621 // Encoding T2: BLX<c>.W.
9622 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
9623 // Encoding T3: B<c>.W (not permitted in IT block).
9624 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
9625 && (insn
& 0x07f00000U
) != 0x03800000U
);
9628 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
9630 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9631 // page boundary and it follows 32-bit non-branch instruction,
9632 // we need to work around.
9634 && ((address
+ i
) & 0xfffU
) == 0xffeU
9636 && !last_was_branch
)
9638 // Check to see if there is a relocation stub for this branch.
9639 bool force_target_arm
= false;
9640 bool force_target_thumb
= false;
9641 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
9642 Cortex_a8_relocs_info::const_iterator p
=
9643 this->cortex_a8_relocs_info_
.find(address
+ i
);
9645 if (p
!= this->cortex_a8_relocs_info_
.end())
9647 cortex_a8_reloc
= p
->second
;
9648 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
9650 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
9651 && !target_is_thumb
)
9652 force_target_arm
= true;
9653 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
9655 force_target_thumb
= true;
9659 Stub_type stub_type
= arm_stub_none
;
9661 // Check if we have an offending branch instruction.
9662 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
9663 uint16_t lower_insn
= insn
& 0xffffU
;
9664 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
9666 if (cortex_a8_reloc
!= NULL
9667 && cortex_a8_reloc
->reloc_stub() != NULL
)
9668 // We've already made a stub for this instruction, e.g.
9669 // it's a long branch or a Thumb->ARM stub. Assume that
9670 // stub will suffice to work around the A8 erratum (see
9671 // setting of always_after_branch above).
9675 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
9677 stub_type
= arm_stub_a8_veneer_b_cond
;
9679 else if (is_b
|| is_bl
|| is_blx
)
9681 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
9687 ? arm_stub_a8_veneer_blx
9689 ? arm_stub_a8_veneer_bl
9690 : arm_stub_a8_veneer_b
));
9693 if (stub_type
!= arm_stub_none
)
9695 Arm_address pc_for_insn
= address
+ i
+ 4;
9697 // The original instruction is a BL, but the target is
9698 // an ARM instruction. If we were not making a stub,
9699 // the BL would have been converted to a BLX. Use the
9700 // BLX stub instead in that case.
9701 if (this->may_use_blx() && force_target_arm
9702 && stub_type
== arm_stub_a8_veneer_bl
)
9704 stub_type
= arm_stub_a8_veneer_blx
;
9708 // Conversely, if the original instruction was
9709 // BLX but the target is Thumb mode, use the BL stub.
9710 else if (force_target_thumb
9711 && stub_type
== arm_stub_a8_veneer_blx
)
9713 stub_type
= arm_stub_a8_veneer_bl
;
9721 // If we found a relocation, use the proper destination,
9722 // not the offset in the (unrelocated) instruction.
9723 // Note this is always done if we switched the stub type above.
9724 if (cortex_a8_reloc
!= NULL
)
9725 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
9727 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
9729 // Add a new stub if destination address in in the same page.
9730 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
9732 Cortex_a8_stub
* stub
=
9733 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
9737 Stub_table
<big_endian
>* stub_table
=
9738 arm_relobj
->stub_table(shndx
);
9739 gold_assert(stub_table
!= NULL
);
9740 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
9745 i
+= insn_32bit
? 4 : 2;
9746 last_was_32bit
= insn_32bit
;
9747 last_was_branch
= is_32bit_branch
;
9751 // Apply the Cortex-A8 workaround.
9753 template<bool big_endian
>
9755 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
9756 const Cortex_a8_stub
* stub
,
9757 Arm_address stub_address
,
9758 unsigned char* insn_view
,
9759 Arm_address insn_address
)
9761 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
9762 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
9763 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
9764 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
9765 off_t branch_offset
= stub_address
- (insn_address
+ 4);
9767 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
9768 switch (stub
->stub_template()->type())
9770 case arm_stub_a8_veneer_b_cond
:
9771 gold_assert(!utils::has_overflow
<21>(branch_offset
));
9772 upper_insn
= RelocFuncs::thumb32_cond_branch_upper(upper_insn
,
9774 lower_insn
= RelocFuncs::thumb32_cond_branch_lower(lower_insn
,
9778 case arm_stub_a8_veneer_b
:
9779 case arm_stub_a8_veneer_bl
:
9780 case arm_stub_a8_veneer_blx
:
9781 if ((lower_insn
& 0x5000U
) == 0x4000U
)
9782 // For a BLX instruction, make sure that the relocation is
9783 // rounded up to a word boundary. This follows the semantics of
9784 // the instruction which specifies that bit 1 of the target
9785 // address will come from bit 1 of the base address.
9786 branch_offset
= (branch_offset
+ 2) & ~3;
9788 // Put BRANCH_OFFSET back into the insn.
9789 gold_assert(!utils::has_overflow
<25>(branch_offset
));
9790 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
9791 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
9798 // Put the relocated value back in the object file:
9799 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
9800 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
9803 template<bool big_endian
>
9804 class Target_selector_arm
: public Target_selector
9807 Target_selector_arm()
9808 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
9809 (big_endian
? "elf32-bigarm" : "elf32-littlearm"))
9813 do_instantiate_target()
9814 { return new Target_arm
<big_endian
>(); }
9817 // Fix .ARM.exidx section coverage.
9819 template<bool big_endian
>
9821 Target_arm
<big_endian
>::fix_exidx_coverage(
9823 Arm_output_section
<big_endian
>* exidx_section
,
9824 Symbol_table
* symtab
)
9826 // We need to look at all the input sections in output in ascending
9827 // order of of output address. We do that by building a sorted list
9828 // of output sections by addresses. Then we looks at the output sections
9829 // in order. The input sections in an output section are already sorted
9830 // by addresses within the output section.
9832 typedef std::set
<Output_section
*, output_section_address_less_than
>
9833 Sorted_output_section_list
;
9834 Sorted_output_section_list sorted_output_sections
;
9835 Layout::Section_list section_list
;
9836 layout
->get_allocated_sections(§ion_list
);
9837 for (Layout::Section_list::const_iterator p
= section_list
.begin();
9838 p
!= section_list
.end();
9841 // We only care about output sections that contain executable code.
9842 if (((*p
)->flags() & elfcpp::SHF_EXECINSTR
) != 0)
9843 sorted_output_sections
.insert(*p
);
9846 // Go over the output sections in ascending order of output addresses.
9847 typedef typename Arm_output_section
<big_endian
>::Text_section_list
9849 Text_section_list sorted_text_sections
;
9850 for(typename
Sorted_output_section_list::iterator p
=
9851 sorted_output_sections
.begin();
9852 p
!= sorted_output_sections
.end();
9855 Arm_output_section
<big_endian
>* arm_output_section
=
9856 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9857 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
9860 exidx_section
->fix_exidx_coverage(sorted_text_sections
, symtab
);
9863 Target_selector_arm
<false> target_selector_arm
;
9864 Target_selector_arm
<true> target_selector_armbe
;
9866 } // End anonymous namespace.