opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   3    2008, 2009 Free Software Foundation, Inc.
   4    Written by Ian Lance Taylor, Cygnus Support
   5
   6    This file is part of the GNU opcodes library.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    It is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this file; see the file COPYING.  If not, write to the
  20    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  21    MA 02110-1301, USA.  */
  22
  23 #include <stdio.h>
  24 #include "sysdep.h"
  25 #include "dis-asm.h"
  26 #include "opintl.h"
  27 #include "opcode/ppc.h"
  28
  29 /* This file provides several disassembler functions, all of which use
  30    the disassembler interface defined in dis-asm.h.  Several functions
  31    are provided because this file handles disassembly for the PowerPC
  32    in both big and little endian mode and also for the POWER (RS/6000)
  33    chip.  */
  34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  35                                ppc_cpu_t);
  36
  37 struct dis_private
  38 {
  39   /* Stash the result of parsing disassembler_options here.  */
  40   ppc_cpu_t dialect;
  41 };
  42
  43 #define POWERPC_DIALECT(INFO) \
  44   (((struct dis_private *) ((INFO)->private_data))->dialect)
  45
  46 struct ppc_mopt {
  47   const char *opt;
  48   ppc_cpu_t cpu;
  49   ppc_cpu_t sticky;
  50 };
  51
  52 struct ppc_mopt ppc_opts[] = {
  53   { "403",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
  54                 | PPC_OPCODE_32),
  55     0 },
  56   { "405",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
  57                 | PPC_OPCODE_405 | PPC_OPCODE_32),
  58     0 },
  59   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
  60                 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  61     0 },
  62   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
  63                 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  64     0 },
  65   { "476",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
  66                 | PPC_OPCODE_440 | PPC_OPCODE_476 | PPC_OPCODE_POWER4
  67                 | PPC_OPCODE_POWER5),
  68     0 },
  69   { "601",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_601
  70                 | PPC_OPCODE_32),
  71     0 },
  72   { "603",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
  73     0 },
  74   { "604",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
  75     0 },
  76   { "620",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
  77     0 },
  78   { "7400",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  79                 | PPC_OPCODE_32),
  80     0 },
  81   { "7410",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  82                 | PPC_OPCODE_32),
  83     0 },
  84   { "7450",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  85                 | PPC_OPCODE_32),
  86     0 },
  87   { "7455",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  88                 | PPC_OPCODE_32),
  89     0 },
  90   { "750cl",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
  91     , 0 },
  92   { "altivec", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
  93     PPC_OPCODE_ALTIVEC },
  94   { "any",     0,
  95     PPC_OPCODE_ANY },
  96   { "booke",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
  97     0 },
  98   { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
  99     0 },
 100   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 101                 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
 102     0 },
 103   { "com",     (PPC_OPCODE_COMMON | PPC_OPCODE_32),
 104     0 },
 105   { "e300",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
 106                 | PPC_OPCODE_E300),
 107     0 },
 108   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 109                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 110                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 111                 | PPC_OPCODE_E500MC),
 112     0 },
 113   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 114                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 115                 | PPC_OPCODE_E500MC),
 116     0 },
 117   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 118                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 119                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 120                 | PPC_OPCODE_E500MC),
 121     0 },
 122   { "efs",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 123     0 },
 124   { "power4",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 125                 | PPC_OPCODE_POWER4),
 126     0 },
 127   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 128                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
 129     0 },
 130   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 131                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 132                 | PPC_OPCODE_ALTIVEC),
 133     0 },
 134   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
 135                 | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5
 136                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC
 137                 | PPC_OPCODE_VSX),
 138     0 },
 139   { "ppc",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 140     0 },
 141   { "ppc32",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 142     0 },
 143   { "ppc64",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
 144     0 },
 145   { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64_BRIDGE
 146                     | PPC_OPCODE_64),
 147     0 },
 148   { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
 149                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK
 150                 | PPC_OPCODE_64 | PPC_OPCODE_A2),
 151     0 },
 152   { "ppcps",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
 153     0 },
 154   { "pwr",     (PPC_OPCODE_POWER | PPC_OPCODE_32),
 155     0 },
 156   { "pwr2",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 157     0 },
 158   { "pwrx",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 159     0 },
 160   { "spe",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 161     PPC_OPCODE_SPE },
 162   { "vsx",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
 163     PPC_OPCODE_VSX },
 164 };
 165
 166 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 167
 168 ppc_cpu_t
 169 ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
 170 {
 171   /* Sticky bits.  */
 172   ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 173                                       | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
 174   unsigned int i;
 175
 176   for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 177     if (strcmp (ppc_opts[i].opt, arg) == 0)
 178       {
 179         if (ppc_opts[i].sticky)
 180           {
 181             retain_flags |= ppc_opts[i].sticky;
 182             if ((ppc_cpu & ~(PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 183                              | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
 184               break;
 185           }
 186         ppc_cpu = ppc_opts[i].cpu;
 187         break;
 188       }
 189   if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
 190     return 0;
 191
 192   ppc_cpu |= retain_flags;
 193   return ppc_cpu;
 194 }
 195
 196 /* Determine which set of machines to disassemble for.  */
 197
 198 static int
 199 powerpc_init_dialect (struct disassemble_info *info)
 200 {
 201   ppc_cpu_t dialect = 0;
 202   char *arg;
 203   struct dis_private *priv = calloc (sizeof (*priv), 1);
 204
 205   if (priv == NULL)
 206     return FALSE;
 207
 208   arg = info->disassembler_options;
 209   while (arg != NULL)
 210     {
 211       ppc_cpu_t new_cpu = 0;
 212       char *end = strchr (arg, ',');
 213
 214       if (end != NULL)
 215         *end = 0;
 216
 217       if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
 218         dialect = new_cpu;
 219       else if (strcmp (arg, "32") == 0)
 220         {
 221           dialect &= ~PPC_OPCODE_64;
 222           dialect |= PPC_OPCODE_32;
 223         }
 224       else if (strcmp (arg, "64") == 0)
 225         {
 226           dialect |= PPC_OPCODE_64;
 227           dialect &= ~PPC_OPCODE_32;
 228         }
 229       else
 230         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
 231
 232       if (end != NULL)
 233         *end++ = ',';
 234       arg = end;
 235     }
 236
 237   if ((dialect & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) == 0)
 238     {
 239       if (info->mach == bfd_mach_ppc64)
 240         dialect |= PPC_OPCODE_64;
 241       else
 242         dialect |= PPC_OPCODE_32;
 243       /* Choose a reasonable default.  */
 244       dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_CLASSIC
 245                   | PPC_OPCODE_601 | PPC_OPCODE_ALTIVEC);
 246     }
 247
 248   info->private_data = priv;
 249   POWERPC_DIALECT(info) = dialect;
 250
 251   return TRUE;
 252 }
 253
 254 /* Print a big endian PowerPC instruction.  */
 255
 256 int
 257 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 258 {
 259   if (info->private_data == NULL && !powerpc_init_dialect (info))
 260     return -1;
 261   return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
 262 }
 263
 264 /* Print a little endian PowerPC instruction.  */
 265
 266 int
 267 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 268 {
 269   if (info->private_data == NULL && !powerpc_init_dialect (info))
 270     return -1;
 271   return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
 272 }
 273
 274 /* Print a POWER (RS/6000) instruction.  */
 275
 276 int
 277 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 278 {
 279   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 280 }
 281
 282 /* Extract the operand value from the PowerPC or POWER instruction.  */
 283
 284 static long
 285 operand_value_powerpc (const struct powerpc_operand *operand,
 286                        unsigned long insn, ppc_cpu_t dialect)
 287 {
 288   long value;
 289   int invalid;
 290   /* Extract the value from the instruction.  */
 291   if (operand->extract)
 292     value = (*operand->extract) (insn, dialect, &invalid);
 293   else
 294     {
 295       value = (insn >> operand->shift) & operand->bitm;
 296       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 297         {
 298           /* BITM is always some number of zeros followed by some
 299              number of ones, followed by some numer of zeros.  */
 300           unsigned long top = operand->bitm;
 301           /* top & -top gives the rightmost 1 bit, so this
 302              fills in any trailing zeros.  */
 303           top |= (top & -top) - 1;
 304           top &= ~(top >> 1);
 305           value = (value ^ top) - top;
 306         }
 307     }
 308
 309   return value;
 310 }
 311
 312 /* Determine whether the optional operand(s) should be printed.  */
 313
 314 static int
 315 skip_optional_operands (const unsigned char *opindex,
 316                         unsigned long insn, ppc_cpu_t dialect)
 317 {
 318   const struct powerpc_operand *operand;
 319
 320   for (; *opindex != 0; opindex++)
 321     {
 322       operand = &powerpc_operands[*opindex];
 323       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 324           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 325               && operand_value_powerpc (operand, insn, dialect) != 0))
 326         return 0;
 327     }
 328
 329   return 1;
 330 }
 331
 332 /* Print a PowerPC or POWER instruction.  */
 333
 334 static int
 335 print_insn_powerpc (bfd_vma memaddr,
 336                     struct disassemble_info *info,
 337                     int bigendian,
 338                     ppc_cpu_t dialect)
 339 {
 340   bfd_byte buffer[4];
 341   int status;
 342   unsigned long insn;
 343   const struct powerpc_opcode *opcode;
 344   const struct powerpc_opcode *opcode_end;
 345   unsigned long op;
 346   ppc_cpu_t dialect_orig = dialect;
 347
 348   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 349   if (status != 0)
 350     {
 351       (*info->memory_error_func) (status, memaddr, info);
 352       return -1;
 353     }
 354
 355   if (bigendian)
 356     insn = bfd_getb32 (buffer);
 357   else
 358     insn = bfd_getl32 (buffer);
 359
 360   /* Get the major opcode of the instruction.  */
 361   op = PPC_OP (insn);
 362
 363   /* Find the first match in the opcode table.  We could speed this up
 364      a bit by doing a binary search on the major opcode.  */
 365   opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 366  again:
 367   for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
 368     {
 369       unsigned long table_op;
 370       const unsigned char *opindex;
 371       const struct powerpc_operand *operand;
 372       int invalid;
 373       int need_comma;
 374       int need_paren;
 375       int skip_optional;
 376
 377       table_op = PPC_OP (opcode->opcode);
 378       if (op < table_op)
 379         break;
 380       if (op > table_op)
 381         continue;
 382
 383       if ((insn & opcode->mask) != opcode->opcode
 384           || (opcode->flags & dialect) == 0
 385           || (opcode->deprecated & dialect_orig) != 0)
 386         continue;
 387
 388       /* Make two passes over the operands.  First see if any of them
 389          have extraction functions, and, if they do, make sure the
 390          instruction is valid.  */
 391       invalid = 0;
 392       for (opindex = opcode->operands; *opindex != 0; opindex++)
 393         {
 394           operand = powerpc_operands + *opindex;
 395           if (operand->extract)
 396             (*operand->extract) (insn, dialect, &invalid);
 397         }
 398       if (invalid)
 399         continue;
 400
 401       /* The instruction is valid.  */
 402       if (opcode->operands[0] != 0)
 403         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 404       else
 405         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 406
 407       /* Now extract and print the operands.  */
 408       need_comma = 0;
 409       need_paren = 0;
 410       skip_optional = -1;
 411       for (opindex = opcode->operands; *opindex != 0; opindex++)
 412         {
 413           long value;
 414
 415           operand = powerpc_operands + *opindex;
 416
 417           /* Operands that are marked FAKE are simply ignored.  We
 418              already made sure that the extract function considered
 419              the instruction to be valid.  */
 420           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 421             continue;
 422
 423           /* If all of the optional operands have the value zero,
 424              then don't print any of them.  */
 425           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 426             {
 427               if (skip_optional < 0)
 428                 skip_optional = skip_optional_operands (opindex, insn,
 429                                                         dialect);
 430               if (skip_optional)
 431                 continue;
 432             }
 433
 434           value = operand_value_powerpc (operand, insn, dialect);
 435
 436           if (need_comma)
 437             {
 438               (*info->fprintf_func) (info->stream, ",");
 439               need_comma = 0;
 440             }
 441
 442           /* Print the operand as directed by the flags.  */
 443           if ((operand->flags & PPC_OPERAND_GPR) != 0
 444               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 445             (*info->fprintf_func) (info->stream, "r%ld", value);
 446           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 447             (*info->fprintf_func) (info->stream, "f%ld", value);
 448           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 449             (*info->fprintf_func) (info->stream, "v%ld", value);
 450           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 451             (*info->fprintf_func) (info->stream, "vs%ld", value);
 452           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 453             (*info->print_address_func) (memaddr + value, info);
 454           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 455             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 456           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 457             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 458           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 459             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 460           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 461             (*info->fprintf_func) (info->stream, "%ld", value);
 462           else if ((operand->flags & PPC_OPERAND_CR) != 0
 463                    && (dialect & PPC_OPCODE_PPC) != 0)
 464             {
 465               if (operand->bitm == 7)
 466                 (*info->fprintf_func) (info->stream, "cr%ld", value);
 467               else
 468                 {
 469                   static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 470                   int cr;
 471                   int cc;
 472
 473                   cr = value >> 2;
 474                   if (cr != 0)
 475                     (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 476                   cc = value & 3;
 477                   (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 478                 }
 479             }
 480           else
 481             (*info->fprintf_func) (info->stream, "%ld", value);
 482
 483           if (need_paren)
 484             {
 485               (*info->fprintf_func) (info->stream, ")");
 486               need_paren = 0;
 487             }
 488
 489           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 490             need_comma = 1;
 491           else
 492             {
 493               (*info->fprintf_func) (info->stream, "(");
 494               need_paren = 1;
 495             }
 496         }
 497
 498       /* We have found and printed an instruction; return.  */
 499       return 4;
 500     }
 501
 502   if ((dialect & PPC_OPCODE_ANY) != 0)
 503     {
 504       dialect = ~PPC_OPCODE_ANY;
 505       goto again;
 506     }
 507
 508   /* We could not find a match.  */
 509   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 510
 511   return 4;
 512 }
 513
 514 void
 515 print_ppc_disassembler_options (FILE *stream)
 516 {
 517   unsigned int i, col;
 518
 519   fprintf (stream, _("\n\
 520 The following PPC specific disassembler options are supported for use with\n\
 521 the -M switch:\n"));
 522
 523   for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 524     {
 525       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 526       if (col > 66)
 527         {
 528           fprintf (stream, "\n");
 529           col = 0;
 530         }
 531     }
 532   fprintf (stream, " 32, 64\n");
 533 }