test/eeprom.c

   1 #include <avr/io.h>
   2 #include <avr/pgmspace.h>
   3 #include <avr/interrupt.h>
   4 #include "eeprom.h"
   5
   6 #define SPIEE_CS_PIN PA1
   7 #define SPIEE_CS_PORT PORTA
   8
   9 #define NOP asm("nop")
  10
  11 #ifndef sbi
  12 #define sbi(p,b) (p) |= (1<<(b))
  13 #endif
  14
  15 #ifndef cbi
  16 #define cbi(p,b) (p) &= ~(1<<(b))
  17 #endif
  18
  19 #define SPI_EEPROM_READ 0x3
  20 #define SPI_EEPROM_WRITE 0x2
  21 #define SPI_EEPROM_WREN 0x6
  22 #define SPI_EEPROM_RDSR 0x5
  23 #define SPI_EEPROM_WRSR 0x1
  24
  25 //**************************************************
  26 //         Internal EEPROM
  27 //**************************************************
  28 uint8_t internal_eeprom_read8(uint16_t addr) {
  29         loop_until_bit_is_clear(EECR, EEWE); // wait for last write to finish
  30         EEAR = addr;
  31         sbi(EECR, EERE);        // start EEPROM read
  32         return EEDR;            // takes only 1 cycle
  33 }
  34
  35 void internal_eeprom_write8(uint8_t data, uint16_t addr) {
  36         loop_until_bit_is_clear(EECR, EEWE); // wait for last write to finish
  37         EEAR = addr;
  38         EEDR = data;
  39         cli();                // turn off interrupts
  40         sbi(EECR, EEMWE);     // these instructions must happen within 4 cycles
  41         sbi(EECR, EEWE);
  42         sei();                // turn on interrupts again
  43 }
  44
  45 #ifdef HAVE_SPI
  46 //**************************************************
  47 //         Serial Programming Interface EEPROM
  48 //**************************************************
  49 void spieeprom_write(uint8_t data, uint16_t addr) {
  50   uint8_t status;
  51
  52   cli();
  53
  54   do {
  55     cbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS low
  56     NOP; NOP; NOP; NOP;
  57
  58     SPDR = SPI_EEPROM_RDSR;
  59     while (!(SPSR & (1<<SPIF)));
  60     NOP; NOP; NOP; NOP;
  61     SPDR = 0;
  62     while (!(SPSR & (1<<SPIF)));
  63     status = SPDR;
  64     sbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS high
  65     NOP; NOP;NOP; NOP;
  66   } while ((status & 0x1) != 0);
  67   /* set the spi write enable latch */
  68
  69   cbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS low
  70   NOP; NOP;
  71
  72
  73   SPDR = SPI_EEPROM_WREN;           // send command
  74   while (!(SPSR & (1<<SPIF)));
  75   NOP; NOP;
  76   sbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS low
  77
  78   NOP; NOP; NOP; NOP;  // wait for write enable latch
  79
  80   cbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS low
  81   NOP; NOP;
  82
  83   SPDR = SPI_EEPROM_WRITE;           // send command
  84   while (!(SPSR & (1<<SPIF)));
  85
  86   SPDR = addr >> 8;                 // send high addr
  87   while (!(SPSR & (1<<SPIF)));
  88
  89   SPDR = addr & 0xFF;               // send low addr
  90   while (!(SPSR & (1<<SPIF)));
  91
  92   SPDR = data;               // send data
  93   while (!(SPSR & (1<<SPIF)));
  94
  95   NOP;
  96   NOP;
  97
  98   sbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS low
  99   sei();
 100 }
 101
 102 uint8_t spieeprom_read(uint16_t addr) {
 103   uint8_t data;
 104
 105   cli();
 106
 107   cbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS low
 108   NOP; NOP;
 109
 110   SPDR = SPI_EEPROM_READ;           // send command
 111   while (!(SPSR & (1<<SPIF)));
 112
 113   SPDR = addr >> 8;                 // send high addr
 114   while (!(SPSR & (1<<SPIF)));
 115
 116   SPDR = addr & 0xFF;               // send low addr
 117   while (!(SPSR & (1<<SPIF)));
 118   NOP;
 119   NOP;
 120
 121   SPDR = 0;
 122   while (!(SPSR & (1<<SPIF)));
 123   data = SPDR;
 124
 125   sbi(SPIEE_CS_PORT, SPIEE_CS_PIN); // pull CS high
 126   sei();
 127   return data;
 128 }
 129 #endif
 130