simple-FreeRTOS-demo/LPC214x.h

   1 /******************************************************************************
   2  *   LPC214X.h:  Header file for Philips LPC214x Family Microprocessors
   3  *   The header file is the super set of all hardware definition of the
   4  *   peripherals for the LPC214x family microprocessor.
   5  *
   6  *   Copyright(C) 2006, Philips Semiconductor
   7  *   All rights reserved.
   8
   9  *   History
  10  *   2005.10.01  ver 1.00    Prelimnary version, first Release
  11  *   2005.10.13  ver 1.01    Removed CSPR and DC_REVISION register.
  12  *                           CSPR can not be accessed at the user level,
  13  *                           DC_REVISION is no long available.
  14  *                           All registers use "volatile unsigned long".
  15 ******************************************************************************/
  16
  17 #ifndef __LPC214x_H
  18 #define __LPC214x_H
  19
  20 /* Vectored Interrupt Controller (VIC) */
  21 #define VIC_BASE_ADDR   0xFFFFF000
  22
  23 #define VICIRQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
  24 #define VICFIQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004))
  25 #define VICRawIntr     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008))
  26 #define VICIntSelect   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C))
  27 #define VICIntEnable   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010))
  28 #define VICIntEnClr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014))
  29 #define VICSoftInt     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018))
  30 #define VICSoftIntClr  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C))
  31 #define VICProtection  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020))
  32 #define VICVectAddr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x030))
  33 #define VICDefVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x034))
  34 #define VICVectAddr0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100))
  35 #define VICVectAddr1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104))
  36 #define VICVectAddr2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108))
  37 #define VICVectAddr3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C))
  38 #define VICVectAddr4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110))
  39 #define VICVectAddr5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114))
  40 #define VICVectAddr6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118))
  41 #define VICVectAddr7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C))
  42 #define VICVectAddr8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120))
  43 #define VICVectAddr9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124))
  44 #define VICVectAddr10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128))
  45 #define VICVectAddr11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C))
  46 #define VICVectAddr12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130))
  47 #define VICVectAddr13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134))
  48 #define VICVectAddr14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138))
  49 #define VICVectAddr15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C))
  50 #define VICVectCntl0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200))
  51 #define VICVectCntl1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204))
  52 #define VICVectCntl2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208))
  53 #define VICVectCntl3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C))
  54 #define VICVectCntl4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210))
  55 #define VICVectCntl5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214))
  56 #define VICVectCntl6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218))
  57 #define VICVectCntl7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C))
  58 #define VICVectCntl8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220))
  59 #define VICVectCntl9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224))
  60 #define VICVectCntl10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228))
  61 #define VICVectCntl11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C))
  62 #define VICVectCntl12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230))
  63 #define VICVectCntl13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234))
  64 #define VICVectCntl14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238))
  65 #define VICVectCntl15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C))
  66
  67 /* Pin Connect Block */
  68 #define PINSEL_BASE_ADDR        0xE002C000
  69 #define PINSEL0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00))
  70 #define PINSEL1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04))
  71 #define PINSEL2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14))
  72
  73 /* General Purpose Input/Output (GPIO) */
  74 #define GPIO_BASE_ADDR          0xE0028000
  75 #define IOPIN0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00))
  76 #define IOSET0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04))
  77 #define IODIR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08))
  78 #define IOCLR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C))
  79 #define IOPIN1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10))
  80 #define IOSET1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14))
  81 #define IODIR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18))
  82 #define IOCLR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C))
  83
  84 /* Fast I/O setup */
  85 #define FIO_BASE_ADDR           0x3FFFC000
  86 #define FIO0DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00))
  87 #define FIO0MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10))
  88 #define FIO0PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14))
  89 #define FIO0SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18))
  90 #define FIO0CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C))
  91 #define FIO1DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20))
  92 #define FIO1MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30))
  93 #define FIO1PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34))
  94 #define FIO1SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38))
  95 #define FIO1CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C))
  96
  97 /* System Control Block(SCB) modules include Memory Accelerator Module,
  98 Phase Locked Loop, VPB divider, Power Control, External Interrupt,
  99 Reset, and Code Security/Debugging */
 100
 101 #define SCB_BASE_ADDR   0xE01FC000
 102
 103 /* Memory Accelerator Module (MAM) */
 104 #define MAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
 105 #define MAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
 106 #define MEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))
 107
 108 /* Phase Locked Loop (PLL) */
 109 #define PLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
 110 #define PLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
 111 #define PLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
 112 #define PLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))
 113
 114 /* PLL48 Registers */
 115 #define PLL48CON       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A0))
 116 #define PLL48CFG       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A4))
 117 #define PLL48STAT      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0A8))
 118 #define PLL48FEED      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0AC))
 119
 120 /* Power Control */
 121 #define PCON           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
 122 #define PCONP          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))
 123
 124 /* VPB Divider */
 125 #define VPBDIV         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100))
 126
 127 /* External Interrupts */
 128 #define EXTINT         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
 129 #define INTWAKE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
 130 #define EXTMODE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
 131 #define EXTPOLAR       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))
 132
 133 /* Reset */
 134 #define RSIR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))
 135
 136 /* System Controls and Status */
 137 #define SCS            (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0))
 138
 139 /* Timer 0 */
 140 #define TMR0_BASE_ADDR          0xE0004000
 141 #define T0IR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00))
 142 #define T0TCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04))
 143 #define T0TC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08))
 144 #define T0PR           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C))
 145 #define T0PC           (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10))
 146 #define T0MCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14))
 147 #define T0MR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18))
 148 #define T0MR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C))
 149 #define T0MR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20))
 150 #define T0MR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24))
 151 #define T0CCR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28))
 152 #define T0CR0          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C))
 153 #define T0CR1          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30))
 154 #define T0CR2          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34))
 155 #define T0CR3          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38))
 156 #define T0EMR          (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C))
 157 #define T0CTCR         (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70))
 158
 159 /* Timer 1 */
 160 #define TMR1_BASE_ADDR          0xE0008000
 161 #define T1IR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00))
 162 #define T1TCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04))
 163 #define T1TC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08))
 164 #define T1PR           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C))
 165 #define T1PC           (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10))
 166 #define T1MCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14))
 167 #define T1MR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18))
 168 #define T1MR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C))
 169 #define T1MR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20))
 170 #define T1MR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24))
 171 #define T1CCR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28))
 172 #define T1CR0          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C))
 173 #define T1CR1          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30))
 174 #define T1CR2          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34))
 175 #define T1CR3          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38))
 176 #define T1EMR          (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C))
 177 #define T1CTCR         (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70))
 178
 179 /* Pulse Width Modulator (PWM) */
 180 #define PWM_BASE_ADDR           0xE0014000
 181 #define PWMIR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x00))
 182 #define PWMTCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x04))
 183 #define PWMTC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x08))
 184 #define PWMPR          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x0C))
 185 #define PWMPC          (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x10))
 186 #define PWMMCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x14))
 187 #define PWMMR0         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x18))
 188 #define PWMMR1         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x1C))
 189 #define PWMMR2         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x20))
 190 #define PWMMR3         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x24))
 191 #define PWMMR4         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x40))
 192 #define PWMMR5         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x44))
 193 #define PWMMR6         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x48))
 194 #define PWMEMR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x3C))
 195 #define PWMPCR         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x4C))
 196 #define PWMLER         (*(volatile unsigned long *)(PWM_BASE_ADDR + 0x50))
 197
 198 /* Universal Asynchronous Receiver Transmitter 0 (UART0) */
 199 #define UART0_BASE_ADDR         0xE000C000
 200 #define U0RBR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
 201 #define U0THR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
 202 #define U0DLL          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
 203 #define U0DLM          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
 204 #define U0IER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
 205 #define U0IIR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
 206 #define U0FCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
 207 #define U0LCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
 208 #define U0MCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x10))
 209 #define U0LSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
 210 #define U0MSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x18))
 211 #define U0SCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
 212 #define U0ACR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
 213 #define U0FDR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
 214 #define U0TER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))
 215
 216 /* Universal Asynchronous Receiver Transmitter 1 (UART1) */
 217 #define UART1_BASE_ADDR         0xE0010000
 218 #define U1RBR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
 219 #define U1THR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
 220 #define U1DLL          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
 221 #define U1DLM          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
 222 #define U1IER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
 223 #define U1IIR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
 224 #define U1FCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
 225 #define U1LCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
 226 #define U1MCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
 227 #define U1LSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
 228 #define U1MSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
 229 #define U1SCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
 230 #define U1ACR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
 231 #define U1FDR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
 232 #define U1TER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))
 233
 234 /* I2C Interface 0 */
 235 #define I2C0_BASE_ADDR          0xE001C000
 236 #define I20CONSET      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
 237 #define I20STAT        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
 238 #define I20DAT         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
 239 #define I20ADR         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
 240 #define I20SCLH        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
 241 #define I20SCLL        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
 242 #define I20CONCLR      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))
 243
 244 /* I2C Interface 1 */
 245 #define I2C1_BASE_ADDR          0xE005C000
 246 #define I21CONSET      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
 247 #define I21STAT        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
 248 #define I21DAT         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
 249 #define I21ADR         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C))
 250 #define I21SCLH        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10))
 251 #define I21SCLL        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14))
 252 #define I21CONCLR      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18))
 253
 254 /* SPI0 (Serial Peripheral Interface 0) */
 255 #define SPI0_BASE_ADDR          0xE0020000
 256 #define S0SPCR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00))
 257 #define S0SPSR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04))
 258 #define S0SPDR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08))
 259 #define S0SPCCR        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
 260 #define S0SPINT        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
 261
 262 /* SSP Controller */
 263 #define SSP_BASE_ADDR           0xE0068000
 264 #define SSPCR0         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x00))
 265 #define SSPCR1         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x04))
 266 #define SSPDR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x08))
 267 #define SSPSR          (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x0C))
 268 #define SSPCPSR        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x10))
 269 #define SSPIMSC        (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x14))
 270 #define SSPRIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x18))
 271 #define SSPMIS         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x1C))
 272 #define SSPICR         (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x20))
 273
 274 /* Real Time Clock */
 275 #define RTC_BASE_ADDR           0xE0024000
 276 #define ILR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00))
 277 #define CTC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04))
 278 #define CCR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08))
 279 #define CIIR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C))
 280 #define AMR            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10))
 281 #define CTIME0         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14))
 282 #define CTIME1         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18))
 283 #define CTIME2         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C))
 284 #define SEC            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20))
 285 #define MIN            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24))
 286 #define HOUR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28))
 287 #define DOM            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C))
 288 #define DOW            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30))
 289 #define DOY            (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34))
 290 #define MONTH          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38))
 291 #define YEAR           (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C))
 292 #define ALSEC          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60))
 293 #define ALMIN          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64))
 294 #define ALHOUR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68))
 295 #define ALDOM          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C))
 296 #define ALDOW          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70))
 297 #define ALDOY          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74))
 298 #define ALMON          (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78))
 299 #define ALYEAR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C))
 300 #define PREINT         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80))
 301 #define PREFRAC        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84))
 302
 303 /* A/D Converter 0 (AD0) */
 304 #define AD0_BASE_ADDR           0xE0034000
 305 #define AD0CR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00))
 306 #define AD0GDR         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04))
 307 #define AD0STAT        (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30))
 308 #define AD0INTEN       (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C))
 309 #define AD0DR0         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10))
 310 #define AD0DR1         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14))
 311 #define AD0DR2         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18))
 312 #define AD0DR3         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C))
 313 #define AD0DR4         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20))
 314 #define AD0DR5         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24))
 315 #define AD0DR6         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28))
 316 #define AD0DR7         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C))
 317
 318 #define ADGSR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x08))
 319 /* A/D Converter 1 (AD1) */
 320 #define AD1_BASE_ADDR           0xE0060000
 321 #define AD1CR          (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x00))
 322 #define AD1GDR         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x04))
 323 #define AD1STAT        (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x30))
 324 #define AD1INTEN       (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x0C))
 325 #define AD1DR0         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x10))
 326 #define AD1DR1         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x14))
 327 #define AD1DR2         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x18))
 328 #define AD1DR3         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x1C))
 329 #define AD1DR4         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x20))
 330 #define AD1DR5         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x24))
 331 #define AD1DR6         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x28))
 332 #define AD1DR7         (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x2C))
 333
 334 /* D/A Converter */
 335 #define DAC_BASE_ADDR           0xE006C000
 336 #define DACR           (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00))
 337
 338 /* Watchdog */
 339 #define WDG_BASE_ADDR           0xE0000000
 340 #define WDMOD          (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00))
 341 #define WDTC           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04))
 342 #define WDFEED         (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08))
 343 #define WDTV           (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C))
 344
 345 /* USB Controller */
 346 #define USB_BASE_ADDR           0xE0090000                      /* USB Base Address */
 347 /* Device Interrupt Registers */
 348 #define DEV_INT_STAT    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00))
 349 #define DEV_INT_EN      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04))
 350 #define DEV_INT_CLR     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08))
 351 #define DEV_INT_SET     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C))
 352 #define DEV_INT_PRIO    (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C))
 353
 354 /* Endpoint Interrupt Registers */
 355 #define EP_INT_STAT     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30))
 356 #define EP_INT_EN       (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34))
 357 #define EP_INT_CLR      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38))
 358 #define EP_INT_SET      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C))
 359 #define EP_INT_PRIO     (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40))
 360
 361 /* Endpoint Realization Registers */
 362 #define REALIZE_EP      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44))
 363 #define EP_INDEX        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48))
 364 #define MAXPACKET_SIZE  (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C))
 365
 366 /* Command Reagisters */
 367 #define CMD_CODE        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10))
 368 #define CMD_DATA        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14))
 369
 370 /* Data Transfer Registers */
 371 #define RX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18))
 372 #define TX_DATA         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C))
 373 #define RX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20))
 374 #define TX_PLENGTH      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24))
 375 #define USB_CTRL        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28))
 376
 377 /* DMA Registers */
 378 #define DMA_REQ_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x50))
 379 #define DMA_REQ_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0x54))
 380 #define DMA_REQ_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0x58))
 381 #define UDCA_HEAD           (*((volatile unsigned long *)USB_BASE_ADDR + 0x80))
 382 #define EP_DMA_STAT         (*((volatile unsigned long *)USB_BASE_ADDR + 0x84))
 383 #define EP_DMA_EN           (*((volatile unsigned long *)USB_BASE_ADDR + 0x88))
 384 #define EP_DMA_DIS          (*((volatile unsigned long *)USB_BASE_ADDR + 0x8C))
 385 #define DMA_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0x90))
 386 #define DMA_INT_EN          (*((volatile unsigned long *)USB_BASE_ADDR + 0x94))
 387 #define EOT_INT_STAT        (*((volatile unsigned long *)USB_BASE_ADDR + 0xA0))
 388 #define EOT_INT_CLR         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA4))
 389 #define EOT_INT_SET         (*((volatile unsigned long *)USB_BASE_ADDR + 0xA8))
 390 #define NDD_REQ_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xAC))
 391 #define NDD_REQ_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB0))
 392 #define NDD_REQ_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xB4))
 393 #define SYS_ERR_INT_STAT    (*((volatile unsigned long *)USB_BASE_ADDR + 0xB8))
 394 #define SYS_ERR_INT_CLR     (*((volatile unsigned long *)USB_BASE_ADDR + 0xBC))
 395 #define SYS_ERR_INT_SET     (*((volatile unsigned long *)USB_BASE_ADDR + 0xC0))
 396 #define MODULE_ID           (*((volatile unsigned long *)USB_BASE_ADDR + 0xFC))
 397
 398 #endif  // __LPC214x_H
 399