FreeRTOS
[armadillo_firmware.git] / FreeRTOS / Common / ethernet / lwIP_130 / contrib / port / FreeRTOS / ColdFire / fec.h
blobebca2bbc4c47b10623bf3ef47e9888a4c4e9b9a6
1 /*
2 * File: fec.h
3 * Purpose: Driver for the Fast Ethernet Controller (FEC)
5 * Notes:
6 */
8 #ifndef _FEC_H_
9 #define _FEC_H_
11 #include "eth.h"
12 #include "fecbd.h"
13 #include "mii.h"
14 #include "eth_phy.h"
16 /********************************************************************/
18 /* External Interface Modes */
19 #define FEC_MODE_7WIRE 0 /* Old 7-wire (AMD) mode */
20 #define FEC_MODE_MII 1 /* Media Independent Interface */
21 #define FEC_MODE_RMII 2 /* Reduced MII */
22 #define FEC_MODE_LOOPBACK 3 /* Internal Loopback */
24 #define INTC_LVL_FEC 3
26 * FEC Configuration Parameters
28 typedef struct
30 uint8 ch; /* FEC channel */
31 uint8 mode; /* Transceiver mode */
32 MII_SPEED speed; /* Ethernet Speed */
33 MII_DUPLEX duplex; /* Ethernet Duplex */
34 uint8 prom; /* Promiscuous Mode? */
35 uint8 mac[6]; /* Ethernet Address */
36 uint8 phyaddr; /* PHY address */
37 uint8 initphy; /* Init PHY? */
38 int nrxbd; /* Number of RxBDs */
39 int ntxbd; /* Number of TxBDs */
40 } FEC_CONFIG;
41 #define YES 1
42 #define NO 0
44 * FEC Event Log
46 typedef struct {
47 int errors; /* total count of errors */
48 int hberr; /* heartbeat error */
49 int babr; /* babbling receiver */
50 int babt; /* babbling transmitter */
51 int gra; /* graceful stop complete */
52 int txf; /* transmit frame */
53 int txb; /* transmit buffer */
54 int rxf; /* receive frame */
55 int rxb; /* received buffer */
56 int mii; /* MII */
57 int eberr; /* FEC/DMA fatal bus error */
58 int lc; /* late collision */
59 int rl; /* collision retry limit */
60 int un; /* Tx FIFO underflow */
61 int rfsw_inv; /* Invalid bit in RFSW */
62 int rfsw_l; /* RFSW Last in Frame */
63 int rfsw_m; /* RFSW Miss */
64 int rfsw_bc; /* RFSW Broadcast */
65 int rfsw_mc; /* RFSW Multicast */
66 int rfsw_lg; /* RFSW Length Violation */
67 int rfsw_no; /* RFSW Non-octet */
68 int rfsw_cr; /* RFSW Bad CRC */
69 int rfsw_ov; /* RFSW Overflow */
70 int rfsw_tr; /* RFSW Truncated */
71 } FEC_EVENT_LOG;
73 #if 0
75 int
76 fec_mii_write( int, int, int);
78 int
79 fec_mii_read(int, int, uint16*);
81 void
82 fec_mii_init(int, int);
84 void
85 fec_mib_init(void);
87 void
88 fec_mib_dump(void);
90 void
91 fec_log_init(int);
93 void
94 fec_log_dump(int);
96 void
97 fec_reg_dump(int);
99 void
100 fec_duplex (int, MII_DUPLEX);
102 void
103 fec_rmii_speed (int, MII_SPEED);
105 uint8
106 fec_hash_address(const uint8*);
108 void
109 fec_set_address (const uint8*);
111 void
112 fec_reset ( void );
114 void
115 fec_init (int, const uint8*);
117 void
118 fec_rx_start(int, uint8*, int);
120 void
121 fec_rx_continue( void );
123 void
124 fec_rx_handler(void);
126 void
127 fec0_rx_handler(void);
129 void
130 fec1_rx_handler(void);
132 void
133 fec_tx_continue( void );
135 void
136 fec_tx_stop (int);
138 void
139 fec_tx_handler(NIF*, int);
142 fec_send (uint8*, uint8*, uint16 , NBUF*);
145 fec0_send(uint8*, uint8*, uint16 , NBUF*);
148 fec1_send(uint8*, uint8*, uint16 , NBUF*);
150 void
151 fec_irq_enable( void );
153 void
154 fec_irq_disable(int);
157 fec_eth_start(FEC_CONFIG*, int);
159 void
160 fec_eth_stop(int);
162 #endif
164 /********************************************************************/
166 #endif /* _FEC_H_ */