Updated README with microblaze info

[ana-net.git] / microblaze / system.mhs

# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 13.2 Build EDK_O.61xd
# Fri Jan  6 10:45:30 2012
# Target Board:  xilinx.com ml605 Rev D
# Family:    virtex6
# Device:    xc6vlx240t
# Package:   ff1156
# Speed Grade:  -1
# ##############################################################################
 PARAMETER VERSION = 2.1.0


 PORT ddr_memory_we_n = ddr_memory_we_n, DIR = O
 PORT ddr_memory_ras_n = ddr_memory_ras_n, DIR = O
 PORT ddr_memory_odt = ddr_memory_odt, DIR = O
 PORT ddr_memory_dqs_n = ddr_memory_dqs_n, DIR = IO, VEC = [0:0]
 PORT ddr_memory_dqs = ddr_memory_dqs, DIR = IO, VEC = [0:0]
 PORT ddr_memory_dq = ddr_memory_dq, DIR = IO, VEC = [7:0]
 PORT ddr_memory_dm = ddr_memory_dm, DIR = O, VEC = [0:0]
 PORT ddr_memory_ddr3_rst = ddr_memory_ddr3_rst, DIR = O
 PORT ddr_memory_cs_n = ddr_memory_cs_n, DIR = O
 PORT ddr_memory_clk_n = ddr_memory_clk_n, DIR = O
 PORT ddr_memory_clk = ddr_memory_clk, DIR = O
 PORT ddr_memory_cke = ddr_memory_cke, DIR = O
 PORT ddr_memory_cas_n = ddr_memory_cas_n, DIR = O
 PORT ddr_memory_ba = ddr_memory_ba, DIR = O, VEC = [2:0]
 PORT ddr_memory_addr = ddr_memory_addr, DIR = O, VEC = [12:0]
 PORT SysACE_WEN = SysACE_WEN, DIR = O
 PORT SysACE_OEN = SysACE_OEN, DIR = O
 PORT SysACE_MPIRQ = SysACE_MPIRQ, DIR = I
 PORT SysACE_MPD = SysACE_MPD, DIR = IO, VEC = [7:0]
 PORT SysACE_MPA = SysACE_MPA, DIR = O, VEC = [6:0]
 PORT SysACE_CLK = SysACE_CLK, DIR = I
 PORT SysACE_CEN = SysACE_CEN, DIR = O
 PORT RS232_Uart_1_sout = RS232_Uart_1_sout, DIR = O
 PORT RS232_Uart_1_sin = RS232_Uart_1_sin, DIR = I
 PORT RESET = RESET, DIR = I, SIGIS = RST, RST_POLARITY = 1
 PORT Push_Buttons_5Bits_TRI_I = Push_Buttons_5Bits_TRI_I, DIR = I, VEC = [0:4]
 PORT LEDs_Positions_TRI_O = LEDs_Positions_TRI_O, DIR = O, VEC = [0:4]
 PORT LEDs_8Bits_TRI_O = LEDs_8Bits_TRI_O, DIR = O, VEC = [0:7]
 PORT IIC_SFP_SDA = IIC_SFP_SDA, DIR = IO
 PORT IIC_SFP_SCL = IIC_SFP_SCL, DIR = IO
 PORT IIC_FMC_SDA = IIC_FMC_SDA, DIR = IO
 PORT IIC_FMC_SCL = IIC_FMC_SCL, DIR = IO
 PORT IIC_EEPROM_SDA = IIC_EEPROM_SDA, DIR = IO
 PORT IIC_EEPROM_SCL = IIC_EEPROM_SCL, DIR = IO
 PORT IIC_DVI_SDA = IIC_DVI_SDA, DIR = IO
 PORT IIC_DVI_SCL = IIC_DVI_SCL, DIR = IO
 PORT Ethernet_Lite_TX_EN = Ethernet_Lite_TX_EN, DIR = O
 PORT Ethernet_Lite_TX_CLK = Ethernet_Lite_TX_CLK, DIR = I
 PORT Ethernet_Lite_TXD = Ethernet_Lite_TXD, DIR = O, VEC = [3:0]
 PORT Ethernet_Lite_RX_ER = Ethernet_Lite_RX_ER, DIR = I
 PORT Ethernet_Lite_RX_DV = Ethernet_Lite_RX_DV, DIR = I
 PORT Ethernet_Lite_RX_CLK = Ethernet_Lite_RX_CLK, DIR = I
 PORT Ethernet_Lite_RXD = Ethernet_Lite_RXD, DIR = I, VEC = [3:0]
 PORT Ethernet_Lite_PHY_RST_N = Ethernet_Lite_PHY_RST_N, DIR = O
 PORT Ethernet_Lite_MDIO = Ethernet_Lite_MDIO, DIR = IO
 PORT Ethernet_Lite_MDC = Ethernet_Lite_MDC, DIR = O
 PORT Ethernet_Lite_CRS = Ethernet_Lite_CRS, DIR = I
 PORT Ethernet_Lite_COL = Ethernet_Lite_COL, DIR = I
 PORT DIP_Switches_8Bits_TRI_I = DIP_Switches_8Bits_TRI_I, DIR = I, VEC = [0:7]
 PORT CLK_P = CLK, DIR = I, DIFFERENTIAL_POLARITY = P, SIGIS = CLK, CLK_FREQ = 200000000
 PORT CLK_N = CLK, DIR = I, DIFFERENTIAL_POLARITY = N, SIGIS = CLK, CLK_FREQ = 200000000


BEGIN proc_sys_reset
 PARAMETER INSTANCE = proc_sys_reset_0
 PARAMETER HW_VER = 3.00.a
 PARAMETER C_EXT_RESET_HIGH = 1
 PORT MB_Debug_Sys_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
 PORT Dcm_locked = proc_sys_reset_0_Dcm_locked
 PORT MB_Reset = proc_sys_reset_0_MB_Reset
 PORT Slowest_sync_clk = clk_100_0000MHzMMCM0
 PORT Interconnect_aresetn = proc_sys_reset_0_Interconnect_aresetn
 PORT Ext_Reset_In = RESET
 PORT BUS_STRUCT_RESET = proc_sys_reset_0_BUS_STRUCT_RESET
END

BEGIN lmb_v10
 PARAMETER INSTANCE = microblaze_0_ilmb
 PARAMETER HW_VER = 2.00.b
 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
 PORT LMB_CLK = clk_100_0000MHzMMCM0
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = microblaze_0_i_bram_ctrl
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0001ffff
 BUS_INTERFACE SLMB = microblaze_0_ilmb
 BUS_INTERFACE BRAM_PORT = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
 PORT Interrupt = microblaze_0_i_bram_ctrl_Interrupt
END

BEGIN lmb_v10
 PARAMETER INSTANCE = microblaze_0_dlmb
 PARAMETER HW_VER = 2.00.b
 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
 PORT LMB_CLK = clk_100_0000MHzMMCM0
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = microblaze_0_d_bram_ctrl
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0001ffff
 BUS_INTERFACE SLMB = microblaze_0_dlmb
 BUS_INTERFACE BRAM_PORT = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
 PORT Interrupt = microblaze_0_d_bram_ctrl_Interrupt
END

BEGIN bram_block
 PARAMETER INSTANCE = microblaze_0_bram_block
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
 BUS_INTERFACE PORTB = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
END

BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER HW_VER = 8.20.a
 PARAMETER C_INTERCONNECT = 2
 PARAMETER C_USE_BARREL = 1
 PARAMETER C_USE_FPU = 2
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER C_ICACHE_BASEADDR = 0xC0000000
 PARAMETER C_ICACHE_HIGHADDR = 0xCFFFFFFF
 PARAMETER C_USE_ICACHE = 1
 PARAMETER C_CACHE_BYTE_SIZE = 16384
 PARAMETER C_ICACHE_ALWAYS_USED = 1
 PARAMETER C_DCACHE_BASEADDR = 0xC0000000
 PARAMETER C_DCACHE_HIGHADDR = 0xCFFFFFFF
 PARAMETER C_USE_DCACHE = 1
 PARAMETER C_DCACHE_BYTE_SIZE = 16384
 PARAMETER C_DCACHE_ALWAYS_USED = 1
 PARAMETER C_PVR = 2
 PARAMETER C_USE_MMU = 3
 PARAMETER C_MMU_ZONES = 2
 PARAMETER C_ICACHE_LINE_LEN = 8
 PARAMETER C_ICACHE_STREAMS = 1
 PARAMETER C_ICACHE_VICTIMS = 8
 PARAMETER C_DIV_ZERO_EXCEPTION = 1
 PARAMETER C_M_AXI_I_BUS_EXCEPTION = 1
 PARAMETER C_M_AXI_D_BUS_EXCEPTION = 1
 PARAMETER C_ILL_OPCODE_EXCEPTION = 1
 PARAMETER C_OPCODE_0x0_ILLEGAL = 1
 PARAMETER C_UNALIGNED_EXCEPTIONS = 1
 PARAMETER C_USE_HW_MUL = 2
 PARAMETER C_USE_DIV = 1
 BUS_INTERFACE M_AXI_DP = axi4lite_0
 BUS_INTERFACE M_AXI_IP = axi4lite_0
 BUS_INTERFACE M_AXI_DC = axi4_0
 BUS_INTERFACE M_AXI_IC = axi4_0
 BUS_INTERFACE DEBUG = microblaze_0_debug
 BUS_INTERFACE DLMB = microblaze_0_dlmb
 BUS_INTERFACE ILMB = microblaze_0_ilmb
 PORT MB_RESET = proc_sys_reset_0_MB_Reset
 PORT CLK = clk_100_0000MHzMMCM0
 PORT INTERRUPT = axi_intc_0_Irq
END

BEGIN mdm
 PARAMETER INSTANCE = debug_module
 PARAMETER HW_VER = 2.00.b
 PARAMETER C_INTERCONNECT = 2
 PARAMETER C_USE_UART = 1
 PARAMETER C_BASEADDR = 0x74800000
 PARAMETER C_HIGHADDR = 0x7480ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
 PORT Debug_SYS_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
END

BEGIN clock_generator
 PARAMETER INSTANCE = clock_generator_0
 PARAMETER HW_VER = 4.02.a
 PARAMETER C_CLKIN_FREQ = 200000000
 PARAMETER C_CLKOUT0_FREQ = 100000000
 PARAMETER C_CLKOUT0_GROUP = MMCM0
 PARAMETER C_CLKOUT1_FREQ = 200000000
 PARAMETER C_CLKOUT1_GROUP = MMCM0
 PARAMETER C_CLKOUT2_FREQ = 400000000
 PARAMETER C_CLKOUT2_GROUP = MMCM0
 PARAMETER C_CLKOUT3_FREQ = 400000000
 PARAMETER C_CLKOUT3_GROUP = MMCM0
 PARAMETER C_CLKOUT3_BUF = FALSE
 PARAMETER C_CLKOUT3_VARIABLE_PHASE = TRUE
 PORT LOCKED = proc_sys_reset_0_Dcm_locked
 PORT CLKOUT0 = clk_100_0000MHzMMCM0
 PORT RST = RESET
 PORT CLKOUT3 = clk_400_0000MHzMMCM0_nobuf_varphase
 PORT CLKOUT2 = clk_400_0000MHzMMCM0
 PORT CLKOUT1 = clk_200_0000MHzMMCM0
 PORT CLKIN = CLK
 PORT PSCLK = clk_200_0000MHzMMCM0
 PORT PSEN = psen
 PORT PSINCDEC = psincdec
 PORT PSDONE = psdone
END

BEGIN axi_interconnect
 PARAMETER INSTANCE = axi4lite_0
 PARAMETER HW_VER = 1.03.a
 PARAMETER C_INTERCONNECT_CONNECTIVITY_MODE = 0
 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
 PORT INTERCONNECT_ACLK = clk_100_0000MHzMMCM0
END

BEGIN axi_interconnect
 PARAMETER INSTANCE = axi4_0
 PARAMETER HW_VER = 1.03.a
 PORT interconnect_aclk = clk_100_0000MHzMMCM0
 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
END

BEGIN axi_sysace
 PARAMETER INSTANCE = SysACE_CompactFlash
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_MEM_WIDTH = 8
 PARAMETER C_BASEADDR = 0x41800000
 PARAMETER C_HIGHADDR = 0x4180ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT SysACE_WEN = SysACE_WEN
 PORT SysACE_OEN = SysACE_OEN
 PORT SysACE_MPIRQ = SysACE_MPIRQ
 PORT SysACE_MPD = SysACE_MPD
 PORT SysACE_MPA = SysACE_MPA
 PORT SysACE_CLK = SysACE_CLK
 PORT SysACE_CEN = SysACE_CEN
 PORT SysACE_IRQ = SysACE_CompactFlash_SysACE_IRQ
END

BEGIN axi_uartlite
 PARAMETER INSTANCE = RS232_Uart_1
 PARAMETER HW_VER = 1.02.a
 PARAMETER C_BAUDRATE = 9600
 PARAMETER C_DATA_BITS = 8
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_ODD_PARITY = 1
 PARAMETER C_BASEADDR = 0x40600000
 PARAMETER C_HIGHADDR = 0x4060ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT TX = RS232_Uart_1_sout
 PORT RX = RS232_Uart_1_sin
 PORT Interrupt = RS232_Uart_1_Interrupt
END

BEGIN axi_gpio
 PARAMETER INSTANCE = Push_Buttons_5Bits
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 5
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_BASEADDR = 0x40000000
 PARAMETER C_HIGHADDR = 0x4000ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT GPIO_IO_I = Push_Buttons_5Bits_TRI_I
END

BEGIN axi_gpio
 PARAMETER INSTANCE = LEDs_Positions
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 5
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_BASEADDR = 0x40020000
 PARAMETER C_HIGHADDR = 0x4002ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT GPIO_IO_O = LEDs_Positions_TRI_O
END

BEGIN axi_gpio
 PARAMETER INSTANCE = LEDs_8Bits
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_BASEADDR = 0x40040000
 PARAMETER C_HIGHADDR = 0x4004ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT GPIO_IO_O = LEDs_8Bits_TRI_O
END

BEGIN axi_iic
 PARAMETER INSTANCE = IIC_SFP
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_IIC_FREQ = 100000
 PARAMETER C_TEN_BIT_ADR = 0
 PARAMETER C_BASEADDR = 0x40800000
 PARAMETER C_HIGHADDR = 0x4080ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT Sda = IIC_SFP_SDA
 PORT Scl = IIC_SFP_SCL
 PORT IIC2INTC_Irpt = IIC_SFP_IIC2INTC_Irpt
END

BEGIN axi_iic
 PARAMETER INSTANCE = IIC_FMC
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_IIC_FREQ = 100000
 PARAMETER C_TEN_BIT_ADR = 0
 PARAMETER C_BASEADDR = 0x40820000
 PARAMETER C_HIGHADDR = 0x4082ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT Sda = IIC_FMC_SDA
 PORT Scl = IIC_FMC_SCL
 PORT IIC2INTC_Irpt = IIC_FMC_IIC2INTC_Irpt
END

BEGIN axi_iic
 PARAMETER INSTANCE = IIC_EEPROM
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_IIC_FREQ = 100000
 PARAMETER C_TEN_BIT_ADR = 0
 PARAMETER C_BASEADDR = 0x40840000
 PARAMETER C_HIGHADDR = 0x4084ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT Sda = IIC_EEPROM_SDA
 PORT Scl = IIC_EEPROM_SCL
 PORT IIC2INTC_Irpt = IIC_EEPROM_IIC2INTC_Irpt
END

BEGIN axi_iic
 PARAMETER INSTANCE = IIC_DVI
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_IIC_FREQ = 100000
 PARAMETER C_TEN_BIT_ADR = 0
 PARAMETER C_BASEADDR = 0x40860000
 PARAMETER C_HIGHADDR = 0x4086ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT Sda = IIC_DVI_SDA
 PORT Scl = IIC_DVI_SCL
 PORT IIC2INTC_Irpt = IIC_DVI_IIC2INTC_Irpt
END

BEGIN axi_ethernetlite
 PARAMETER INSTANCE = Ethernet_Lite
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0x40e00000
 PARAMETER C_HIGHADDR = 0x40e0ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT PHY_tx_en = Ethernet_Lite_TX_EN
 PORT PHY_tx_clk = Ethernet_Lite_TX_CLK
 PORT PHY_tx_data = Ethernet_Lite_TXD
 PORT PHY_rx_er = Ethernet_Lite_RX_ER
 PORT PHY_dv = Ethernet_Lite_RX_DV
 PORT PHY_rx_clk = Ethernet_Lite_RX_CLK
 PORT PHY_rx_data = Ethernet_Lite_RXD
 PORT PHY_rst_n = Ethernet_Lite_PHY_RST_N
 PORT PHY_MDIO = Ethernet_Lite_MDIO
 PORT PHY_MDC = Ethernet_Lite_MDC
 PORT PHY_crs = Ethernet_Lite_CRS
 PORT PHY_col = Ethernet_Lite_COL
 PORT IP2INTC_Irpt = Ethernet_Lite_IP2INTC_Irpt
END

BEGIN axi_gpio
 PARAMETER INSTANCE = DIP_Switches_8Bits
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_BASEADDR = 0x40060000
 PARAMETER C_HIGHADDR = 0x4006ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT GPIO_IO_I = DIP_Switches_8Bits_TRI_I
END

BEGIN axi_v6_ddrx
 PARAMETER INSTANCE = DDR3_SDRAM
 PARAMETER HW_VER = 1.03.a
 PARAMETER C_MEM_PARTNO = MT41J64M16XX-15E
 PARAMETER C_DM_WIDTH = 1
 PARAMETER C_DQS_WIDTH = 1
 PARAMETER C_DQ_WIDTH = 8
 PARAMETER C_INTERCONNECT_S_AXI_MASTERS = microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC
 PARAMETER C_MMCM_EXT_LOC = MMCM_ADV_X0Y8
 PARAMETER C_NDQS_COL0 = 1
 PARAMETER C_NDQS_COL1 = 0
 PARAMETER C_S_AXI_BASEADDR = 0xC0000000
 PARAMETER C_S_AXI_HIGHADDR = 0xCFFFFFFF
 BUS_INTERFACE S_AXI = axi4_0
 PORT ddr_we_n = ddr_memory_we_n
 PORT ddr_ras_n = ddr_memory_ras_n
 PORT ddr_odt = ddr_memory_odt
 PORT ddr_dqs_n = ddr_memory_dqs_n
 PORT ddr_dqs_p = ddr_memory_dqs
 PORT ddr_dq = ddr_memory_dq
 PORT ddr_dm = ddr_memory_dm
 PORT ddr_reset_n = ddr_memory_ddr3_rst
 PORT ddr_cs_n = ddr_memory_cs_n
 PORT ddr_ck_n = ddr_memory_clk_n
 PORT ddr_ck_p = ddr_memory_clk
 PORT ddr_cke = ddr_memory_cke
 PORT ddr_cas_n = ddr_memory_cas_n
 PORT ddr_ba = ddr_memory_ba
 PORT ddr_addr = ddr_memory_addr
 PORT clk_rd_base = clk_400_0000MHzMMCM0_nobuf_varphase
 PORT clk_mem = clk_400_0000MHzMMCM0
 PORT clk = clk_200_0000MHzMMCM0
 PORT clk_ref = clk_200_0000MHzMMCM0
 PORT PD_PSEN = psen
 PORT PD_PSINCDEC = psincdec
 PORT PD_PSDONE = psdone
END

BEGIN axi_intc
 PARAMETER INSTANCE = axi_intc_0
 PARAMETER HW_VER = 1.01.a
 PARAMETER C_BASEADDR = 0x41200000
 PARAMETER C_HIGHADDR = 0x4120ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT Irq = axi_intc_0_Irq
 PORT Intr = RS232_Uart_1_Interrupt & Ethernet_Lite_IP2INTC_Irpt & SysACE_CompactFlash_SysACE_IRQ & IIC_SFP_IIC2INTC_Irpt & IIC_FMC_IIC2INTC_Irpt & IIC_EEPROM_IIC2INTC_Irpt & IIC_DVI_IIC2INTC_Irpt & axi_timer_0_Interrupt
END

BEGIN axi_timer
 PARAMETER INSTANCE = axi_timer_0
 PARAMETER HW_VER = 1.02.a
 PARAMETER C_BASEADDR = 0x41c00000
 PARAMETER C_HIGHADDR = 0x41c0ffff
 BUS_INTERFACE S_AXI = axi4lite_0
 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
 PORT Interrupt = axi_timer_0_Interrupt
END