acx_hwstructs.h

   1 #ifndef _ACX_HWSTRUCTS_H_
   2 #define _ACX_HWSTRUCTS_H_
   3
   4 /*
   5  * acx_hwstructs.h: hardware specific data structures and constants.
   6  *
   7  * Copyright (c) 2003-2008, the ACX100 driver project.
   8  *
   9  * This file is licensed under GPL version 2. See the README file for more
  10  * information.
  11  */
  12
  13 #include "acx_debug.h"
  14
  15 /*
  16  * Following is the original comment - which explains why acx_debug.h is
  17  * included here:
  18  *
  19  * ----------------------------------------------------------------------------
  20  * An opaque typesafe helper type.
  21  *
  22  * Some hardware fields are actually pointers,
  23  * but they have to remain u32, since using ptr instead
  24  * (8 bytes on 64bit systems!) would disrupt the fixed descriptor
  25  * format the acx firmware expects in the non-user area.
  26  * Since we cannot cram an 8 byte ptr into 4 bytes, we need to
  27  * enforce that pointed to data remains in low memory
  28  * (address value needs to fit in 4 bytes) on 64bit systems.
  29  *
  30  * This is easy to get wrong, thus we are using a small struct
  31  * and special macros to access it. Macros will check for
  32  * attempts to overflow an acx_ptr with value > 0xffffffff.
  33  *
  34  * Attempts to use acx_ptr without macros result in compile-time errors
  35  * ----------------------------------------------------------------------------
  36  *
  37  * Ok well, I'll try and do without later. Shouldn't be that hard.
  38  *
  39  * The main point of the macro below, though is that they highlight the fact
  40  * that these pointers are always little endian! THAT is the thing to remember.
  41  *
  42  */
  43
  44 typedef struct {
  45         u32     v;
  46 } __attribute__ ((packed)) acx_ptr;
  47
  48 #if ACX_DEBUG
  49 #define CHECK32(n) BUG_ON(sizeof(n)>4 && (long)(n)>0xffffff00)
  50 #else
  51 #define CHECK32(n) ((void)0)
  52 #endif
  53
  54 /* acx_ptr <-> integer conversion */
  55 #define cpu2acx(n) ({ CHECK32(n); ((acx_ptr){ .v = cpu_to_le32(n) }); })
  56 #define acx2cpu(a) (le32_to_cpu(a.v))
  57
  58 /* acx_ptr <-> pointer conversion */
  59 #define ptr2acx(p) ({ CHECK32(p); ((acx_ptr){ .v = cpu_to_le32((u32)(long)(p)) }); })
  60 #define acx2ptr(a) ((void*)le32_to_cpu(a.v))
  61
  62 /* Values for rate field (acx100 only) */
  63 #define RATE100_1               10
  64 #define RATE100_2               20
  65 #define RATE100_5               55
  66 #define RATE100_11              110
  67 #define RATE100_22              220
  68 /* This bit denotes use of PBCC:
  69 ** (PBCC encoding is usable with 11 and 22 Mbps speeds only) */
  70 #define RATE100_PBCC511         0x80
  71
  72 /* Bit values for rate111 field */
  73 #define RATE111_1               0x0001  /* DBPSK */
  74 #define RATE111_2               0x0002  /* DQPSK */
  75 #define RATE111_5               0x0004  /* CCK or PBCC */
  76 #define RATE111_6               0x0008  /* CCK-OFDM or OFDM */
  77 #define RATE111_9               0x0010  /* CCK-OFDM or OFDM */
  78 #define RATE111_11              0x0020  /* CCK or PBCC */
  79 #define RATE111_12              0x0040  /* CCK-OFDM or OFDM */
  80 #define RATE111_18              0x0080  /* CCK-OFDM or OFDM */
  81 #define RATE111_22              0x0100  /* PBCC */
  82 #define RATE111_24              0x0200  /* CCK-OFDM or OFDM */
  83 #define RATE111_36              0x0400  /* CCK-OFDM or OFDM */
  84 #define RATE111_48              0x0800  /* CCK-OFDM or OFDM */
  85 #define RATE111_54              0x1000  /* CCK-OFDM or OFDM */
  86 #define RATE111_RESERVED        0x2000
  87 #define RATE111_PBCC511         0x4000  /* PBCC mod at 5.5 or 11Mbit (else CCK) */
  88 #define RATE111_SHORTPRE        0x8000  /* short preamble */
  89 /* Special 'try everything' value */
  90 #define RATE111_ALL             0x1fff
  91 /* These bits denote acx100 compatible settings */
  92 #define RATE111_ACX100_COMPAT   0x0127
  93 /* These bits denote 802.11b compatible settings */
  94 #define RATE111_80211B_COMPAT   0x0027
  95
  96 /* Descriptor Ctl field bits
  97  * init value is 0x8e, "idle" value is 0x82 (in idle tx descs)
  98  */
  99 #define DESC_CTL_SHORT_PREAMBLE 0x01    /* preamble type: 0 = long; 1 = short */
 100 #define DESC_CTL_FIRSTFRAG      0x02    /* this is the 1st frag of the frame */
 101 #define DESC_CTL_AUTODMA        0x04
 102 #define DESC_CTL_RECLAIM        0x08    /* ready to reuse */
 103 #define DESC_CTL_HOSTDONE       0x20    /* host has finished processing */
 104 #define DESC_CTL_ACXDONE        0x40    /* acx has finished processing */
 105 /* host owns the desc [has to be released last, AFTER modifying all other desc fields!] */
 106 #define DESC_CTL_HOSTOWN        0x80
 107 #define DESC_CTL_ACXDONE_HOSTOWN (DESC_CTL_ACXDONE | DESC_CTL_HOSTOWN)
 108
 109 /* Descriptor Status field
 110  */
 111 #define DESC_STATUS_FULL        (1 << 31)
 112
 113 /* NB: some bits may be interesting for Monitor mode tx (aka Raw tx): */
 114 #define DESC_CTL2_SEQ           0x01    /* don't increase sequence field */
 115 #define DESC_CTL2_FCS           0x02    /* don't add the FCS */
 116 #define DESC_CTL2_MORE_FRAG     0x04
 117 #define DESC_CTL2_RETRY         0x08    /* don't increase retry field */
 118 #define DESC_CTL2_POWER         0x10    /* don't increase power mgmt. field */
 119 #define DESC_CTL2_RTS           0x20    /* do RTS/CTS magic before sending */
 120 #define DESC_CTL2_WEP           0x40    /* encrypt this frame */
 121 #define DESC_CTL2_DUR           0x80    /* don't increase duration field */
 122
 123 /*
 124  * PCI specific structures
 125  */
 126
 127 /*
 128  * Here is the original comment:
 129  *
 130  * ----------------------------------------------------------------------------
 131  * Outside of "#ifdef PCI" because USB needs to know sizeof()
 132  * of txdesc and rxdesc.
 133  * ----------------------------------------------------------------------------
 134  *
 135  * These seem to be hardware tx/rx structures... If they are PCI specific, why
 136  * does USB need to know their size at all??
 137  *
 138  */
 139 struct txdesc {
 140         acx_ptr pNextDesc;      /* pointer to next txdesc */
 141         acx_ptr HostMemPtr;                     /* 0x04 */
 142         acx_ptr AcxMemPtr;                      /* 0x08 */
 143         u32     tx_time;                        /* 0x0c */
 144         u16     total_length;                   /* 0x10 */
 145         u16     Reserved;                       /* 0x12 */
 146
 147 /* The following 16 bytes do not change when acx100 owns the descriptor */
 148 /* BUG: fw clears last byte of this area which is supposedly reserved
 149 ** for driver use. amd64 blew up. We dare not use it now */
 150         u32     dummy[4];
 151
 152         u8      Ctl_8;                  /* 0x24, 8bit value */
 153         u8      Ctl2_8;                 /* 0x25, 8bit value */
 154         u8      error;                  /* 0x26 */
 155         u8      ack_failures;           /* 0x27 */
 156         u8      rts_failures;           /* 0x28 */
 157         u8      rts_ok;                 /* 0x29 */
 158         union {
 159                 struct {
 160                         u8      rate;           /* 0x2a */
 161                         u8      queue_ctrl;     /* 0x2b */
 162                 } __attribute__ ((packed)) r1;
 163                 struct {
 164                         u16     rate111;        /* 0x2a */
 165                 } __attribute__ ((packed)) r2;
 166         } __attribute__ ((packed)) u;
 167         u32     queue_info;                     /* 0x2c (acx100, reserved on acx111) */
 168 } __attribute__ ((packed));             /* size : 48 = 0x30 */
 169
 170 typedef struct rxdesc rxdesc_t;
 171 /* NB: acx111 txdesc structure is 4 byte larger */
 172 /* All these 4 extra bytes are reserved. tx alloc code takes them into account */
 173
 174 struct rxdesc {
 175         acx_ptr pNextDesc;                      /* 0x00 */
 176         acx_ptr HostMemPtr;                     /* 0x04 */
 177         acx_ptr ACXMemPtr;                      /* 0x08 */
 178         u32     rx_time;                        /* 0x0c */
 179         u16     total_length;                   /* 0x10 */
 180         u16     WEP_length;                     /* 0x12 */
 181         u32     WEP_ofs;                        /* 0x14 */
 182
 183 /* the following 16 bytes do not change when acx100 owns the descriptor */
 184         u8      driverWorkspace[16];            /* 0x18 */
 185
 186         u8      Ctl_8;
 187         u8      rate;
 188         u8      error;
 189         u8      SNR;                            /* Signal-to-Noise Ratio */
 190         u8      RxLevel;
 191         u8      queue_ctrl;
 192         u16     unknown;
 193         u32     unknown2;
 194 } __attribute__ ((packed));             /* size 52 = 0x34 */
 195
 196 typedef struct txdesc txdesc_t;
 197
 198 /*
 199  * FIXME: this is typedef'ed, but doesn't match any existing structure???
 200  */
 201
 202 typedef struct tx tx_t;
 203
 204 /*
 205  * "Config Option structs", says the original comment.
 206  *
 207  * FIXME: I don't know their exact use yet. They seem to be only used in the PCI
 208  * case.
 209  */
 210
 211 typedef struct co_antennas {
 212         u8      type;
 213         u8      len;
 214         u8      list[2];
 215 } __attribute__ ((packed)) co_antennas_t;
 216
 217 typedef struct co_powerlevels {
 218         u8      type;
 219         u8      len;
 220         u16     list[8];
 221 } __attribute__ ((packed)) co_powerlevels_t;
 222
 223 typedef struct co_datarates {
 224         u8      type;
 225         u8      len;
 226         u8      list[8];
 227 } __attribute__ ((packed)) co_datarates_t;
 228
 229 typedef struct co_domains {
 230         u8      type;
 231         u8      len;
 232         u8      list[6];
 233 } __attribute__ ((packed)) co_domains_t;
 234
 235 typedef struct co_product_id {
 236         u8      type;
 237         u8      len;
 238         u8      list[128];
 239 } __attribute__ ((packed)) co_product_id_t;
 240
 241 typedef struct co_manuf_id {
 242         u8      type;
 243         u8      len;
 244         u8      list[128];
 245 } __attribute__ ((packed)) co_manuf_t;
 246
 247 typedef struct co_fixed {
 248         char    NVSv[8];
 249 /*      u16     NVS_vendor_offs;        ACX111-only */
 250 /*      u16     unknown;                ACX111-only */
 251         u8      MAC[6]; /* ACX100-only */
 252         u16     probe_delay;    /* ACX100-only */
 253         u32     eof_memory;
 254         u8      dot11CCAModes;
 255         u8      dot11Diversity;
 256         u8      dot11ShortPreambleOption;
 257         u8      dot11PBCCOption;
 258         u8      dot11ChannelAgility;
 259         u8      dot11PhyType; /* FIXME: does 802.11 call it "dot11PHYType"? */
 260         u8      dot11TempType;
 261         u8      table_count;
 262 } __attribute__ ((packed)) co_fixed_t;
 263
 264 typedef struct acx111_ie_configoption {
 265         u16                     type;
 266         u16                     len;
 267 /* Do not access below members directly, they are in fact variable length */
 268         co_fixed_t              fixed;
 269         co_antennas_t           antennas;
 270         co_powerlevels_t        power_levels;
 271         co_datarates_t          data_rates;
 272         co_domains_t            domains;
 273         co_product_id_t         product_id;
 274         co_manuf_t              manufacturer;
 275         u8                      _padding[4];
 276 } __attribute__ ((packed)) acx111_ie_configoption_t;
 277
 278 #endif /* _ACX_HWSTRUCTS_H_ */