1 // Scintilla source code edit control
4 ** Written by Phil Reid,
6 ** - The Verilog Lexer by Avi Yegudin
7 ** - The Fortran Lexer by Chuan-jian Shen
8 ** - The C++ lexer by Neil Hodgson
10 // Copyright 1998-2002 by Neil Hodgson <neilh@scintilla.org>
11 // The License.txt file describes the conditions under which this software may be distributed.
21 #include "Scintilla.h"
25 #include "LexAccessor.h"
27 #include "StyleContext.h"
28 #include "CharacterSet.h"
29 #include "LexerModule.h"
32 using namespace Scintilla
;
35 static void ColouriseVHDLDoc(
36 unsigned int startPos
,
39 WordList
*keywordlists
[],
43 /***************************************/
44 static inline bool IsAWordChar(const int ch
) {
45 return (ch
< 0x80) && (isalnum(ch
) || ch
== '.' || ch
== '_' );
48 /***************************************/
49 static inline bool IsAWordStart(const int ch
) {
50 return (ch
< 0x80) && (isalnum(ch
) || ch
== '_');
53 /***************************************/
54 inline bool IsABlank(unsigned int ch
) {
55 return (ch
== ' ') || (ch
== 0x09) || (ch
== 0x0b) ;
58 /***************************************/
59 static void ColouriseVHDLDoc(
60 unsigned int startPos
,
63 WordList
*keywordlists
[],
66 WordList
&Keywords
= *keywordlists
[0];
67 WordList
&Operators
= *keywordlists
[1];
68 WordList
&Attributes
= *keywordlists
[2];
69 WordList
&Functions
= *keywordlists
[3];
70 WordList
&Packages
= *keywordlists
[4];
71 WordList
&Types
= *keywordlists
[5];
72 WordList
&User
= *keywordlists
[6];
74 StyleContext
sc(startPos
, length
, initStyle
, styler
);
76 for (; sc
.More(); sc
.Forward())
79 // Determine if the current state should terminate.
80 if (sc
.state
== SCE_VHDL_OPERATOR
) {
81 sc
.SetState(SCE_VHDL_DEFAULT
);
82 } else if (sc
.state
== SCE_VHDL_NUMBER
) {
83 if (!IsAWordChar(sc
.ch
) && (sc
.ch
!= '#')) {
84 sc
.SetState(SCE_VHDL_DEFAULT
);
86 } else if (sc
.state
== SCE_VHDL_IDENTIFIER
) {
87 if (!IsAWordChar(sc
.ch
) || (sc
.ch
== '.')) {
89 sc
.GetCurrentLowered(s
, sizeof(s
));
90 if (Keywords
.InList(s
)) {
91 sc
.ChangeState(SCE_VHDL_KEYWORD
);
92 } else if (Operators
.InList(s
)) {
93 sc
.ChangeState(SCE_VHDL_STDOPERATOR
);
94 } else if (Attributes
.InList(s
)) {
95 sc
.ChangeState(SCE_VHDL_ATTRIBUTE
);
96 } else if (Functions
.InList(s
)) {
97 sc
.ChangeState(SCE_VHDL_STDFUNCTION
);
98 } else if (Packages
.InList(s
)) {
99 sc
.ChangeState(SCE_VHDL_STDPACKAGE
);
100 } else if (Types
.InList(s
)) {
101 sc
.ChangeState(SCE_VHDL_STDTYPE
);
102 } else if (User
.InList(s
)) {
103 sc
.ChangeState(SCE_VHDL_USERWORD
);
105 sc
.SetState(SCE_VHDL_DEFAULT
);
107 } else if (sc
.state
== SCE_VHDL_COMMENT
|| sc
.state
== SCE_VHDL_COMMENTLINEBANG
) {
109 sc
.SetState(SCE_VHDL_DEFAULT
);
111 } else if (sc
.state
== SCE_VHDL_STRING
) {
113 if (sc
.chNext
== '\"' || sc
.chNext
== '\'' || sc
.chNext
== '\\') {
116 } else if (sc
.ch
== '\"') {
117 sc
.ForwardSetState(SCE_VHDL_DEFAULT
);
118 } else if (sc
.atLineEnd
) {
119 sc
.ChangeState(SCE_VHDL_STRINGEOL
);
120 sc
.ForwardSetState(SCE_VHDL_DEFAULT
);
124 // Determine if a new state should be entered.
125 if (sc
.state
== SCE_VHDL_DEFAULT
) {
126 if (IsADigit(sc
.ch
) || (sc
.ch
== '.' && IsADigit(sc
.chNext
))) {
127 sc
.SetState(SCE_VHDL_NUMBER
);
128 } else if (IsAWordStart(sc
.ch
)) {
129 sc
.SetState(SCE_VHDL_IDENTIFIER
);
130 } else if (sc
.Match('-', '-')) {
131 sc
.SetState(SCE_VHDL_COMMENT
);
133 } else if (sc
.Match('-', '-')) {
134 if (sc
.Match("--!")) // Nice to have a different comment style
135 sc
.SetState(SCE_VHDL_COMMENTLINEBANG
);
137 sc
.SetState(SCE_VHDL_COMMENT
);
138 } else if (sc
.ch
== '\"') {
139 sc
.SetState(SCE_VHDL_STRING
);
140 } else if (isoperator(static_cast<char>(sc
.ch
))) {
141 sc
.SetState(SCE_VHDL_OPERATOR
);
147 //=============================================================================
148 static bool IsCommentLine(int line
, Accessor
&styler
) {
149 int pos
= styler
.LineStart(line
);
150 int eol_pos
= styler
.LineStart(line
+ 1) - 1;
151 for (int i
= pos
; i
< eol_pos
; i
++) {
153 char chNext
= styler
[i
+1];
154 if ((ch
== '-') && (chNext
== '-'))
156 else if (ch
!= ' ' && ch
!= '\t')
162 //=============================================================================
164 static void FoldNoBoxVHDLDoc(
165 unsigned int startPos
,
170 // Decided it would be smarter to have the lexer have all keywords included. Therefore I
171 // don't check if the style for the keywords that I use to adjust the levels.
173 "architecture begin case component else elsif end entity generate loop package process record then "
174 "procedure function when";
178 bool foldComment
= styler
.GetPropertyInt("fold.comment", 1) != 0;
179 bool foldCompact
= styler
.GetPropertyInt("fold.compact", 1) != 0;
180 bool foldAtElse
= styler
.GetPropertyInt("fold.at.else", 1) != 0;
181 bool foldAtBegin
= styler
.GetPropertyInt("fold.at.Begin", 1) != 0;
182 bool foldAtParenthese
= styler
.GetPropertyInt("fold.at.Parenthese", 1) != 0;
183 //bool foldAtWhen = styler.GetPropertyInt("fold.at.When", 1) != 0; //< fold at when in case statements
185 int visibleChars
= 0;
186 unsigned int endPos
= startPos
+ length
;
188 int lineCurrent
= styler
.GetLine(startPos
);
189 int levelCurrent
= SC_FOLDLEVELBASE
;
191 levelCurrent
= styler
.LevelAt(lineCurrent
-1) >> 16;
192 //int levelMinCurrent = levelCurrent;
193 int levelMinCurrentElse
= levelCurrent
; //< Used for folding at 'else'
194 int levelMinCurrentBegin
= levelCurrent
; //< Used for folding at 'begin'
195 int levelNext
= levelCurrent
;
197 /***************************************/
199 char prevWord
[32] = "";
201 /***************************************/
203 // The logic for going up or down a level depends on a the previous keyword
204 // This code could be cleaned up.
207 for(j
= startPos
; j
>0; j
--)
209 char ch
= styler
.SafeGetCharAt(j
);
210 char chPrev
= styler
.SafeGetCharAt(j
-1);
211 int style
= styler
.StyleAt(j
);
212 int stylePrev
= styler
.StyleAt(j
-1);
213 if ((stylePrev
!= SCE_VHDL_COMMENT
) && (stylePrev
!= SCE_VHDL_STRING
))
215 if(IsAWordChar(chPrev
) && !IsAWordChar(ch
))
220 if ((style
!= SCE_VHDL_COMMENT
) && (style
!= SCE_VHDL_STRING
))
222 if(!IsAWordChar(chPrev
) && IsAWordStart(ch
) && (end
!= 0))
226 for(k
=0; (k
<31 ) && (k
<end
-j
+1 ); k
++) {
227 s
[k
] = static_cast<char>(tolower(styler
[j
+k
]));
231 if(keywords
.InList(s
)) {
238 for(j
=j
+static_cast<unsigned int>(strlen(prevWord
)); j
<endPos
; j
++)
240 char ch
= styler
.SafeGetCharAt(j
);
241 int style
= styler
.StyleAt(j
);
242 if ((style
!= SCE_VHDL_COMMENT
) && (style
!= SCE_VHDL_STRING
))
244 if((ch
== ';') && (strcmp(prevWord
, "end") == 0))
246 strcpy(prevWord
, ";");
251 char chNext
= styler
[startPos
];
254 int styleNext
= styler
.StyleAt(startPos
);
255 //Platform::DebugPrintf("Line[%04d] Prev[%20s] ************************* Level[%x]\n", lineCurrent+1, prevWord, levelCurrent);
257 /***************************************/
258 for (unsigned int i
= startPos
; i
< endPos
; i
++)
261 chNext
= styler
.SafeGetCharAt(i
+ 1);
262 chPrev
= styler
.SafeGetCharAt(i
- 1);
263 chNextNonBlank
= chNext
;
264 unsigned int j
= i
+1;
265 while(IsABlank(chNextNonBlank
) && j
<endPos
)
268 chNextNonBlank
= styler
.SafeGetCharAt(j
);
270 int style
= styleNext
;
271 styleNext
= styler
.StyleAt(i
+ 1);
272 bool atEOL
= (ch
== '\r' && chNext
!= '\n') || (ch
== '\n');
274 if (foldComment
&& atEOL
&& IsCommentLine(lineCurrent
, styler
))
276 if(!IsCommentLine(lineCurrent
-1, styler
) && IsCommentLine(lineCurrent
+1, styler
))
280 else if(IsCommentLine(lineCurrent
-1, styler
) && !IsCommentLine(lineCurrent
+1, styler
))
286 if ((style
== SCE_VHDL_OPERATOR
) && foldAtParenthese
)
290 } else if (ch
== ')') {
295 if ((style
!= SCE_VHDL_COMMENT
) && (style
!= SCE_VHDL_STRING
))
297 if((ch
== ';') && (strcmp(prevWord
, "end") == 0))
299 strcpy(prevWord
, ";");
302 if(!IsAWordChar(chPrev
) && IsAWordStart(ch
))
307 if(iswordchar(ch
) && !iswordchar(chNext
)) {
310 for(k
=0; (k
<31 ) && (k
<i
-lastStart
+1 ); k
++) {
311 s
[k
] = static_cast<char>(tolower(styler
[lastStart
+k
]));
315 if(keywords
.InList(s
))
318 strcmp(s
, "architecture") == 0 ||
319 strcmp(s
, "case") == 0 ||
320 strcmp(s
, "component") == 0 ||
321 strcmp(s
, "entity") == 0 ||
322 strcmp(s
, "generate") == 0 ||
323 strcmp(s
, "loop") == 0 ||
324 strcmp(s
, "package") ==0 ||
325 strcmp(s
, "process") == 0 ||
326 strcmp(s
, "record") == 0 ||
327 strcmp(s
, "then") == 0)
329 if (strcmp(prevWord
, "end") != 0)
331 if (levelMinCurrentElse
> levelNext
) {
332 levelMinCurrentElse
= levelNext
;
337 strcmp(s
, "procedure") == 0 ||
338 strcmp(s
, "function") == 0)
340 if (strcmp(prevWord
, "end") != 0) // check for "end procedure" etc.
341 { // This code checks to see if the procedure / function is a definition within a "package"
342 // rather than the actual code in the body.
343 int BracketLevel
= 0;
344 for(int j
=i
+1; j
<styler
.Length(); j
++)
346 int LocalStyle
= styler
.StyleAt(j
);
347 char LocalCh
= styler
.SafeGetCharAt(j
);
348 if(LocalCh
== '(') BracketLevel
++;
349 if(LocalCh
== ')') BracketLevel
--;
351 (BracketLevel
== 0) &&
352 (LocalStyle
!= SCE_VHDL_COMMENT
) &&
353 (LocalStyle
!= SCE_VHDL_STRING
) &&
354 !iswordchar(styler
.SafeGetCharAt(j
-1)) &&
355 styler
.Match(j
, "is") &&
356 !iswordchar(styler
.SafeGetCharAt(j
+2)))
358 if (levelMinCurrentElse
> levelNext
) {
359 levelMinCurrentElse
= levelNext
;
364 if((BracketLevel
== 0) && (LocalCh
== ';'))
371 } else if (strcmp(s
, "end") == 0) {
373 } else if(strcmp(s
, "elsif") == 0) { // elsif is followed by then so folding occurs correctly
375 } else if (strcmp(s
, "else") == 0) {
376 if(strcmp(prevWord
, "when") != 0) // ignore a <= x when y else z;
378 levelMinCurrentElse
= levelNext
- 1; // VHDL else is all on its own so just dec. the min level
381 ((strcmp(s
, "begin") == 0) && (strcmp(prevWord
, "architecture") == 0)) ||
382 ((strcmp(s
, "begin") == 0) && (strcmp(prevWord
, "function") == 0)) ||
383 ((strcmp(s
, "begin") == 0) && (strcmp(prevWord
, "procedure") == 0)))
385 levelMinCurrentBegin
= levelNext
- 1;
387 //Platform::DebugPrintf("Line[%04d] Prev[%20s] Cur[%20s] Level[%x]\n", lineCurrent+1, prevWord, s, levelCurrent);
393 int levelUse
= levelCurrent
;
395 if (foldAtElse
&& (levelMinCurrentElse
< levelUse
)) {
396 levelUse
= levelMinCurrentElse
;
398 if (foldAtBegin
&& (levelMinCurrentBegin
< levelUse
)) {
399 levelUse
= levelMinCurrentBegin
;
401 int lev
= levelUse
| levelNext
<< 16;
402 if (visibleChars
== 0 && foldCompact
)
403 lev
|= SC_FOLDLEVELWHITEFLAG
;
405 if (levelUse
< levelNext
)
406 lev
|= SC_FOLDLEVELHEADERFLAG
;
407 if (lev
!= styler
.LevelAt(lineCurrent
)) {
408 styler
.SetLevel(lineCurrent
, lev
);
410 //Platform::DebugPrintf("Line[%04d] ---------------------------------------------------- Level[%x]\n", lineCurrent+1, levelCurrent);
412 levelCurrent
= levelNext
;
413 //levelMinCurrent = levelCurrent;
414 levelMinCurrentElse
= levelCurrent
;
415 levelMinCurrentBegin
= levelCurrent
;
418 /***************************************/
419 if (!isspacechar(ch
)) visibleChars
++;
422 /***************************************/
423 // Platform::DebugPrintf("Line[%04d] ---------------------------------------------------- Level[%x]\n", lineCurrent+1, levelCurrent);
426 //=============================================================================
427 static void FoldVHDLDoc(unsigned int startPos
, int length
, int initStyle
, WordList
*[],
429 FoldNoBoxVHDLDoc(startPos
, length
, initStyle
, styler
);
432 //=============================================================================
433 static const char * const VHDLWordLists
[] = {
437 "Standard Functions",
445 LexerModule
lmVHDL(SCLEX_VHDL
, ColouriseVHDLDoc
, "vhdl", FoldVHDLDoc
, VHDLWordLists
);
449 // access after alias all architecture array assert attribute begin block body buffer bus case component
450 // configuration constant disconnect downto else elsif end entity exit file for function generate generic
451 // group guarded if impure in inertial inout is label library linkage literal loop map new next null of
452 // on open others out package port postponed procedure process pure range record register reject report
453 // return select severity shared signal subtype then to transport type unaffected units until use variable
454 // wait when while with
457 // abs and mod nand nor not or rem rol ror sla sll sra srl xnor xor
460 // left right low high ascending image value pos val succ pred leftof rightof base range reverse_range
461 // length delayed stable quiet transaction event active last_event last_active last_value driving
462 // driving_value simple_name path_name instance_name
465 // now readline read writeline write endfile resolved to_bit to_bitvector to_stdulogic to_stdlogicvector
466 // to_stdulogicvector to_x01 to_x01z to_UX01 rising_edge falling_edge is_x shift_left shift_right rotate_left
467 // rotate_right resize to_integer to_unsigned to_signed std_match to_01
470 // std ieee work standard textio std_logic_1164 std_logic_arith std_logic_misc std_logic_signed
471 // std_logic_textio std_logic_unsigned numeric_bit numeric_std math_complex math_real vital_primitives
475 // boolean bit character severity_level integer real time delay_length natural positive string bit_vector
476 // file_open_kind file_open_status line text side width std_ulogic std_ulogic_vector std_logic
477 // std_logic_vector X01 X01Z UX01 UX01Z unsigned signed