firmware/rolo.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 Randy D. Wood
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19
  20 #include "config.h"
  21 #include "lcd.h"
  22 #include "lcd-remote.h"
  23 #include "thread.h"
  24 #include "kernel.h"
  25 #include "sprintf.h"
  26 #include "button.h"
  27 #include "file.h"
  28 #include "audio.h"
  29 #include "system.h"
  30 #include "i2c.h"
  31 #include "adc.h"
  32 #include "string.h"
  33 #include "buffer.h"
  34
  35 #ifdef MI4_FORMAT
  36 #include "crc32-mi4.h"
  37 #undef FIRMWARE_OFFSET_FILE_CRC
  38 #undef FIRMWARE_OFFSET_FILE_DATA
  39 #define FIRMWARE_OFFSET_FILE_CRC     0xC
  40 #define FIRMWARE_OFFSET_FILE_DATA    0x200
  41 #endif
  42
  43 #if !defined(IRIVER_IFP7XX_SERIES) && \
  44     (CONFIG_CPU != PP5002) && (CONFIG_CPU != S3C2440)
  45 /* FIX: this doesn't work on iFP, 3rd Gen ipods */
  46
  47 #define IRQ0_EDGE_TRIGGER 0x80
  48
  49 #ifdef CPU_PP
  50 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
  51  * the new firmware is being loaded, and then jump to the start of SDRAM
  52  * TODO: Use the mailboxes built into the PP processor for this
  53  */
  54
  55 #if NUM_CORES > 1
  56 volatile unsigned char IDATA_ATTR cpu_message = 0;
  57 volatile unsigned char IDATA_ATTR cpu_reply = 0;
  58 extern int cop_idlestackbegin[];
  59
  60 void rolo_restart_cop(void) ICODE_ATTR;
  61 void rolo_restart_cop(void)
  62 {
  63     if (CURRENT_CORE == CPU)
  64     {
  65         /* There should be free thread slots aplenty */
  66         create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
  67                       0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
  68                       IF_COP(, COP));
  69         return;
  70     }
  71
  72     COP_INT_CLR = -1;
  73
  74     /* Invalidate cache */
  75     invalidate_icache();
  76
  77     /* Disable cache */
  78     CACHE_CTL = CACHE_CTL_DISABLE;
  79
  80     /* Tell the main core that we're ready to reload */
  81     cpu_reply = 1;
  82
  83     /* Wait while RoLo loads the image into SDRAM */
  84     /* TODO: Accept checksum failure gracefully */
  85     while(cpu_message != 1);
  86
  87     /* Acknowledge the CPU and then reload */
  88     cpu_reply = 2;
  89
  90     asm volatile(
  91         "mov   r0, #0x10000000   \n"
  92         "mov   pc, r0            \n"
  93     );
  94 }
  95 #endif /* NUM_CORES > 1 */
  96 #endif /* CPU_PP */
  97
  98 static void rolo_error(const char *text)
  99 {
 100     lcd_clear_display();
 101     lcd_puts(0, 0, "ROLO error:");
 102     lcd_puts_scroll(0, 1, text);
 103     lcd_update();
 104     button_get(true);
 105     button_get(true);
 106     button_get(true);
 107     lcd_stop_scroll();
 108 }
 109
 110 #if CONFIG_CPU == SH7034
 111 /* these are in assembler file "descramble.S" */
 112 extern unsigned short descramble(const unsigned char* source,
 113                                  unsigned char* dest, int length);
 114 extern void rolo_restart(const unsigned char* source, unsigned char* dest,
 115                          int length);
 116 #else
 117
 118 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
 119    targets that are low on iram, like the gigabeat F/X */
 120 void rolo_restart(const unsigned char* source, unsigned char* dest,
 121                   long length) __attribute__ ((section(".icode")));
 122 void rolo_restart(const unsigned char* source, unsigned char* dest,
 123                   long length)
 124 {
 125     long i;
 126     unsigned char* localdest = dest;
 127
 128     /* This is the equivalent of a call to memcpy() but this must be done from
 129        iram to avoid overwriting itself and we don't want to depend on memcpy()
 130        always being in iram */
 131     for(i = 0;i < length;i++)
 132         *localdest++ = *source++;
 133
 134 #if defined(CPU_COLDFIRE)
 135     asm (
 136         "movec.l %0,%%vbr    \n"
 137         "move.l  (%0)+,%%sp  \n"
 138         "move.l  (%0),%0     \n"
 139         "jmp     (%0)        \n"
 140         : : "a"(dest)
 141     );
 142 #elif defined(CPU_PP502x)
 143     CPU_INT_CLR = -1;
 144
 145     /* Flush cache */
 146     flush_icache();
 147
 148     /* Disable cache */
 149     CACHE_CTL = CACHE_CTL_DISABLE;
 150
 151     /* Reset the memory mapping registers to zero */
 152     {
 153         volatile unsigned long *mmap_reg;
 154         for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
 155             *mmap_reg = 0;
 156     }
 157
 158 #if NUM_CORES > 1
 159     /* Tell the COP it's safe to continue rebooting */
 160     cpu_message = 1;
 161
 162     /* Wait for the COP to tell us it is rebooting */
 163     while(cpu_reply != 2);
 164 #endif
 165
 166     asm volatile(
 167         "mov   r0, #0x10000000   \n"
 168         "mov   pc, r0            \n"
 169     );
 170 #endif
 171 }
 172 #endif
 173
 174 /* This is assigned in the linker control file */
 175 extern unsigned long loadaddress;
 176
 177 /***************************************************************************
 178  *
 179  * Name: rolo_load_app(char *filename,int scrambled)
 180  * Filename must be a fully defined filename including the path and extension
 181  *
 182  ***************************************************************************/
 183 int rolo_load(const char* filename)
 184 {
 185     int fd;
 186     long length;
 187 #if defined(CPU_COLDFIRE) || defined(CPU_ARM)
 188 #if !defined(MI4_FORMAT)
 189     int i;
 190 #endif
 191     unsigned long checksum,file_checksum;
 192 #else
 193     long file_length;
 194     unsigned short checksum,file_checksum;
 195 #endif
 196     unsigned char* ramstart = (void*)&loadaddress;
 197
 198     lcd_clear_display();
 199     lcd_puts(0, 0, "ROLO...");
 200     lcd_puts(0, 1, "Loading");
 201     lcd_update();
 202 #ifdef HAVE_REMOTE_LCD
 203     lcd_remote_clear_display();
 204     lcd_remote_puts(0, 0, "ROLO...");
 205     lcd_remote_puts(0, 1, "Loading");
 206     lcd_remote_update();
 207 #endif
 208
 209     audio_stop();
 210
 211     fd = open(filename, O_RDONLY);
 212     if(-1 == fd) {
 213         rolo_error("File not found");
 214         return -1;
 215     }
 216
 217     length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
 218
 219 #if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320)
 220     /* Read and save checksum */
 221     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 222     if (read(fd, &file_checksum, 4) != 4) {
 223         rolo_error("Error Reading checksum");
 224         return -1;
 225     }
 226
 227 #if !defined(MI4_FORMAT)
 228     /* Rockbox checksums are big-endian */
 229     file_checksum = betoh32(file_checksum);
 230 #endif
 231
 232 #if defined(CPU_PP) && NUM_CORES > 1
 233     lcd_puts(0, 2, "Waiting for coprocessor...");
 234     lcd_update();
 235     rolo_restart_cop();
 236     /* Wait for COP to be in safe code */
 237     while(cpu_reply != 1);
 238     lcd_puts(0, 2, "                          ");
 239     lcd_update();
 240 #endif
 241
 242     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 243
 244     if (read(fd, audiobuf, length) != length) {
 245         rolo_error("Error Reading File");
 246         return -1;
 247     }
 248
 249 #ifdef MI4_FORMAT
 250     /* Check CRC32 to see if we have a valid file */
 251     chksum_crc32gentab();
 252     checksum = chksum_crc32 (audiobuf, length);
 253 #else
 254     checksum = MODEL_NUMBER;
 255
 256     for(i = 0;i < length;i++) {
 257         checksum += audiobuf[i];
 258     }
 259 #endif
 260
 261     /* Verify checksum against file header */
 262     if (checksum != file_checksum) {
 263         rolo_error("Checksum Error");
 264         return -1;
 265     }
 266
 267     lcd_puts(0, 1, "Executing");
 268     lcd_update();
 269 #ifdef HAVE_REMOTE_LCD
 270     lcd_remote_puts(0, 1, "Executing");
 271     lcd_remote_update();
 272 #endif
 273     adc_close();
 274
 275 #ifdef CPU_ARM
 276     disable_fiq();
 277 #endif
 278     set_irq_level(DISABLE_INTERRUPTS);
 279
 280 #elif CONFIG_CPU == SH7034
 281     /* Read file length from header and compare to real file length */
 282     lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
 283     if(read(fd, &file_length, 4) != 4) {
 284         rolo_error("Error Reading File Length");
 285         return -1;
 286     }
 287     if (length != file_length) {
 288         rolo_error("File length mismatch");
 289         return -1;
 290     }
 291
 292     /* Read and save checksum */
 293     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 294     if (read(fd, &file_checksum, 2) != 2) {
 295         rolo_error("Error Reading checksum");
 296         return -1;
 297     }
 298     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 299
 300     /* verify that file can be read and descrambled */
 301     if ((audiobuf + (2*length)+4) >= audiobufend) {
 302         rolo_error("Not enough room to load file");
 303         return -1;
 304     }
 305
 306     if (read(fd, &audiobuf[length], length) != (int)length) {
 307         rolo_error("Error Reading File");
 308         return -1;
 309     }
 310
 311     lcd_puts(0, 1, "Descramble");
 312     lcd_update();
 313
 314     checksum = descramble(audiobuf + length, audiobuf, length);
 315
 316     /* Verify checksum against file header */
 317     if (checksum != file_checksum) {
 318         rolo_error("Checksum Error");
 319         return -1;
 320     }
 321
 322     lcd_puts(0, 1, "Executing     ");
 323     lcd_update();
 324
 325     set_irq_level(HIGHEST_IRQ_LEVEL);
 326
 327     /* Calling these 2 initialization routines was necessary to get the
 328        the origional Archos version of the firmware to load and execute. */
 329     system_init();           /* Initialize system for restart */
 330     i2c_init();              /* Init i2c bus - it seems like a good idea */
 331     ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
 332     TSTR = 0xE0;             /* disable all timers */
 333     /* model-specific de-init, needed when flashed */
 334     /* Especially the Archos software is picky about this */
 335 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
 336     defined(ARCHOS_FMRECORDER)
 337     PAIOR = 0x0FA0;
 338 #endif
 339 #endif
 340     rolo_restart(audiobuf, ramstart, length);
 341
 342     return 0; /* this is never reached */
 343 }
 344 #else  /* !defined(IRIVER_IFP7XX_SERIES) */
 345 int rolo_load(const char* filename)
 346 {
 347     /* dummy */
 348     (void)filename;
 349     return 0;
 350 }
 351
 352 #endif /* !defined(IRIVER_IFP7XX_SERIES) */