1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2008 Rob Purchase
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
18 ****************************************************************************/
20 #include "ata-target.h"
26 /* The NAND driver is currently work-in-progress and as such contains
27 some dead code and debug stuff, such as the next few lines. */
33 /* #define USE_TCC_LPT */
34 /* #define USE_ECC_CORRECTION */
36 /* for compatibility */
37 int ata_spinup_time
= 0;
39 long last_disk_activity
= -1;
41 /** static, private data **/
42 static bool initialized
= false;
44 static struct mutex ata_mtx SHAREDBSS_ATTR
;
46 #define SECTOR_SIZE 512
48 /* TCC780x NAND Flash Controller */
50 #define NFC_CMD (*(volatile unsigned long *)0xF0053000)
51 #define NFC_SADDR (*(volatile unsigned long *)0xF005300C)
52 #define NFC_SDATA (*(volatile unsigned long *)0xF0053040)
53 #define NFC_WDATA (*(volatile unsigned long *)0xF0053010)
54 #define NFC_CTRL (*(volatile unsigned long *)0xF0053050)
55 #define NFC_16BIT (1<<26)
56 #define NFC_CS0 (1<<23)
57 #define NFC_CS1 (1<<22)
58 #define NFC_READY (1<<20)
59 #define NFC_IREQ (*(volatile unsigned long *)0xF0053060)
60 #define NFC_RST (*(volatile unsigned long *)0xF0053064)
62 /* TCC780x ECC Controller */
64 #define ECC_CTRL (*(volatile unsigned long *)0xF005B000)
65 #define ECC_M4EN (1<<6)
66 #define ECC_ENC (1<<27)
67 #define ECC_READY (1<<26)
68 #define ECC_BASE (*(volatile unsigned long *)0xF005B004)
69 #define ECC_CLR (*(volatile unsigned long *)0xF005B00C)
70 #define ECC_MLC0W (*(volatile unsigned long *)0xF005B030)
71 #define ECC_MLC1W (*(volatile unsigned long *)0xF005B034)
72 #define ECC_MLC2W (*(volatile unsigned long *)0xF005B038)
73 #define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050)
74 #define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060)
75 #define ECC_ERR (*(volatile unsigned long *)0xF005B070)
79 #define NAND_GPIO_SET(n) GPIOB_SET = n
80 #define NAND_GPIO_CLEAR(n) GPIOB_CLEAR = n
81 #define NAND_GPIO_OUT_EN(n) GPIOB_DIR |= n
83 #define WE_GPIO_BIT (1<<19) /* Write Enable */
84 #define CS_GPIO_BIT (1<<21) /* Chip Select (4 banks when used with NFC_CSx) */
86 /* Chip characteristics, initialised by nand_get_chip_info() */
88 static int page_size
= 0;
89 static int spare_size
= 0;
90 static int pages_per_block
= 0;
91 static int blocks_per_bank
= 0;
92 static int pages_per_bank
= 0;
93 static int row_cycles
= 0;
94 static int col_cycles
= 0;
95 static int total_banks
= 0;
96 static int sectors_per_page
= 0;
97 static int bytes_per_segment
= 0;
98 static int sectors_per_segment
= 0;
99 static int segments_per_bank
= 0;
101 /* Maximum values for static buffers */
103 #define MAX_PAGE_SIZE 4096
104 #define MAX_SPARE_SIZE 128
105 #define MAX_BLOCKS_PER_BANK 8192
106 #define MAX_PAGES_PER_BLOCK 128
107 #define BLOCKS_PER_SEGMENT 4
110 #define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / BLOCKS_PER_SEGMENT)
112 /* Logical/Physical translation table */
119 static struct lpt_entry lpt_lookup
[MAX_SEGMENTS
];
123 #define MAX_WRITE_CACHES 8
130 short page_map
[MAX_PAGES_PER_BLOCK
* BLOCKS_PER_SEGMENT
];
132 static struct write_cache write_caches
[MAX_WRITE_CACHES
];
134 static int write_caches_in_use
= 0;
137 /* Read buffer (used for reading LPT blocks only) */
138 static unsigned char page_buf
[MAX_PAGE_SIZE
+ MAX_SPARE_SIZE
]
139 __attribute__ ((aligned (4)));
142 #ifdef USE_ECC_CORRECTION
143 static unsigned int ecc_sectors_corrected
= 0;
144 static unsigned int ecc_bits_corrected
= 0;
145 static unsigned int ecc_fail_count
= 0;
149 /* Conversion functions */
151 static inline int phys_segment_to_page_addr(int phys_segment
, int page_in_seg
)
153 int page_addr
= phys_segment
* pages_per_block
* 2;
157 /* Data is located in block+1 */
158 page_addr
+= pages_per_block
;
163 /* Data is located in second plane */
164 page_addr
+= (blocks_per_bank
/2) * pages_per_block
;
167 page_addr
+= page_in_seg
/4;
173 /* NAND physical access functions */
175 static void nand_chip_select(int bank
)
179 /* Disable both chip selects */
180 NAND_GPIO_CLEAR(CS_GPIO_BIT
);
181 NFC_CTRL
|= NFC_CS0
| NFC_CS1
;
185 /* NFC chip select */
192 NFC_CTRL
&= ~NFC_CS0
;
198 NFC_CTRL
&= ~NFC_CS1
;
201 /* Secondary chip select */
203 NAND_GPIO_SET(CS_GPIO_BIT
);
205 NAND_GPIO_CLEAR(CS_GPIO_BIT
);
210 static void nand_read_id(int bank
, unsigned char* id_buf
)
214 /* Enable NFC bus clock */
217 /* Reset NAND controller */
220 /* Set slow cycle timings since the chip is as yet unidentified */
221 NFC_CTRL
= (NFC_CTRL
&~0xFFF) | 0x353;
223 nand_chip_select(bank
);
225 /* Set write protect */
226 NAND_GPIO_CLEAR(WE_GPIO_BIT
);
231 /* Set 8-bit data width */
232 NFC_CTRL
&= ~NFC_16BIT
;
234 /* Read ID command, single address cycle */
238 /* Read the 5 chip ID bytes */
239 for (i
= 0; i
< 5; i
++)
241 id_buf
[i
] = NFC_SDATA
& 0xFF;
244 nand_chip_select(-1);
246 /* Disable NFC bus clock */
247 BCLKCTR
&= ~DEV_NAND
;
251 static void nand_read_uid(int bank
, unsigned int* uid_buf
)
255 /* Enable NFC bus clock */
258 /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
259 NFC_CTRL
= (NFC_CTRL
&~0xFFF) | 0x131;
261 nand_chip_select(bank
);
263 /* Set write protect */
264 NAND_GPIO_CLEAR(WE_GPIO_BIT
);
266 /* Set 8-bit data width */
267 NFC_CTRL
&= ~NFC_16BIT
;
269 /* Undocumented (SAMSUNG specific?) commands set the chip into a
270 special mode allowing a normally-hidden UID block to be read. */
277 /* Write row/column address */
278 for (i
= 0; i
< col_cycles
; i
++) NFC_SADDR
= 0;
279 for (i
= 0; i
< row_cycles
; i
++) NFC_SADDR
= 0;
284 /* Wait until complete */
285 while (!(NFC_CTRL
& NFC_READY
)) {};
287 /* Copy data to buffer (data repeats after 8 words) */
288 for (i
= 0; i
< 8; i
++)
290 uid_buf
[i
] = NFC_WDATA
;
293 /* Reset the chip back to normal mode */
296 nand_chip_select(-1);
298 /* Disable NFC bus clock */
299 BCLKCTR
&= ~DEV_NAND
;
303 static void nand_read_raw(int bank
, int row
, int column
, int size
, void* buf
)
307 /* Enable NFC bus clock */
310 /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
311 NFC_CTRL
= (NFC_CTRL
&~0xFFF) | 0x131;
313 nand_chip_select(bank
);
315 /* Set write protect */
316 NAND_GPIO_CLEAR(WE_GPIO_BIT
);
318 /* Set 8-bit data width */
319 NFC_CTRL
&= ~NFC_16BIT
;
324 /* Write column address */
325 for (i
= 0; i
< col_cycles
; i
++)
327 NFC_SADDR
= column
& 0xFF;
328 column
= column
>> 8;
331 /* Write row address */
332 for (i
= 0; i
< row_cycles
; i
++)
334 NFC_SADDR
= row
& 0xFF;
338 /* End of read command */
341 /* Wait until complete */
342 while (!(NFC_CTRL
& NFC_READY
)) {};
344 /* Read data into page buffer */
345 if (((unsigned int)buf
& 3) || (size
& 3))
347 /* Use byte copy since either the buffer or size are not word-aligned */
348 /* TODO: Byte copy only where necessary (use words for mid-section) */
349 for (i
= 0; i
< size
; i
++)
351 ((unsigned char*)buf
)[i
] = NFC_SDATA
;
356 /* Use 4-byte copy as buffer and size are both word-aligned */
357 for (i
= 0; i
< (size
/4); i
++)
359 ((unsigned int*)buf
)[i
] = NFC_WDATA
;
363 nand_chip_select(-1);
365 /* Disable NFC bus clock */
366 BCLKCTR
&= ~DEV_NAND
;
370 static void nand_get_chip_info(void)
373 unsigned char manuf_id
;
374 unsigned char id_buf
[8];
376 /* Read chip id from bank 0 */
377 nand_read_id(0, id_buf
);
379 manuf_id
= id_buf
[0];
383 case 0xEC: /* SAMSUNG */
385 switch(id_buf
[1]) /* Chip Id */
387 case 0xD5: /* K9LAG08UOM */
391 pages_per_block
= 128;
392 blocks_per_bank
= 8192;
399 case 0xD7: /* K9LBG08UOM */
403 pages_per_block
= 128;
404 blocks_per_bank
= 8192;
416 panicf("Unknown NAND: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
417 id_buf
[0],id_buf
[1],id_buf
[2],id_buf
[3],id_buf
[4]);
420 pages_per_bank
= blocks_per_bank
* pages_per_block
;
421 segments_per_bank
= blocks_per_bank
/ BLOCKS_PER_SEGMENT
;
422 bytes_per_segment
= page_size
* pages_per_block
* BLOCKS_PER_SEGMENT
;
423 sectors_per_page
= page_size
/ SECTOR_SIZE
;
424 sectors_per_segment
= bytes_per_segment
/ SECTOR_SIZE
;
426 /* Establish how many banks are present */
427 nand_read_id(1, id_buf
);
429 if (id_buf
[0] == manuf_id
)
431 /* Bank 1 is populated, now check if banks 2/3 are valid */
432 nand_read_id(2, id_buf
);
434 if (id_buf
[0] == manuf_id
)
436 /* Bank 2 returned matching id - check if 2/3 are shadowing 0/1 */
437 unsigned int uid_buf0
[8];
438 unsigned int uid_buf2
[8];
440 nand_read_uid(0, uid_buf0
);
441 nand_read_uid(2, uid_buf2
);
443 if (memcmp(uid_buf0
, uid_buf2
, 32) == 0)
445 /* UIDs match, assume banks 2/3 are shadowing 0/1 */
450 /* UIDs differ, assume banks 2/3 are valid */
456 /* Bank 2 returned differing id - assume 2/3 are junk */
462 /* Bank 1 returned differing id - assume it is junk */
469 1. "BMP" tag at block 0, page 0, offset <page_size> [always present]
470 2. Byte at <page_size>+4 contains number of banks [or 0xff if 1 bank]
472 If this is confirmed for all D2s we can simplify the above code and
473 also remove the icky nand_read_uid() function.
476 nand_read_raw(0, /* bank */
478 page_size
, /* offset */
481 if (strncmp(id_buf
, "BMP", 3)) panicf("BMP tag not present");
485 if (id_buf
[4] != total_banks
) panicf("BMPM total_banks mismatch");
490 static bool nand_read_sector_of_phys_page(int bank
, int page
,
491 int sector
, void* buf
)
493 #ifndef USE_ECC_CORRECTION
494 nand_read_raw(bank
, page
,
495 sector
* (SECTOR_SIZE
+16),
499 /* Not yet implemented */
505 static bool nand_read_sector_of_phys_segment(int bank
, int phys_segment
,
506 int page_in_seg
, int sector
,
509 int page_addr
= phys_segment_to_page_addr(phys_segment
,
512 return nand_read_sector_of_phys_page(bank
, page_addr
, sector
, buf
);
516 static bool nand_read_sector_of_logical_segment(int log_segment
, int sector
,
519 int page_in_segment
= sector
/ sectors_per_page
;
520 int sector_in_page
= sector
% sectors_per_page
;
522 int bank
= lpt_lookup
[log_segment
].bank
;
523 int phys_segment
= lpt_lookup
[log_segment
].phys_segment
;
525 /* Check if any of the write caches refer to this segment/page.
526 If present we need to read the cached page instead. */
531 while (!found
&& cache_num
< write_caches_in_use
)
533 if (write_caches
[cache_num
].log_segment
== log_segment
534 && write_caches
[cache_num
].page_map
[page_in_segment
] != -1)
537 bank
= write_caches
[cache_num
].bank
;
538 phys_segment
= write_caches
[cache_num
].phys_segment
;
539 page_in_segment
= write_caches
[cache_num
].page_map
[page_in_segment
];
547 return nand_read_sector_of_phys_segment(bank
, phys_segment
,
549 sector_in_page
, buf
);
555 /* Reading the LPT from NAND is not yet fully understood. This code is therefore
556 not enabled by default, as it gives much worse results than the bank-scanning
557 approach currently used. */
559 static void read_lpt_block(int bank
, int phys_segment
)
561 int page
= 1; /* table starts at page 1 of segment */
564 struct lpt_entry
* lpt_ptr
= NULL
;
566 while (cont
&& page
< pages_per_block
)
569 unsigned int* int_buf
= (int*)page_buf
;
571 nand_read_sector_of_phys_segment(bank
, phys_segment
,
572 page
, 0, /* only sector 0 is used */
575 /* Find out which chunk of the LPT table this section contains.
576 Do this by reading the logical segment number of entry 0 */
579 int first_bank
= int_buf
[0] / segments_per_bank
;
580 int first_phys_segment
= int_buf
[0] % segments_per_bank
;
582 unsigned char spare_buf
[16];
584 nand_read_raw(first_bank
,
585 phys_segment_to_page_addr(first_phys_segment
, 0),
586 SECTOR_SIZE
, /* offset */
589 int first_log_segment
= (spare_buf
[6] << 8) | spare_buf
[7];
591 lpt_ptr
= &lpt_lookup
[first_log_segment
];
593 #if defined(BOOTLOADER) && 1
594 printf("lpt @ %lx:%lx (ls:%lx)",
595 first_bank
, first_phys_segment
, first_log_segment
);
599 while (cont
&& (i
< SECTOR_SIZE
/4))
601 if (int_buf
[i
] != 0xFFFFFFFF)
603 lpt_ptr
->bank
= int_buf
[i
] / segments_per_bank
;
604 lpt_ptr
->phys_segment
= int_buf
[i
] % segments_per_bank
;
615 #endif /* USE_TCC_LPT */
618 static void read_write_cache_segment(int bank
, int phys_segment
)
621 unsigned char spare_buf
[16];
623 if (write_caches_in_use
== MAX_WRITE_CACHES
)
624 panicf("Max NAND write caches reached");
626 write_caches
[write_caches_in_use
].bank
= bank
;
627 write_caches
[write_caches_in_use
].phys_segment
= phys_segment
;
629 /* Loop over each page in the phys segment (from page 1 onwards).
630 Read spare for 1st sector, store location of page in array. */
631 for (page
= 1; page
< pages_per_block
* BLOCKS_PER_SEGMENT
; page
++)
633 unsigned short cached_page
;
634 unsigned short log_segment
;
636 nand_read_raw(bank
, phys_segment_to_page_addr(phys_segment
, page
),
637 SECTOR_SIZE
, /* offset to first sector's spare */
640 cached_page
= (spare_buf
[3] << 8) | spare_buf
[2]; /* why does endian */
641 log_segment
= (spare_buf
[6] << 8) | spare_buf
[7]; /* -ness differ? */
643 if (cached_page
!= 0xFFFF)
645 write_caches
[write_caches_in_use
].log_segment
= log_segment
;
646 write_caches
[write_caches_in_use
].page_map
[cached_page
] = page
;
649 write_caches_in_use
++;
653 int ata_read_sectors(IF_MV2(int drive
,) unsigned long start
, int incount
,
656 #ifdef HAVE_MULTIVOLUME
657 (void)drive
; /* unused for now */
659 mutex_lock(&ata_mtx
);
664 int segment
= start
/ sectors_per_segment
;
665 int secmod
= start
% sectors_per_segment
;
667 while (incount
> 0 && secmod
< sectors_per_segment
)
669 if (!nand_read_sector_of_logical_segment(segment
, secmod
, inbuf
))
671 mutex_unlock(&ata_mtx
);
675 inbuf
+= SECTOR_SIZE
;
683 mutex_unlock(&ata_mtx
);
689 mutex_unlock(&ata_mtx
);
693 int ata_write_sectors(IF_MV2(int drive
,) unsigned long start
, int count
,
696 #ifdef HAVE_MULTIVOLUME
697 (void)drive
; /* unused for now */
700 /* TODO: Learn more about TNFTL and implement this one day... */
707 void ata_spindown(int seconds
)
713 bool ata_disk_is_active(void)
729 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
730 int ata_hard_reset(void)
736 int ata_soft_reset(void)
742 void ata_enable(bool on
)
744 /* null - flash controller is enabled/disabled as needed. */
750 int i
, bank
, phys_segment
;
751 unsigned char spare_buf
[16];
753 if (initialized
) return 0;
755 /* Get chip characteristics and number of banks */
756 nand_get_chip_info();
758 for (i
= 0; i
< MAX_SEGMENTS
; i
++)
760 lpt_lookup
[i
].bank
= -1;
761 lpt_lookup
[i
].phys_segment
= -1;
764 write_caches_in_use
= 0;
766 for (i
= 0; i
< MAX_WRITE_CACHES
; i
++)
770 write_caches
[i
].log_segment
= -1;
771 write_caches
[i
].bank
= -1;
772 write_caches
[i
].phys_segment
= -1;
774 for (page
= 0; page
< MAX_PAGES_PER_BLOCK
* 4; page
++)
776 write_caches
[i
].page_map
[page
] = -1;
780 /* Set GPIO direction for chip select & write protect */
781 NAND_GPIO_OUT_EN(CS_GPIO_BIT
| WE_GPIO_BIT
);
783 /* Scan banks to build up block translation table */
784 for (bank
= 0; bank
< total_banks
; bank
++)
786 for (phys_segment
= 0; phys_segment
< segments_per_bank
; phys_segment
++)
788 /* Read spare bytes from first sector of each segment */
789 nand_read_raw(bank
, phys_segment_to_page_addr(phys_segment
, 0),
790 SECTOR_SIZE
, /* offset */
793 switch (spare_buf
[4]) /* block type */
798 /* Log->Phys Translation table (for Main data area) */
799 read_lpt_block(bank
, phys_segment
);
805 /* Main data area segment */
806 unsigned short segment
= (spare_buf
[6] << 8) | spare_buf
[7];
808 if (segment
< MAX_SEGMENTS
)
810 lpt_lookup
[segment
].bank
= bank
;
811 lpt_lookup
[segment
].phys_segment
= phys_segment
;
819 /* Recently-written page data (for Main data area) */
820 read_write_cache_segment(bank
, phys_segment
);
828 /* Scan banks a second time as 0x13 segments appear to override 0x17 */
829 for (bank
= 0; bank
< total_banks
; bank
++)
831 for (phys_segment
= 0; phys_segment
< segments_per_bank
; phys_segment
++)
833 /* Read spare bytes from first sector of each segment */
834 nand_read_raw(bank
, phys_segment_to_page_addr(phys_segment
, 0),
835 SECTOR_SIZE
, /* offset */
838 switch (spare_buf
[4]) /* block type */
842 /* Main data area segment */
843 unsigned short segment
= (spare_buf
[6] << 8) | spare_buf
[7];
845 if (segment
< MAX_SEGMENTS
)
847 /* 0x17 seems to override 0x13, so store in our LPT */
848 lpt_lookup
[segment
].bank
= bank
;
849 lpt_lookup
[segment
].phys_segment
= phys_segment
;
864 /* TEMP: This will return junk, it's here for compilation only */
865 unsigned short* ata_get_identify(void)
867 return (unsigned short*)0x21000000; /* Unused DRAM */