firmware/drivers/ata_mmc.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2004 by Jens Arnold
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #include <stdbool.h>
  22 #include "ata.h"
  23 #include "ata_mmc.h"
  24 #include "ata_idle_notify.h"
  25 #include "kernel.h"
  26 #include "thread.h"
  27 #include "led.h"
  28 #include "sh7034.h"
  29 #include "system.h"
  30 #include "debug.h"
  31 #include "panic.h"
  32 #include "usb.h"
  33 #include "power.h"
  34 #include "string.h"
  35 #include "hwcompat.h"
  36 #include "adc.h"
  37 #include "bitswap.h"
  38 #include "disk.h" /* for mount/unmount */
  39
  40 #define SECTOR_SIZE     512
  41 #define MAX_BLOCK_SIZE  2048
  42
  43 /* Command definitions */
  44 #define CMD_GO_IDLE_STATE        0x40  /* R1 */
  45 #define CMD_SEND_OP_COND         0x41  /* R1 */
  46 #define CMD_SEND_CSD             0x49  /* R1 */
  47 #define CMD_SEND_CID             0x4a  /* R1 */
  48 #define CMD_STOP_TRANSMISSION    0x4c  /* R1 */
  49 #define CMD_SEND_STATUS          0x4d  /* R2 */
  50 #define CMD_SET_BLOCKLEN         0x50  /* R1 */
  51 #define CMD_READ_SINGLE_BLOCK    0x51  /* R1 */
  52 #define CMD_READ_MULTIPLE_BLOCK  0x52  /* R1 */
  53 #define CMD_WRITE_BLOCK          0x58  /* R1b */
  54 #define CMD_WRITE_MULTIPLE_BLOCK 0x59  /* R1b */
  55 #define CMD_READ_OCR             0x7a  /* R3 */
  56
  57 /* Response formats:
  58    R1  = single byte, msb=0, various error flags
  59    R1b = R1 + busy token(s)
  60    R2  = 2 bytes (1st byte identical to R1), additional flags
  61    R3  = 5 bytes (R1 + OCR register)
  62 */
  63
  64 #define R1_PARAMETER_ERR 0x40
  65 #define R1_ADDRESS_ERR   0x20
  66 #define R1_ERASE_SEQ_ERR 0x10
  67 #define R1_COM_CRC_ERR   0x08
  68 #define R1_ILLEGAL_CMD   0x04
  69 #define R1_ERASE_RESET   0x02
  70 #define R1_IN_IDLE_STATE 0x01
  71
  72 #define R2_OUT_OF_RANGE  0x80
  73 #define R2_ERASE_PARAM   0x40
  74 #define R2_WP_VIOLATION  0x20
  75 #define R2_CARD_ECC_FAIL 0x10
  76 #define R2_CC_ERROR      0x08
  77 #define R2_ERROR         0x04
  78 #define R2_ERASE_SKIP    0x02
  79 #define R2_CARD_LOCKED   0x01
  80
  81 /* Data start tokens */
  82
  83 #define DT_START_BLOCK               0xfe
  84 #define DT_START_WRITE_MULTIPLE      0xfc
  85 #define DT_STOP_TRAN                 0xfd
  86
  87 /* for compatibility */
  88 int ata_spinup_time = 0;
  89 long last_disk_activity = -1;
  90
  91 /* private variables */
  92
  93 static struct mutex mmc_mutex;
  94
  95 #ifdef HAVE_HOTSWAP
  96 static bool mmc_monitor_enabled = true;
  97 static long mmc_stack[((DEFAULT_STACK_SIZE*2) + 0x800)/sizeof(long)];
  98 #else
  99 static long mmc_stack[(DEFAULT_STACK_SIZE*2)/sizeof(long)];
 100 #endif
 101 static const char mmc_thread_name[] = "mmc";
 102 static struct event_queue mmc_queue;
 103 static bool initialized = false;
 104 static bool new_mmc_circuit;
 105
 106 static enum {
 107     MMC_UNKNOWN,
 108     MMC_UNTOUCHED,
 109     MMC_TOUCHED
 110 } mmc_status = MMC_UNKNOWN;
 111
 112 static enum {
 113     SER_POLL_WRITE,
 114     SER_POLL_READ,
 115     SER_DISABLED
 116 } serial_mode;
 117
 118 static const unsigned char dummy[] = {
 119     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
 120 };
 121
 122 struct block_cache_entry {
 123     bool inuse;
 124 #ifdef HAVE_MULTIVOLUME
 125     int drive;
 126 #endif
 127     unsigned long blocknum;
 128     unsigned char data[MAX_BLOCK_SIZE+4];
 129     /* include start token, dummy crc, and an extra byte at the start
 130      * to keep the data word aligned. */
 131 };
 132
 133 /* 2 buffers used alternatively for writing, and also for reading
 134  * and sub-block writing if block size > sector size */
 135 #define NUMCACHES 2
 136 static struct block_cache_entry block_cache[NUMCACHES];
 137 static int current_cache = 0;
 138
 139 /* globals for background copy and swap */
 140 static const unsigned char *bcs_src = NULL;
 141 static unsigned char *bcs_dest = NULL;
 142 static unsigned long bcs_len = 0;
 143
 144 static tCardInfo card_info[2];
 145 #ifndef HAVE_MULTIVOLUME
 146 static int current_card = 0;
 147 #endif
 148 static bool last_mmc_status = false;
 149 static int countdown;  /* for mmc switch debouncing */
 150 static bool usb_activity; /* monitoring the USB bridge */
 151 static long last_usb_activity;
 152
 153 /* private function declarations */
 154
 155 static int select_card(int card_no);
 156 static void deselect_card(void);
 157 static void setup_sci1(int bitrate_register);
 158 static void set_sci1_poll_read(void);
 159 static void write_transfer(const unsigned char *buf, int len)
 160             __attribute__ ((section(".icode")));
 161 static void read_transfer(unsigned char *buf, int len)
 162             __attribute__ ((section(".icode")));
 163 static unsigned char poll_byte(long timeout);
 164 static unsigned char poll_busy(long timeout);
 165 static int send_cmd(int cmd, unsigned long parameter, unsigned char *response);
 166 static int receive_cxd(unsigned char *buf);
 167 static int initialize_card(int card_no);
 168 static void bg_copy_swap(void);
 169 static int receive_block(unsigned char *inbuf, int size, long timeout);
 170 static int send_block(int size, unsigned char start_token, long timeout);
 171 static int cache_block(IF_MV2(int drive,) unsigned long blocknum,
 172                        int size, long timeout);
 173 static void mmc_tick(void);
 174
 175 /* implementation */
 176
 177 void mmc_enable_int_flash_clock(bool on)
 178 {
 179     /* Internal flash clock is enabled by setting PA12 high with the new
 180      * clock circuit, and by setting it low with the old clock circuit */
 181     if (on ^ new_mmc_circuit)
 182         and_b(~0x10, &PADRH);     /* clear clock gate PA12 */
 183     else
 184         or_b(0x10, &PADRH);       /* set clock gate PA12 */
 185 }
 186
 187 static int select_card(int card_no)
 188 {
 189     mutex_lock(&mmc_mutex);
 190     led(true);
 191     last_disk_activity = current_tick;
 192
 193     if (!card_info[card_no].initialized)
 194     {
 195         setup_sci1(7); /* Initial rate: 375 kbps (need <= 400 per mmc specs) */
 196         write_transfer(dummy, 10); /* allow the card to synchronize */
 197         while (!(SSR1 & SCI_TEND));
 198     }
 199
 200     if (card_no == 0)             /* internal */
 201         and_b(~0x04, &PADRH);     /* assert CS */
 202     else                          /* external */
 203         and_b(~0x02, &PADRH);     /* assert CS */
 204
 205     if (card_info[card_no].initialized)
 206     {
 207         setup_sci1(card_info[card_no].bitrate_register);
 208         return 0;
 209     }
 210     else
 211     {
 212         return initialize_card(card_no);
 213     }
 214 }
 215
 216 static void deselect_card(void)
 217 {
 218     while (!(SSR1 & SCI_TEND));   /* wait for end of transfer */
 219     or_b(0x06, &PADRH);           /* deassert CS (both cards) */
 220
 221     led(false);
 222     mutex_unlock(&mmc_mutex);
 223     last_disk_activity = current_tick;
 224 }
 225
 226 static void setup_sci1(int bitrate_register)
 227 {
 228     while (!(SSR1 & SCI_TEND));   /* wait for end of transfer */
 229
 230     SCR1 = 0;                     /* disable serial port */
 231     SMR1 = SYNC_MODE;             /* no prescale */
 232     BRR1 = bitrate_register;
 233     SSR1 = 0;
 234
 235     SCR1 = SCI_TE;                /* enable transmitter */
 236     serial_mode = SER_POLL_WRITE;
 237 }
 238
 239 static void set_sci1_poll_read(void)
 240 {
 241     while (!(SSR1 & SCI_TEND));   /* wait for end of transfer */
 242     SCR1 = 0;                     /* disable transmitter (& receiver) */
 243     SCR1 = (SCI_TE|SCI_RE);       /* re-enable transmitter & receiver */
 244     while (!(SSR1 & SCI_TEND));   /* wait for SCI init completion (!) */
 245     serial_mode = SER_POLL_READ;
 246     TDR1 = 0xFF;                  /* send do-nothing while reading */
 247 }
 248
 249 static void write_transfer(const unsigned char *buf, int len)
 250 {
 251     const unsigned char *buf_end = buf + len;
 252     register unsigned char data;
 253
 254     if (serial_mode != SER_POLL_WRITE)
 255     {
 256         while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
 257         SCR1 = 0;                   /* disable transmitter & receiver */
 258         SSR1 = 0;                   /* clear all flags */
 259         SCR1 = SCI_TE;              /* enable transmitter only */
 260         serial_mode = SER_POLL_WRITE;
 261     }
 262
 263     while (buf < buf_end)
 264     {
 265         data = fliptable[(signed char)(*buf++)]; /* bitswap */
 266         while (!(SSR1 & SCI_TDRE));              /* wait for end of transfer */
 267         TDR1 = data;                             /* write byte */
 268         SSR1 = 0;                                /* start transmitting */
 269     }
 270 }
 271
 272 /* don't call this with len == 0 */
 273 static void read_transfer(unsigned char *buf, int len)
 274 {
 275     unsigned char *buf_end = buf + len - 1;
 276     register signed char data;
 277
 278     if (serial_mode != SER_POLL_READ)
 279         set_sci1_poll_read();
 280
 281     SSR1 = 0;                     /* start receiving first byte */
 282     while (buf < buf_end)
 283     {
 284         while (!(SSR1 & SCI_RDRF)); /* wait for data */
 285         data = RDR1;                /* read byte */
 286         SSR1 = 0;                   /* start receiving */
 287         *buf++ = fliptable[data];   /* bitswap */
 288     }
 289     while (!(SSR1 & SCI_RDRF));     /* wait for last byte */
 290     *buf = fliptable[(signed char)(RDR1)]; /* read & bitswap */
 291 }
 292
 293 /* returns 0xFF on timeout, timeout is in bytes */
 294 static unsigned char poll_byte(long timeout)
 295 {
 296     long i;
 297     unsigned char data = 0;       /* stop the compiler complaining */
 298
 299     if (serial_mode != SER_POLL_READ)
 300         set_sci1_poll_read();
 301
 302     i = 0;
 303     do {
 304         SSR1 = 0;                   /* start receiving */
 305         while (!(SSR1 & SCI_RDRF)); /* wait for data */
 306         data = RDR1;                /* read byte */
 307     } while ((data == 0xFF) && (++i < timeout));
 308
 309     return fliptable[(signed char)data];
 310 }
 311
 312 /* returns 0 on timeout, timeout is in bytes */
 313 static unsigned char poll_busy(long timeout)
 314 {
 315     long i;
 316     unsigned char data, dummy;
 317
 318     if (serial_mode != SER_POLL_READ)
 319         set_sci1_poll_read();
 320
 321     /* get data response */
 322     SSR1 = 0;                     /* start receiving */
 323     while (!(SSR1 & SCI_RDRF));   /* wait for data */
 324     data = fliptable[(signed char)(RDR1)];  /* read byte */
 325
 326     /* wait until the card is ready again */
 327     i = 0;
 328     do {
 329         SSR1 = 0;                   /* start receiving */
 330         while (!(SSR1 & SCI_RDRF)); /* wait for data */
 331         dummy = RDR1;               /* read byte */
 332     } while ((dummy != 0xFF) && (++i < timeout));
 333
 334     return (dummy == 0xFF) ? data : 0;
 335 }
 336
 337 /* Send MMC command and get response */
 338 static int send_cmd(int cmd, unsigned long parameter, unsigned char *response)
 339 {
 340     unsigned char command[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95, 0xFF};
 341
 342     command[0] = cmd;
 343
 344     if (parameter != 0)
 345     {
 346         command[1] = (parameter >> 24) & 0xFF;
 347         command[2] = (parameter >> 16) & 0xFF;
 348         command[3] = (parameter >> 8) & 0xFF;
 349         command[4] = parameter & 0xFF;
 350     }
 351
 352     write_transfer(command, 7);
 353
 354     response[0] = poll_byte(20);
 355
 356     if (response[0] != 0x00)
 357     {
 358         write_transfer(dummy, 1);
 359         return -1;
 360     }
 361
 362     switch (cmd)
 363     {
 364         case CMD_SEND_CSD:        /* R1 response, leave open */
 365         case CMD_SEND_CID:
 366         case CMD_READ_SINGLE_BLOCK:
 367         case CMD_READ_MULTIPLE_BLOCK:
 368             break;
 369
 370         case CMD_SEND_STATUS:     /* R2 response, close with dummy */
 371             read_transfer(response + 1, 1);
 372             write_transfer(dummy, 1);
 373             break;
 374
 375         case CMD_READ_OCR:        /* R3 response, close with dummy */
 376             read_transfer(response + 1, 4);
 377             write_transfer(dummy, 1);
 378             break;
 379
 380         default:                  /* R1 response, close with dummy */
 381             write_transfer(dummy, 1);
 382             break;                /* also catches block writes */
 383     }
 384
 385     return 0;
 386 }
 387
 388 /* Receive CID/ CSD data (16 bytes) */
 389 static int receive_cxd(unsigned char *buf)
 390 {
 391     if (poll_byte(20) != DT_START_BLOCK)
 392     {
 393         write_transfer(dummy, 1);
 394         return -1;                /* not start of data */
 395     }
 396
 397     read_transfer(buf, 16);
 398     write_transfer(dummy, 3);     /* 2 bytes dontcare crc + 1 byte trailer */
 399     return 0;
 400 }
 401
 402
 403 static int initialize_card(int card_no)
 404 {
 405     int rc, i, temp;
 406     unsigned char response[5];
 407     tCardInfo *card = &card_info[card_no];
 408
 409     static const char mantissa[] = {  /* *10 */
 410         0,  10, 12, 13, 15, 20, 25, 30,
 411         35, 40, 45, 50, 55, 60, 70, 80
 412     };
 413     static const int exponent[] = {  /* use varies */
 414         1, 10, 100, 1000, 10000, 100000, 1000000,
 415         10000000, 100000000, 1000000000
 416     };
 417
 418     if (card_no == 1)
 419         mmc_status = MMC_TOUCHED;
 420     /* switch to SPI mode */
 421     send_cmd(CMD_GO_IDLE_STATE, 0, response);
 422     if (response[0] != 0x01)
 423         return -1;                /* error response */
 424
 425     /* initialize card */
 426     for (i = 0; i < 100; i++)     /* timeout 1 sec */
 427     {
 428         sleep(1);
 429         if (send_cmd(CMD_SEND_OP_COND, 0, response) == 0)
 430             break;
 431     }
 432     if (response[0] != 0x00)
 433         return -2;                /* not ready */
 434
 435     /* get OCR register */
 436     rc = send_cmd(CMD_READ_OCR, 0, response);
 437     if (rc)
 438         return rc * 10 - 3;
 439     card->ocr = (response[1] << 24) | (response[2] << 16)
 440               | (response[3] << 8) | response[4];
 441
 442     /* check voltage */
 443     if (!(card->ocr & 0x00100000)) /* 3.2 .. 3.3 V */
 444         return -4;
 445
 446     /* get CSD register */
 447     rc = send_cmd(CMD_SEND_CSD, 0, response);
 448     if (rc)
 449         return rc * 10 - 5;
 450     rc = receive_cxd((unsigned char*)card->csd);
 451     if (rc)
 452         return rc * 10 - 6;
 453
 454     /* check block sizes */
 455     card->block_exp = card_extract_bits(card->csd, 44, 4);
 456     card->blocksize = 1 << card->block_exp;
 457     if ((card_extract_bits(card->csd, 102, 4) != card->block_exp)
 458         || card->blocksize > MAX_BLOCK_SIZE)
 459     {
 460         return -7;
 461     }
 462
 463     if (card->blocksize != SECTOR_SIZE)
 464     {
 465         rc = send_cmd(CMD_SET_BLOCKLEN, card->blocksize, response);
 466         if (rc)
 467             return rc * 10 - 8;
 468     }
 469
 470     /* max transmission speed, clock divider */
 471     temp = card_extract_bits(card->csd, 29, 3);
 472     temp = (temp > 3) ? 3 : temp;
 473     card->speed = mantissa[card_extract_bits(card->csd, 25, 4)]
 474                 * exponent[temp + 4];
 475     card->bitrate_register = (FREQ/4-1) / card->speed;
 476
 477     /* NSAC, TSAC, read timeout */
 478     card->nsac = 100 * card_extract_bits(card->csd, 16, 8);
 479     card->tsac = mantissa[card_extract_bits(card->csd, 9, 4)];
 480     temp = card_extract_bits(card->csd, 13, 3);
 481     card->read_timeout = ((FREQ/4) / (card->bitrate_register + 1)
 482                          * card->tsac / exponent[9 - temp]
 483                          + (10 * card->nsac));
 484     card->read_timeout /= 8;      /* clocks -> bytes */
 485     card->tsac = card->tsac * exponent[temp] / 10;
 486
 487     /* r2w_factor, write timeout */
 488     card->r2w_factor = 1 << card_extract_bits(card->csd, 99, 3);
 489     if (card->r2w_factor > 32)    /* dirty MMC spec violation */
 490     {
 491         card->read_timeout *= 4;  /* add safety factor */
 492         card->write_timeout = card->read_timeout * 8;
 493     }
 494     else
 495         card->write_timeout = card->read_timeout * card->r2w_factor;
 496
 497     /* card size */
 498     card->numblocks = (card_extract_bits(card->csd, 54, 12) + 1)
 499             * (1 << (card_extract_bits(card->csd, 78, 3) + 2));
 500     card->size = card->numblocks * card->blocksize;
 501
 502     /* switch to full speed */
 503     setup_sci1(card->bitrate_register);
 504
 505     /* get CID register */
 506     rc = send_cmd(CMD_SEND_CID, 0, response);
 507     if (rc)
 508         return rc * 10 - 9;
 509     rc = receive_cxd((unsigned char*)card->cid);
 510     if (rc)
 511         return rc * 10 - 9;
 512
 513     card->initialized = true;
 514     return 0;
 515 }
 516
 517 tCardInfo *mmc_card_info(int card_no)
 518 {
 519     tCardInfo *card = &card_info[card_no];
 520
 521     if (!card->initialized && ((card_no == 0) || mmc_detect()))
 522     {
 523         select_card(card_no);
 524         deselect_card();
 525     }
 526     return card;
 527 }
 528
 529 /* copy and swap in the background. If destination is NULL, use the next
 530  * block cache entry */
 531 static void bg_copy_swap(void)
 532 {
 533     if (!bcs_len)
 534         return;
 535
 536     if (!bcs_dest)
 537     {
 538         current_cache = (current_cache + 1) % NUMCACHES; /* next cache */
 539         block_cache[current_cache].inuse = false;
 540         bcs_dest = block_cache[current_cache].data + 2;
 541     }
 542     if (bcs_src)
 543     {
 544         memcpy(bcs_dest, bcs_src, bcs_len);
 545         bcs_src += bcs_len;
 546     }
 547     bitswap(bcs_dest, bcs_len);
 548     bcs_dest += bcs_len;
 549     bcs_len = 0;
 550 }
 551
 552 /* Receive one block with dma, possibly swapping the previously received
 553  * block in the background */
 554 static int receive_block(unsigned char *inbuf, int size, long timeout)
 555 {
 556     if (poll_byte(timeout) != DT_START_BLOCK)
 557     {
 558         write_transfer(dummy, 1);
 559         return -1;                /* not start of data */
 560     }
 561
 562     while (!(SSR1 & SCI_TEND));   /* wait for end of transfer */
 563
 564     SCR1 = 0;                     /* disable serial */
 565     SSR1 = 0;                     /* clear all flags */
 566
 567     /* setup DMA channel 0 */
 568     CHCR0 = 0;                    /* disable */
 569     SAR0 = RDR1_ADDR;
 570     DAR0 = (unsigned long) inbuf;
 571     DTCR0 = size;
 572     CHCR0 = 0x4601;               /* fixed source address, RXI1, enable */
 573     DMAOR = 0x0001;
 574     SCR1 = (SCI_RE|SCI_RIE);      /* kick off DMA */
 575
 576     /* dma receives 2 bytes more than DTCR2, but the last 2 bytes are not
 577      * stored. The first extra byte is available from RDR1 after the DMA ends,
 578      * the second one is lost because of the SCI overrun. However, this
 579      * behaviour conveniently discards the crc. */
 580
 581     bg_copy_swap();
 582     yield();                      /* be nice */
 583
 584     while (!(CHCR0 & 0x0002));    /* wait for end of DMA */
 585     while (!(SSR1 & SCI_ORER));   /* wait for the trailing bytes */
 586     SCR1 = 0;
 587     serial_mode = SER_DISABLED;
 588
 589     write_transfer(dummy, 1);     /* send trailer */
 590     last_disk_activity = current_tick;
 591     return 0;
 592 }
 593
 594 /* Send one block with dma from the current block cache, possibly preparing
 595  * the next block within the next block cache in the background. */
 596 static int send_block(int size, unsigned char start_token, long timeout)
 597 {
 598     int rc = 0;
 599     unsigned char *curbuf = block_cache[current_cache].data;
 600
 601     curbuf[1] = fliptable[(signed char)start_token];
 602     *(unsigned short *)(curbuf + size + 2) = 0xFFFF;
 603
 604     while (!(SSR1 & SCI_TEND));   /* wait for end of transfer */
 605
 606     SCR1 = 0;                     /* disable serial */
 607     SSR1 = 0;                     /* clear all flags */
 608
 609     /* setup DMA channel 0 */
 610     CHCR0 = 0;                    /* disable */
 611     SAR0 = (unsigned long)(curbuf + 1);
 612     DAR0 = TDR1_ADDR;
 613     DTCR0 = size + 3;             /* start token + block + dummy crc */
 614     CHCR0 = 0x1701;               /* fixed dest. address, TXI1, enable */
 615     DMAOR = 0x0001;
 616     SCR1 = (SCI_TE|SCI_TIE);      /* kick off DMA */
 617
 618     bg_copy_swap();
 619     yield();                      /* be nice */
 620
 621     while (!(CHCR0 & 0x0002));    /* wait for end of DMA */
 622     while (!(SSR1 & SCI_TEND));   /* wait for end of transfer */
 623     SCR1 = 0;
 624     serial_mode = SER_DISABLED;
 625
 626     if ((poll_busy(timeout) & 0x1F) != 0x05) /* something went wrong */
 627         rc = -1;
 628
 629     write_transfer(dummy, 1);
 630     last_disk_activity = current_tick;
 631
 632     return rc;
 633 }
 634
 635 static int cache_block(IF_MV2(int drive,) unsigned long blocknum,
 636                        int size, long timeout)
 637 {
 638     int rc, i;
 639     unsigned char response;
 640
 641     /* check whether the block is already cached */
 642     for (i = 0; i < NUMCACHES; i++)
 643     {
 644         if (block_cache[i].inuse && (block_cache[i].blocknum == blocknum)
 645 #ifdef HAVE_MULTIVOLUME
 646             && (block_cache[i].drive == drive)
 647 #endif
 648            )
 649         {
 650             current_cache = i;
 651             bg_copy_swap();
 652             return 0;
 653         }
 654     }
 655     /* not found: read the block */
 656     current_cache = (current_cache + 1) % NUMCACHES;
 657     rc = send_cmd(CMD_READ_SINGLE_BLOCK, blocknum * size, &response);
 658     if (rc)
 659         return rc * 10 - 1;
 660
 661     block_cache[current_cache].inuse = false;
 662     rc = receive_block(block_cache[current_cache].data + 2, size, timeout);
 663     if (rc)
 664         return rc * 10 - 2;
 665
 666 #ifdef HAVE_MULTIVOLUME
 667     block_cache[current_cache].drive = drive;
 668 #endif
 669     block_cache[current_cache].blocknum = blocknum;
 670     block_cache[current_cache].inuse = true;
 671
 672     return 0;
 673 }
 674
 675 int ata_read_sectors(IF_MV2(int drive,)
 676                      unsigned long start,
 677                      int incount,
 678                      void* inbuf)
 679 {
 680     int rc = 0;
 681     unsigned int blocksize, offset;
 682     unsigned long c_addr, c_end_addr;
 683     unsigned long c_block, c_end_block;
 684     unsigned char response;
 685     tCardInfo *card;
 686 #ifndef HAVE_MULTIVOLUME
 687     int drive = current_card;
 688 #endif
 689
 690     c_addr = start * SECTOR_SIZE;
 691     c_end_addr = c_addr + incount * SECTOR_SIZE;
 692
 693     card = &card_info[drive];
 694     rc = select_card(drive);
 695     if (rc)
 696     {
 697         rc = rc * 10 - 1;
 698         goto error;
 699     }
 700     if (c_end_addr > card->size)
 701     {
 702         rc = -2;
 703         goto error;
 704     }
 705
 706     blocksize = card->blocksize;
 707     offset = c_addr & (blocksize - 1);
 708     c_block = c_addr >> card->block_exp;
 709     c_end_block = c_end_addr >> card->block_exp;
 710     bcs_dest = inbuf;
 711
 712     if (offset) /* first partial block */
 713     {
 714         unsigned long len = MIN(c_end_addr - c_addr, blocksize - offset);
 715
 716         rc = cache_block(IF_MV2(drive,) c_block, blocksize,
 717                          card->read_timeout);
 718         if (rc)
 719         {
 720             rc = rc * 10 - 3;
 721             goto error;
 722         }
 723         bcs_src = block_cache[current_cache].data + 2 + offset;
 724         bcs_len = len;
 725         inbuf += len;
 726         c_addr += len;
 727         c_block++;
 728     }
 729     /* some cards don't like reading the very last block with
 730      * CMD_READ_MULTIPLE_BLOCK, so make sure this block is always
 731      * read with CMD_READ_SINGLE_BLOCK. Let the 'last partial block'
 732      * read catch this. */
 733     if (c_end_block == card->numblocks)
 734         c_end_block--;
 735
 736     if (c_block < c_end_block)
 737     {
 738         int read_cmd = (c_end_block - c_block > 1) ?
 739                        CMD_READ_MULTIPLE_BLOCK : CMD_READ_SINGLE_BLOCK;
 740
 741         rc = send_cmd(read_cmd, c_addr, &response);
 742         if (rc)
 743         {
 744             rc = rc * 10 - 4;
 745             goto error;
 746         }
 747         while (c_block < c_end_block)
 748         {
 749             rc = receive_block(inbuf, blocksize, card->read_timeout);
 750             if (rc)
 751             {
 752                 rc = rc * 10 - 5;
 753                 goto error;
 754             }
 755             bcs_src = NULL;
 756             bcs_len = blocksize;
 757             inbuf += blocksize;
 758             c_addr += blocksize;
 759             c_block++;
 760         }
 761         if (read_cmd == CMD_READ_MULTIPLE_BLOCK)
 762         {
 763             rc = send_cmd(CMD_STOP_TRANSMISSION, 0, &response);
 764             if (rc)
 765             {
 766                 rc = rc * 10 - 6;
 767                 goto error;
 768             }
 769         }
 770     }
 771     if (c_addr < c_end_addr) /* last partial block */
 772     {
 773         rc = cache_block(IF_MV2(drive,) c_block, blocksize,
 774                          card->read_timeout);
 775         if (rc)
 776         {
 777             rc = rc * 10 - 7;
 778             goto error;
 779         }
 780         bcs_src = block_cache[current_cache].data + 2;
 781         bcs_len = c_end_addr - c_addr;
 782     }
 783     bg_copy_swap();
 784
 785   error:
 786
 787     deselect_card();
 788
 789     return rc;
 790 }
 791
 792 int ata_write_sectors(IF_MV2(int drive,)
 793                       unsigned long start,
 794                       int count,
 795                       const void* buf)
 796 {
 797     int rc = 0;
 798     unsigned int blocksize, offset;
 799     unsigned long c_addr, c_end_addr;
 800     unsigned long c_block, c_end_block;
 801     unsigned char response;
 802     tCardInfo *card;
 803 #ifndef HAVE_MULTIVOLUME
 804     int drive = current_card;
 805 #endif
 806
 807     c_addr = start * SECTOR_SIZE;
 808     c_end_addr = c_addr + count * SECTOR_SIZE;
 809
 810     card = &card_info[drive];
 811     rc = select_card(drive);
 812     if (rc)
 813     {
 814         rc = rc * 10 - 1;
 815         goto error;
 816     }
 817
 818     if (c_end_addr  > card->size)
 819         panicf("Writing past end of card");
 820
 821     blocksize = card->blocksize;
 822     offset = c_addr & (blocksize - 1);
 823     c_block = c_addr >> card->block_exp;
 824     c_end_block = c_end_addr >> card->block_exp;
 825     bcs_src = buf;
 826
 827     /* Special case: first block is trimmed at both ends. May only happen
 828      * if (blocksize > 2 * sectorsize), i.e. blocksize == 2048 */
 829     if ((c_block == c_end_block) && offset)
 830         c_end_block++;
 831
 832     if (c_block < c_end_block)
 833     {
 834         int write_cmd;
 835         unsigned char start_token;
 836
 837         if (c_end_block - c_block > 1)
 838         {
 839             write_cmd   = CMD_WRITE_MULTIPLE_BLOCK;
 840             start_token = DT_START_WRITE_MULTIPLE;
 841         }
 842         else
 843         {
 844             write_cmd   = CMD_WRITE_BLOCK;
 845             start_token = DT_START_BLOCK;
 846         }
 847
 848         if (offset)
 849         {
 850             unsigned long len = MIN(c_end_addr - c_addr, blocksize - offset);
 851
 852             rc = cache_block(IF_MV2(drive,) c_block, blocksize,
 853                              card->read_timeout);
 854             if (rc)
 855             {
 856                 rc = rc * 10 - 2;
 857                 goto error;
 858             }
 859             bcs_dest = block_cache[current_cache].data + 2 + offset;
 860             bcs_len = len;
 861             c_addr -= offset;
 862         }
 863         else
 864         {
 865             bcs_dest = NULL;      /* next block cache */
 866             bcs_len = blocksize;
 867         }
 868         bg_copy_swap();
 869         rc = send_cmd(write_cmd, c_addr, &response);
 870         if (rc)
 871         {
 872             rc = rc * 10 - 3;
 873             goto error;
 874         }
 875         c_block++;  /* early increment to simplify the loop */
 876
 877         while (c_block < c_end_block)
 878         {
 879             bcs_dest = NULL;      /* next block cache */
 880             bcs_len = blocksize;
 881             rc = send_block(blocksize, start_token, card->write_timeout);
 882             if (rc)
 883             {
 884                 rc = rc * 10 - 4;
 885                 goto error;
 886             }
 887             c_addr += blocksize;
 888             c_block++;
 889         }
 890         rc = send_block(blocksize, start_token, card->write_timeout);
 891         if (rc)
 892         {
 893             rc = rc * 10 - 5;
 894             goto error;
 895         }
 896         c_addr += blocksize;
 897         /* c_block++ was done early */
 898
 899         if (write_cmd == CMD_WRITE_MULTIPLE_BLOCK)
 900         {
 901             response = DT_STOP_TRAN;
 902             write_transfer(&response, 1);
 903             poll_busy(card->write_timeout);
 904         }
 905     }
 906
 907     if (c_addr < c_end_addr) /* last partial block */
 908     {
 909         rc = cache_block(IF_MV2(drive,) c_block, blocksize,
 910                          card->read_timeout);
 911         if (rc)
 912         {
 913             rc = rc * 10 - 6;
 914             goto error;
 915         }
 916         bcs_dest = block_cache[current_cache].data + 2;
 917         bcs_len = c_end_addr - c_addr;
 918         bg_copy_swap();
 919         rc = send_cmd(CMD_WRITE_BLOCK, c_addr, &response);
 920         if (rc)
 921         {
 922             rc = rc * 10 - 7;
 923             goto error;
 924         }
 925         rc = send_block(blocksize, DT_START_BLOCK, card->write_timeout);
 926         if (rc)
 927         {
 928             rc = rc * 10 - 8;
 929             goto error;
 930         }
 931     }
 932
 933   error:
 934
 935     deselect_card();
 936
 937     return rc;
 938 }
 939
 940 void ata_spindown(int seconds)
 941 {
 942     (void)seconds;
 943 }
 944
 945 bool ata_disk_is_active(void)
 946 {
 947     /* this is correct unless early return from write gets implemented */
 948     return mmc_mutex.locked;
 949 }
 950
 951 void ata_sleep(void)
 952 {
 953 }
 954
 955 void ata_spin(void)
 956 {
 957 }
 958
 959 static void mmc_thread(void)
 960 {
 961     struct queue_event ev;
 962     bool idle_notified = false;
 963
 964     while (1) {
 965         queue_wait_w_tmo(&mmc_queue, &ev, HZ);
 966         switch ( ev.id )
 967         {
 968             case SYS_USB_CONNECTED:
 969                 usb_acknowledge(SYS_USB_CONNECTED_ACK);
 970                 /* Wait until the USB cable is extracted again */
 971                 usb_wait_for_disconnect(&mmc_queue);
 972                 break;
 973
 974 #ifdef HAVE_HOTSWAP
 975             case SYS_HOTSWAP_INSERTED:
 976                 disk_mount(1); /* mount MMC */
 977                 queue_broadcast(SYS_FS_CHANGED, 0);
 978                 break;
 979
 980             case SYS_HOTSWAP_EXTRACTED:
 981                 disk_unmount(1); /* release "by force" */
 982                 queue_broadcast(SYS_FS_CHANGED, 0);
 983                 break;
 984 #endif
 985
 986             default:
 987                 if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
 988                 {
 989                     idle_notified = false;
 990                 }
 991                 else
 992                 {
 993                     if (!idle_notified)
 994                     {
 995                         call_ata_idle_notifys(false);
 996                         idle_notified = true;
 997                     }
 998                 }
 999                 break;
1000         }
1001     }
1002 }
1003
1004 #ifdef HAVE_HOTSWAP
1005 void mmc_enable_monitoring(bool on)
1006 {
1007     mmc_monitor_enabled = on;
1008 }
1009 #endif
1010
1011 bool mmc_detect(void)
1012 {
1013     return adc_read(ADC_MMC_SWITCH) < 0x200 ? true : false;
1014 }
1015
1016 bool mmc_touched(void)
1017 {
1018     if (mmc_status == MMC_UNKNOWN) /* try to detect */
1019     {
1020         unsigned char response;
1021
1022         mutex_lock(&mmc_mutex);
1023         setup_sci1(7);             /* safe value */
1024         and_b(~0x02, &PADRH);      /* assert CS */
1025         send_cmd(CMD_SEND_OP_COND, 0, &response);
1026         if (response == 0xFF)
1027             mmc_status = MMC_UNTOUCHED;
1028         else
1029             mmc_status = MMC_TOUCHED;
1030
1031         deselect_card();
1032     }
1033     return mmc_status == MMC_TOUCHED;
1034 }
1035
1036 bool mmc_usb_active(int delayticks)
1037 {
1038     /* reading "inactive" is delayed by user-supplied monoflop value */
1039     return (usb_activity ||
1040             TIME_BEFORE(current_tick, last_usb_activity + delayticks));
1041 }
1042
1043 static void mmc_tick(void)
1044 {
1045     bool current_status;
1046 #ifndef HAVE_HOTSWAP
1047     const bool mmc_monitor_enabled = true;
1048 #endif
1049
1050     if (new_mmc_circuit)
1051         /* USB bridge activity is 0 on idle, ~527 on active */
1052         current_status = adc_read(ADC_USB_ACTIVE) > 0x100;
1053     else
1054         current_status = adc_read(ADC_USB_ACTIVE) < 0x190;
1055
1056     if (!current_status && usb_activity)
1057         last_usb_activity = current_tick;
1058     usb_activity = current_status;
1059
1060     if (mmc_monitor_enabled)
1061     {
1062         current_status = mmc_detect();
1063         /* Only report when the status has changed */
1064         if (current_status != last_mmc_status)
1065         {
1066             last_mmc_status = current_status;
1067             countdown = 30;
1068         }
1069         else
1070         {
1071             /* Count down until it gets negative */
1072             if (countdown >= 0)
1073                 countdown--;
1074
1075             if (countdown == 0)
1076             {
1077                 if (current_status)
1078                 {
1079                     queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
1080                 }
1081                 else
1082                 {
1083                     queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
1084                     mmc_status = MMC_UNTOUCHED;
1085                     card_info[1].initialized = false;
1086                 }
1087             }
1088         }
1089     }
1090 }
1091
1092 int ata_soft_reset(void)
1093 {
1094     return 0;
1095 }
1096
1097 void ata_enable(bool on)
1098 {
1099     PBCR1 &= ~0x0CF0; /* PB13, PB11 and PB10 become GPIOs, if not modified below */
1100     PACR2 &= ~0x4000; /* use PA7 (bridge reset) as GPIO */
1101     if (on)
1102     {
1103         PBCR1 |= 0x08A0;    /* as SCK1, TxD1, RxD1 */
1104         IPRE &= 0x0FFF;     /* disable SCI1 interrupts for the CPU */
1105         mmc_enable_int_flash_clock(true);  /* always enabled in SPI mode */
1106     }
1107     and_b(~0x80, &PADRL); /* assert reset */
1108     sleep(HZ/20);
1109     or_b(0x80, &PADRL);   /* de-assert reset */
1110     sleep(HZ/20);
1111     card_info[0].initialized = false;
1112     card_info[1].initialized = false;
1113 }
1114
1115 int ata_init(void)
1116 {
1117     int rc = 0;
1118
1119     if (!initialized)
1120     {
1121         mutex_init(&mmc_mutex);
1122         queue_init(&mmc_queue, true);
1123     }
1124     mutex_lock(&mmc_mutex);
1125     led(false);
1126
1127     /* Port setup */
1128     PACR1 &= ~0x0F00; /* GPIO function for PA12, /IRQ1 for PA13 */
1129     PACR1 |= 0x0400;
1130     PADR |= 0x0680;   /* set all the selects + reset high (=inactive) */
1131     PAIOR |= 0x1680;  /* make outputs for them and the PA12 clock gate */
1132
1133     PBDR |= 0x2C00;   /* SCK1, TxD1 and RxD1 high when GPIO  CHECKME: mask */
1134     PBIOR |= 0x2000;  /* SCK1 output */
1135     PBIOR &= ~0x0C00; /* TxD1, RxD1 input */
1136
1137     last_mmc_status = mmc_detect();
1138 #ifndef HAVE_MULTIVOLUME
1139     if (last_mmc_status)
1140     {   /* MMC inserted */
1141         current_card = 1;
1142     }
1143     else
1144     {   /* no MMC, use internal memory */
1145         current_card = 0;
1146     }
1147 #endif
1148
1149     new_mmc_circuit = ((HW_MASK & MMC_CLOCK_POLARITY) != 0);
1150     ata_enable(true);
1151
1152     if ( !initialized )
1153     {
1154         if (!last_mmc_status)
1155             mmc_status = MMC_UNTOUCHED;
1156
1157         create_thread(mmc_thread, mmc_stack,
1158                       sizeof(mmc_stack), 0, mmc_thread_name
1159                       IF_PRIO(, PRIORITY_SYSTEM)
1160                               IF_COP(, CPU));
1161         tick_add_task(mmc_tick);
1162         initialized = true;
1163     }
1164
1165     mutex_unlock(&mmc_mutex);
1166     return rc;
1167 }
1168