firmware/rolo.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 Randy D. Wood
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19
  20 #include "config.h"
  21 #include "lcd.h"
  22 #include "lcd-remote.h"
  23 #include "thread.h"
  24 #include "kernel.h"
  25 #include "sprintf.h"
  26 #include "button.h"
  27 #include "file.h"
  28 #include "audio.h"
  29 #include "system.h"
  30 #include "i2c.h"
  31 #include "adc.h"
  32 #include "string.h"
  33 #include "buffer.h"
  34
  35 #ifdef MI4_FORMAT
  36 #include "crc32-mi4.h"
  37 #undef FIRMWARE_OFFSET_FILE_CRC
  38 #undef FIRMWARE_OFFSET_FILE_DATA
  39 #define FIRMWARE_OFFSET_FILE_CRC     0xC
  40 #define FIRMWARE_OFFSET_FILE_DATA    0x200
  41 #endif
  42
  43 #if !defined(IRIVER_IFP7XX_SERIES) && \
  44     (CONFIG_CPU != PP5002) && (CONFIG_CPU != S3C2440)
  45 /* FIX: this doesn't work on iFP, 3rd Gen ipods */
  46
  47 #define IRQ0_EDGE_TRIGGER 0x80
  48
  49 #ifdef CPU_PP
  50 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
  51  * the new firmware is being loaded, and then jump to the start of SDRAM
  52  * TODO: Use the mailboxes built into the PP processor for this
  53  */
  54
  55 #if NUM_CORES > 1
  56 volatile unsigned char IDATA_ATTR cpu_message = 0;
  57 volatile unsigned char IDATA_ATTR cpu_reply = 0;
  58 extern int cop_idlestackbegin[];
  59
  60 void rolo_restart_cop(void) ICODE_ATTR;
  61 void rolo_restart_cop(void)
  62 {
  63     if (CURRENT_CORE == CPU)
  64     {
  65         /* There should be free thread slots aplenty */
  66         create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
  67                       0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
  68                       IF_COP(, COP));
  69         return;
  70     }
  71
  72     COP_INT_CLR = -1;
  73
  74     /* Invalidate cache */
  75     invalidate_icache();
  76
  77     /* Disable cache */
  78     CACHE_CTL = CACHE_CTL_DISABLE;
  79
  80     /* Tell the main core that we're ready to reload */
  81     cpu_reply = 1;
  82
  83     /* Wait while RoLo loads the image into SDRAM */
  84     /* TODO: Accept checksum failure gracefully */
  85     while(cpu_message != 1);
  86
  87     /* Acknowledge the CPU and then reload */
  88     cpu_reply = 2;
  89
  90     asm volatile(
  91         "mov   r0, #0x10000000   \n"
  92         "mov   pc, r0            \n"
  93     );
  94 }
  95 #endif /* NUM_CORES > 1 */
  96 #endif /* CPU_PP */
  97
  98 static void rolo_error(const char *text)
  99 {
 100     lcd_clear_display();
 101     lcd_puts(0, 0, "ROLO error:");
 102     lcd_puts_scroll(0, 1, text);
 103     lcd_update();
 104     button_get(true);
 105     button_get(true);
 106     button_get(true);
 107     lcd_stop_scroll();
 108 }
 109
 110 #if CONFIG_CPU == SH7034
 111 /* these are in assembler file "descramble.S" */
 112 extern unsigned short descramble(const unsigned char* source,
 113                                  unsigned char* dest, int length);
 114 extern void rolo_restart(const unsigned char* source, unsigned char* dest,
 115                          int length);
 116 #else
 117
 118 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
 119    targets that are low on iram, like the gigabeat F/X */
 120 void rolo_restart(const unsigned char* source, unsigned char* dest,
 121                   long length) __attribute__ ((section(".icode")));
 122 void rolo_restart(const unsigned char* source, unsigned char* dest,
 123                   long length)
 124 {
 125     long i;
 126     unsigned char* localdest = dest;
 127
 128     /* This is the equivalent of a call to memcpy() but this must be done from
 129        iram to avoid overwriting itself and we don't want to depend on memcpy()
 130        always being in iram */
 131     for(i = 0;i < length;i++)
 132         *localdest++ = *source++;
 133
 134 #if defined(CPU_COLDFIRE)
 135     asm (
 136         "movec.l %0,%%vbr    \n"
 137         "move.l  (%0)+,%%sp  \n"
 138         "move.l  (%0),%0     \n"
 139         "jmp     (%0)        \n"
 140         : : "a"(dest)
 141     );
 142 #elif defined(CPU_PP502x)
 143     CPU_INT_CLR = -1;
 144
 145     /* Flush cache */
 146     flush_icache();
 147
 148     /* Disable cache */
 149     CACHE_CTL = CACHE_CTL_DISABLE;
 150
 151     /* Reset the memory mapping registers to zero */
 152     {
 153         volatile unsigned long *mmap_reg;
 154         for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
 155             *mmap_reg = 0;
 156     }
 157
 158 #if NUM_CORES > 1
 159     /* Tell the COP it's safe to continue rebooting */
 160     cpu_message = 1;
 161
 162     /* Wait for the COP to tell us it is rebooting */
 163     while(cpu_reply != 2);
 164 #endif
 165
 166     asm volatile(
 167         "mov   r0, #0x10000000   \n"
 168         "mov   pc, r0            \n"
 169     );
 170
 171 #elif defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L)
 172     /* Flush and invalidate caches */
 173     invalidate_icache();
 174
 175     asm volatile(
 176         "mov   pc, %0            \n"
 177         : : "r"(dest)
 178     );
 179 #endif
 180 }
 181 #endif
 182
 183 /* This is assigned in the linker control file */
 184 extern unsigned long loadaddress;
 185
 186 /***************************************************************************
 187  *
 188  * Name: rolo_load_app(char *filename,int scrambled)
 189  * Filename must be a fully defined filename including the path and extension
 190  *
 191  ***************************************************************************/
 192 int rolo_load(const char* filename)
 193 {
 194     int fd;
 195     long length;
 196 #if defined(CPU_COLDFIRE) || defined(CPU_ARM)
 197 #if !defined(MI4_FORMAT)
 198     int i;
 199 #endif
 200     unsigned long checksum,file_checksum;
 201 #else
 202     long file_length;
 203     unsigned short checksum,file_checksum;
 204 #endif
 205     unsigned char* ramstart = (void*)&loadaddress;
 206
 207     lcd_clear_display();
 208     lcd_puts(0, 0, "ROLO...");
 209     lcd_puts(0, 1, "Loading");
 210     lcd_update();
 211 #ifdef HAVE_REMOTE_LCD
 212     lcd_remote_clear_display();
 213     lcd_remote_puts(0, 0, "ROLO...");
 214     lcd_remote_puts(0, 1, "Loading");
 215     lcd_remote_update();
 216 #endif
 217
 218     audio_stop();
 219
 220     fd = open(filename, O_RDONLY);
 221     if(-1 == fd) {
 222         rolo_error("File not found");
 223         return -1;
 224     }
 225
 226     length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
 227
 228 #if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320) \
 229      || defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L)
 230     /* Read and save checksum */
 231     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 232     if (read(fd, &file_checksum, 4) != 4) {
 233         rolo_error("Error Reading checksum");
 234         return -1;
 235     }
 236
 237 #if !defined(MI4_FORMAT)
 238     /* Rockbox checksums are big-endian */
 239     file_checksum = betoh32(file_checksum);
 240 #endif
 241
 242 #if defined(CPU_PP) && NUM_CORES > 1
 243     lcd_puts(0, 2, "Waiting for coprocessor...");
 244     lcd_update();
 245     rolo_restart_cop();
 246     /* Wait for COP to be in safe code */
 247     while(cpu_reply != 1);
 248     lcd_puts(0, 2, "                          ");
 249     lcd_update();
 250 #endif
 251
 252     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 253
 254     if (read(fd, audiobuf, length) != length) {
 255         rolo_error("Error Reading File");
 256         return -1;
 257     }
 258
 259 #ifdef MI4_FORMAT
 260     /* Check CRC32 to see if we have a valid file */
 261     chksum_crc32gentab();
 262     checksum = chksum_crc32 (audiobuf, length);
 263 #else
 264     checksum = MODEL_NUMBER;
 265
 266     for(i = 0;i < length;i++) {
 267         checksum += audiobuf[i];
 268     }
 269 #endif
 270
 271     /* Verify checksum against file header */
 272     if (checksum != file_checksum) {
 273         rolo_error("Checksum Error");
 274         return -1;
 275     }
 276
 277     lcd_puts(0, 1, "Executing");
 278     lcd_update();
 279 #ifdef HAVE_REMOTE_LCD
 280     lcd_remote_puts(0, 1, "Executing");
 281     lcd_remote_update();
 282 #endif
 283     adc_close();
 284
 285 #ifdef CPU_ARM
 286     disable_fiq();
 287 #endif
 288     set_irq_level(DISABLE_INTERRUPTS);
 289
 290 #elif CONFIG_CPU == SH7034
 291     /* Read file length from header and compare to real file length */
 292     lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
 293     if(read(fd, &file_length, 4) != 4) {
 294         rolo_error("Error Reading File Length");
 295         return -1;
 296     }
 297     if (length != file_length) {
 298         rolo_error("File length mismatch");
 299         return -1;
 300     }
 301
 302     /* Read and save checksum */
 303     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 304     if (read(fd, &file_checksum, 2) != 2) {
 305         rolo_error("Error Reading checksum");
 306         return -1;
 307     }
 308     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 309
 310     /* verify that file can be read and descrambled */
 311     if ((audiobuf + (2*length)+4) >= audiobufend) {
 312         rolo_error("Not enough room to load file");
 313         return -1;
 314     }
 315
 316     if (read(fd, &audiobuf[length], length) != (int)length) {
 317         rolo_error("Error Reading File");
 318         return -1;
 319     }
 320
 321     lcd_puts(0, 1, "Descramble");
 322     lcd_update();
 323
 324     checksum = descramble(audiobuf + length, audiobuf, length);
 325
 326     /* Verify checksum against file header */
 327     if (checksum != file_checksum) {
 328         rolo_error("Checksum Error");
 329         return -1;
 330     }
 331
 332     lcd_puts(0, 1, "Executing     ");
 333     lcd_update();
 334
 335     set_irq_level(HIGHEST_IRQ_LEVEL);
 336
 337     /* Calling these 2 initialization routines was necessary to get the
 338        the origional Archos version of the firmware to load and execute. */
 339     system_init();           /* Initialize system for restart */
 340     i2c_init();              /* Init i2c bus - it seems like a good idea */
 341     ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
 342     TSTR = 0xE0;             /* disable all timers */
 343     /* model-specific de-init, needed when flashed */
 344     /* Especially the Archos software is picky about this */
 345 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
 346     defined(ARCHOS_FMRECORDER)
 347     PAIOR = 0x0FA0;
 348 #endif
 349 #endif
 350     rolo_restart(audiobuf, ramstart, length);
 351
 352     return 0; /* this is never reached */
 353     (void)checksum; (void)file_checksum;
 354 }
 355 #else  /* !defined(IRIVER_IFP7XX_SERIES) */
 356 int rolo_load(const char* filename)
 357 {
 358     /* dummy */
 359     (void)filename;
 360     return 0;
 361 }
 362
 363 #endif /* !defined(IRIVER_IFP7XX_SERIES) */