RF24.cpp

   1 /*
   2    Copyright (C) 2011 J. Coliz <maniacbug@ymail.com>
   3
   4    This program is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU General Public License
   6    version 2 as published by the Free Software Foundation.
   7    */
   8
   9 #include "nRF24L01.h"
  10 #include "RF24_config.h"
  11 #include "RF24.h"
  12
  13 inline void nrf24_csn(int mode)
  14 {
  15     // Minimum ideal SPI bus speed is 2x data rate
  16     // If we assume 2Mbs data rate and 16Mhz clock, a
  17     // divider of 4 is the minimum we want.
  18     // CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
  19     spi_setup(SPI_MSBFIRST | SPI_MODE0 | SPI_CLOCK_DIV4);
  20     CSN_PORT &= ~_BV(CSN_PIN);
  21     CSN_PORT |= mode<<CSN_PIN;
  22 }
  23
  24 inline void nrf24_ce(int level)
  25 {
  26     CE_PORT &= ~_BV(CE_PIN);
  27     CE_PORT |= level<<CE_PIN;
  28 }
  29
  30 uint8_t nrf24_read_register(uint8_t reg, uint8_t* buf, uint8_t len)
  31 {
  32     uint8_t status;
  33
  34     csn(LOW);
  35     status = spi_transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
  36     while ( len-- )
  37         *buf++ = spi_transfer(0xff);
  38
  39     csn(HIGH);
  40
  41     return status;
  42 }
  43
  44 uint8_t nrf24_read_register(uint8_t reg)
  45 {
  46     csn(LOW);
  47     spi_transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
  48     uint8_t result = spi_transfer(0xff);
  49
  50     csn(HIGH);
  51     return result;
  52 }
  53
  54 uint8_t nrf24_write_register(uint8_t reg, const uint8_t* buf, uint8_t len)
  55 {
  56     uint8_t status;
  57
  58     csn(LOW);
  59     status = spi_transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
  60     while ( len-- )
  61         spi_transfer(*buf++);
  62
  63     csn(HIGH);
  64
  65     return status;
  66 }
  67
  68 uint8_t nrf24_write_register(uint8_t reg, uint8_t value)
  69 {
  70     uint8_t status;
  71
  72 #ifdef SERIAL_DEBUG
  73     uart_puts_p(PSTR("RF24 write_register("));
  74     uart_puthex(reg);
  75     uart_putc(',');
  76     uart_puthex(value);
  77     uart_putc(')');
  78     uart_putc('\n');
  79 #endif
  80
  81     csn(LOW);
  82     status = spi_transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
  83     spi_transfer(value);
  84     csn(HIGH);
  85
  86     return status;
  87 }
  88
  89 uint8_t nrf24_write_payload(const void* buf, uint8_t len)
  90 {
  91     uint8_t status;
  92
  93     const uint8_t* current = (const uint8_t*)(buf);
  94
  95     uint8_t data_len = min(len,payload_size);
  96     uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len;
  97
  98     //printf("[Writing %u bytes %u blanks]",data_len,blank_len);
  99
 100     csn(LOW);
 101     status = spi_transfer( W_TX_PAYLOAD );
 102     while ( data_len-- )
 103         spi_transfer(*current++);
 104     while ( blank_len-- )
 105         spi_transfer(0);
 106     csn(HIGH);
 107
 108     return status;
 109 }
 110
 111 uint8_t nrf24_read_payload(void* buf, uint8_t len)
 112 {
 113     uint8_t status;
 114     uint8_t* current = (uint8_t*)(buf);
 115
 116     uint8_t data_len = min(len,payload_size);
 117     uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len;
 118
 119     //printf("[Reading %u bytes %u blanks]",data_len,blank_len);
 120
 121     csn(LOW);
 122     status = spi_transfer( R_RX_PAYLOAD );
 123     while ( data_len-- )
 124         *current++ = spi_transfer(0xff);
 125     while ( blank_len-- )
 126         spi_transfer(0xff);
 127     csn(HIGH);
 128
 129     return status;
 130 }
 131
 132 uint8_t nrf24_flush_rx(void)
 133 {
 134     uint8_t status;
 135
 136     csn(LOW);
 137     status = spi_transfer( FLUSH_RX );
 138     csn(HIGH);
 139
 140     return status;
 141 }
 142
 143 uint8_t nrf24_flush_tx(void)
 144 {
 145     uint8_t status;
 146
 147     csn(LOW);
 148     status = spi_transfer( FLUSH_TX );
 149     csn(HIGH);
 150
 151     return status;
 152 }
 153
 154 uint8_t nrf24_get_status(void)
 155 {
 156     uint8_t status;
 157
 158     csn(LOW);
 159     status = spi_transfer( NOP );
 160     csn(HIGH);
 161
 162     return status;
 163 }
 164
 165 void nrf24_print_status(uint8_t status)
 166 {
 167     uart_puts_p(PSTR("RF24 STATUS\t\t = 0x"));
 168     uart_puthex(status);
 169     uart_puts_p(PSTR("RX_DR="));
 170     uart_putc((status & _BV(RX_DR))?'1':'0');
 171     uart_puts_p(PSTR("TX_DS="));
 172     uart_putc((status & _BV(TX_DS))?'1':'0');
 173     uart_puts_p(PSTR("MAX_RT="));
 174     uart_putc((status & _BV(MAX_RT))?'1':'0');
 175     uart_puts_p(PSTR("RX_P_NO=0x"));
 176     uart_puthex((status >> RX_P_NO) & 0x7);
 177     uart_puts_p(PSTR("TX_FULL="));
 178     uart_putc((status & _BV(TX_FULL))?'1':'0');
 179     uart_putc('\n');
 180
 181 }
 182
 183 void nrf24_print_observe_tx(uint8_t value)
 184 {
 185     uart_puts_p(PSTR("RF24 OBSERVE_TX="));
 186     uart_puthex(value);
 187     uart_puts_p(PSTR(": POLS_CNT="));
 188     uart_puthex((value >> PLOS_CNT) & 0xF);
 189     uart_puts_p(PSTR("ARC_CNT="));
 190     uart_puthex((value >> ARC_CNT) & 0xF);
 191     uart_putc('\n');
 192 }
 193
 194
 195
 196 void nrf24_print_byte_register(const char* name, uint8_t reg, uint8_t qty)
 197 {
 198     uart_puts_p("RF24 ");
 199     uart_puts(name);
 200     uart_putc('\t');
 201     if(strlen_P(name) < 8){
 202         uart_putc('\t');
 203     }
 204     uart_putc(' ');
 205     uart_putc('=');
 206     while (qty--){
 207         uart_putc(' ');
 208         uart_putc('0');
 209         uart_putc('x');
 210         uart_puthex(read_register(reg++));
 211     }
 212     uart_putc('\n');
 213 }
 214
 215
 216
 217 void nrf24_print_address_register(const char* name, uint8_t reg, uint8_t qty)
 218 {
 219     uart_puts_p("RF24 ");
 220     uart_puts(name);
 221     uart_putc('\t');
 222     if(strlen_P(name) < 8){
 223         uart_putc('\t');
 224     }
 225     uart_putc(' ');
 226     uart_putc('=');
 227     while (qty--)
 228     {
 229         uint8_t buffer[5];
 230         read_register(reg++,buffer,sizeof(buffer));
 231         uart_putc(' ');
 232         uart_putc('0');
 233         uart_putc('x');
 234         uint8_t* bufptr = buffer + sizeof(buffer);
 235         while( --bufptr >= buffer ){
 236             uart_puthex(*bufptr);
 237         }
 238     }
 239     uart_putc('\n');
 240 }
 241
 242
 243
 244 void nrf24_setChannel(uint8_t channel)
 245 {
 246     // TODO: This method could take advantage of the 'wide_band' calculation
 247     // done in setChannel() to require certain channel spacing.
 248
 249     const uint8_t max_channel = 127;
 250     write_register(RF_CH,min(channel,max_channel));
 251 }
 252
 253
 254
 255 void nrf24_setPayloadSize(uint8_t size)
 256 {
 257     const uint8_t max_payload_size = 32;
 258     payload_size = min(size,max_payload_size);
 259 }
 260
 261
 262
 263 uint8_t nrf24_getPayloadSize(void)
 264 {
 265     return payload_size;
 266 }
 267
 268
 269
 270 static const char rf24_datarate_e_str_0[] PROGMEM = "1MBPS";
 271 static const char rf24_datarate_e_str_1[] PROGMEM = "2MBPS";
 272 static const char rf24_datarate_e_str_2[] PROGMEM = "250KBPS";
 273 static const char * const rf24_datarate_e_str_P[] PROGMEM = {
 274     rf24_datarate_e_str_0,
 275     rf24_datarate_e_str_1,
 276     rf24_datarate_e_str_2,
 277 };
 278 static const char rf24_model_e_str_0[] PROGMEM = "nRF24L01";
 279 static const char rf24_model_e_str_1[] PROGMEM = "nRF24L01+";
 280 static const char * const rf24_model_e_str_P[] PROGMEM = {
 281     rf24_model_e_str_0,
 282     rf24_model_e_str_1,
 283 };
 284 static const char rf24_crclength_e_str_0[] PROGMEM = "Disabled";
 285 static const char rf24_crclength_e_str_1[] PROGMEM = "8 bits";
 286 static const char rf24_crclength_e_str_2[] PROGMEM = "16 bits" ;
 287 static const char * const rf24_crclength_e_str_P[] PROGMEM = {
 288     rf24_crclength_e_str_0,
 289     rf24_crclength_e_str_1,
 290     rf24_crclength_e_str_2,
 291 };
 292 static const char rf24_pa_dbm_e_str_0[] PROGMEM = "PA_MIN";
 293 static const char rf24_pa_dbm_e_str_1[] PROGMEM = "PA_LOW";
 294 static const char rf24_pa_dbm_e_str_2[] PROGMEM = "LA_MED";
 295 static const char rf24_pa_dbm_e_str_3[] PROGMEM = "PA_HIGH";
 296 static const char * const rf24_pa_dbm_e_str_P[] PROGMEM = {
 297     rf24_pa_dbm_e_str_0,
 298     rf24_pa_dbm_e_str_1,
 299     rf24_pa_dbm_e_str_2,
 300     rf24_pa_dbm_e_str_3,
 301 };
 302
 303 void nrf24_printDetails(void)
 304 {
 305     print_status(get_status());
 306
 307     print_address_register(PSTR("RX_ADDR_P0-1"),RX_ADDR_P0,2);
 308     print_byte_register(PSTR("RX_ADDR_P2-5"),RX_ADDR_P2,4);
 309     print_address_register(PSTR("TX_ADDR"),TX_ADDR);
 310
 311     print_byte_register(PSTR("RX_PW_P0-6"),RX_PW_P0,6);
 312     print_byte_register(PSTR("EN_AA"),EN_AA);
 313     print_byte_register(PSTR("EN_RXADDR"),EN_RXADDR);
 314     print_byte_register(PSTR("RF_CH"),RF_CH);
 315     print_byte_register(PSTR("RF_SETUP"),RF_SETUP);
 316     print_byte_register(PSTR("CONFIG"),CONFIG);
 317     print_byte_register(PSTR("DYNPD/FEATURE"),DYNPD,2);
 318
 319     uart_puts_p(PSTR("RF24 Data Rate\t = "));
 320     uart_puts(pgm_read_word(&rf24_datarate_e_str_P[getDataRate()]));
 321     uart_putc('\n');
 322     uart_puts_p(PSTR("RF24 Model\t\t = "));
 323     uart_puts(pgm_read_word(&rf24_model_e_str_P[isPVariant()]));
 324     uart_putc('\n');
 325     uart_puts_p(PSTR("RF24 CRC Length\t = "));
 326     uart_puts(pgm_read_word(&rf24_crclength_e_str_P[getCRCLength()]));
 327     uart_putc('\n');
 328     uart_puts_p(PSTR("RF24 PA Power\t = "));
 329     uart_puts(pgm_read_word(&rf24_pa_dbm_e_str_P[getPALevel()]));
 330     uart_putc('\n');
 331 }
 332
 333
 334
 335 void nrf24_begin(void)
 336 {
 337     // Initialize pins
 338     CE_DDR |= _BV(CE_PIN);
 339     CSN_DDR |= _BV(CSN_PIN);
 340
 341     // Initialize SPI bus
 342     spi_begin();
 343
 344     ce(LOW);
 345     csn(HIGH);
 346
 347     // Must allow the radio time to settle else configuration bits will not necessarily stick.
 348     // This is actually only required following power up but some settling time also appears to
 349     // be required after resets too. For full coverage, we'll always assume the worst.
 350     // Enabling 16b CRC is by far the most obvious case if the wrong timing is used - or skipped.
 351     // Technically we require 4.5ms + 14us as a worst case. We'll just call it 5ms for good measure.
 352     // WARNING: Delay is based on P-variant whereby non-P *may* require different timing.
 353     delay( 5 ) ;
 354
 355     // Set 1500uS (minimum for 32B payload in ESB@250KBPS) timeouts, to make testing a little easier
 356     // WARNING: If this is ever lowered, either 250KBS mode with AA is broken or maximum packet
 357     // sizes must never be used. See documentation for a more complete explanation.
 358     write_register(SETUP_RETR,(B0100 << ARD) | (B1111 << ARC));
 359
 360     // Restore our default PA level
 361     setPALevel( RF24_PA_MAX ) ;
 362
 363     // Determine if this is a p or non-p RF24 module and then
 364     // reset our data rate back to default value. This works
 365     // because a non-P variant won't allow the data rate to
 366     // be set to 250Kbps.
 367     if( setDataRate( RF24_250KBPS ) )
 368     {
 369         p_variant = true ;
 370     }
 371
 372     // Then set the data rate to the slowest (and most reliable) speed supported by all
 373     // hardware.
 374     setDataRate( RF24_1MBPS ) ;
 375
 376     // Initialize CRC and request 2-byte (16bit) CRC
 377     setCRCLength( RF24_CRC_16 ) ;
 378
 379     // Disable dynamic payloads, to match dynamic_payloads_enabled setting
 380     write_register(DYNPD,0);
 381
 382     // Reset current status
 383     // Notice reset and flush is the last thing we do
 384     write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
 385
 386     // Set up default configuration.  Callers can always change it later.
 387     // This channel should be universally safe and not bleed over into adjacent
 388     // spectrum.
 389     setChannel(76);
 390
 391     // Flush buffers
 392     flush_rx();
 393     flush_tx();
 394 }
 395
 396
 397
 398 void nrf24_startListening(void)
 399 {
 400     write_register(CONFIG, read_register(CONFIG) | _BV(PWR_UP) | _BV(PRIM_RX));
 401     write_register(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
 402
 403     // Restore the pipe0 adddress, if exists
 404     if (pipe0_reading_address)
 405         write_register(RX_ADDR_P0, (const uint8_t*)(pipe0_reading_address), 5);
 406
 407     // Flush buffers
 408     flush_rx();
 409     flush_tx();
 410
 411     // Go!
 412     ce(HIGH);
 413
 414     // wait for the radio to come up (130us actually only needed)
 415     delayMicroseconds(130);
 416 }
 417
 418
 419
 420 void nrf24_stopListening(void)
 421 {
 422     ce(LOW);
 423     flush_tx();
 424     flush_rx();
 425 }
 426
 427
 428
 429 void nrf24_powerDown(void)
 430 {
 431     write_register(CONFIG,read_register(CONFIG) & ~_BV(PWR_UP));
 432 }
 433
 434
 435
 436 void nrf24_powerUp(void)
 437 {
 438     write_register(CONFIG,read_register(CONFIG) | _BV(PWR_UP));
 439 }
 440
 441
 442
 443 bool nrf24_write( const void* buf, uint8_t len )
 444 {
 445     bool result = false;
 446
 447     // Begin the write
 448     startWrite(buf,len);
 449
 450     // ------------
 451     // At this point we could return from a non-blocking write, and then call
 452     // the rest after an interrupt
 453
 454     // Instead, we are going to block here until we get TX_DS (transmission completed and ack'd)
 455     // or MAX_RT (maximum retries, transmission failed).  Also, we'll timeout in case the radio
 456     // is flaky and we get neither.
 457
 458     // IN the end, the send should be blocking.  It comes back in 60ms worst case, or much faster
 459     // if I tighted up the retry logic.  (Default settings will be 1500us.
 460     // Monitor the send
 461     uint8_t observe_tx;
 462     uint8_t status;
 463     uint32_t sent_at = millis();
 464     const uint32_t timeout = 500; //ms to wait for timeout
 465     do
 466     {
 467         status = read_register(OBSERVE_TX,&observe_tx,1);
 468         IF_SERIAL_DEBUG(uart_puthex(observe_tx));
 469     }
 470     while( ! ( status & ( _BV(TX_DS) | _BV(MAX_RT) ) ) && ( millis() - sent_at < timeout ) );
 471
 472     // The part above is what you could recreate with your own interrupt handler,
 473     // and then call this when you got an interrupt
 474     // ------------
 475
 476     // Call this when you get an interrupt
 477     // The status tells us three things
 478     // * The send was successful (TX_DS)
 479     // * The send failed, too many retries (MAX_RT)
 480     // * There is an ack packet waiting (RX_DR)
 481     bool tx_ok, tx_fail;
 482     whatHappened(tx_ok,tx_fail,ack_payload_available);
 483
 484     //printf("%u%u%u\r\n",tx_ok,tx_fail,ack_payload_available);
 485
 486     result = tx_ok;
 487     IF_SERIAL_DEBUG(uart_puts(result?"...OK.":"...Failed"));
 488
 489     // Handle the ack packet
 490     if ( ack_payload_available )
 491     {
 492         ack_payload_length = getDynamicPayloadSize();
 493 #ifdef SERIAL_DEBUG
 494         uart_puts_p(PSTR("RF24 [AckPacket]/"));
 495         uart_putdec(uart_ack_payload_length);
 496         uart_putc('\n');
 497 #endif//SERIAL_DEBUG
 498     }
 499
 500     // Yay, we are done.
 501
 502     // Power down
 503     powerDown();
 504
 505     // Flush buffers (Is this a relic of past experimentation, and not needed anymore??)
 506     flush_tx();
 507
 508     return result;
 509 }
 510
 511
 512 void nrf24_startWrite( const void* buf, uint8_t len )
 513 {
 514     // Transmitter power-up
 515     write_register(CONFIG, ( read_register(CONFIG) | _BV(PWR_UP) ) & ~_BV(PRIM_RX) );
 516     delayMicroseconds(150);
 517
 518     // Send the payload
 519     write_payload( buf, len );
 520
 521     // Allons!
 522     ce(HIGH);
 523     delayMicroseconds(15);
 524     ce(LOW);
 525 }
 526
 527
 528
 529 uint8_t nrf24_getDynamicPayloadSize(void)
 530 {
 531     uint8_t result = 0;
 532
 533     csn(LOW);
 534     spi_transfer( R_RX_PL_WID );
 535     result = spi_transfer(0xff);
 536     csn(HIGH);
 537
 538     return result;
 539 }
 540
 541
 542
 543 bool nrf24_available(void)
 544 {
 545     return available(NULL);
 546 }
 547
 548
 549
 550 bool nrf24_available(uint8_t* pipe_num)
 551 {
 552     uint8_t status = get_status();
 553
 554     // Too noisy, enable if you really want lots o data!!
 555     //IF_SERIAL_DEBUG(print_status(status));
 556
 557     bool result = ( status & _BV(RX_DR) );
 558
 559     if (result)
 560     {
 561         // If the caller wants the pipe number, include that
 562         if ( pipe_num )
 563             *pipe_num = ( status >> RX_P_NO ) & B111;
 564
 565         // Clear the status bit
 566
 567         // ??? Should this REALLY be cleared now?  Or wait until we
 568         // actually READ the payload?
 569
 570         write_register(STATUS,_BV(RX_DR) );
 571
 572         // Handle ack payload receipt
 573         if ( status & _BV(TX_DS) )
 574         {
 575             write_register(STATUS,_BV(TX_DS));
 576         }
 577     }
 578
 579     return result;
 580 }
 581
 582
 583
 584 bool nrf24_read( void* buf, uint8_t len )
 585 {
 586     // Fetch the payload
 587     read_payload( buf, len );
 588
 589     // was this the last of the data available?
 590     return read_register(FIFO_STATUS) & _BV(RX_EMPTY);
 591 }
 592
 593
 594
 595 void nrf24_whatHappened(bool& tx_ok,bool& tx_fail,bool& rx_ready)
 596 {
 597     // Read the status & reset the status in one easy call
 598     // Or is that such a good idea?
 599     uint8_t status = write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
 600
 601     // Report to the user what happened
 602     tx_ok = status & _BV(TX_DS);
 603     tx_fail = status & _BV(MAX_RT);
 604     rx_ready = status & _BV(RX_DR);
 605 }
 606
 607
 608
 609 void nrf24_openWritingPipe(uint64_t value)
 610 {
 611     // Note that AVR 8-bit uC's store this LSB first, and the NRF24L01(+)
 612     // expects it LSB first too, so we're good.
 613
 614     write_register(RX_ADDR_P0, (uint8_t*)(&value), 5);
 615     write_register(TX_ADDR, (uint8_t*)(&value), 5);
 616
 617     const uint8_t max_payload_size = 32;
 618     write_register(RX_PW_P0,min(payload_size,max_payload_size));
 619 }
 620
 621
 622
 623 static const uint8_t child_pipe[] PROGMEM =
 624 {
 625     RX_ADDR_P0, RX_ADDR_P1, RX_ADDR_P2, RX_ADDR_P3, RX_ADDR_P4, RX_ADDR_P5
 626 };
 627 static const uint8_t child_payload_size[] PROGMEM =
 628 {
 629     RX_PW_P0, RX_PW_P1, RX_PW_P2, RX_PW_P3, RX_PW_P4, RX_PW_P5
 630 };
 631 static const uint8_t child_pipe_enable[] PROGMEM =
 632 {
 633     ERX_P0, ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5
 634 };
 635
 636 void nrf24_openReadingPipe(uint8_t child, uint64_t address)
 637 {
 638     // If this is pipe 0, cache the address.  This is needed because
 639     // openWritingPipe() will overwrite the pipe 0 address, so
 640     // startListening() will have to restore it.
 641     if (child == 0)
 642         pipe0_reading_address = address;
 643
 644     if (child <= 6)
 645     {
 646         // For pipes 2-5, only write the LSB
 647         if ( child < 2 )
 648             write_register(pgm_read_byte(&child_pipe[child]), (const uint8_t*)(&address), 5);
 649         else
 650             write_register(pgm_read_byte(&child_pipe[child]), (const uint8_t*)(&address), 1);
 651
 652         write_register(pgm_read_byte(&child_payload_size[child]),payload_size);
 653
 654         // Note it would be more efficient to set all of the bits for all open
 655         // pipes at once.  However, I thought it would make the calling code
 656         // more simple to do it this way.
 657         write_register(EN_RXADDR,read_register(EN_RXADDR) | _BV(pgm_read_byte(&child_pipe_enable[child])));
 658     }
 659 }
 660
 661
 662
 663 void nrf24_toggle_features(void)
 664 {
 665     csn(LOW);
 666     spi_transfer( ACTIVATE );
 667     spi_transfer( 0x73 );
 668     csn(HIGH);
 669 }
 670
 671
 672
 673 void nrf24_enableDynamicPayloads(void)
 674 {
 675     // Enable dynamic payload throughout the system
 676     write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) );
 677
 678     // If it didn't work, the features are not enabled
 679     if ( ! read_register(FEATURE) )
 680     {
 681         // So enable them and try again
 682         toggle_features();
 683         write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) );
 684     }
 685
 686 #ifdef SERIAL_DEBUG
 687     uart_puts_p(PSTR("RF24 FEATURE="));
 688     uart_putdec(read_register(FEATURE));
 689     uart_putc('\n');
 690 #endif//SERIAL_DEBUG
 691
 692     // Enable dynamic payload on all pipes
 693     //
 694     // Not sure the use case of only having dynamic payload on certain
 695     // pipes, so the library does not support it.
 696     write_register(DYNPD,read_register(DYNPD) | _BV(DPL_P5) | _BV(DPL_P4) | _BV(DPL_P3) | _BV(DPL_P2) | _BV(DPL_P1) | _BV(DPL_P0));
 697
 698     dynamic_payloads_enabled = true;
 699 }
 700
 701
 702
 703 void nrf24_enableAckPayload(void)
 704 {
 705     //
 706     // enable ack payload and dynamic payload features
 707     //
 708
 709     write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) );
 710
 711     // If it didn't work, the features are not enabled
 712     if ( ! read_register(FEATURE) )
 713     {
 714         // So enable them and try again
 715         toggle_features();
 716         write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) );
 717     }
 718
 719 #ifdef SERIAL_DEBUG
 720     uart_puts_p(PSTR("RF24 FEATURE="));
 721     uart_putdec(read_register(FEATURE));
 722     uart_putc('\n');
 723 #endif
 724
 725     //
 726     // Enable dynamic payload on pipes 0 & 1
 727     //
 728
 729     write_register(DYNPD,read_register(DYNPD) | _BV(DPL_P1) | _BV(DPL_P0));
 730 }
 731
 732
 733
 734 void nrf24_writeAckPayload(uint8_t pipe, const void* buf, uint8_t len)
 735 {
 736     const uint8_t* current = (const uint8_t*)(buf);
 737
 738     csn(LOW);
 739     spi_transfer( W_ACK_PAYLOAD | ( pipe & B111 ) );
 740     const uint8_t max_payload_size = 32;
 741     uint8_t data_len = min(len,max_payload_size);
 742     while ( data_len-- )
 743         spi_transfer(*current++);
 744
 745     csn(HIGH);
 746 }
 747
 748
 749
 750 bool nrf24_isAckPayloadAvailable(void)
 751 {
 752     bool result = ack_payload_available;
 753     ack_payload_available = false;
 754     return result;
 755 }
 756
 757
 758
 759 bool nrf24_isPVariant(void)
 760 {
 761     return p_variant ;
 762 }
 763
 764
 765
 766 void nrf24_setAutoAck(bool enable)
 767 {
 768     if ( enable )
 769         write_register(EN_AA, 0x3F);
 770     else
 771         write_register(EN_AA, 0);
 772 }
 773
 774
 775
 776 void nrf24_setAutoAck( uint8_t pipe, bool enable )
 777 {
 778     if ( pipe <= 6 )
 779     {
 780         uint8_t en_aa = read_register( EN_AA ) ;
 781         if( enable )
 782         {
 783             en_aa |= _BV(pipe) ;
 784         }
 785         else
 786         {
 787             en_aa &= ~_BV(pipe) ;
 788         }
 789         write_register( EN_AA, en_aa ) ;
 790     }
 791 }
 792
 793
 794
 795 bool nrf24_testCarrier(void)
 796 {
 797     return ( read_register(CD) & 1 );
 798 }
 799
 800
 801
 802 bool nrf24_testRPD(void)
 803 {
 804     return ( read_register(RPD) & 1 ) ;
 805 }
 806
 807
 808
 809 void nrf24_setPALevel(rf24_pa_dbm_e level)
 810 {
 811     uint8_t setup = read_register(RF_SETUP) ;
 812     setup &= ~(_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
 813
 814     // switch uses RAM (evil!)
 815     if ( level == RF24_PA_MAX )
 816     {
 817         setup |= (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
 818     }
 819     else if ( level == RF24_PA_HIGH )
 820     {
 821         setup |= _BV(RF_PWR_HIGH) ;
 822     }
 823     else if ( level == RF24_PA_LOW )
 824     {
 825         setup |= _BV(RF_PWR_LOW);
 826     }
 827     else if ( level == RF24_PA_MIN )
 828     {
 829         // nothing
 830     }
 831     else if ( level == RF24_PA_ERROR )
 832     {
 833         // On error, go to maximum PA
 834         setup |= (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
 835     }
 836
 837     write_register( RF_SETUP, setup ) ;
 838 }
 839
 840
 841
 842 rf24_pa_dbm_e nrf24_getPALevel(void)
 843 {
 844     rf24_pa_dbm_e result = RF24_PA_ERROR ;
 845     uint8_t power = read_register(RF_SETUP) & (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
 846
 847     // switch uses RAM (evil!)
 848     if ( power == (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) )
 849     {
 850         result = RF24_PA_MAX ;
 851     }
 852     else if ( power == _BV(RF_PWR_HIGH) )
 853     {
 854         result = RF24_PA_HIGH ;
 855     }
 856     else if ( power == _BV(RF_PWR_LOW) )
 857     {
 858         result = RF24_PA_LOW ;
 859     }
 860     else
 861     {
 862         result = RF24_PA_MIN ;
 863     }
 864
 865     return result ;
 866 }
 867
 868
 869
 870 bool nrf24_setDataRate(rf24_datarate_e speed)
 871 {
 872     bool result = false;
 873     uint8_t setup = read_register(RF_SETUP) ;
 874
 875     // HIGH and LOW '00' is 1Mbs - our default
 876     wide_band = false ;
 877     setup &= ~(_BV(RF_DR_LOW) | _BV(RF_DR_HIGH)) ;
 878     if( speed == RF24_250KBPS )
 879     {
 880         // Must set the RF_DR_LOW to 1; RF_DR_HIGH (used to be RF_DR) is already 0
 881         // Making it '10'.
 882         wide_band = false ;
 883         setup |= _BV( RF_DR_LOW ) ;
 884     }
 885     else
 886     {
 887         // Set 2Mbs, RF_DR (RF_DR_HIGH) is set 1
 888         // Making it '01'
 889         if ( speed == RF24_2MBPS )
 890         {
 891             wide_band = true ;
 892             setup |= _BV(RF_DR_HIGH);
 893         }
 894         else
 895         {
 896             // 1Mbs
 897             wide_band = false ;
 898         }
 899     }
 900     write_register(RF_SETUP,setup);
 901
 902     // Verify our result
 903     if ( read_register(RF_SETUP) == setup )
 904     {
 905         result = true;
 906     }
 907     else
 908     {
 909         wide_band = false;
 910     }
 911
 912     return result;
 913 }
 914
 915
 916
 917 rf24_datarate_e nrf24_getDataRate( void )
 918 {
 919     rf24_datarate_e result ;
 920     uint8_t dr = read_register(RF_SETUP) & (_BV(RF_DR_LOW) | _BV(RF_DR_HIGH));
 921
 922     // switch uses RAM (evil!)
 923     // Order matters in our case below
 924     if ( dr == _BV(RF_DR_LOW) )
 925     {
 926         // '10' = 250KBPS
 927         result = RF24_250KBPS ;
 928     }
 929     else if ( dr == _BV(RF_DR_HIGH) )
 930     {
 931         // '01' = 2MBPS
 932         result = RF24_2MBPS ;
 933     }
 934     else
 935     {
 936         // '00' = 1MBPS
 937         result = RF24_1MBPS ;
 938     }
 939     return result ;
 940 }
 941
 942
 943
 944 void nrf24_setCRCLength(rf24_crclength_e length)
 945 {
 946     uint8_t config = read_register(CONFIG) & ~( _BV(CRCO) | _BV(EN_CRC)) ;
 947
 948     // switch uses RAM (evil!)
 949     if ( length == RF24_CRC_DISABLED )
 950     {
 951         // Do nothing, we turned it off above.
 952     }
 953     else if ( length == RF24_CRC_8 )
 954     {
 955         config |= _BV(EN_CRC);
 956     }
 957     else
 958     {
 959         config |= _BV(EN_CRC);
 960         config |= _BV( CRCO );
 961     }
 962     write_register( CONFIG, config ) ;
 963 }
 964
 965
 966
 967 rf24_crclength_e nrf24_getCRCLength(void)
 968 {
 969     rf24_crclength_e result = RF24_CRC_DISABLED;
 970     uint8_t config = read_register(CONFIG) & ( _BV(CRCO) | _BV(EN_CRC)) ;
 971
 972     if ( config & _BV(EN_CRC ) )
 973     {
 974         if ( config & _BV(CRCO) )
 975             result = RF24_CRC_16;
 976         else
 977             result = RF24_CRC_8;
 978     }
 979
 980     return result;
 981 }
 982
 983
 984
 985 void nrf24_disableCRC( void )
 986 {
 987     uint8_t disable = read_register(CONFIG) & ~_BV(EN_CRC) ;
 988     write_register( CONFIG, disable ) ;
 989 }
 990
 991
 992 void nrf24_setRetries(uint8_t delay, uint8_t count)
 993 {
 994     write_register(SETUP_RETR,(delay&0xf)<<ARD | (count&0xf)<<ARC);
 995 }