forwarding: The intel code has been updated to version 8.0.35, and the rx queue hang...
[AROS.git] / workbench / devs / networks / e1000 / e1000_manage.c
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1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2010 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include "e1000_api.h"
31 /**
32 * e1000_calculate_checksum - Calculate checksum for buffer
33 * @buffer: pointer to EEPROM
34 * @length: size of EEPROM to calculate a checksum for
36 * Calculates the checksum for some buffer on a specified length. The
37 * checksum calculated is returned.
38 **/
39 static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
41 u32 i;
42 u8 sum = 0;
44 DEBUGFUNC("e1000_calculate_checksum");
46 if (!buffer)
47 return 0;
49 for (i = 0; i < length; i++)
50 sum += buffer[i];
52 return (u8) (0 - sum);
55 /**
56 * e1000_mng_enable_host_if_generic - Checks host interface is enabled
57 * @hw: pointer to the HW structure
59 * Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
61 * This function checks whether the HOST IF is enabled for command operation
62 * and also checks whether the previous command is completed. It busy waits
63 * in case of previous command is not completed.
64 **/
65 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
67 u32 hicr;
68 s32 ret_val = E1000_SUCCESS;
69 u8 i;
71 DEBUGFUNC("e1000_mng_enable_host_if_generic");
73 if (!(hw->mac.arc_subsystem_valid)) {
74 DEBUGOUT("ARC subsystem not valid.\n");
75 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
76 goto out;
79 /* Check that the host interface is enabled. */
80 hicr = E1000_READ_REG(hw, E1000_HICR);
81 if ((hicr & E1000_HICR_EN) == 0) {
82 DEBUGOUT("E1000_HOST_EN bit disabled.\n");
83 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
84 goto out;
86 /* check the previous command is completed */
87 for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
88 hicr = E1000_READ_REG(hw, E1000_HICR);
89 if (!(hicr & E1000_HICR_C))
90 break;
91 msec_delay_irq(1);
94 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
95 DEBUGOUT("Previous command timeout failed .\n");
96 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
97 goto out;
100 out:
101 return ret_val;
105 * e1000_check_mng_mode_generic - Generic check management mode
106 * @hw: pointer to the HW structure
108 * Reads the firmware semaphore register and returns true (>0) if
109 * manageability is enabled, else false (0).
111 bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
113 u32 fwsm = E1000_READ_REG(hw, E1000_FWSM);
115 DEBUGFUNC("e1000_check_mng_mode_generic");
118 return (fwsm & E1000_FWSM_MODE_MASK) ==
119 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
123 * e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on Tx
124 * @hw: pointer to the HW structure
126 * Enables packet filtering on transmit packets if manageability is enabled
127 * and host interface is enabled.
129 bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
131 struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
132 u32 *buffer = (u32 *)&hw->mng_cookie;
133 u32 offset;
134 s32 ret_val, hdr_csum, csum;
135 u8 i, len;
137 DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
139 hw->mac.tx_pkt_filtering = true;
141 /* No manageability, no filtering */
142 if (!hw->mac.ops.check_mng_mode(hw)) {
143 hw->mac.tx_pkt_filtering = false;
144 goto out;
148 * If we can't read from the host interface for whatever
149 * reason, disable filtering.
151 ret_val = hw->mac.ops.mng_enable_host_if(hw);
152 if (ret_val != E1000_SUCCESS) {
153 hw->mac.tx_pkt_filtering = false;
154 goto out;
157 /* Read in the header. Length and offset are in dwords. */
158 len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
159 offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
160 for (i = 0; i < len; i++)
161 *(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF,
162 offset + i);
163 hdr_csum = hdr->checksum;
164 hdr->checksum = 0;
165 csum = e1000_calculate_checksum((u8 *)hdr,
166 E1000_MNG_DHCP_COOKIE_LENGTH);
168 * If either the checksums or signature don't match, then
169 * the cookie area isn't considered valid, in which case we
170 * take the safe route of assuming Tx filtering is enabled.
172 if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
173 hw->mac.tx_pkt_filtering = true;
174 goto out;
177 /* Cookie area is valid, make the final check for filtering. */
178 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) {
179 hw->mac.tx_pkt_filtering = false;
180 goto out;
183 out:
184 return hw->mac.tx_pkt_filtering;
188 * e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
189 * @hw: pointer to the HW structure
190 * @buffer: pointer to the host interface
191 * @length: size of the buffer
193 * Writes the DHCP information to the host interface.
195 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
196 u16 length)
198 struct e1000_host_mng_command_header hdr;
199 s32 ret_val;
200 u32 hicr;
202 DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
204 hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
205 hdr.command_length = length;
206 hdr.reserved1 = 0;
207 hdr.reserved2 = 0;
208 hdr.checksum = 0;
210 /* Enable the host interface */
211 ret_val = hw->mac.ops.mng_enable_host_if(hw);
212 if (ret_val)
213 goto out;
215 /* Populate the host interface with the contents of "buffer". */
216 ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
217 sizeof(hdr), &(hdr.checksum));
218 if (ret_val)
219 goto out;
221 /* Write the manageability command header */
222 ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
223 if (ret_val)
224 goto out;
226 /* Tell the ARC a new command is pending. */
227 hicr = E1000_READ_REG(hw, E1000_HICR);
228 E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
230 out:
231 return ret_val;
235 * e1000_mng_write_cmd_header_generic - Writes manageability command header
236 * @hw: pointer to the HW structure
237 * @hdr: pointer to the host interface command header
239 * Writes the command header after does the checksum calculation.
241 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
242 struct e1000_host_mng_command_header *hdr)
244 u16 i, length = sizeof(struct e1000_host_mng_command_header);
246 DEBUGFUNC("e1000_mng_write_cmd_header_generic");
248 /* Write the whole command header structure with new checksum. */
250 hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
252 length >>= 2;
253 /* Write the relevant command block into the ram area. */
254 for (i = 0; i < length; i++) {
255 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
256 *((u32 *) hdr + i));
257 E1000_WRITE_FLUSH(hw);
260 return E1000_SUCCESS;
264 * e1000_mng_host_if_write_generic - Write to the manageability host interface
265 * @hw: pointer to the HW structure
266 * @buffer: pointer to the host interface buffer
267 * @length: size of the buffer
268 * @offset: location in the buffer to write to
269 * @sum: sum of the data (not checksum)
271 * This function writes the buffer content at the offset given on the host if.
272 * It also does alignment considerations to do the writes in most efficient
273 * way. Also fills up the sum of the buffer in *buffer parameter.
275 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
276 u16 length, u16 offset, u8 *sum)
278 u8 *tmp;
279 u8 *bufptr = buffer;
280 u32 data = 0;
281 s32 ret_val = E1000_SUCCESS;
282 u16 remaining, i, j, prev_bytes;
284 DEBUGFUNC("e1000_mng_host_if_write_generic");
286 /* sum = only sum of the data and it is not checksum */
288 if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
289 ret_val = -E1000_ERR_PARAM;
290 goto out;
293 tmp = (u8 *)&data;
294 prev_bytes = offset & 0x3;
295 offset >>= 2;
297 if (prev_bytes) {
298 data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
299 for (j = prev_bytes; j < sizeof(u32); j++) {
300 *(tmp + j) = *bufptr++;
301 *sum += *(tmp + j);
303 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
304 length -= j - prev_bytes;
305 offset++;
308 remaining = length & 0x3;
309 length -= remaining;
311 /* Calculate length in DWORDs */
312 length >>= 2;
315 * The device driver writes the relevant command block into the
316 * ram area.
318 for (i = 0; i < length; i++) {
319 for (j = 0; j < sizeof(u32); j++) {
320 *(tmp + j) = *bufptr++;
321 *sum += *(tmp + j);
324 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
325 data);
327 if (remaining) {
328 for (j = 0; j < sizeof(u32); j++) {
329 if (j < remaining)
330 *(tmp + j) = *bufptr++;
331 else
332 *(tmp + j) = 0;
334 *sum += *(tmp + j);
336 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
339 out:
340 return ret_val;
344 * e1000_enable_mng_pass_thru - Check if management passthrough is needed
345 * @hw: pointer to the HW structure
347 * Verifies the hardware needs to leave interface enabled so that frames can
348 * be directed to and from the management interface.
350 bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
352 u32 manc;
353 u32 fwsm, factps;
354 bool ret_val = false;
356 DEBUGFUNC("e1000_enable_mng_pass_thru");
358 if (!hw->mac.asf_firmware_present)
359 goto out;
361 manc = E1000_READ_REG(hw, E1000_MANC);
363 if (!(manc & E1000_MANC_RCV_TCO_EN))
364 goto out;
366 if (hw->mac.has_fwsm) {
367 fwsm = E1000_READ_REG(hw, E1000_FWSM);
368 factps = E1000_READ_REG(hw, E1000_FACTPS);
370 if (!(factps & E1000_FACTPS_MNGCG) &&
371 ((fwsm & E1000_FWSM_MODE_MASK) ==
372 (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
373 ret_val = true;
374 goto out;
376 } else if ((manc & E1000_MANC_SMBUS_EN) &&
377 !(manc & E1000_MANC_ASF_EN)) {
378 ret_val = true;
379 goto out;
382 out:
383 return ret_val;