rom/devs/ata/ata.h

   1 #ifndef _ATA_H
   2 #define _ATA_H
   3
   4 /*
   5     Copyright © 2004-2012, The AROS Development Team. All rights reserved.
   6     $Id$
   7
   8     Desc: ata.device main private include file
   9     Lang: English
  10 */
  11
  12 #include <exec/types.h>
  13 #include <exec/devices.h>
  14 #include <exec/semaphores.h>
  15 #include <exec/execbase.h>
  16 #include <exec/libraries.h>
  17 #include <exec/ports.h>
  18 #include <utility/utility.h>
  19 #include <exec/io.h>
  20 #include <exec/errors.h>
  21 #include <devices/trackdisk.h>
  22 #include <devices/scsidisk.h>
  23 #include <devices/newstyle.h>
  24 #include <devices/timer.h>
  25 #include <devices/cd.h>
  26
  27 #include "include/scsicmds.h"
  28 #include "ata_bus.h"
  29
  30 #define MAX_DEVICEBUSES         2
  31 #define MAX_BUSUNITS            2
  32 #define STACK_SIZE              16384
  33 #define TASK_PRI                10
  34 #define TIMEOUT                 30
  35
  36 /*
  37    Don't blame me for information redundance here!
  38
  39    Please note, that all structures here are more or less chained together.
  40    The aim is, every single function in ata.device, no matter whether it takes
  41    ata_Unit or ata_Bus or God knows what else, would have access to ata device
  42    base and through it, to all other device structures.
  43
  44    I just wanted to avoid passing ataBase everywhere. :-D
  45    */
  46
  47 /* structure forward declarations */
  48 struct ata_Unit;
  49 struct ata_Bus;
  50
  51 /*
  52  * this **might** cause problems with PPC64, which **might** expect both to be 64bit.
  53  */
  54 struct PRDEntry {
  55    ULONG   prde_Address;
  56    ULONG   prde_Length;
  57 };
  58
  59 #define PRDE_EOT    0x80000000
  60 #define PRD_MAX     514
  61
  62 /* ata.device base */
  63 struct ataBase
  64 {
  65    /*
  66     * Device structure - used to manage devices by exec guts^h^h^hoods
  67     */
  68    struct Device           ata_Device;
  69
  70    /*
  71     * master task pointer
  72     */
  73    struct Task            *ata_Daemon;
  74
  75    /*
  76     * list of all buses - we may have more than just 4
  77     */
  78    struct MinList          ata_Buses;
  79    int                     ata__buscount;
  80
  81    /*
  82     * Arguments and flags
  83     */
  84    UBYTE                   ata_32bit;
  85    UBYTE                   ata_NoMulti;
  86    UBYTE                   ata_NoDMA;
  87    UBYTE                   ata_Poll;
  88    STRPTR                  ata_CmdLine;
  89
  90    /*
  91     * memory pool
  92     */
  93    APTR                    ata_MemPool;
  94
  95    struct Device          *ata_TimerBase;
  96    ULONG                   ata_ItersPer100ns;
  97 };
  98
  99 /*
 100    The single IDE bus (channel)
 101    */
 102 struct ata_Bus
 103 {
 104    struct MinNode          ab_Node;    /* exec node */
 105    struct ataBase          *ab_Base;   /* device self */
 106    ULONG                   ab_Port;    /* IO port used */
 107    ULONG                   ab_Alt;     /* alternate io port */
 108    UBYTE                   ab_IRQ;     /* IRQ number used */
 109    UBYTE                   ab_Dev[2];  /* Master/Slave type, see below */
 110    UBYTE                   ab_Flags;   /* Bus flags similar to unit flags */
 111    BYTE                    ab_SleepySignal; /* Signal used to wake the task up, when it's waiting */
 112    /* for data requests/DMA */
 113    UBYTE                   ab_BusNum;  /* bus id - used to calculate device id */
 114    volatile LONG           ab_Timeout; /* in seconds; please note that resolution is low (1sec) */
 115
 116    struct ata_Unit         *ab_Units[MAX_BUSUNITS];    /* Units on the bus */
 117    struct ata_Unit         *ab_SelectedUnit;    /* Currently selected unit */
 118
 119    struct Interrupt        ab_IntHandler;
 120    ULONG                   ab_IntCnt;
 121
 122    struct Task             *ab_Task;       /* Bus task handling all not-immediate transactions */
 123    struct MsgPort          *ab_MsgPort;    /* Task's message port */
 124    struct PRDEntry         *ab_PRD;
 125    struct IORequest        *ab_Timer;      /* timer stuff */
 126
 127    struct Interrupt        ab_ResetInt;
 128
 129    /* functions go here */
 130    void                   (*ab_HandleIRQ)(struct ata_Unit* unit, UBYTE status);
 131
 132    /* Bus driver stuff */
 133    const struct ata_BusDriver *ab_Driver;
 134    APTR                        ab_DriverData;
 135 };
 136
 137 /* Device types */
 138 #define DEV_NONE        0x00
 139 #define DEV_UNKNOWN     0x01
 140 #define DEV_ATA         0x02
 141 #define DEV_SATA        0x03
 142 #define DEV_ATAPI       0x80
 143 #define DEV_SATAPI      0x81
 144
 145 /*
 146    DriveIdent structure as returned by ATA_IDENTIFY_[DEVICE|ATAPI]
 147    */
 148 struct DriveIdent {
 149    UWORD       id_General;             // 0
 150    UWORD       id_OldCylinders;        // 1
 151    UWORD       id_SpecificConfig;      // 2
 152    UWORD       id_OldHeads;            // 3
 153    UWORD       pad1[2];                // 4-5
 154    UWORD       id_OldSectors;          // 6
 155    UWORD       pad2[3];                // 7-9
 156    UBYTE       id_SerialNumber[20];    // 10-19
 157    UWORD       pad3[3];                // 20-22
 158    UBYTE       id_FirmwareRev[8];      // 23-26
 159    UBYTE       id_Model[40];           // 27-46
 160    UWORD       id_RWMultipleSize;      // 47
 161    UWORD       pad4;                   // 48
 162    UWORD       id_Capabilities;        // 49
 163    UWORD       id_OldCaps;             // 50
 164    UWORD       id_OldPIO;              // 51
 165    UWORD       pad5;                   // 52
 166    UWORD       id_ConfigAvailable;     // 53
 167    UWORD       id_OldLCylinders;       // 54
 168    UWORD       id_OldLHeads;           // 55
 169    UWORD       id_OldLSectors;         // 56
 170    UWORD       pad6[2];                // 57-58
 171    UWORD       id_RWMultipleTrans;     // 59
 172    ULONG       id_LBASectors;          // 60-61
 173    UWORD       id_DMADir;              // 62
 174    UWORD       id_MWDMASupport;        // 63
 175    UWORD       id_PIOSupport;          // 64
 176    UWORD       id_MWDMA_MinCycleTime;  // 65
 177    UWORD       id_MWDMA_DefCycleTime;  // 66
 178    UWORD       id_PIO_MinCycleTime;    // 67
 179    UWORD       id_PIO_MinCycleTimeIORDY; // 68
 180    UWORD       pad8[6];                // 69-74
 181    UWORD       id_QueueDepth;          // 75
 182    UWORD       pad9[4];                // 76-79
 183    UWORD       id_ATAVersion;          // 80
 184    UWORD       id_ATARevision;         // 81
 185    UWORD       id_Commands1;           // 82
 186    UWORD       id_Commands2;           // 83
 187    UWORD       id_Commands3;           // 84
 188    UWORD       id_Commands4;           // 85
 189    UWORD       id_Commands5;           // 86
 190    UWORD       id_Commands6;           // 87
 191    UWORD       id_UDMASupport;         // 88
 192    UWORD       id_SecurityEraseTime;   // 89
 193    UWORD       id_ESecurityEraseTime;  // 90
 194    UWORD       id_CurrentAdvPowerMode; // 91
 195    UWORD       id_MasterPwdRevision;   // 92
 196    UWORD       id_HWResetResult;       // 93
 197    UWORD       id_AcousticManagement;  // 94
 198    UWORD       id_StreamMinimunReqSize; // 95
 199    UWORD       id_StreamingTimeDMA;    // 96
 200    UWORD       id_StreamingLatency;    // 97
 201    ULONG       id_StreamingGranularity; // 98-99
 202    UQUAD       id_LBA48Sectors;        // 100-103
 203    UWORD       id_StreamingTimePIO;    // 104
 204    UWORD       pad10;                  // 105
 205    UWORD       id_PhysSectorSize;      // 106
 206    UWORD       pad11;                  // 107
 207    UQUAD       id_UniqueIDi[2];        // 108-115
 208    UWORD       pad12;                  // 116
 209    ULONG       id_WordsPerLogicalSector; // 117-118
 210    UWORD       pad13[8];               // 119-126
 211    UWORD       id_RemMediaStatusNotificationFeatures; // 127
 212    UWORD       id_SecurityStatus;      // 128
 213    UWORD       pad14[127];
 214 } __attribute__((packed));
 215
 216 typedef struct
 217 {
 218    UBYTE command;       // current ATA command
 219    UBYTE feature;       // FF to indicate no feature
 220    UBYTE secmul;        // for read multiple - multiplier. default 1
 221    UBYTE pad;
 222    UQUAD blk;
 223    ULONG sectors;
 224    APTR  buffer;
 225    ULONG length;
 226    ULONG actual;
 227
 228    enum
 229    {
 230       CM_NoData,
 231       CM_PIORead,
 232       CM_PIOWrite,
 233       CM_DMARead,
 234       CM_DMAWrite
 235    } method;
 236    enum
 237    {
 238       CT_NoBlock,
 239       CT_LBA28,
 240       CT_LBA48,
 241    } type;
 242 } ata_CommandBlock;
 243
 244 /*
 245    Unit structure describing given device on the bus. It contains all the
 246    necessary information unit/device may need.
 247    */
 248 struct ata_Unit
 249 {
 250    struct Unit         au_Unit;   /* exec's unit */
 251    struct DriveIdent  *au_Drive;  /* Drive Ident after IDENTIFY command */
 252    struct ata_Bus     *au_Bus;    /* Bus on which this unit is */
 253
 254    ULONG               au_DMAPort;
 255    ULONG               au_XferModes;   /* available transfer modes */
 256
 257    ULONG               au_Capacity;    /* Highest sector accessible through LBA28 */
 258    UQUAD               au_Capacity48;  /* Highest sector accessible through LBA48 */
 259    ULONG               au_Cylinders;
 260    UBYTE               au_Heads;
 261    UBYTE               au_Sectors;
 262    UBYTE               au_Model[41];
 263    UBYTE               au_FirmwareRev[9];
 264    UBYTE               au_SerialNumber[21];
 265
 266    /*
 267       Here are stored pointers to functions responsible for handling this
 268       device. They are set during device initialization and point to most
 269       effective functions for this particular unit. Read/Write may be done
 270       in PIO mode reading single sectors, using multisector PIO, or
 271       multiword DMA.
 272       */
 273    BYTE        (*au_Read32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 274    BYTE        (*au_Write32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 275    BYTE        (*au_Read64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 276    BYTE        (*au_Write64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 277    BYTE        (*au_Eject)(struct ata_Unit *);
 278    BYTE        (*au_DirectSCSI)(struct ata_Unit *, struct SCSICmd*);
 279    BYTE        (*au_Identify)(struct ata_Unit *);
 280
 281    VOID                (*au_ins)(APTR, UWORD, ULONG, APTR);
 282    VOID                (*au_outs)(APTR, UWORD, ULONG, APTR);
 283
 284    ULONG               au_UnitNum;     /* Unit number as coded by device */
 285    ULONG               au_Flags;       /* Unit flags, see below */
 286    ULONG               au_ChangeNum;   /* Number of disc changes */
 287
 288    struct Interrupt   *au_RemoveInt;  /* Raise this interrupt on a disc change */
 289    struct List         au_SoftList;    /* Raise even more interrupts from this list on disc change */
 290
 291    UBYTE               au_SectorShift;         /* Sector shift. 9 here is 512 bytes sector */
 292    UBYTE               au_DevMask;             /* device mask used to simplify device number coding */
 293    UBYTE               au_SenseKey;            /* Sense key from ATAPI devices */
 294    UBYTE               au_DevType;
 295
 296    /******* PIO IO ********/
 297    APTR                au_cmd_data;
 298    ULONG               au_cmd_length;
 299    ULONG               au_cmd_total;
 300    ULONG               au_cmd_error;
 301 };
 302
 303 typedef enum
 304 {
 305    AB_XFER_PIO0 = 0,
 306    AB_XFER_PIO1,
 307    AB_XFER_PIO2,
 308    AB_XFER_PIO3,
 309    AB_XFER_PIO4,
 310
 311    AB_XFER_MDMA0,
 312    AB_XFER_MDMA1,
 313    AB_XFER_MDMA2,
 314
 315    AB_XFER_UDMA0,
 316    AB_XFER_UDMA1,
 317    AB_XFER_UDMA2,
 318    AB_XFER_UDMA3,
 319    AB_XFER_UDMA4,
 320    AB_XFER_UDMA5,
 321    AB_XFER_UDMA6,
 322
 323    AB_XFER_48BIT,
 324    AB_XFER_RWMULTI,
 325    AB_XFER_PACKET,
 326    AB_XFER_LBA,
 327    AB_XFER_DMA,
 328
 329 } ata_XferMode;
 330
 331 #define AF_XFER_PIO(x)  (1<<(AB_XFER_PIO0+(x)))
 332 #define AF_XFER_MDMA(x) (1<<(AB_XFER_MDMA0+(x)))
 333 #define AF_XFER_UDMA(x) (1<<(AB_XFER_UDMA0+(x)))
 334 #define AF_XFER_48BIT   (1<<(AB_XFER_48BIT))
 335 #define AF_XFER_RWMULTI (1<<(AB_XFER_RWMULTI))
 336 #define AF_XFER_PACKET  (1<<(AB_XFER_PACKET))
 337 #define AF_XFER_LBA     (1<<(AB_XFER_LBA))
 338 #define AF_XFER_DMA     (1<<(AB_XFER_DMA))
 339
 340 /* Unit internal flags */
 341 #define AB_DiscPresent          30     /* disc now in drive */
 342 #define AB_DiscChanged          29     /* disc changed */
 343 #define AB_Removable            28     /* media removable */
 344 #define AB_80Wire               27     /* has an 80-wire cable */
 345
 346 #define AF_DiscPresent          (1 << AB_DiscPresent)
 347 #define AF_DiscChanged          (1 << AB_DiscChanged)
 348 #define AF_Removable            (1 << AB_Removable)
 349 #define AF_80Wire               (1 << AB_80Wire)
 350
 351 /* RegisterBus flags */
 352 #define ARBB_80Wire              0
 353 #define ARBB_EarlyInterrupt      1
 354
 355 #define ARBF_80Wire              (1 << ARBB_80Wire)
 356 #define ARBF_EarlyInterrupt      (1 << ARBB_EarlyInterrupt)
 357
 358 /* ATA/ATAPI registers */
 359 #define ata_Error           1
 360 #define ata_Feature         1
 361 #define ata_Count           2
 362 #define ata_LBALow          3
 363 #define ata_LBAMid          4
 364 #define ata_LBAHigh         5
 365 #define ata_DevHead         6
 366 #define ata_Status          7
 367 #define ata_Command         7
 368 #define ata_AltStatus       0x2
 369 #define ata_AltControl      0x2
 370
 371 #define ATA_OUT(val, offset, port)  unit->au_Bus->ab_Driver->ata_out((val), (offset), (port), unit->au_Bus->ab_DriverData)
 372 #define ATA_IN(offset, port)        unit->au_Bus->ab_Driver->ata_in((offset), (port), unit->au_Bus->ab_DriverData)
 373 #define ATA_OUTL(val, offset, port) unit->au_Bus->ab_Driver->ata_outl((val), (offset), (port), unit->au_Bus->ab_DriverData)
 374
 375 #define BUS_OUT(val, offset, port)  bus->ab_Driver->ata_out((val), (offset), (port), bus->ab_DriverData)
 376 #define BUS_IN(offset, port)        bus->ab_Driver->ata_in((offset), (port), bus->ab_DriverData)
 377 #define BUS_OUTL(val, offset, port) bus->ab_Driver->ata_outl((val), (offset), (port), bus->ab_DriverData)
 378
 379 #define atapi_Error         1
 380 #define atapi_Features      1
 381 #define atapi_Reason        2
 382 #define atapi_ByteCntL      4
 383 #define atapi_ByteCntH      5
 384 #define atapi_DevSel        6
 385 #define atapi_Status        7
 386 #define atapi_Command       7
 387
 388 /* Atapi status bits */
 389 #define ATAB_SLAVE          4
 390 #define ATAB_LBA            6
 391 #define ATAB_ATAPI          7
 392 #define ATAB_DATAREQ        3
 393 #define ATAB_ERROR          0
 394 #define ATAB_BUSY           7
 395
 396 #define ATAF_SLAVE          0x10
 397 #define ATAF_LBA            0x40
 398 #define ATAF_ATAPI          0x80
 399 #define ATAF_DATAREQ        0x08
 400 #define ATAF_ERROR          0x01
 401 #define ATAF_BUSY           0x80
 402 #define ATAF_DRDY           0x40
 403
 404 #define ATAPIF_CHECK        0x01
 405
 406 /* ATA/ATAPI commands */
 407 #define ATA_SET_FEATURES    0xef
 408 #define ATA_SET_MULTIPLE    0xc6
 409 #define ATA_DEVICE_RESET    0x08
 410 #define ATA_IDENTIFY_DEVICE 0xec
 411 #define ATA_IDENTIFY_ATAPI  0xa1
 412 #define ATA_NOP             0x00
 413 #define ATA_EXECUTE_DIAG    0x90
 414 #define ATA_PACKET          0xa0
 415 #define ATA_READ_DMA        0xc8
 416 #define ATA_READ_DMA64      0x25
 417 #define ATA_READ            0x20
 418 #define ATA_READ64          0x24
 419 #define ATA_READ_MULTIPLE   0xc4
 420 #define ATA_READ_MULTIPLE64 0x29
 421 #define ATA_WRITE_DMA       0xca
 422 #define ATA_WRITE_DMA64     0x35
 423 #define ATA_WRITE           0x30
 424 #define ATA_WRITE64         0x34
 425 #define ATA_WRITE_MULTIPLE  0xc5
 426 #define ATA_WRITE_MULTIPLE64 0x39
 427 #define ATA_MEDIA_EJECT     0xed
 428
 429 #define ATAPIF_MASK         0x03
 430 #define ATAPIF_COMMAND      0x01
 431 #define ATAPIF_READ         0x02
 432 #define ATAPIF_WRITE        0x00
 433
 434 /* SFF-8038i DMA registers */
 435 #define dma_Command         0x00
 436 #define dma_Status          0x02
 437 #define dma_PRD             0x04
 438
 439 /* DMA command register */
 440 #define DMA_READ            0x00    /* PCI *READS* from memory to drive */
 441 #define DMA_WRITE           0x08    /* PCI *WRITES* to memory from drive */
 442 #define DMA_START           0x01    /* DMA Start/Stop */
 443
 444 #define DMAB_Active         0
 445 #define DMAB_Error          1
 446 #define DMAB_Interrupt      2
 447 #define DMAB_Simplex        7
 448
 449 #define DMAF_Active         (1 << DMAB_Active)
 450 #define DMAF_Error          (1 << DMAB_Error)
 451 #define DMAF_Interrupt      (1 << DMAB_Interrupt)
 452 #define DMAF_Simplex        (1 << DMAB_Simplex)
 453
 454 #define Unit(io) ((struct ata_Unit *)(io)->io_Unit)
 455 #define IOStdReq(io) ((struct IOStdReq *)io)
 456
 457 /* Function prototypes */
 458
 459 void ata_ResetBus(struct ata_Bus *);
 460 void ata_InitBus(struct ata_Bus *);
 461
 462 BYTE atapi_SendPacket(struct ata_Unit *, APTR, APTR, LONG, BOOL*, BOOL);
 463 int atapi_TestUnitOK(struct ata_Unit *);
 464
 465 BYTE atapi_Identify(struct ata_Unit*);
 466 BYTE ata_Identify(struct ata_Unit*);
 467
 468 BYTE atapi_DirectSCSI(struct ata_Unit*, struct SCSICmd *);
 469 ULONG atapi_RequestSense(struct ata_Unit* unit, UBYTE* sense, ULONG senselen);
 470
 471 BOOL ata_HandleIRQ(struct ata_Bus *bus);
 472
 473 BOOL dma_SetupPRD(struct ata_Unit *, APTR, ULONG, BOOL);
 474 BOOL dma_SetupPRDSize(struct ata_Unit *, APTR, ULONG, BOOL);
 475 VOID dma_StartDMA(struct ata_Unit *);
 476 VOID dma_StopDMA(struct ata_Unit *);
 477 VOID dma_Cleanup(APTR adr, ULONG len, BOOL read);
 478
 479 BOOL ata_setup_unit(struct ata_Bus *bus, UBYTE u);
 480 BOOL ata_init_unit(struct ata_Bus *bus, UBYTE u);
 481 BOOL ata_RegisterVolume(ULONG StartCyl, ULONG EndCyl, struct ata_Unit *unit);
 482
 483 void ata_RegisterBus(IPTR IOBase, IPTR IOAlt, IPTR INTLine, IPTR DMABase, ULONG Flags,
 484                      const struct ata_BusDriver *driver, APTR driverData, struct ataBase *ATABase);
 485
 486 void BusTaskCode(struct ata_Bus *bus, struct Task* parent, struct SignalSemaphore *ssem);
 487 void DaemonCode(struct ataBase *LIBBASE);
 488
 489 #define ATAPI_SS_EJECT  0x02
 490 #define ATAPI_SS_LOAD   0x03
 491
 492 struct atapi_StartStop
 493 {
 494     UBYTE   command;
 495     UBYTE   immediate;
 496     UBYTE   pad1[2];
 497     UBYTE   flags;
 498     UBYTE   pad2[7];
 499 };
 500
 501 BYTE SCSIEmu(struct ata_Unit*, struct SCSICmd*);
 502
 503 #endif // _ATA_H
 504