6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
24 #include <exec/types.h>
25 #include <exec/resident.h>
27 #include <exec/ports.h>
29 #include <aros/libcall.h>
30 #include <aros/macros.h>
35 #include <devices/sana2.h>
36 #include <devices/sana2specialstats.h>
38 #include <utility/utility.h>
39 #include <utility/tagitem.h>
40 #include <utility/hooks.h>
44 #include <proto/oop.h>
45 #include <proto/exec.h>
46 #include <proto/dos.h>
47 #include <proto/battclock.h>
49 #include <hardware/intbits.h>
54 #include LC_LIBDEFS_FILE
56 #include "rtl8169_hw.h"
57 #include "rtl8168_hw.h"
58 #include "rtl8101_hw.h"
61 #define LIBBASE (unit->rtl8169u_device)
63 #define _R(NAME, MAC, MASK) \
64 { .name = NAME, .mcfg = MAC, .RxConfigMask = MASK }
70 ULONG RxConfigMask
; /* Clears the bits supported by this chip */
85 _R("RTL8169sb/8110sb",
89 _R("RTL8169sc/8110sc",
93 _R("RTL8169sc/8110sc",
125 _R("RTL8168cp/8111cp",
140 (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
146 (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
152 (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
158 RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
164 RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
170 RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
174 _R("RTL8168CP/8111CP",
176 RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
180 _R("RTL8168CP/8111CP",
182 RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
188 RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
194 RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
200 RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
206 static const unsigned int rtl8169_rx_config
=
207 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) | (RX_DMA_BURST
<< RxCfgDMAShift
);
209 void rtl8169_USecDelay(struct net_device
*unit
, ULONG usec
)
213 unit
->rtl8169u_DelayPort
.mp_SigTask
= FindTask(NULL
);
214 unit
->rtl8169u_DelayReq
.tr_node
.io_Command
= TR_ADDREQUEST
;
215 unit
->rtl8169u_DelayReq
.tr_time
.tv_micro
= usec
% 1000000;
216 unit
->rtl8169u_DelayReq
.tr_time
.tv_secs
= usec
/ 1000000;
218 DoIO((struct IORequest
*) &unit
->rtl8169u_DelayReq
);
222 struct rtl8169_priv
*get_pcnpriv(struct net_device
*unit
)
224 return unit
->rtl8169u_priv
;
227 UBYTE
*get_hwbase(struct net_device
*unit
)
229 return (UBYTE
*) unit
->rtl8169u_BaseMem
;
232 void MMIO_W8(APTR addr
, UBYTE val8
)
234 *((volatile UBYTE
*)(addr
)) = (val8
);
238 void MMIO_W16(APTR addr
, UWORD val16
)
240 *((volatile UWORD
*)(addr
)) = (val16
);
244 void MMIO_W32(APTR addr
, ULONG val32
)
246 *((volatile ULONG
*)(addr
)) = (val32
);
250 void mdio_write(struct net_device
*unit
, int RegAddr
, UWORD value
)
252 APTR base
= get_hwbase(unit
);
255 RTL_W32(base
+ (PHYAR
), PHYAR_Write
|
256 (RegAddr
& PHYAR_Reg_Mask
) << PHYAR_Reg_shift
|
257 (value
& PHYAR_Data_Mask
));
259 for (i
= 20; i
> 0; i
--)
261 /* Check if the RTL8169 has completed writing to the specified MDIO register */
262 if (!(RTL_R32(base
+ (PHYAR
)) & PHYAR_Flag
))
270 ULONG
mdio_read(struct net_device
*unit
, int RegAddr
)
272 APTR base
= get_hwbase(unit
);
273 UWORD value
= 0xffff;
276 RTL_W32(base
+ (PHYAR
), PHYAR_Read
| (RegAddr
& PHYAR_Reg_Mask
) << PHYAR_Reg_shift
);
278 for (i
= 20; i
> 0; i
--)
280 /* Check if the RTL8169 has completed retrieving data from the specified MDIO register */
281 if (RTL_R32(base
+ (PHYAR
)) & PHYAR_Flag
)
283 value
= (UWORD
)(RTL_R32(base
+ (PHYAR
)) & PHYAR_Data_Mask
);
291 void rtl_phy_write(struct net_device
*unit
, struct phy_reg
*regs
, int len
)
295 mdio_write(unit
, regs
->reg
, regs
->val
);
301 static void rtl8169_PHYPowerUP(struct net_device
*unit
)
303 RTLD(bug("[%s] rtl8169_PHYPowerUP()\n", unit
->rtl8169u_name
))
305 mdio_write(unit
, 0x1F, 0x0000);
306 mdio_write(unit
, 0x0E, 0x0000);
310 void rtl8169_write_gmii_reg_bit(struct net_device
*unit
, int reg
,
311 int bitnum
, int bitval
)
315 val
= mdio_read(unit
, reg
);
316 val
= (bitval
== 1) ? val
| (bitval
<< bitnum
) : val
& ~(0x0001 << bitnum
);
317 mdio_write(unit
, reg
, val
& 0xffff);
320 static void rtl8169_GetMACVersion(struct net_device
*unit
)
322 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
323 APTR base
= get_hwbase(unit
);
326 * The driver currently handles the 8168Bf and the 8168Be identically
327 * but they can be identified more specifically through the test below
330 * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
332 * Same thing for the 8101Eb and the 8101Ec:
334 * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
344 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_18
},
345 { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19
},
346 { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20
},
347 { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_20
},
350 { 0x7cf00000, 0x38000000, RTL_GIGA_MAC_VER_12
},
351 { 0x7cf00000, 0x38500000, RTL_GIGA_MAC_VER_17
},
352 { 0x7c800000, 0x38000000, RTL_GIGA_MAC_VER_17
},
353 { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11
},
356 { 0x7cf00000, 0x34000000, RTL_GIGA_MAC_VER_13
},
357 { 0x7cf00000, 0x34200000, RTL_GIGA_MAC_VER_16
},
358 { 0x7c800000, 0x34000000, RTL_GIGA_MAC_VER_16
},
359 /* FIXME: where did these entries come from ? -- FR */
360 { 0xfc800000, 0x38800000, RTL_GIGA_MAC_VER_15
},
361 { 0xfc800000, 0x30800000, RTL_GIGA_MAC_VER_14
},
364 { 0xfc800000, 0x98000000, RTL_GIGA_MAC_VER_06
},
365 { 0xfc800000, 0x18000000, RTL_GIGA_MAC_VER_05
},
366 { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04
},
367 { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03
},
368 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02
},
369 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01
},
371 { 0x00000000, 0x00000000, RTL_GIGA_MAC_VER_01
} /* Catch-all */
375 reg
= RTL_R32(base
+ (TxConfig
));
376 while ((reg
& p
->mask
) != p
->val
)
380 np
->mcfg
= p
->mac_version
;
382 if (p
->mask
== 0x00000000)
384 RTLD(bug("[%s] unknown MAC (%08x)\n", unit
->rtl8169u_name
, reg
))
388 static void rtl8169_PrintMACVersion(struct net_device
*unit
)
390 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
393 RTLD(bug("[%s] rtl8169_PrintMACVersion()\n", unit
->rtl8169u_name
))
395 for (i
= (sizeof(rtl_chip_info
) / sizeof(rtl_chip_info
[0])) - 1; i
>= 0; i
--)
397 if (np
->mcfg
== rtl_chip_info
[i
].mcfg
)
399 RTLD(bug("[%s] rtl8169_PrintMACVersion: mcfg == %s (%04d)\n", unit
->rtl8169u_name
,
400 rtl_chip_info
[i
].name
,
401 rtl_chip_info
[i
].mcfg
))
406 RTLD(bug("[%s] rtl8169_PrintMACVersion: mac_version == Unknown\n", unit
->rtl8169u_name
))
409 static void rtl_hw_phy_config(struct net_device
*unit
)
411 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
413 rtl8169_PrintMACVersion(unit
);
417 case RTL_GIGA_MAC_VER_01
:
419 case RTL_GIGA_MAC_VER_02
:
420 case RTL_GIGA_MAC_VER_03
:
421 rtl8169s_hw_phy_config(unit
);
423 case RTL_GIGA_MAC_VER_04
:
424 rtl8169sb_hw_phy_config(unit
);
426 case RTL_GIGA_MAC_VER_18
:
427 rtl8168cp_hw_phy_config(unit
);
429 case RTL_GIGA_MAC_VER_19
:
430 rtl8168c_hw_phy_config(unit
);
432 case RTL_GIGA_MAC_VER_20
:
433 rtl8168cx_hw_phy_config(unit
);
440 /*static void rtl8169_DSM(struct net_device *unit, int dev_state)
442 struct rtl8169_priv *np = get_pcnpriv(unit);
443 APTR base = get_hwbase(unit);
448 if ((np->mcfg == CFG_METHOD_5) || (np->mcfg == CFG_METHOD_6))
450 if (RTL_R8(base + (MACDBG)) & 0x80)
452 RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) | GPIO_en);
456 RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) & ~GPIO_en);
461 case DSM_NIC_GOTO_D3:
463 if ((np->mcfg == CFG_METHOD_5) || (np->mcfg == CFG_METHOD_6))
465 if (RTL_R8(base + (MACDBG)) & 0x80)
467 RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) & ~GPIO_en);
472 case DSM_NIC_RESUME_D3:
474 if ((np->mcfg == CFG_METHOD_5) || (np->mcfg == CFG_METHOD_6))
476 if (RTL_R8(base + (MACDBG)) & 0x80)
478 RTL_W8(base + (GPIO), RTL_R8(base + (GPIO)) | GPIO_en);
486 static int rtl8169_set_speed_tbi(struct net_device
*unit
,
487 UBYTE autoneg
, UWORD speed
, UBYTE duplex
)
489 // struct rtl8169_priv *np = get_pcnpriv(unit);
490 APTR base
= get_hwbase(unit
);
493 reg
= RTL_R32(base
+ TBICSR
);
494 if ((autoneg
== AUTONEG_DISABLE
) && (speed
== SPEED_1000
) &&
495 (duplex
== DUPLEX_FULL
))
497 RTL_W32(base
+ TBICSR
, reg
& ~(TBINwEnable
| TBINwRestart
));
499 else if (autoneg
== AUTONEG_ENABLE
)
501 RTL_W32(base
+ TBICSR
, reg
| TBINwEnable
| TBINwRestart
);
505 RTLD(bug("[%s] incorrect speed setting refused in TBI mode\n", unit
->rtl8169u_name
))
511 static int rtl8169_set_speed_xmii(struct net_device
*unit
,
512 UBYTE autoneg
, UWORD speed
, UBYTE duplex
)
514 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
515 // APTR base = get_hwbase(unit);
518 // int bmcr_true_force = 0;
519 // unsigned long flags;
521 auto_nego
= mdio_read(unit
, MII_ADVERTISE
);
522 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
523 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
524 giga_ctrl
= mdio_read(unit
, MII_CTRL1000
);
525 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
527 if (autoneg
== AUTONEG_ENABLE
)
529 auto_nego
|= (ADVERTISE_10HALF
| ADVERTISE_10FULL
|
530 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
531 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
535 if (speed
== SPEED_10
)
537 auto_nego
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
539 else if (speed
== SPEED_100
)
541 auto_nego
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
543 else if (speed
== SPEED_1000
)
545 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
547 if (duplex
== DUPLEX_HALF
)
549 auto_nego
&= ~(ADVERTISE_10FULL
| ADVERTISE_100FULL
);
551 if (duplex
== DUPLEX_FULL
)
553 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_100HALF
);
556 /* This tweak comes straight from Realtek's driver. */
557 if ((speed
== SPEED_100
) && (duplex
== DUPLEX_HALF
) &&
558 ((np
->mcfg
== RTL_GIGA_MAC_VER_13
) ||
559 (np
->mcfg
== RTL_GIGA_MAC_VER_16
)))
561 auto_nego
= ADVERTISE_100HALF
| ADVERTISE_CSMA
;
565 /* The 8100e/8101e do Fast Ethernet only. */
566 if ((np
->mcfg
== RTL_GIGA_MAC_VER_13
) ||
567 (np
->mcfg
== RTL_GIGA_MAC_VER_14
) ||
568 (np
->mcfg
== RTL_GIGA_MAC_VER_15
) ||
569 (np
->mcfg
== RTL_GIGA_MAC_VER_16
))
571 if ((giga_ctrl
& (ADVERTISE_1000FULL
| ADVERTISE_1000HALF
)))
573 RTLD(bug("[%s] PHY does not support 1000Mbps.\n", unit
->rtl8169u_name
))
575 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
578 auto_nego
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
580 if ((np
->mcfg
== RTL_GIGA_MAC_VER_12
) ||
581 (np
->mcfg
== RTL_GIGA_MAC_VER_17
))
583 /* Vendor specific (0x1f) and reserved (0x0e) MII registers. */
584 mdio_write(unit
, 0x1f, 0x0000);
585 mdio_write(unit
, 0x0e, 0x0000);
588 np
->phy_auto_nego_reg
= auto_nego
;
589 np
->phy_1000_ctrl_reg
= giga_ctrl
;
591 mdio_write(unit
, MII_ADVERTISE
, auto_nego
);
592 mdio_write(unit
, MII_CTRL1000
, giga_ctrl
);
593 mdio_write(unit
, MII_BMCR
, BMCR_ANENABLE
| BMCR_ANRESTART
);
598 static void rtl8169_start_rx(struct net_device
*unit
)
600 RTLD(bug("[%s] rtl8169_start_rx\n", unit
->rtl8169u_name
))
601 // Already running? Stop it.
602 /* TODO: Handle starting/stopping Rx */
605 static void rtl8169_stop_rx(struct net_device
*unit
)
607 RTLD(bug("[%s] rtl8169_stop_rx\n", unit
->rtl8169u_name
))
608 /* TODO: Handle starting/stopping Rx */
611 static void rtl8169_start_tx(struct net_device
*unit
)
613 RTLD(bug("[%s] rtl8169_start_tx()\n", unit
->rtl8169u_name
))
614 /* TODO: Handle starting/stopping Tx */
617 static void rtl8169_stop_tx(struct net_device
*unit
)
619 RTLD(bug("[%s] rtl8169_stop_tx()\n", unit
->rtl8169u_name
))
620 /* TODO: Handle starting/stopping Tx */
623 static void rtl8169_txrx_reset(struct net_device
*unit
)
625 RTLD(bug("[%s] rtl8169_txrx_reset()\n", unit
->rtl8169u_name
))
630 * rtl8169_SetMulticast: unit->set_multicast function
631 * Called with unit->xmit_lock held.
633 static void rtl8169_SetMulticast(struct net_device
*unit
)
638 RTLD(bug("[%s] rtl8169_SetMulticast()\n", unit
->rtl8169u_name
))
640 memset(addr
, 0, sizeof(addr
));
641 memset(mask
, 0, sizeof(mask
));
644 static void rtl8169_irq_mask_and_ack(struct net_device
*unit
)
646 APTR base
= get_hwbase(unit
);
647 RTL_W16(base
+ IntrMask
, 0x0000);
648 RTL_W16(base
+ IntrStatus
, 0xffff);
651 static void rtl8169_asic_down(struct net_device
*unit
)
653 APTR base
= get_hwbase(unit
);
654 RTL_W8(base
+ ChipCmd
, 0x00);
655 rtl8169_irq_mask_and_ack(unit
);
656 RTL_R16(base
+ CPlusCmd
);
659 static void rtl8169_DeInit(struct net_device
*unit
)
661 APTR base
= get_hwbase(unit
);
662 rtl8169_asic_down(unit
);
664 /* Update the error counts. */
665 RTL_W32(base
+ RxMissed
, 0);
668 static void rtl8169_GetMACAddr(struct net_device
*unit
, char *addr
, BOOL fromROM
)
670 APTR base
= get_hwbase(unit
);
673 RTLD(bug("[%s] rtl8169_GetMACAddr()\n",unit
->rtl8169u_name
))
674 /* Get MAC address. FIXME: read EEPROM */
675 for (i
= 0; i
< MAC_ADDR_LEN
; i
++)
677 addr
[i
] = RTL_R8(base
+ MAC0
+ i
);
681 static void rtl8169_SetMACAddr(struct net_device
*unit
)
683 APTR base
= get_hwbase(unit
);
685 RTLD(bug("[%s] rtl8169_SetMACAddr()\n", unit
->rtl8169u_name
))
687 RTL_W8(base
+ (Cfg9346
), Cfg9346_Unlock
);
689 RTL_W32(base
+ (MAC0
),
690 unit
->rtl8169u_dev_addr
[0] |
691 (unit
->rtl8169u_dev_addr
[1] << 8) |
692 (unit
->rtl8169u_dev_addr
[2] << 16) |
693 (unit
->rtl8169u_dev_addr
[3] << 24));
694 RTL_W32(base
+ (MAC4
),
695 unit
->rtl8169u_dev_addr
[4] |
696 (unit
->rtl8169u_dev_addr
[5] << 8));
698 RTL_W8(base
+ (Cfg9346
), Cfg9346_Lock
);
701 /* Read it back to be certain! */
703 rtl8169_GetMACAddr(unit
, newmac
, FALSE
);
705 bug("[%s] rtl8169_SetMACAddr: New MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", unit
->rtl8169u_name
,
706 newmac
[0], newmac
[1], newmac
[2],
707 newmac
[3], newmac
[4], newmac
[5])
711 static void rtl8169_LinkOption(struct net_device
*unit
, UBYTE
*aut
, UWORD
*spd
, UBYTE
*dup
)
713 unsigned char opt_speed
;
714 unsigned char opt_duplex
;
715 unsigned char opt_autoneg
;
717 opt_speed
= ((unit
->rtl8169u_UnitNum
< MAX_UNITS
) && (unit
->rtl8169u_UnitNum
>= 0)) ? unit
->rtl8169u_device
->speed
[unit
->rtl8169u_UnitNum
] : 0xff;
718 opt_duplex
= ((unit
->rtl8169u_UnitNum
< MAX_UNITS
) && (unit
->rtl8169u_UnitNum
>= 0)) ? unit
->rtl8169u_device
->duplex
[unit
->rtl8169u_UnitNum
] : 0xff;
719 opt_autoneg
= ((unit
->rtl8169u_UnitNum
< MAX_UNITS
) && (unit
->rtl8169u_UnitNum
>= 0)) ? unit
->rtl8169u_device
->autoneg
[unit
->rtl8169u_UnitNum
] : 0xff;
721 if ((opt_speed
== 0xff) |
722 (opt_duplex
== 0xff) |
723 (opt_autoneg
== 0xff))
727 *aut
= AUTONEG_ENABLE
;
731 *spd
= unit
->rtl8169u_device
->speed
[unit
->rtl8169u_UnitNum
];
732 *dup
= unit
->rtl8169u_device
->duplex
[unit
->rtl8169u_UnitNum
];
733 *aut
= unit
->rtl8169u_device
->autoneg
[unit
->rtl8169u_UnitNum
];
737 static void rtl8169_phy_reset(struct net_device
*unit
)
739 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
740 APTR base
= get_hwbase(unit
);
743 if ((np
->mcfg
<= RTL_GIGA_MAC_VER_06
) &&
744 (RTL_R8(base
+ PHYstatus
) & TBI_Enable
))
746 rtl8169_tbi_reset_enable(unit
);
750 rtl8169_xmii_reset_enable(unit
);
753 if ((np
->mcfg
<= RTL_GIGA_MAC_VER_06
) &&
754 (RTL_R8(base
+ PHYstatus
) & TBI_Enable
))
756 for (i
= 0; i
< 100; i
++)
758 if (!rtl8169_tbi_reset_pending(unit
))
762 rtl8169_USecDelay(unit
, 100);
767 for (i
= 0; i
< 100; i
++)
769 if (!rtl8169_xmii_reset_pending(unit
))
773 rtl8169_USecDelay(unit
, 100);
778 static void rtl8169_Init(struct net_device
*unit
)
780 struct pHidd_PCIDevice_WriteConfigByte pcibyte
;
782 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
783 APTR base
= get_hwbase(unit
);
784 UBYTE autoneg
, duplex
;
789 RTLD(bug("[%s] rtl8169_Init(unit @ %p)\n", unit
->rtl8169u_name
, unit
))
791 np
->intr_mask
= 0xffff;
792 np
->intr_event
= unit
->rtl8169u_intr_event
;
793 np
->napi_event
= unit
->rtl8169u_napi_event
;
795 /* Unneeded ? Don't mess with Mrs. Murphy. */
796 rtl8169_irq_mask_and_ack(unit
);
798 /* Soft reset the chip. */
799 RTL_W8(base
+ ChipCmd
, CmdReset
);
801 /* Check that the chip has finished the reset. */
802 for (i
= 0; i
< 100; i
++)
804 if ((RTL_R8(base
+ ChipCmd
) & CmdReset
) == 0)
808 rtl8169_USecDelay(unit
, 100);
811 /* Identify chip attached to board */
812 rtl8169_GetMACVersion(unit
);
813 rtl8169_PrintMACVersion(unit
);
815 for (i
= 0; i
< ARRAY_SIZE(rtl_chip_info
); i
++)
817 if (np
->mcfg
== rtl_chip_info
[i
].mcfg
)
823 if (i
== ARRAY_SIZE(rtl_chip_info
))
829 unit
->rtl8169u_rtl_chipname
= rtl_chip_info
[np
->chipset
].name
;
831 RTL_W8(base
+ (Cfg9346
), Cfg9346_Unlock
);
832 RTL_W8(base
+ (Config1
), RTL_R8(base
+ Config1
) | PMEnable
);
833 RTL_W8(base
+ (Config5
), RTL_R8(base
+ Config5
) & PMEStatus
);
835 RTLD(bug("[%s] rtl8169_Init: Power Management enabled\n", unit
->rtl8169u_name
))
837 /* RTL_W8(base + (Cfg9346), Cfg9346_Unlock);
838 np->features |= rtl8169_try_msi(pdev, base);
839 RTL_W8(base + (Cfg9346), Cfg9346_Lock);
842 RTL_W8(base
+ (Cfg9346
), Cfg9346_Lock
);
844 rtl8169_GetMACAddr(unit
, &np
->orig_mac
[0], TRUE
);
846 unit
->rtl8169u_dev_addr
[0] = unit
->rtl8169u_org_addr
[0] = np
->orig_mac
[0];
847 unit
->rtl8169u_dev_addr
[1] = unit
->rtl8169u_org_addr
[1] = np
->orig_mac
[1];
848 unit
->rtl8169u_dev_addr
[2] = unit
->rtl8169u_org_addr
[2] = np
->orig_mac
[2];
849 unit
->rtl8169u_dev_addr
[3] = unit
->rtl8169u_org_addr
[3] = np
->orig_mac
[3];
850 unit
->rtl8169u_dev_addr
[4] = unit
->rtl8169u_org_addr
[4] = np
->orig_mac
[4];
851 unit
->rtl8169u_dev_addr
[5] = unit
->rtl8169u_org_addr
[5] = np
->orig_mac
[5];
853 RTLD(bug("[%s] rtl8169_Init: MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", unit
->rtl8169u_name
,
854 unit
->rtl8169u_dev_addr
[0], unit
->rtl8169u_dev_addr
[1], unit
->rtl8169u_dev_addr
[2],
855 unit
->rtl8169u_dev_addr
[3], unit
->rtl8169u_dev_addr
[4], unit
->rtl8169u_dev_addr
[5]))
857 bug("[%s] rtl8169_Init: This product is covered by one or more of the following patents:\n", unit
->rtl8169u_name
);
858 bug("[%s] rtl8169_Init: US5,307,459, US5,434,872, US5,732,094, US6,570,884, US6,115,776, and US6,327,625.\n", unit
->rtl8169u_name
);
861 unit->features |= NETIF_F_IP_CSUM;
863 np
->cp_cmd
|= RxChkSum
;
864 np
->cp_cmd
|= RTL_R16(base
+ (CPlusCmd
));
866 //np->intr_mask = unit->rtl8169u_intr_mask;
869 rtl_hw_phy_config(unit
);
871 if (np
->mcfg
<= RTL_GIGA_MAC_VER_06
)
873 RTL_W8(base
+ 0x82, 0x01);
876 RTLD(bug("[%s] rtl8169_Init: PHY Configured\n", unit
->rtl8169u_name
))
878 pcibyte
.mID
= OOP_GetMethodID(CLID_Hidd_PCIDevice
, moHidd_PCIDevice_WriteConfigByte
);
879 pcibyte
.reg
= PCI_LATENCY_TIMER
;
881 OOP_DoMethod(unit
->rtl8169u_PCIDevice
, (OOP_Msg
) &pcibyte
);
883 if (np
->mcfg
<= RTL_GIGA_MAC_VER_06
)
885 pcibyte
.mID
= OOP_GetMethodID(CLID_Hidd_PCIDevice
, moHidd_PCIDevice_WriteConfigByte
);
886 pcibyte
.reg
= PCI_CACHE_LINE_SIZE
;
888 OOP_DoMethod(unit
->rtl8169u_PCIDevice
, (OOP_Msg
) &pcibyte
);
891 if (np
->mcfg
== RTL_GIGA_MAC_VER_02
)
893 RTL_W8(base
+ 0x82, 0x01);
894 mdio_write(unit
, 0x0b, 0x0000); //w 0x0b 15 0 0
897 rtl8169_phy_reset(unit
);
899 rtl8169_LinkOption(unit
, &autoneg
, &speed
, &duplex
);
901 if ((np
->mcfg
<= RTL_GIGA_MAC_VER_06
) &&
902 (RTL_R8(base
+ PHYstatus
) & TBI_Enable
))
904 rtl8169_set_speed_tbi(unit
, autoneg
, speed
, duplex
);
908 rtl8169_set_speed_xmii(unit
, autoneg
, speed
, duplex
);
911 RTLD(bug("[%s] rtl8169_Init: Link Speed %dbps %s duplex %s\n", unit
->rtl8169u_name
, speed
, (duplex
== DUPLEX_HALF
) ? "half" :"full", (autoneg
== AUTONEG_ENABLE
) ? "(autoneg)" :""))
914 static void rtl8169_drain_tx(struct net_device
*unit
)
916 // struct rtl8169_priv *np = get_pcnpriv(unit);
918 // for (i = 0; i < NUM_TX_DESC; i++) {
919 /* TODO: rtl8169_drain_tx does nothing atm. */
923 static void rtl8169_drain_rx(struct net_device
*unit
)
925 // struct rtl8169_priv *np = get_pcnpriv(unit);
927 // for (i = 0; i < RX_RING_SIZE; i++) {
928 /* TODO: rtl8169_drain_rx does nothing atm. */
932 static void drain_ring(struct net_device
*unit
)
934 rtl8169_drain_tx(unit
);
935 rtl8169_drain_rx(unit
);
938 static int request_irq(struct net_device
*unit
)
940 RTLD(bug("[%s] request_irq()\n", unit
->rtl8169u_name
))
942 if (!unit
->rtl8169u_IntsAdded
)
944 AddIntServer(INTB_KERNEL
+ unit
->rtl8169u_IRQ
,
945 &unit
->rtl8169u_irqhandler
);
946 AddIntServer(INTB_VERTB
, &unit
->rtl8169u_touthandler
);
947 unit
->rtl8169u_IntsAdded
= TRUE
;
953 static void free_irq(struct net_device
*unit
)
955 if (unit
->rtl8169u_IntsAdded
)
957 RemIntServer(INTB_KERNEL
+ unit
->rtl8169u_IRQ
,
958 &unit
->rtl8169u_irqhandler
);
959 RemIntServer(INTB_VERTB
, &unit
->rtl8169u_touthandler
);
960 unit
->rtl8169u_IntsAdded
= FALSE
;
964 void rtl_set_rx_max_size(struct net_device
*unit
)
966 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
967 APTR base
= get_hwbase(unit
);
968 unsigned int mtu
= unit
->rtl8169u_mtu
;
970 RTLD(bug("[%s] rtl_set_rx_max_size()\n", unit
->rtl8169u_name
))
972 np
->rx_buf_sz
= (mtu
> ETH_DATA_LEN
) ? mtu
+ ETH_HLEN
+ 8 : RX_BUF_SIZE
;
974 RTLD(bug("[%s] %d\n", unit
->rtl8169u_name
, np
->rx_buf_sz
+ 1))
976 RTL_W16(base
+ (RxMaxSize
), np
->rx_buf_sz
+ 1);
979 /*void rtl_set_tx_max_size(struct net_device *unit)
981 struct rtl8169_priv *np = get_pcnpriv(unit);
982 APTR base = get_hwbase(unit);
983 unsigned int mtu = unit->rtl8169u_mtu;
985 RTLD(bug("[%s] rtl_set_tx_max_size()\n", unit->rtl8169u_name))
987 np->tx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 : TX_BUF_SIZE;
989 RTL_W16(base + (TxMaxSize), np->tx_buf_sz + 1);
993 /*static void rtl8169_NICReset(struct net_device *unit)
995 struct rtl8169_priv *np = get_pcnpriv(unit);
996 APTR base = get_hwbase(unit);
999 RTLD(bug("[%s] rtl8169_NICReset()\n", unit->rtl8169u_name))
1001 if ((np->mcfg != CFG_METHOD_1) &&
1002 (np->mcfg != CFG_METHOD_2) &&
1003 (np->mcfg != CFG_METHOD_3))
1005 RTL_W8(base + (ChipCmd), StopReq | CmdRxEnb | CmdTxEnb);
1009 // Soft reset the chip.
1010 RTL_W8(base + (ChipCmd), CmdReset);
1012 // Check that the chip has finished the reset.
1013 for (i = 1000; i > 0; i--)
1015 if ((RTL_R8(base + (ChipCmd)) & CmdReset) == 0)
1023 UWORD
rtl_rw_cpluscmd(struct net_device
*unit
)
1025 APTR base
= get_hwbase(unit
);
1028 cmd
= RTL_R16(base
+ CPlusCmd
);
1029 RTL_W16(base
+ CPlusCmd
, cmd
);
1033 void rtl_set_rx_tx_desc_registers(struct net_device
*unit
)
1035 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1036 APTR base
= get_hwbase(unit
);
1038 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1039 * register to be written before TxDescAddrLow to work.
1040 * Switching from MMIO to I/O access fixes the issue as well.
1042 RTL_W32(base
+ (TxDescStartAddrHigh
), ((UQUAD
) (IPTR
)np
->TxPhyAddr
>> 32));
1043 RTL_W32(base
+ (TxDescStartAddrLow
), ((UQUAD
) (IPTR
)np
->TxPhyAddr
& DMA_32BIT_MASK
));
1044 RTL_W32(base
+ (RxDescAddrHigh
), ((UQUAD
) (IPTR
)np
->RxPhyAddr
>> 32));
1045 RTL_W32(base
+ (RxDescAddrLow
), ((UQUAD
) (IPTR
)np
->RxPhyAddr
& DMA_32BIT_MASK
));
1048 void rtl_set_rx_tx_config_registers(struct net_device
*unit
)
1050 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1051 APTR base
= get_hwbase(unit
);
1053 ULONG cfg
= rtl8169_rx_config
;
1055 cfg
|= (RTL_R32(base
+ RxConfig
) & rtl_chip_info
[np
->chipset
].RxConfigMask
);
1056 RTL_W32(base
+ RxConfig
, cfg
);
1058 /* Set DMA burst size and Interframe Gap Time */
1059 RTL_W32(base
+ TxConfig
, (TX_DMA_BURST
<< TxDMAShift
) |
1060 (InterFrameGap
<< TxInterFrameGapShift
));
1063 void rtl_set_rx_mode(struct net_device
*unit
)
1065 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1066 APTR base
= get_hwbase(unit
);
1068 // unsigned long flags;
1069 ULONG mc_filter
[2]; /* Multicast hash filter */
1073 if (unit
->rtl8169u_flags
& IFF_PROMISC
)
1075 /* Unconditionally log net taps. */
1076 RTLD(bug("[%s] rtl8169_SetRxMode: Promiscuous mode enabled\n", unit
->rtl8169u_name
))
1077 rx_mode
= AcceptBroadcast
|
1081 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
1083 else if ((unit
->rtl8169u_mc_count
> unit
->rtl8169u_device
->rtl8169b_MulticastFilterLimit
) ||
1084 (unit
->rtl8169u_flags
))
1086 /* Too many to filter perfectly -- accept all multicasts. */
1087 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
1088 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
1092 struct dev_mc_list
*mclist
;
1095 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
1096 mc_filter
[1] = mc_filter
[0] = 0;
1097 for (i
= 0, mclist
= unit
->rtl8169u_mc_list
; mclist
&& i
< unit
->rtl8169u_mc_count
;
1098 i
++, mclist
= mclist
->next
)
1100 // int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1101 // mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1102 rx_mode
|= AcceptMulticast
;
1106 tmp
= rtl8169_rx_config
| rx_mode
|
1107 (RTL_R32(base
+ RxConfig
) & rtl_chip_info
[np
->chipset
].RxConfigMask
);
1109 if (np
->mcfg
> RTL_GIGA_MAC_VER_06
)
1111 ULONG data
= mc_filter
[0];
1113 mc_filter
[0] = swab32(mc_filter
[1]);
1114 mc_filter
[1] = swab32(data
);
1117 RTL_W32(base
+ MAR0
+ 0, mc_filter
[0]);
1118 RTL_W32(base
+ MAR0
+ 4, mc_filter
[1]);
1120 RTL_W32(base
+ RxConfig
, tmp
);
1124 static unsigned int rtl8169_XMIILinkOK(struct net_device
*unit
)
1126 // struct rtl8169_priv *np = get_pcnpriv(unit);
1127 APTR base
= get_hwbase(unit
);
1129 mdio_write(unit
, 0x1f, 0x0000);
1131 return RTL_R8(base
+ (PHYstatus
)) & LinkStatus
;
1135 void rtl8169_CheckLinkStatus(struct net_device
*unit
)
1137 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1138 APTR base
= get_hwbase(unit
);
1139 // unsigned long flags;
1142 if ((np
->mcfg
<= RTL_GIGA_MAC_VER_06
) &&
1143 (RTL_R8(base
+ PHYstatus
) & TBI_Enable
))
1145 result
= rtl8169_tbi_link_ok(unit
);
1149 result
= rtl8169_xmii_link_ok(unit
);
1154 netif_carrier_on(unit
);
1155 RTLD(bug("[%s] rtl8169_CheckLinkStatus: Link Up\n", unit
->rtl8169u_name
))
1159 RTLD(bug("[%s] rtl8169_CheckLinkStatus: Link Down\n", unit
->rtl8169u_name
))
1160 netif_carrier_off(unit
);
1164 static void rtl8169_InitRingIndexes(struct rtl8169_priv
*np
)
1172 static void rtl8169_TxDescInit(struct rtl8169_priv
*np
)
1176 memset(np
->TxDescArray
, 0x0, NUM_TX_DESC
* sizeof(struct TxDesc
));
1178 for (i
= 0; i
< NUM_TX_DESC
; i
++)
1180 if(i
== (NUM_TX_DESC
- 1))
1182 np
->TxDescArray
[i
].opts1
= AROS_LONG2LE(RingEnd
);
1187 static ULONG
rtl8169_TxFill(struct net_device
*unit
, ULONG start
, ULONG end
)
1189 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1192 for (cur
= start
; end
- cur
> 0; cur
++)
1194 int i
= cur
% NUM_TX_DESC
;
1196 if (np
->TxDescArray
[i
].addr
)
1201 if ((np
->TxDescArray
[i
].addr
= (IPTR
)HIDD_PCIDriver_AllocPCIMem(unit
->rtl8169u_PCIDriver
, TX_BUF_SIZE
)) == 0)
1209 static void rtl8169_RxDescInit(struct rtl8169_priv
*np
)
1213 memset(np
->RxDescArray
, 0x0, NUM_RX_DESC
* sizeof(struct RxDesc
));
1215 for (i
= 0; i
< NUM_RX_DESC
; i
++)
1217 if(i
== (NUM_RX_DESC
- 1))
1219 np
->RxDescArray
[i
].opts1
= AROS_LONG2LE((DescOwn
| RingEnd
| (ULONG
) np
->rx_buf_sz
));
1223 np
->RxDescArray
[i
].opts1
= AROS_LONG2LE(DescOwn
| (ULONG
) np
->rx_buf_sz
);
1228 static ULONG
rtl8169_RxFill(struct net_device
*unit
, ULONG start
, ULONG end
)
1230 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1233 for (cur
= start
; end
- cur
> 0; cur
++)
1235 int i
= cur
% NUM_RX_DESC
;
1237 if (np
->RxDescArray
[i
].addr
)
1242 if ((np
->RxDescArray
[i
].addr
= (IPTR
)HIDD_PCIDriver_AllocPCIMem(unit
->rtl8169u_PCIDriver
, np
->rx_buf_sz
)) == 0)
1250 static inline void rtl8169_MarkAsLastDescriptor(struct RxDesc
*desc
)
1252 desc
->opts1
|= AROS_LONG2LE(RingEnd
);
1255 static int rtl8169_InitRings(struct net_device
*unit
)
1257 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1259 RTLD(bug("[%s] rtl8169_InitRings(unit @ %p)\n", unit
->rtl8169u_name
, unit
))
1261 rtl8169_InitRingIndexes(np
);
1263 rtl8169_TxDescInit(np
);
1264 rtl8169_RxDescInit(np
);
1266 if (rtl8169_RxFill(unit
, 0, NUM_RX_DESC
) != NUM_RX_DESC
)
1271 if (rtl8169_TxFill(unit
, 0, NUM_TX_DESC
) != NUM_TX_DESC
)
1276 // rtl8169_MarkAsLastDescriptor(np->RxDescArray + (NUM_RX_DESC - 1));
1281 // rtl8169_rx_clear(np);
1285 static void rtl8169_HWStart(struct net_device
*unit
)
1288 APTR base
= get_hwbase(unit
);
1290 /* Soft reset the chip. */
1291 RTL_W8(base
+ ChipCmd
, CmdReset
);
1293 /* Check that the chip has finished the reset. */
1294 for (i
= 0; i
< 100; i
++)
1296 if ((RTL_R8(base
+ ChipCmd
) & CmdReset
) == 0)
1303 switch(unit
->rtl8169u_config
)
1306 rtl_hw_start_8169(unit
);
1310 rtl_hw_start_8168(unit
);
1313 rtl_hw_start_8101(unit
);
1317 netif_start_queue(unit
);
1320 static int rtl8169_Open(struct net_device
*unit
)
1322 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1323 // APTR base = get_hwbase(unit);
1326 RTLD(bug("[%s] rtl8169_Open(unit @ %p)\n", unit
->rtl8169u_name
, unit
))
1328 rtl_set_rx_max_size(unit
);
1330 ret
= request_irq(unit
);
1336 np
->TxDescArray
= HIDD_PCIDriver_AllocPCIMem(unit
->rtl8169u_PCIDriver
, R8169_TX_RING_BYTES
);
1337 np
->TxPhyAddr
= np
->TxDescArray
;
1339 np
->RxDescArray
= HIDD_PCIDriver_AllocPCIMem(unit
->rtl8169u_PCIDriver
, R8169_RX_RING_BYTES
);
1340 np
->RxPhyAddr
= np
->RxDescArray
;
1342 if ((np
->TxDescArray
) && (np
->RxDescArray
))
1344 RTLD(bug("[%s] rtl8169_Open: Allocated Descriptor Arrays - Tx @ %p (%d bytes), Rx @ %p (%d bytes)\n", unit
->rtl8169u_name
,
1345 np
->TxDescArray
, R8169_TX_RING_BYTES
,
1346 np
->RxDescArray
, R8169_RX_RING_BYTES
))
1347 if (rtl8169_InitRings(unit
) == 0)
1349 rtl8169_HWStart(unit
);
1351 // if (np->esd_flag == 0)
1353 // rtl8169_request_esd_timer(unit);
1356 // rtl8169_request_link_timer(unit);
1358 //rtl8169_DSM(unit, DSM_IF_UP);
1360 rtl8169_CheckLinkStatus(unit
);
1364 RTLD(bug("[%s] rtl8169_Open: Failed to initialise Descriptor Arrays!\n",unit
->rtl8169u_name
))
1369 RTLD(bug("[%s] rtl8169_Open: Failed to Allocate Descriptor Arrays!\n",unit
->rtl8169u_name
))
1372 unit
->rtl8169u_flags
|= IFF_UP
;
1380 static int rtl8169_Close(struct net_device
*unit
)
1382 struct rtl8169_priv
*np
= get_pcnpriv(unit
);
1385 RTLD(bug("[%s] rtl8169_Close()\n", unit
->rtl8169u_name
))
1387 unit
->rtl8169u_flags
&= ~IFF_UP
;
1389 ObtainSemaphore(&np
->lock
);
1390 // np->in_shutdown = 1;
1391 ReleaseSemaphore(&np
->lock
);
1393 unit
->rtl8169u_toutNEED
= FALSE
;
1395 netif_stop_queue(unit
);
1396 ObtainSemaphore(&np
->lock
);
1398 rtl8169_DeInit(unit
);
1400 ReleaseSemaphore(&np
->lock
);
1406 // HIDD_PCIDriver_FreePCIMem(unit->rtl8169u_PCIDriver, np->rx_buffer);
1407 // HIDD_PCIDriver_FreePCIMem(unit->rtl8169u_PCIDriver, np->tx_buffer);
1409 ReportEvents(LIBBASE
, unit
, S2EVENT_OFFLINE
);
1414 void rtl8169_get_functions(struct net_device
*Unit
)
1416 Unit
->initialize
= rtl8169_Init
;
1417 Unit
->deinitialize
= rtl8169_DeInit
;
1418 Unit
->start
= rtl8169_Open
;
1419 Unit
->stop
= rtl8169_Close
;
1420 Unit
->set_mac_address
= rtl8169_SetMACAddr
;
1421 Unit
->set_multicast
= rtl8169_SetMulticast
;