arch/i386-all/mlib/fenv.c

   1 /*-
   2  * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/lib/msun/i387/fenv.c,v 1.3 2007/01/05 07:15:26 das Exp $
  27  */
  28
  29 #include <sys/cdefs.h>
  30 #include <sys/types.h>
  31 #ifndef __AROS__
  32 #include <machine/npx.h>
  33 #endif
  34 #include "fenv.h"
  35
  36 const fenv_t __fe_dfl_env = {
  37 #ifndef __AROS__
  38         __INITIAL_NPXCW__,
  39 #else
  40         0x127F,
  41 #endif
  42         0x0000,
  43         0x0000,
  44         0x1f80,
  45         0xffffffff,
  46         { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  47           0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff }
  48 };
  49
  50 enum __sse_support __has_sse =
  51 #ifdef __SSE__
  52         __SSE_YES;
  53 #else
  54         __SSE_UNK;
  55 #endif
  56
  57 #define getfl(x)        __asm __volatile("pushfl\n\tpopl %0" : "=mr" (*(x)))
  58 #define setfl(x)        __asm __volatile("pushl %0\n\tpopfl" : : "g" (x))
  59 #define cpuid_dx(x)     __asm __volatile("pushl %%ebx\n\tmovl $1, %%eax\n\t"  \
  60                                          "cpuid\n\tpopl %%ebx"                \
  61                                         : "=d" (*(x)) : : "eax", "ecx")
  62
  63 /*
  64  * Test for SSE support on this processor.  We need to do this because
  65  * we need to use ldmxcsr/stmxcsr to get correct results if any part
  66  * of the program was compiled to use SSE floating-point, but we can't
  67  * use SSE on older processors.
  68  */
  69 int
  70 __test_sse(void)
  71 {
  72         int flag, nflag;
  73         int dx_features;
  74
  75         /* Am I a 486? */
  76         getfl(&flag);
  77         nflag = flag ^ 0x200000;
  78         setfl(nflag);
  79         getfl(&nflag);
  80         if (flag != nflag) {
  81                 /* Not a 486, so CPUID should work. */
  82                 cpuid_dx(&dx_features);
  83                 if (dx_features & 0x2000000) {
  84                         __has_sse = __SSE_YES;
  85                         return (1);
  86                 }
  87         }
  88         __has_sse = __SSE_NO;
  89         return (0);
  90 }
  91
  92 int
  93 fesetexceptflag(const fexcept_t *flagp, int excepts)
  94 {
  95         fenv_t env;
  96         int mxcsr;
  97
  98         __fnstenv(&env);
  99         env.__status &= ~excepts;
 100         env.__status |= *flagp & excepts;
 101         __fldenv(env);
 102
 103         if (__HAS_SSE()) {
 104                 __stmxcsr(&mxcsr);
 105                 mxcsr &= ~excepts;
 106                 mxcsr |= *flagp & excepts;
 107                 __ldmxcsr(mxcsr);
 108         }
 109
 110         return (0);
 111 }
 112
 113 int
 114 feraiseexcept(int excepts)
 115 {
 116         fexcept_t ex = excepts;
 117
 118         fesetexceptflag(&ex, excepts);
 119         __fwait();
 120         return (0);
 121 }
 122
 123 int
 124 fegetenv(fenv_t *envp)
 125 {
 126         int mxcsr;
 127
 128         __fnstenv(envp);
 129         /*
 130          * fnstenv masks all exceptions, so we need to restore
 131          * the old control word to avoid this side effect.
 132          */
 133         __fldcw(envp->__control);
 134         if (__HAS_SSE()) {
 135                 __stmxcsr(&mxcsr);
 136                 __set_mxcsr(*envp, mxcsr);
 137         }
 138         return (0);
 139 }
 140
 141 int
 142 feholdexcept(fenv_t *envp)
 143 {
 144         int mxcsr;
 145
 146         __fnstenv(envp);
 147         __fnclex();
 148         if (__HAS_SSE()) {
 149                 __stmxcsr(&mxcsr);
 150                 __set_mxcsr(*envp, mxcsr);
 151                 mxcsr &= ~FE_ALL_EXCEPT;
 152                 mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
 153                 __ldmxcsr(mxcsr);
 154         }
 155         return (0);
 156 }
 157
 158 int
 159 feupdateenv(const fenv_t *envp)
 160 {
 161         int mxcsr;
 162         short status;
 163
 164         __fnstsw(&status);
 165         if (__HAS_SSE())
 166                 __stmxcsr(&mxcsr);
 167         else
 168                 mxcsr = 0;
 169         fesetenv(envp);
 170         feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT);
 171         return (0);
 172 }
 173
 174 int
 175 __feenableexcept(int mask)
 176 {
 177         int mxcsr, control, omask;
 178
 179         mask &= FE_ALL_EXCEPT;
 180         __fnstcw(&control);
 181         if (__HAS_SSE())
 182                 __stmxcsr(&mxcsr);
 183         else
 184                 mxcsr = 0;
 185         omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
 186         control &= ~mask;
 187         __fldcw(control);
 188         if (__HAS_SSE()) {
 189                 mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
 190                 __ldmxcsr(mxcsr);
 191         }
 192         return (~omask);
 193 }
 194
 195 int
 196 __fedisableexcept(int mask)
 197 {
 198         int mxcsr, control, omask;
 199
 200         mask &= FE_ALL_EXCEPT;
 201         __fnstcw(&control);
 202         if (__HAS_SSE())
 203                 __stmxcsr(&mxcsr);
 204         else
 205                 mxcsr = 0;
 206         omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
 207         control |= mask;
 208         __fldcw(control);
 209         if (__HAS_SSE()) {
 210                 mxcsr |= mask << _SSE_EMASK_SHIFT;
 211                 __ldmxcsr(mxcsr);
 212         }
 213         return (~omask);
 214 }
 215
 216 __weak_reference(__feenableexcept, feenableexcept);
 217 __weak_reference(__fedisableexcept, fedisableexcept);