workbench/devs/networks/atheros5000/unit.c

   1 /*
   2
   3 Copyright (C) 2001-2012 Neil Cafferkey
   4
   5 This program is free software; you can redistribute it and/or modify
   6 it under the terms of the GNU General Public License as published by
   7 the Free Software Foundation; either version 2 of the License, or
   8 (at your option) any later version.
   9
  10 This program is distributed in the hope that it will be useful, but
  11 WITHOUT ANY WARRANTY; without even the implied warranty of
  12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13 General Public License for more details.
  14
  15 You should have received a copy of the GNU General Public License
  16 along with this program; if not, write to the Free Software
  17 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18 MA 02111-1307, USA.
  19
  20 */
  21
  22
  23 #include <exec/memory.h>
  24 #include <exec/execbase.h>
  25 #include <exec/errors.h>
  26
  27 #include <proto/exec.h>
  28 #ifndef __amigaos4__
  29 #include <proto/alib.h>
  30 #else
  31 #include <clib/alib_protos.h>
  32 #endif
  33 #include <proto/utility.h>
  34 #include <proto/dos.h>
  35 #include <proto/timer.h>
  36
  37 #include "device.h"
  38
  39 #include "unit_protos.h"
  40 #include "request_protos.h"
  41 #include "encryption_protos.h"
  42 #include "hal/ah.h"
  43 #include "hal/ah_desc.h"
  44
  45
  46 #define TASK_PRIORITY 0
  47 #define STACK_SIZE 4096
  48 #define INT_MASK \
  49    (HAL_INT_GLOBAL | HAL_INT_TX | HAL_INT_TXDESC | HAL_INT_RX \
  50    | HAL_INT_RXEOL)
  51 #define TX_POWER (20 << 1)
  52 #define TX_TRIES 11
  53 #define G_MGMT_RATE 2000
  54 #define B_MGMT_RATE 1000
  55 #define FRAME_BUFFER_SIZE (WIFI_FRM_DATA + SNAP_HEADERSIZE \
  56    + 2 * ETH_MTU + EIV_SIZE + ICV_SIZE + MIC_SIZE + FCS_SIZE + 4)
  57 #define MAX_CHANNEL_COUNT 100
  58
  59 #ifndef AbsExecBase
  60 #define AbsExecBase sys_base
  61 #endif
  62
  63 static struct AddressRange *FindMulticastRange(struct DevUnit *unit,
  64    ULONG lower_bound_left, UWORD lower_bound_right, ULONG upper_bound_left,
  65    UWORD upper_bound_right, struct DevBase *base);
  66 static VOID SetMulticast(struct DevUnit *unit, struct DevBase *base);
  67 static BOOL StatusInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code));
  68 static VOID RXInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code));
  69 static UBYTE *GetRXBuffer(struct DevUnit *unit, const UBYTE *address,
  70    UWORD frag_no, UWORD *buffer_no, struct DevBase *base);
  71 static VOID DistributeRXPacket(struct DevUnit *unit, UBYTE *frame,
  72    struct DevBase *base);
  73 static VOID CopyPacket(struct DevUnit *unit, struct IOSana2Req *request,
  74    UWORD packet_size, UWORD packet_type, UBYTE *buffer,
  75    struct DevBase *base);
  76 static BOOL AddressFilter(struct DevUnit *unit, UBYTE *address,
  77    struct DevBase *base);
  78 static VOID DistributeMgmtFrame(struct DevUnit *unit, UBYTE *frame,
  79    UWORD frame_size, struct DevBase *base);
  80 static VOID TXInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code));
  81 static VOID TXEndInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code));
  82 static VOID MgmtTXInt(REG(a1, struct DevUnit *unit),
  83    REG(a6, APTR int_code));
  84 static VOID MgmtTXEndInt(REG(a1, struct DevUnit *unit),
  85    REG(a6, APTR int_code));
  86 static VOID ResetHandler(REG(a1, struct DevUnit *unit),
  87    REG(a6, APTR int_code));
  88 static VOID ReportEvents(struct DevUnit *unit, ULONG events,
  89    struct DevBase *base);
  90 static VOID UnitTask(struct ExecBase *sys_base);
  91
  92
  93 static const UBYTE snap_template[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
  94 static const UBYTE broadcast_address[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  95 static const ULONG g_retry_rates[] = {54000, 36000, 18000, 2000};
  96 static const ULONG b_retry_rates[] = {11000, 5500, 2000, 1000};
  97
  98
  99 #ifdef __amigaos4__
 100 #undef AddTask
 101 #define AddTask(task, initial_pc, final_pc) \
 102    IExec->AddTask(task, initial_pc, final_pc, NULL)
 103 #endif
 104 #ifdef __MORPHOS__
 105 static const struct EmulLibEntry mos_task_trap =
 106 {
 107    TRAP_LIB,
 108    0,
 109    (APTR)UnitTask
 110 };
 111 #define UnitTask &mos_task_trap
 112 #endif
 113 #ifdef __AROS__
 114 #undef AddTask
 115 #define AddTask(task, initial_pc, final_pc) \
 116    ({ \
 117       struct TagItem _task_tags[] = \
 118          {{TASKTAG_ARG1, (IPTR)SysBase}, {TAG_END, 0}}; \
 119       NewAddTask(task, initial_pc, final_pc, _task_tags); \
 120    })
 121 #endif
 122
 123
 124
 125 /****i* atheros5000.device/CreateUnit **************************************
 126 *
 127 *   NAME
 128 *       CreateUnit -- Create a unit.
 129 *
 130 *   SYNOPSIS
 131 *       unit = CreateUnit(index, io_base, id, card,
 132 *           io_tags, bus)
 133 *
 134 *       struct DevUnit *CreateUnit(ULONG, APTR, UWORD, APTR,
 135 *           struct TagItem *, UWORD);
 136 *
 137 *   FUNCTION
 138 *       Creates a new unit.
 139 *
 140 ****************************************************************************
 141 *
 142 */
 143
 144 struct DevUnit *CreateUnit(ULONG index, APTR io_base, UWORD id, APTR card,
 145    const struct TagItem *io_tags, UWORD bus, struct DevBase *base)
 146 {
 147    BOOL success = TRUE;
 148    struct DevUnit *unit;
 149    struct Task *task;
 150    struct MsgPort *port;
 151    UWORD i;
 152    struct ath_desc *tx_desc, *rx_desc;
 153    ULONG dma_size;
 154    APTR stack;
 155    HAL_STATUS hal_status;
 156
 157    unit = AllocMem(sizeof(struct DevUnit), MEMF_CLEAR | MEMF_PUBLIC);
 158    if(unit == NULL)
 159       success = FALSE;
 160
 161    if(success)
 162    {
 163       /* Initialise lists etc. */
 164
 165       NewList((APTR)&unit->openers);
 166       NewList((APTR)&unit->type_trackers);
 167       NewList((APTR)&unit->multicast_ranges);
 168
 169       unit->index = index;
 170       unit->device = base;
 171       unit->card = card;
 172       unit->bus = bus;
 173
 174       /* Store DMA memory hooks */
 175
 176       unit->AllocDMAMem =
 177          (APTR)GetTagData(IOTAG_AllocDMAMem, (UPINT)NULL, io_tags);
 178       unit->FreeDMAMem =
 179          (APTR)GetTagData(IOTAG_FreeDMAMem, (UPINT)NULL, io_tags);
 180       if(unit->AllocDMAMem == NULL || unit->FreeDMAMem == NULL)
 181          success = FALSE;
 182    }
 183
 184    if(success)
 185    {
 186       /* Initialise HAL */
 187
 188       unit->hal = ath_hal_attach(id, unit, NULL, io_base, &hal_status);
 189
 190       if(unit->hal == NULL)
 191          success = FALSE;
 192    }
 193
 194    if(success)
 195    {
 196       InitSemaphore(&unit->access_lock);
 197
 198       /* Create the message ports for queuing requests */
 199
 200       for(i = 0; i < REQUEST_QUEUE_COUNT; i++)
 201       {
 202          unit->request_ports[i] = port = AllocMem(sizeof(struct MsgPort),
 203             MEMF_PUBLIC | MEMF_CLEAR);
 204          if(port == NULL)
 205             success = FALSE;
 206
 207          if(success)
 208          {
 209             NewList(&port->mp_MsgList);
 210             port->mp_Flags = PA_IGNORE;
 211          }
 212       }
 213
 214       if(success)
 215       {
 216          unit->request_ports[WRITE_QUEUE]->mp_SigTask = &unit->tx_int;
 217          unit->request_ports[MGMT_QUEUE]->mp_SigTask = &unit->mgmt_int;
 218       }
 219
 220       /* Allocate buffers and descriptors */
 221
 222       unit->tx_buffer = AllocVec(ETH_MAXPACKETSIZE, MEMF_PUBLIC);
 223       for(i = 0; i < TX_SLOT_COUNT; i++)
 224       {
 225          unit->tx_buffers[i] =
 226             unit->AllocDMAMem(unit->card, FRAME_BUFFER_SIZE, 4);
 227          if(unit->tx_buffers[i] == NULL)
 228             success = FALSE;
 229       }
 230       for(i = 0; i < MGMT_SLOT_COUNT; i++)
 231       {
 232          unit->mgmt_buffers[i] =
 233             unit->AllocDMAMem(unit->card, FRAME_BUFFER_SIZE, 4);
 234          if(unit->mgmt_buffers[i] == NULL)
 235             success = FALSE;
 236       }
 237       unit->rx_buffer = AllocVec(FRAME_BUFFER_SIZE, MEMF_PUBLIC);
 238       for(i = 0; i < RX_SLOT_COUNT; i++)
 239       {
 240          unit->rx_buffers[i] =
 241             unit->AllocDMAMem(unit->card, FRAME_BUFFER_SIZE, 4);
 242          if(unit->rx_buffers[i] == NULL)
 243             success = FALSE;
 244       }
 245       unit->rx_frames =
 246          AllocVec(FRAME_BUFFER_SIZE * FRAME_BUFFER_COUNT, MEMF_PUBLIC);
 247       for(i = 0; i < FRAME_BUFFER_COUNT; i++)
 248          unit->rx_fragment_nos[i] = -1;
 249       unit->tx_descs = unit->AllocDMAMem(unit->card,
 250          sizeof(struct ath_desc) * TX_SLOT_COUNT, 4);
 251       unit->mgmt_descs = unit->AllocDMAMem(unit->card,
 252          sizeof(struct ath_desc) * MGMT_SLOT_COUNT, 4);
 253       unit->rx_descs = unit->AllocDMAMem(unit->card,
 254          sizeof(struct ath_desc) * RX_SLOT_COUNT, 4);
 255       unit->tx_requests = AllocVec(sizeof(APTR) * TX_SLOT_COUNT,
 256          MEMF_PUBLIC);
 257       unit->mgmt_requests = AllocVec(sizeof(APTR) * MGMT_SLOT_COUNT,
 258          MEMF_PUBLIC);
 259       unit->channels = AllocVec(sizeof(HAL_CHANNEL) * MAX_CHANNEL_COUNT,
 260          MEMF_PUBLIC | MEMF_CLEAR);
 261       if(unit->tx_buffer == NULL
 262          || unit->rx_buffer == NULL
 263          || unit->rx_frames == NULL
 264          || unit->tx_descs == NULL
 265          || unit->mgmt_descs == NULL
 266          || unit->rx_descs == NULL
 267          || unit->tx_requests == NULL
 268          || unit->mgmt_requests == NULL
 269          || unit->channels == NULL)
 270          success = FALSE;
 271    }
 272
 273    if(success)
 274    {
 275       /* Initialise network adapter hardware */
 276
 277       success = InitialiseAdapter(unit, FALSE, base);
 278       unit->flags |= UNITF_HAVEADAPTER;
 279    }
 280
 281    if(success)
 282    {
 283       /* Get physical addresses of DMA structures */
 284
 285       dma_size = sizeof(struct ath_desc) * TX_SLOT_COUNT;
 286       unit->tx_descs_p =
 287          (ULONG)(UPINT)CachePreDMA(unit->tx_descs, &dma_size, 0);
 288       if(dma_size != sizeof(struct ath_desc) * TX_SLOT_COUNT)
 289          success = FALSE;
 290       CachePostDMA(unit->tx_descs, &dma_size, 0);
 291
 292       for(i = 0; i < TX_SLOT_COUNT; i++)
 293       {
 294          dma_size = FRAME_BUFFER_SIZE;
 295          unit->tx_buffers_p[i] =
 296             (ULONG)(UPINT)CachePreDMA(unit->tx_buffers[i], &dma_size, 0);
 297          if(dma_size != FRAME_BUFFER_SIZE)
 298             success = FALSE;
 299          CachePostDMA(unit->tx_buffers[i], &dma_size, 0);
 300       }
 301
 302       dma_size = sizeof(struct ath_desc) * MGMT_SLOT_COUNT;
 303       unit->mgmt_descs_p =
 304          (ULONG)(UPINT)CachePreDMA(unit->mgmt_descs, &dma_size, 0);
 305       if(dma_size != sizeof(struct ath_desc) * MGMT_SLOT_COUNT)
 306          success = FALSE;
 307       CachePostDMA(unit->mgmt_descs, &dma_size, 0);
 308
 309       for(i = 0; i < MGMT_SLOT_COUNT; i++)
 310       {
 311          dma_size = FRAME_BUFFER_SIZE;
 312          unit->mgmt_buffers_p[i] =
 313             (ULONG)(UPINT)CachePreDMA(unit->mgmt_buffers[i], &dma_size, 0);
 314          if(dma_size != FRAME_BUFFER_SIZE)
 315             success = FALSE;
 316          CachePostDMA(unit->mgmt_buffers[i], &dma_size, 0);
 317       }
 318
 319       dma_size = sizeof(struct ath_desc) * RX_SLOT_COUNT;
 320       unit->rx_descs_p =
 321          (ULONG)(UPINT)CachePreDMA(unit->rx_descs, &dma_size, 0);
 322       if(dma_size != sizeof(struct ath_desc) * RX_SLOT_COUNT)
 323          success = FALSE;
 324       CachePostDMA(unit->rx_descs, &dma_size, 0);
 325
 326       for(i = 0; i < RX_SLOT_COUNT; i++)
 327       {
 328          dma_size = FRAME_BUFFER_SIZE;
 329          unit->rx_buffers_p[i] =
 330             (ULONG)(UPINT)CachePreDMA(unit->rx_buffers[i], &dma_size, 0);
 331          if(dma_size != FRAME_BUFFER_SIZE)
 332             success = FALSE;
 333          CachePostDMA(unit->rx_buffers[i], &dma_size, 0);
 334       }
 335
 336       /* Construct TX ring */
 337
 338       for(tx_desc = unit->tx_descs, i = 0; i < TX_SLOT_COUNT; i++)
 339       {
 340          tx_desc->ds_data = unit->tx_buffers_p[i];
 341          tx_desc++;
 342       }
 343
 344       /* Construct management frame TX ring */
 345
 346       for(tx_desc = unit->mgmt_descs, i = 0; i < MGMT_SLOT_COUNT; i++)
 347       {
 348          tx_desc->ds_data = unit->mgmt_buffers_p[i];
 349          tx_desc++;
 350       }
 351
 352       /* Construct RX ring */
 353
 354       for(rx_desc = unit->rx_descs, i = 0; i < RX_SLOT_COUNT; i++)
 355       {
 356          rx_desc->ds_link = unit->rx_descs_p + ((i + 1) % RX_SLOT_COUNT)
 357             * sizeof(struct ath_desc);
 358          rx_desc->ds_data = unit->rx_buffers_p[i];
 359          unit->hal->ah_setupRxDesc(unit->hal, rx_desc, FRAME_BUFFER_SIZE,
 360             HAL_RXDESC_INTREQ);
 361          rx_desc++;
 362       }
 363
 364       dma_size = sizeof(struct ath_desc) * RX_SLOT_COUNT;
 365       CachePreDMA(unit->rx_descs, &dma_size, 0);
 366
 367       /* Record maximum speed in BPS */
 368
 369       unit->speed = 54000000;
 370
 371       /* Initialise status, transmit, receive and stats interrupts */
 372
 373       unit->status_int.is_Node.ln_Name =
 374          base->device.dd_Library.lib_Node.ln_Name;
 375       unit->status_int.is_Code = (APTR)StatusInt;
 376       unit->status_int.is_Data = unit;
 377
 378       unit->rx_int.is_Node.ln_Name =
 379          base->device.dd_Library.lib_Node.ln_Name;
 380       unit->rx_int.is_Code = (APTR)RXInt;
 381       unit->rx_int.is_Data = unit;
 382
 383       unit->tx_int.is_Node.ln_Name =
 384          base->device.dd_Library.lib_Node.ln_Name;
 385       unit->tx_int.is_Code = (APTR)TXInt;
 386       unit->tx_int.is_Data = unit;
 387
 388       unit->tx_end_int.is_Node.ln_Name =
 389          base->device.dd_Library.lib_Node.ln_Name;
 390       unit->tx_end_int.is_Code = (APTR)TXEndInt;
 391       unit->tx_end_int.is_Data = unit;
 392
 393       unit->mgmt_int.is_Node.ln_Name =
 394          base->device.dd_Library.lib_Node.ln_Name;
 395       unit->mgmt_int.is_Code = (APTR)MgmtTXInt;
 396       unit->mgmt_int.is_Data = unit;
 397
 398       unit->mgmt_end_int.is_Node.ln_Name =
 399          base->device.dd_Library.lib_Node.ln_Name;
 400       unit->mgmt_end_int.is_Code = (APTR)MgmtTXEndInt;
 401       unit->mgmt_end_int.is_Data = unit;
 402
 403       unit->reset_handler.is_Node.ln_Name =
 404          base->device.dd_Library.lib_Node.ln_Name;
 405       unit->reset_handler.is_Code = (APTR)ResetHandler;
 406       unit->reset_handler.is_Data = unit;
 407
 408       unit->request_ports[WRITE_QUEUE]->mp_Flags = PA_SOFTINT;
 409       unit->request_ports[MGMT_QUEUE]->mp_Flags = PA_SOFTINT;
 410
 411       /* Create a new task */
 412
 413       unit->task = task =
 414          AllocMem(sizeof(struct Task), MEMF_PUBLIC | MEMF_CLEAR);
 415       if(task == NULL)
 416          success = FALSE;
 417    }
 418
 419    if(success)
 420    {
 421       stack = AllocMem(STACK_SIZE, MEMF_PUBLIC);
 422       if(stack == NULL)
 423          success = FALSE;
 424    }
 425
 426    if(success)
 427    {
 428       /* Initialise and start task */
 429
 430       task->tc_Node.ln_Type = NT_TASK;
 431       task->tc_Node.ln_Pri = TASK_PRIORITY;
 432       task->tc_Node.ln_Name = base->device.dd_Library.lib_Node.ln_Name;
 433       task->tc_SPUpper = stack + STACK_SIZE;
 434       task->tc_SPLower = stack;
 435       task->tc_SPReg = stack + STACK_SIZE;
 436       NewList(&task->tc_MemEntry);
 437
 438       if(AddTask(task, UnitTask, NULL) == NULL)
 439          success = FALSE;
 440    }
 441
 442    if(success)
 443    {
 444       /* Send the unit to the new task */
 445
 446       task->tc_UserData = unit;
 447
 448       /* Set default wireless options */
 449
 450       unit->mode = S2PORT_MANAGED;
 451    }
 452
 453    if(!success)
 454    {
 455       DeleteUnit(unit, base);
 456       unit = NULL;
 457    }
 458
 459    return unit;
 460 }
 461
 462
 463
 464 /****i* atheros5000.device/DeleteUnit **************************************
 465 *
 466 *   NAME
 467 *       DeleteUnit -- Delete a unit.
 468 *
 469 *   SYNOPSIS
 470 *       DeleteUnit(unit)
 471 *
 472 *       VOID DeleteUnit(struct DevUnit *);
 473 *
 474 *   FUNCTION
 475 *       Deletes a unit.
 476 *
 477 *   INPUTS
 478 *       unit - Device unit (may be NULL).
 479 *
 480 *   RESULT
 481 *       None.
 482 *
 483 ****************************************************************************
 484 *
 485 */
 486
 487 VOID DeleteUnit(struct DevUnit *unit, struct DevBase *base)
 488 {
 489    UBYTE i;
 490    struct Task *task;
 491
 492    if(unit != NULL)
 493    {
 494       task = unit->task;
 495       if(task != NULL)
 496       {
 497          if(task->tc_UserData != NULL)
 498          {
 499             RemTask(task);
 500             FreeMem(task->tc_SPLower, STACK_SIZE);
 501             Signal(unit->task, SIGBREAKF_CTRL_C);
 502          }
 503          FreeMem(task, sizeof(struct Task));
 504       }
 505
 506       for(i = 0; i < REQUEST_QUEUE_COUNT; i++)
 507       {
 508          if(unit->request_ports[i] != NULL)
 509             FreeMem(unit->request_ports[i], sizeof(struct MsgPort));
 510       }
 511
 512       if((unit->flags & UNITF_ONLINE) != 0)   /* Needed! */
 513          GoOffline(unit, base);
 514
 515       for(i = 0; i < TX_SLOT_COUNT; i++)
 516          unit->FreeDMAMem(unit->card, unit->tx_buffers[i]);
 517       for(i = 0; i < MGMT_SLOT_COUNT; i++)
 518          unit->FreeDMAMem(unit->card, unit->mgmt_buffers[i]);
 519       for(i = 0; i < RX_SLOT_COUNT; i++)
 520          unit->FreeDMAMem(unit->card, unit->rx_buffers[i]);
 521
 522       FreeVec(unit->tx_buffer);
 523       FreeVec(unit->rx_frames);
 524       FreeVec(unit->tx_requests);
 525       FreeVec(unit->mgmt_requests);
 526       FreeVec(unit->channels);
 527       FreeVec(unit->rx_buffer);
 528
 529       if(unit->hal != NULL)
 530          unit->hal->ah_detach(unit->hal);
 531
 532       FreeMem(unit, sizeof(struct DevUnit));
 533    }
 534
 535    return;
 536 }
 537
 538
 539
 540 /****i* atheros5000.device/InitialiseAdapter *******************************
 541 *
 542 *   NAME
 543 *       InitialiseAdapter
 544 *
 545 *   SYNOPSIS
 546 *       success = InitialiseAdapter(unit, reinsertion)
 547 *
 548 *       BOOL InitialiseAdapter(struct DevUnit *, BOOL);
 549 *
 550 *   FUNCTION
 551 *
 552 *   INPUTS
 553 *       unit
 554 *       reinsertion
 555 *
 556 *   RESULT
 557 *       success - Success indicator.
 558 *
 559 ****************************************************************************
 560 *
 561 */
 562
 563 BOOL InitialiseAdapter(struct DevUnit *unit, BOOL reinsertion,
 564    struct DevBase *base)
 565 {
 566    UBYTE i, reg_class_id;
 567    BOOL success = TRUE;
 568    unsigned int channel_count, reg_class_count;
 569    HAL_TXQ_INFO queue_info = {0};
 570
 571    /* Get default MAC address */
 572
 573    unit->hal->ah_getMacAddress(unit->hal, unit->default_address);
 574
 575    /* Get default antenna */
 576
 577    unit->antenna = unit->hal->ah_getDefAntenna(unit->hal);
 578
 579    /* Reset key cache */
 580
 581    for(i = 0; i < WIFI_KEYCOUNT; i++)
 582       unit->hal->ah_resetKeyCacheEntry(unit->hal, i);
 583
 584    /* Initialise channels and rates */
 585
 586    ath_hal_init_channels(unit->hal, unit->channels,
 587       MAX_CHANNEL_COUNT, &channel_count,
 588       &reg_class_id, 1, &reg_class_count, CTRY_DEFAULT,
 589       HAL_MODE_11B | HAL_MODE_PUREG, TRUE,
 590       FALSE);
 591    unit->channel_count = channel_count;
 592
 593    unit->channel = 1;
 594    unit->band = S2BAND_B;
 595
 596    /* Check if multi-rate retries are supported */
 597
 598    if(unit->hal->ah_setupXTxDesc(unit->hal, NULL, 0, 0, 0, 0, 0, 0))
 599       unit->flags |= UNITF_SLOWRETRIES;
 600
 601    /* Set up TX queue */
 602
 603    queue_info.tqi_aifs = HAL_TXQ_USEDEFAULT;
 604    queue_info.tqi_cwmin = HAL_TXQ_USEDEFAULT;
 605    queue_info.tqi_cwmax = HAL_TXQ_USEDEFAULT;
 606    queue_info.tqi_qflags =
 607       HAL_TXQ_TXEOLINT_ENABLE | HAL_TXQ_TXDESCINT_ENABLE;
 608
 609    unit->tx_queue_no =
 610       unit->hal->ah_setupTxQueue(unit->hal, HAL_TX_QUEUE_DATA, &queue_info);
 611    unit->hal->ah_resetTxQueue(unit->hal, unit->tx_queue_no);
 612
 613    /* Set up management frame TX queue */
 614
 615    queue_info.tqi_aifs = HAL_TXQ_USEDEFAULT;
 616    queue_info.tqi_cwmin = HAL_TXQ_USEDEFAULT;
 617    queue_info.tqi_cwmax = HAL_TXQ_USEDEFAULT;
 618    queue_info.tqi_qflags =
 619       HAL_TXQ_TXEOLINT_ENABLE | HAL_TXQ_TXDESCINT_ENABLE;
 620
 621    unit->mgmt_queue_no =
 622       unit->hal->ah_setupTxQueue(unit->hal, HAL_TX_QUEUE_DATA, &queue_info);
 623    unit->hal->ah_resetTxQueue(unit->hal, unit->mgmt_queue_no);
 624
 625    /* Find out hardware encryption capabilities */
 626
 627    if(unit->hal->ah_getCapability(unit->hal, HAL_CAP_CIPHER,
 628       HAL_CIPHER_WEP, NULL) == HAL_OK)
 629       unit->flags |= UNITF_HARDWEP;
 630    if(unit->hal->ah_getCapability(unit->hal, HAL_CAP_CIPHER,
 631       HAL_CIPHER_TKIP, NULL) == HAL_OK)
 632       unit->flags |= UNITF_HARDTKIP;
 633 #if 1
 634    if(unit->hal->ah_getCapability(unit->hal, HAL_CAP_CIPHER,
 635       HAL_CIPHER_MIC, NULL) == HAL_OK)
 636    {
 637       if(unit->hal->ah_setCapability(unit->hal, HAL_CAP_TKIP_MIC,
 638 //         0, TRUE, NULL))
 639          0, 0, NULL))
 640          unit->flags |= UNITF_HARDMIC;
 641    }
 642 #else
 643    if(unit->hal->ah_setCapability(unit->hal, HAL_CAP_TKIP_MIC,
 644       0, FALSE, NULL))
 645 #endif
 646    if(unit->hal->ah_getCapability(unit->hal, HAL_CAP_TKIP_SPLIT, 0,
 647       NULL) == HAL_OK)
 648       unit->flags |= UNITF_SPLITMIC;
 649    if(unit->hal->ah_getCapability(unit->hal, HAL_CAP_CIPHER,
 650       HAL_CIPHER_AES_OCB, NULL) == HAL_OK)
 651       unit->flags |= UNITF_HARDAESOCB;
 652    if(unit->hal->ah_getCapability(unit->hal, HAL_CAP_CIPHER,
 653       HAL_CIPHER_AES_CCM, NULL) == HAL_OK)
 654       unit->flags |= UNITF_HARDCCMP;
 655
 656    /* Set IV sizes */
 657
 658    unit->iv_sizes[S2ENC_WEP] = IV_SIZE;
 659    unit->iv_sizes[S2ENC_TKIP] = EIV_SIZE;
 660    unit->iv_sizes[S2ENC_CCMP] = EIV_SIZE;
 661
 662    /* Set encryption functions */
 663
 664    unit->fragment_encrypt_functions[S2ENC_NONE] = WriteClearFragment;
 665
 666    if((unit->flags & UNITF_HARDWEP) != 0)
 667       unit->fragment_encrypt_functions[S2ENC_WEP] = WriteWEPFragment;
 668    else
 669       unit->fragment_encrypt_functions[S2ENC_WEP] = EncryptWEPFragment;
 670
 671    if((unit->flags & UNITF_HARDTKIP) != 0)
 672       unit->fragment_encrypt_functions[S2ENC_TKIP] = WriteTKIPFragment;
 673    else
 674       unit->fragment_encrypt_functions[S2ENC_TKIP] = EncryptTKIPFragment;
 675
 676    if((unit->flags & UNITF_HARDCCMP) != 0)
 677       unit->fragment_encrypt_functions[S2ENC_CCMP] = WriteCCMPFragment;
 678    else
 679       unit->fragment_encrypt_functions[S2ENC_CCMP] = EncryptCCMPFragment;
 680
 681    /* Set decryption functions */
 682
 683    unit->fragment_decrypt_functions[S2ENC_NONE] = ReadClearFragment;
 684
 685    if((unit->flags & UNITF_HARDWEP) != 0)
 686       unit->fragment_decrypt_functions[S2ENC_WEP] = ReadWEPFragment;
 687    else
 688       unit->fragment_decrypt_functions[S2ENC_WEP] = DecryptWEPFragment;
 689
 690    if((unit->flags & UNITF_HARDTKIP) != 0)
 691       unit->fragment_decrypt_functions[S2ENC_TKIP] = ReadTKIPFragment;
 692    else
 693       unit->fragment_decrypt_functions[S2ENC_TKIP] = DecryptTKIPFragment;
 694
 695    if((unit->flags & UNITF_HARDCCMP) != 0)
 696       unit->fragment_decrypt_functions[S2ENC_CCMP] = ReadCCMPFragment;
 697    else
 698       unit->fragment_decrypt_functions[S2ENC_CCMP] = DecryptCCMPFragment;
 699
 700    /* Return */
 701
 702    return success;
 703 }
 704
 705
 706
 707 /****i* atheros5000.device/ConfigureAdapter ********************************
 708 *
 709 *   NAME
 710 *       ConfigureAdapter -- Set up card for transmission/reception.
 711 *
 712 *   SYNOPSIS
 713 *       ConfigureAdapter(unit)
 714 *
 715 *       VOID ConfigureAdapter(struct DevUnit *);
 716 *
 717 ****************************************************************************
 718 *
 719 */
 720
 721 VOID ConfigureAdapter(struct DevUnit *unit, struct DevBase *base)
 722 {
 723    UWORD i, j, key_length, hal_band, key_type;
 724    const struct KeyUnion *keys;
 725    HAL_CHANNEL *channel = unit->channels, *ch;
 726    ULONG freq = 2407 + unit->channel * 5;
 727    HAL_STATUS status;
 728    HAL_KEYVAL hal_key;
 729    HAL_BOOL iq_done;
 730    const HAL_RATE_TABLE *rate_table;
 731
 732    /* Get band-specific parameters */
 733
 734    if(unit->band == S2BAND_G)
 735    {
 736       hal_band = HAL_MODE_11G;
 737       unit->band_mask = CHANNEL_G;
 738       unit->tx_rates = g_retry_rates;
 739       unit->mgmt_rate = G_MGMT_RATE;
 740    }
 741    else if(unit->band == S2BAND_B)
 742    {
 743       hal_band = HAL_MODE_11B;
 744       unit->band_mask = CHANNEL_B;
 745       unit->tx_rates = b_retry_rates;
 746       unit->mgmt_rate = B_MGMT_RATE;
 747    }
 748    unit->rate_table = unit->hal->ah_getRateTable(unit->hal, hal_band);
 749
 750    /* Find rate codes to match our optimal and retry rates */
 751
 752    rate_table = unit->rate_table;
 753    for(i = 0; i < rate_table->rateCount; i++)
 754    {
 755       for(j = 0; j < 4; j++)
 756       {
 757          if(rate_table->info[i].rateKbps == unit->tx_rates[j])
 758          {
 759             unit->tx_rate_codes[j] = rate_table->info[i].rateCode;
 760             if((unit->flags & UNITF_SHORTPREAMBLE) != 0)
 761                unit->tx_rate_codes[j] |= rate_table->info[i].shortPreamble;
 762          }
 763       }
 764       if(rate_table->info[i].rateKbps == unit->mgmt_rate)
 765       {
 766          unit->mgmt_rate_code = rate_table->info[i].rateCode;
 767          if((unit->flags & UNITF_SHORTPREAMBLE) != 0)
 768             unit->mgmt_rate_code |= rate_table->info[i].shortPreamble;
 769       }
 770    }
 771
 772    /* Find a channel that matches requirements */
 773
 774    for(i = 0, ch = unit->channels; i < unit->channel_count; i++, ch++)
 775    {
 776       if(ch->channel == freq
 777          && (ch->channelFlags & unit->band_mask) == unit->band_mask)
 778          channel = ch;
 779    }
 780
 781    /* Stop the transceiver if we're already online */
 782
 783    if((unit->flags & UNITF_ONLINE) != 0)
 784    {
 785       /* Disable frame transmission */
 786
 787       unit->hal->ah_stopTxDma(unit->hal, unit->tx_queue_no);
 788       unit->hal->ah_stopTxDma(unit->hal, unit->mgmt_queue_no);
 789       unit->hal->ah_setRxFilter(unit->hal, 0);
 790 ath_hal_delay(3000);
 791
 792       /* Disable frame reception */
 793
 794       unit->hal->ah_stopPcuReceive(unit->hal);
 795       unit->hal->ah_stopDmaReceive(unit->hal);
 796
 797       /* Disable interrupts */
 798
 799       unit->hal->ah_setInterrupts(unit->hal, 0);
 800    }
 801
 802    /* Calculate RX filter mask */
 803
 804    unit->filter_mask = HAL_RX_FILTER_UCAST | HAL_RX_FILTER_MCAST
 805       | HAL_RX_FILTER_BCAST;
 806    if((unit->flags & UNITF_PROM) != 0)
 807       unit->filter_mask |= HAL_RX_FILTER_PROM;
 808    if(unit->mode != S2PORT_MANAGED)
 809       unit->filter_mask |= HAL_RX_FILTER_PROBEREQ;
 810
 811    /* Reset card */
 812
 813    unit->hal->ah_reset(unit->hal, HAL_M_STA, channel, FALSE, &status);
 814
 815    /* Set MAC address and miscellaneous wireless parameters */
 816
 817    unit->hal->ah_setMacAddress(unit->hal, unit->address);
 818    unit->hal->ah_setPCUConfig(unit->hal);
 819    SetMulticast(unit, base);
 820    unit->hal->ah_setDefAntenna(unit->hal, unit->antenna);
 821    unit->hal->ah_perCalibration(unit->hal, channel, &iq_done);
 822    unit->hal->ah_setTxPowerLimit(unit->hal, TX_POWER);
 823
 824    /* Set association ID */
 825
 826    unit->hal->ah_writeAssocid(unit->hal, unit->bssid, unit->assoc_id);
 827
 828    /* Put on a reassuring light */
 829
 830    unit->hal->ah_setLedState(unit->hal, HAL_LED_RUN);
 831
 832    /* Set or clear default encryption keys where appropriate */
 833
 834    keys = unit->keys;
 835    for(i = 0; i < WIFI_KEYCOUNT; i++)
 836    {
 837       key_type = unit->keys[i].type;
 838       if(key_type <= S2ENC_WEP
 839          || key_type == S2ENC_TKIP && (unit->flags & UNITF_HARDTKIP) == 0
 840          || key_type == S2ENC_CCMP && (unit->flags & UNITF_HARDCCMP) == 0)
 841       {
 842          if(key_type == S2ENC_WEP && (unit->flags & UNITF_HARDWEP) != 0)
 843          {
 844             hal_key.kv_type = HAL_CIPHER_WEP;
 845             key_length = keys[i].u.wep.length;
 846             CopyMem(keys[i].u.wep.key, hal_key.kv_val, key_length);
 847          }
 848          else
 849          {
 850             hal_key.kv_type = HAL_CIPHER_CLR;
 851             key_length = 0;
 852          }
 853          hal_key.kv_len = key_length;
 854          unit->hal->ah_setKeyCacheEntry(unit->hal, i, &hal_key,
 855             unit->bssid, FALSE);
 856       }
 857    }
 858
 859    /* Set pointer to RX ring */
 860
 861    unit->hal->ah_setRxDP(unit->hal,
 862       unit->rx_descs_p + unit->rx_slot * sizeof(struct ath_desc));
 863
 864    /* Restart the transceiver if we're already online */
 865
 866    if((unit->flags & UNITF_ONLINE) != 0)
 867    {
 868       /* Enable interrupts */
 869
 870       unit->hal->ah_setInterrupts(unit->hal, INT_MASK);
 871
 872       /* Enable frame reception */
 873
 874       unit->hal->ah_enableReceive(unit->hal);
 875       unit->hal->ah_setRxFilter(unit->hal, unit->filter_mask);
 876       unit->hal->ah_startPcuReceive(unit->hal);
 877
 878 #if 0
 879       /* Reset TX queues */
 880
 881       unit->hal->ah_resetTxQueue(unit->hal, unit->tx_queue_no);
 882       unit->hal->ah_resetTxQueue(unit->hal, unit->mgmt_queue_no);
 883 #endif
 884    }
 885
 886    /* Return */
 887
 888    return;
 889 }
 890
 891
 892
 893 /****i* atheros5000.device/GoOnline ****************************************
 894 *
 895 *   NAME
 896 *       GoOnline -- Enable transmission/reception.
 897 *
 898 *   SYNOPSIS
 899 *       GoOnline(unit)
 900 *
 901 *       VOID GoOnline(struct DevUnit *);
 902 *
 903 ****************************************************************************
 904 *
 905 */
 906
 907 VOID GoOnline(struct DevUnit *unit, struct DevBase *base)
 908 {
 909    /* Enable interrupts */
 910
 911    unit->flags |= UNITF_ONLINE;
 912    unit->hal->ah_setInterrupts(unit->hal, INT_MASK);
 913
 914    /* Enable frame reception */
 915
 916    unit->hal->ah_enableReceive(unit->hal);
 917    unit->hal->ah_setRxFilter(unit->hal, unit->filter_mask);
 918    unit->hal->ah_startPcuReceive(unit->hal);
 919
 920 #if 0
 921    /* Reset TX queues */
 922
 923    unit->hal->ah_resetTxQueue(unit->hal, unit->tx_queue_no);
 924    unit->hal->ah_resetTxQueue(unit->hal, unit->mgmt_queue_no);
 925 #endif
 926
 927    /* Record start time and report Online event */
 928
 929    GetSysTime(&unit->stats.LastStart);
 930    ReportEvents(unit, S2EVENT_ONLINE, base);
 931
 932    return;
 933 }
 934
 935
 936
 937 /****i* atheros5000.device/GoOffline ***************************************
 938 *
 939 *   NAME
 940 *       GoOffline -- Disable transmission/reception.
 941 *
 942 *   SYNOPSIS
 943 *       GoOffline(unit)
 944 *
 945 *       VOID GoOffline(struct DevUnit *);
 946 *
 947 *   FUNCTION
 948 *
 949 *   INPUTS
 950 *       unit
 951 *
 952 *   RESULT
 953 *       None.
 954 *
 955 ****************************************************************************
 956 *
 957 */
 958
 959 VOID GoOffline(struct DevUnit *unit, struct DevBase *base)
 960 {
 961    unit->flags &= ~UNITF_ONLINE;
 962    if((unit->flags & UNITF_HAVEADAPTER) != 0)
 963    {
 964       /* Disable frame transmission */
 965
 966       unit->hal->ah_stopTxDma(unit->hal, unit->tx_queue_no);
 967       unit->hal->ah_stopTxDma(unit->hal, unit->mgmt_queue_no);
 968
 969       /* Disable frame reception */
 970
 971       unit->hal->ah_stopPcuReceive(unit->hal);
 972       unit->hal->ah_stopDmaReceive(unit->hal);
 973       unit->hal->ah_setRxFilter(unit->hal, 0);
 974 ath_hal_delay(3000);
 975
 976       /* Stop interrupts */
 977
 978       unit->hal->ah_setInterrupts(unit->hal, 0);
 979
 980       /* Update statistics */
 981
 982       UpdateStats(unit, base);
 983    }
 984
 985    /* Flush pending read and write requests */
 986
 987    FlushUnit(unit, MGMT_QUEUE, S2ERR_OUTOFSERVICE, base);
 988
 989    /* Report Offline event and return */
 990
 991    ReportEvents(unit, S2EVENT_OFFLINE, base);
 992    return;
 993 }
 994
 995
 996
 997 /****i* atheros5000.device/SetOptions **************************************
 998 *
 999 *   NAME
1000 *       SetOptions -- Set and use interface options.
1001 *
1002 *   SYNOPSIS
1003 *       reconfigure = SetOptions(unit, tag_list)
1004 *
1005 *       BOOL SetOptions(struct DevUnit *, struct TagItem *);
1006 *
1007 ****************************************************************************
1008 *
1009 */
1010
1011 BOOL SetOptions(struct DevUnit *unit, const struct TagItem *tag_list,
1012    struct DevBase *base)
1013 {
1014    struct TagItem *tag_item, *tlist = (struct TagItem *)tag_list;
1015    BOOL reconfigure = TRUE;
1016
1017    while((tag_item = NextTagItem(&tlist)) != NULL)
1018    {
1019       switch(tag_item->ti_Tag)
1020       {
1021       case S2INFO_SSID:
1022          ReportEvents(unit, S2EVENT_CONNECT, base);
1023          break;
1024
1025       case S2INFO_BSSID:
1026          CopyMem((APTR)tag_item->ti_Data, unit->bssid, ETH_ADDRESSSIZE);
1027          break;
1028
1029       case S2INFO_AssocID:
1030          unit->assoc_id = tag_item->ti_Data;
1031          break;
1032
1033       case S2INFO_Capabilities:
1034          unit->capabilities = tag_item->ti_Data;
1035          if((unit->capabilities & (1 << 5)) != 0)
1036             unit->flags |= UNITF_SHORTPREAMBLE;
1037          else
1038             unit->flags &= ~UNITF_SHORTPREAMBLE;
1039          break;
1040
1041       case S2INFO_DefaultKeyNo:
1042          unit->tx_key_no = tag_item->ti_Data;
1043          break;
1044
1045       case S2INFO_PortType:
1046          unit->mode = tag_item->ti_Data;
1047          break;
1048
1049       case S2INFO_Channel:
1050          if(tag_item->ti_Data != unit->channel)
1051          {
1052             unit->channel = tag_item->ti_Data;
1053             reconfigure = TRUE;
1054          }
1055          break;
1056
1057       case S2INFO_Band:
1058          if(tag_item->ti_Data != unit->band)
1059          {
1060             unit->band = tag_item->ti_Data;
1061             reconfigure = TRUE;
1062          }
1063          break;
1064       }
1065    }
1066
1067    return reconfigure;
1068 }
1069
1070
1071
1072 /****i* atheros5000.device/SetKey ******************************************
1073 *
1074 *   NAME
1075 *       SetKey -- Set an encryption key.
1076 *
1077 *   SYNOPSIS
1078 *       SetKey(unit, index, type, key, key_length,
1079 *           rx_counter)
1080 *
1081 *       VOID SetKey(struct DevUnit *, ULONG, ULONG, UBYTE *, ULONG,
1082 *           UBYTE *);
1083 *
1084 ****************************************************************************
1085 *
1086 */
1087
1088 VOID SetKey(struct DevUnit *unit, ULONG index, ULONG type, const UBYTE *key,
1089    ULONG key_length, const UBYTE *rx_counter, struct DevBase *base)
1090 {
1091    struct KeyUnion *slot;
1092    struct EClockVal eclock;
1093    HAL_KEYVAL hal_key;
1094    UWORD i;
1095
1096    Disable();
1097    slot = &unit->keys[index];
1098    switch(type)
1099    {
1100       case S2ENC_WEP:
1101          CopyMem(key, slot->u.wep.key, key_length);
1102          slot->u.wep.length = key_length;
1103
1104          if((unit->flags & UNITF_HARDWEP) == 0)
1105          {
1106             /* Create a reasonably random IV */
1107
1108             ReadEClock(&eclock);
1109             slot->u.wep.tx_iv = FastRand(eclock.ev_lo ^ eclock.ev_hi);
1110          }
1111
1112          break;
1113
1114       case S2ENC_TKIP:
1115          CopyMem(key, slot->u.tkip.key, 16);
1116          CopyMem(key + 16, slot->u.tkip.tx_mic_key, MIC_SIZE);
1117          CopyMem(key + 24, slot->u.tkip.rx_mic_key, MIC_SIZE);
1118          slot->u.tkip.tx_iv_low = 0;
1119          slot->u.tkip.tx_iv_high = 0;
1120          slot->u.tkip.rx_iv_low = LEWord(*(UWORD *)rx_counter);
1121          slot->u.tkip.rx_iv_high = LELong(*(ULONG *)(rx_counter + 2));
1122          slot->u.tkip.tx_ttak_set = FALSE;
1123          slot->u.tkip.rx_ttak_set = FALSE;
1124
1125          if((unit->flags & UNITF_HARDTKIP) != 0)
1126          {
1127 // TO DO: Wait for TX queue to empty
1128             /* Load parameters for hardware encryption */
1129
1130             hal_key.kv_type = HAL_CIPHER_TKIP;
1131             hal_key.kv_len = 16;
1132             CopyMem(slot->u.tkip.key, hal_key.kv_val, 16);
1133
1134             CopyMem(slot->u.tkip.tx_mic_key, hal_key.kv_mic, MIC_SIZE);
1135             unit->hal->ah_setKeyCacheEntry(unit->hal, index, &hal_key,
1136                unit->bssid, FALSE);
1137             CopyMem(slot->u.tkip.rx_mic_key, hal_key.kv_mic, MIC_SIZE);
1138             unit->hal->ah_setKeyCacheEntry(unit->hal, index + 32, &hal_key,
1139                unit->bssid, FALSE);
1140          }
1141          else
1142          {
1143             /* Convert key to native endianness */
1144
1145             for(i = 0; i < 8; i++)
1146                slot->u.tkip.key[i] = LEWord(slot->u.tkip.key[i]);
1147          }
1148
1149          break;
1150
1151       case S2ENC_CCMP:
1152          CopyMem(key, slot->u.ccmp.key, 16);
1153          slot->u.ccmp.tx_iv_low = 0;
1154          slot->u.ccmp.tx_iv_high = 0;
1155          slot->u.ccmp.rx_iv_low = LEWord(*(UWORD *)rx_counter);
1156          slot->u.ccmp.rx_iv_high = LELong(*(ULONG *)(rx_counter + 2));
1157          slot->u.ccmp.stream_set = FALSE;
1158
1159          if((unit->flags & UNITF_HARDCCMP) != 0)
1160          {
1161 // TO DO: Wait for TX queue to empty
1162             /* Load parameters for hardware encryption */
1163
1164             hal_key.kv_type = HAL_CIPHER_AES_CCM;
1165             hal_key.kv_len = 16;
1166             CopyMem(slot->u.ccmp.key, hal_key.kv_val, 16);
1167             unit->hal->ah_setKeyCacheEntry(unit->hal, index, &hal_key,
1168                unit->bssid, FALSE);
1169          }
1170    }
1171
1172    /* Update type of key in selected slot */
1173
1174    slot->type = type;
1175    Enable();
1176
1177    return;
1178 }
1179
1180
1181
1182 /****i* atheros5000.device/AddMulticastRange *******************************
1183 *
1184 *   NAME
1185 *       AddMulticastRange
1186 *
1187 *   SYNOPSIS
1188 *       success = AddMulticastRange(unit, lower_bound, upper_bound)
1189 *
1190 *       BOOL AddMulticastRange(struct DevUnit *, UBYTE *, UBYTE *);
1191 *
1192 ****************************************************************************
1193 *
1194 */
1195
1196 BOOL AddMulticastRange(struct DevUnit *unit, const UBYTE *lower_bound,
1197    const UBYTE *upper_bound, struct DevBase *base)
1198 {
1199    struct AddressRange *range;
1200    ULONG lower_bound_left, upper_bound_left;
1201    UWORD lower_bound_right, upper_bound_right;
1202
1203    lower_bound_left = BELong(*((ULONG *)lower_bound));
1204    lower_bound_right = BEWord(*((UWORD *)(lower_bound + 4)));
1205    upper_bound_left = BELong(*((ULONG *)upper_bound));
1206    upper_bound_right = BEWord(*((UWORD *)(upper_bound + 4)));
1207
1208    range = FindMulticastRange(unit, lower_bound_left, lower_bound_right,
1209       upper_bound_left, upper_bound_right, base);
1210
1211    if(range != NULL)
1212       range->add_count++;
1213    else
1214    {
1215       range = AllocMem(sizeof(struct AddressRange), MEMF_PUBLIC);
1216       if(range != NULL)
1217       {
1218          range->lower_bound_left = lower_bound_left;
1219          range->lower_bound_right = lower_bound_right;
1220          range->upper_bound_left = upper_bound_left;
1221          range->upper_bound_right = upper_bound_right;
1222          range->add_count = 1;
1223
1224          Disable();
1225          AddTail((APTR)&unit->multicast_ranges, (APTR)range);
1226          unit->range_count++;
1227          SetMulticast(unit, base);
1228          Enable();
1229       }
1230    }
1231
1232    return range != NULL;
1233 }
1234
1235
1236
1237 /****i* atheros5000.device/RemMulticastRange *******************************
1238 *
1239 *   NAME
1240 *       RemMulticastRange
1241 *
1242 *   SYNOPSIS
1243 *       found = RemMulticastRange(unit, lower_bound, upper_bound)
1244 *
1245 *       BOOL RemMulticastRange(struct DevUnit *, UBYTE *, UBYTE *);
1246 *
1247 ****************************************************************************
1248 *
1249 */
1250
1251 BOOL RemMulticastRange(struct DevUnit *unit, const UBYTE *lower_bound,
1252    const UBYTE *upper_bound, struct DevBase *base)
1253 {
1254    struct AddressRange *range;
1255    ULONG lower_bound_left, upper_bound_left;
1256    UWORD lower_bound_right, upper_bound_right;
1257
1258    lower_bound_left = BELong(*((ULONG *)lower_bound));
1259    lower_bound_right = BEWord(*((UWORD *)(lower_bound + 4)));
1260    upper_bound_left = BELong(*((ULONG *)upper_bound));
1261    upper_bound_right = BEWord(*((UWORD *)(upper_bound + 4)));
1262
1263    range = FindMulticastRange(unit, lower_bound_left, lower_bound_right,
1264       upper_bound_left, upper_bound_right, base);
1265
1266    if(range != NULL)
1267    {
1268       if(--range->add_count == 0)
1269       {
1270          Disable();
1271          Remove((APTR)range);
1272          unit->range_count--;
1273          SetMulticast(unit, base);
1274          Enable();
1275          FreeMem(range, sizeof(struct AddressRange));
1276       }
1277    }
1278
1279    return range != NULL;
1280 }
1281
1282
1283
1284 /****i* atheros5000.device/FindMulticastRange ******************************
1285 *
1286 *   NAME
1287 *       FindMulticastRange
1288 *
1289 *   SYNOPSIS
1290 *       range = FindMulticastRange(unit, lower_bound_left,
1291 *           lower_bound_right, upper_bound_left, upper_bound_right)
1292 *
1293 *       struct AddressRange *FindMulticastRange(struct DevUnit *, ULONG,
1294 *           UWORD, ULONG, UWORD);
1295 *
1296 ****************************************************************************
1297 *
1298 */
1299
1300 static struct AddressRange *FindMulticastRange(struct DevUnit *unit,
1301    ULONG lower_bound_left, UWORD lower_bound_right, ULONG upper_bound_left,
1302    UWORD upper_bound_right, struct DevBase *base)
1303 {
1304    struct AddressRange *range, *tail;
1305    BOOL found = FALSE;
1306
1307    range = (APTR)unit->multicast_ranges.mlh_Head;
1308    tail = (APTR)&unit->multicast_ranges.mlh_Tail;
1309
1310    while(range != tail && !found)
1311    {
1312       if(lower_bound_left == range->lower_bound_left &&
1313          lower_bound_right == range->lower_bound_right &&
1314          upper_bound_left == range->upper_bound_left &&
1315          upper_bound_right == range->upper_bound_right)
1316          found = TRUE;
1317       else
1318          range = (APTR)range->node.mln_Succ;
1319    }
1320
1321    if(!found)
1322       range = NULL;
1323
1324    return range;
1325 }
1326
1327
1328
1329 /****i* atheros5000.device/SetMulticast ************************************
1330 *
1331 *   NAME
1332 *       SetMulticast
1333 *
1334 *   SYNOPSIS
1335 *       SetMulticast(unit)
1336 *
1337 *       VOID SetMulticast(struct DevUnit *);
1338 *
1339 ****************************************************************************
1340 *
1341 */
1342
1343 static VOID SetMulticast(struct DevUnit *unit, struct DevBase *base)
1344 {
1345    unit->hal->ah_setMulticastFilter(unit->hal, 0xffffffff, 0xffffffff);
1346
1347    return;
1348 }
1349
1350
1351
1352 /****i* atheros5000.device/FindTypeStats ***********************************
1353 *
1354 *   NAME
1355 *       FindTypeStats
1356 *
1357 *   SYNOPSIS
1358 *       stats = FindTypeStats(unit, list,
1359 *           packet_type)
1360 *
1361 *       struct TypeStats *FindTypeStats(struct DevUnit *, struct MinList *,
1362 *           ULONG);
1363 *
1364 ****************************************************************************
1365 *
1366 */
1367
1368 struct TypeStats *FindTypeStats(struct DevUnit *unit, struct MinList *list,
1369    ULONG packet_type, struct DevBase *base)
1370 {
1371    struct TypeStats *stats, *tail;
1372    BOOL found = FALSE;
1373
1374    stats = (APTR)list->mlh_Head;
1375    tail = (APTR)&list->mlh_Tail;
1376
1377    while(stats != tail && !found)
1378    {
1379       if(stats->packet_type == packet_type)
1380          found = TRUE;
1381       else
1382          stats = (APTR)stats->node.mln_Succ;
1383    }
1384
1385    if(!found)
1386       stats = NULL;
1387
1388    return stats;
1389 }
1390
1391
1392
1393 /****i* atheros5000.device/FlushUnit ***************************************
1394 *
1395 *   NAME
1396 *       FlushUnit
1397 *
1398 *   SYNOPSIS
1399 *       FlushUnit(unit, last_queue, error)
1400 *
1401 *       VOID FlushUnit(struct DevUnit *, UBYTE, BYTE);
1402 *
1403 ****************************************************************************
1404 *
1405 */
1406
1407 VOID FlushUnit(struct DevUnit *unit, UBYTE last_queue, BYTE error,
1408    struct DevBase *base)
1409 {
1410    struct IORequest *request;
1411    UBYTE i;
1412    struct Opener *opener, *tail;
1413
1414    /* Abort queued requests */
1415
1416    for(i = 0; i <= last_queue; i++)
1417    {
1418       while((request = (APTR)GetMsg(unit->request_ports[i])) != NULL)
1419       {
1420          request->io_Error = IOERR_ABORTED;
1421          ReplyMsg((APTR)request);
1422       }
1423    }
1424
1425 #if 1
1426    opener = (APTR)unit->openers.mlh_Head;
1427    tail = (APTR)&unit->openers.mlh_Tail;
1428
1429    /* Flush every opener's read queues */
1430
1431    while(opener != tail)
1432    {
1433       while((request = (APTR)GetMsg(&opener->read_port)) != NULL)
1434       {
1435          request->io_Error = error;
1436          ReplyMsg((APTR)request);
1437       }
1438       while((request = (APTR)GetMsg(&opener->mgmt_port)) != NULL)
1439       {
1440          request->io_Error = error;
1441          ReplyMsg((APTR)request);
1442       }
1443       opener = (APTR)opener->node.mln_Succ;
1444    }
1445
1446 #else
1447    opener = request->ios2_BufferManagement;
1448    while((request = (APTR)GetMsg(&opener->read_port)) != NULL)
1449    {
1450       request->io_Error = IOERR_ABORTED;
1451       ReplyMsg((APTR)request);
1452    }
1453    while((request = (APTR)GetMsg(&opener->mgmt_port)) != NULL)
1454    {
1455       request->io_Error = IOERR_ABORTED;
1456       ReplyMsg((APTR)request);
1457    }
1458 #endif
1459
1460    /* Return */
1461
1462    return;
1463 }
1464
1465
1466
1467 /****i* atheros5000.device/StatusInt ***************************************
1468 *
1469 *   NAME
1470 *       StatusInt
1471 *
1472 *   SYNOPSIS
1473 *       finished = StatusInt(unit)
1474 *
1475 *       BOOL StatusInt(struct DevUnit *);
1476 *
1477 *   FUNCTION
1478 *
1479 *   INPUTS
1480 *       unit
1481 *
1482 *   RESULT
1483 *       finished
1484 *
1485 ****************************************************************************
1486 *
1487 * int_code is really in A5, but GCC 2.95.3 doesn't seem able to handle that.
1488 * Since we don't use this parameter, we can lie.
1489 *
1490 */
1491
1492 static BOOL StatusInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code))
1493 {
1494    struct DevBase *base;
1495    uint32_t queue_mask;
1496    HAL_INT ints, int_mask;
1497
1498    base = unit->device;
1499    int_mask = unit->hal->ah_getInterrupts(unit->hal);
1500
1501    if(!unit->hal->ah_isInterruptPending(unit->hal)) return FALSE;
1502
1503    /* Handle ints */
1504
1505    if(unit->hal->ah_getPendingInterrupts(unit->hal, &ints))
1506    {
1507       if((ints & HAL_INT_TX) != 0)
1508       {
1509          int_mask &= ~(HAL_INT_TX | HAL_INT_TXDESC);
1510          queue_mask = 1 << unit->tx_queue_no | 1 << unit->mgmt_queue_no;
1511          unit->hal->ah_getTxIntrQueue(unit->hal, &queue_mask);
1512          if((queue_mask & 1 << unit->tx_queue_no) != 0)
1513             Cause(&unit->tx_end_int);
1514          if((queue_mask & 1 << unit->mgmt_queue_no) != 0)
1515             Cause(&unit->mgmt_end_int);
1516       }
1517       if((ints & HAL_INT_RX) != 0)
1518       {
1519          int_mask &= ~(HAL_INT_RX | HAL_INT_RXEOL);
1520          Cause(&unit->rx_int);
1521       }
1522    }
1523
1524 #ifdef __MORPHOS__
1525    int_mask = INT_MASK;
1526 #endif
1527 //   unit->hal->ah_setInterrupts(unit->hal, int_mask))
1528
1529    return FALSE;
1530 }
1531
1532
1533
1534 /****i* atheros5000.device/RXInt *******************************************
1535 *
1536 *   NAME
1537 *       RXInt -- Soft interrupt for packet reception.
1538 *
1539 *   SYNOPSIS
1540 *       RXInt(unit)
1541 *
1542 *       VOID RXInt(struct DevUnit *);
1543 *
1544 *   FUNCTION
1545 *
1546 *   INPUTS
1547 *       unit - A unit of this device.
1548 *
1549 *   RESULT
1550 *       None.
1551 *
1552 ****************************************************************************
1553 *
1554 */
1555
1556 static VOID RXInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code))
1557 {
1558    UWORD ieee_length, frame_control, frame_type, slot, next_slot,
1559       encryption, key_no, buffer_no, old_length;
1560    struct DevBase *base;
1561    BOOL is_good;
1562    LONG frag_no;
1563    struct ath_desc *rx_desc, *next_desc;
1564    ULONG dma_size, rx_desc_p;
1565    UBYTE *buffer, *p, *frame, *data, *snap_frame, *source;
1566    struct ath_rx_status status;
1567
1568    base = unit->device;
1569    slot = unit->rx_slot;
1570    rx_desc = unit->rx_descs + slot;
1571    rx_desc_p = unit->rx_descs_p + slot * sizeof(struct ath_desc);
1572    next_slot = (slot + 1) % RX_SLOT_COUNT;
1573    next_desc = unit->rx_descs + next_slot;
1574
1575    dma_size = sizeof(struct ath_desc) * RX_SLOT_COUNT;
1576    CachePostDMA(unit->rx_descs, &dma_size, 0);
1577
1578    while(unit->hal->ah_procRxDesc(unit->hal, rx_desc, rx_desc_p, next_desc,
1579       unit->hal->ah_getTsf64(unit->hal), &status) != HAL_EINPROGRESS)
1580    {
1581       is_good = TRUE;
1582       buffer = unit->rx_buffers[slot];
1583
1584       dma_size = FRAME_BUFFER_SIZE;
1585       CachePostDMA(buffer, &dma_size, 0);
1586
1587       if(status.rs_status == 0
1588          && status.rs_datalen >= WIFI_FRM_DATA + FCS_SIZE)
1589       {
1590          /* Get fragment info */
1591
1592          frame = buffer;
1593          ieee_length = status.rs_datalen - FCS_SIZE - WIFI_FRM_DATA;
1594          data = frame + WIFI_FRM_DATA;
1595          frame_control =
1596             LEWord(*(UWORD *)(frame + WIFI_FRM_CONTROL));
1597
1598          /* Get buffer to store fragment in */
1599
1600          frag_no = LEWord(*(UWORD *)(frame + WIFI_FRM_SEQCONTROL));
1601          if(unit->mode == S2PORT_ADHOC)
1602             source = frame + WIFI_FRM_ADDRESS2;
1603          else
1604             source = frame + WIFI_FRM_ADDRESS3;
1605          snap_frame = GetRXBuffer(unit, source, frag_no, &buffer_no, base);
1606
1607          /* Get location to put new data */
1608
1609          if(snap_frame != NULL)
1610          {
1611             if((frag_no & 0xf ) > 0)
1612                old_length =
1613                   BEWord(*(UWORD *)(snap_frame + ETH_PACKET_IEEELEN));
1614             else
1615             {
1616                /* Create new 802.3 header */
1617
1618                CopyMem(frame + WIFI_FRM_ADDRESS1, snap_frame,
1619                   ETH_ADDRESSSIZE);
1620                CopyMem(source, snap_frame + ETH_PACKET_SOURCE,
1621                   ETH_ADDRESSSIZE);
1622                old_length = 0;
1623             }
1624             p = snap_frame + ETH_HEADERSIZE + old_length;
1625
1626             /* Get encryption type and key index */
1627
1628             if((frame_control & WIFI_FRM_CONTROLF_WEP) != 0)
1629             {
1630                key_no = data[3] >> 6 & 0x3;
1631                encryption = unit->keys[key_no].type;
1632             }
1633             else
1634                encryption = S2ENC_NONE;
1635
1636             /* Append fragment to frame, decrypting/checking fragment if
1637                necessary */
1638
1639             is_good = unit->fragment_decrypt_functions[encryption](unit,
1640                frame, data, &ieee_length, p, base);
1641
1642             /* Update length in frame being built with current fragment, or
1643                increment bad frame counter if fragment is bad */
1644
1645             if(is_good)
1646             {
1647                ieee_length += old_length;
1648                *(UWORD *)(snap_frame + ETH_PACKET_IEEELEN) =
1649                   MakeBEWord(ieee_length);
1650             }
1651             else
1652                unit->stats.BadData++;
1653
1654             /* If all fragments have arrived, process the complete frame */
1655
1656             if((frame_control & WIFI_FRM_CONTROLF_MOREFRAGS) == 0)
1657             {
1658                if(is_good)
1659                {
1660                   /* Decrypt complete frame if necessary */
1661
1662                   data = snap_frame + ETH_HEADERSIZE;
1663                   if(encryption == S2ENC_TKIP)
1664 //                     && (unit->flags & UNITF_HARDTKIP) == 0)
1665 //                     && (unit->flags & UNITF_HARDMIC) == 0)
1666                   {
1667                      is_good = TKIPDecryptFrame(unit, snap_frame, data,
1668                         ieee_length, data, key_no, base);
1669                      ieee_length -= MIC_SIZE;
1670                      *(UWORD *)(snap_frame + ETH_PACKET_IEEELEN) =
1671                         MakeBEWord(ieee_length);
1672                      if(!is_good)
1673                         unit->stats.BadData++;
1674                   }
1675                }
1676
1677                if(is_good)
1678                {
1679                   /* Get frame's 802.11 type and subtype */
1680
1681                   frame_type = (frame_control & WIFI_FRM_CONTROLF_TYPE)
1682                      >> WIFI_FRM_CONTROLB_TYPE;
1683
1684                   /* If it's a management frame, process it separately;
1685                      otherwise distribute it to clients after filtering */
1686
1687                   if(frame_type == WIFI_FRMTYPE_MGMT)
1688                   {
1689                      DistributeMgmtFrame(unit, frame, status.rs_datalen - 4,
1690                         base);
1691                   }
1692                   else if(AddressFilter(unit, snap_frame + ETH_PACKET_DEST,
1693                      base))
1694                   {
1695                      unit->stats.PacketsReceived++;
1696                      DistributeRXPacket(unit, snap_frame, base);
1697                   }
1698                }
1699             }
1700
1701             /* Mark fragment buffer as unused for next time */
1702
1703             unit->rx_fragment_nos[buffer_no] = -1;
1704          }
1705          else
1706             ReportEvents(unit, S2EVENT_ERROR | S2EVENT_RX, base);
1707       }
1708       else
1709       {
1710          is_good = FALSE;
1711       }
1712
1713       if(!is_good)
1714       {
1715          ReportEvents(unit, S2EVENT_ERROR | S2EVENT_HARDWARE | S2EVENT_RX,
1716             base);
1717       }
1718
1719       /* Prepare descriptor for next time */
1720
1721       unit->hal->ah_setupRxDesc(unit->hal, rx_desc, FRAME_BUFFER_SIZE,
1722          HAL_RXDESC_INTREQ);
1723
1724       dma_size = FRAME_BUFFER_SIZE;
1725       CachePreDMA(buffer, &dma_size, 0);
1726
1727       /* Get next descriptor */
1728
1729       slot = next_slot;
1730       rx_desc = next_desc;
1731       rx_desc_p = unit->rx_descs_p + slot * sizeof(struct ath_desc);
1732       next_slot = (slot + 1) % RX_SLOT_COUNT;
1733       next_desc = unit->rx_descs + next_slot;
1734    }
1735
1736    dma_size = sizeof(struct ath_desc) * RX_SLOT_COUNT;
1737    CachePreDMA(unit->rx_descs, &dma_size, 0);
1738
1739    unit->rx_slot = slot;
1740 // TO DO: unstall reception?
1741
1742    /* Re-enable RX interrupts */
1743
1744 #if 0
1745    Disable();
1746    unit->hal->ah_setInterrupts(unit->hal,
1747       unit->hal->ah_getInterrupts(unit->hal) | HAL_INT_RX | HAL_INT_RXEOL);
1748    Enable();
1749 #endif
1750
1751    return;
1752 }
1753
1754
1755
1756 /****i* atheros5000.device/GetRXBuffer *************************************
1757 *
1758 *   NAME
1759 *       GetRXBuffer -- Find an appropriate RX frame buffer to use.
1760 *
1761 *   SYNOPSIS
1762 *       buffer = GetRXBuffer(unit, address, frag_no)
1763 *
1764 *       UBYTE *GetRXBuffer(struct DevUnit *, UBYTE *, UWORD);
1765 *
1766 ****************************************************************************
1767 *
1768 */
1769
1770 static UBYTE *GetRXBuffer(struct DevUnit *unit, const UBYTE *address,
1771    UWORD frag_no, UWORD *buffer_no, struct DevBase *base)
1772 {
1773    UWORD i;
1774    UBYTE *buffer;
1775    LONG n;
1776    BOOL found;
1777
1778    buffer = unit->rx_frames;
1779    for(i = 0, found = FALSE; i < FRAME_BUFFER_COUNT * 2 && !found; i++)
1780    {
1781       /* Throw away old buffer contents if we didn't find a free slot the
1782          first time around */
1783
1784       if(i >= FRAME_BUFFER_COUNT)
1785          unit->rx_fragment_nos[i % FRAME_BUFFER_COUNT] = -1;
1786
1787       /* For a frame's first fragment, find an empty slot; for subsequent
1788          fragments, find a slot with matching source address */
1789
1790       n = unit->rx_fragment_nos[i % FRAME_BUFFER_COUNT];
1791       if(n == -1 && (frag_no & 0xf) == 0
1792          || *((ULONG *)(buffer + ETH_PACKET_SOURCE))
1793          == *((ULONG *)(address))
1794          && *((UWORD *)(buffer + ETH_PACKET_SOURCE + 4))
1795          == *((UWORD *)(address + 4)))
1796       {
1797          found = TRUE;
1798          if(n == -1)
1799             unit->rx_fragment_nos[i % FRAME_BUFFER_COUNT] = frag_no;
1800          *buffer_no = i;
1801       }
1802       else
1803          buffer += FRAME_BUFFER_SIZE;
1804    }
1805
1806    if(!found)
1807       buffer = NULL;
1808
1809    return buffer;
1810 }
1811
1812
1813
1814 /****i* atheros5000.device/DistributeRXPacket ******************************
1815 *
1816 *   NAME
1817 *       DistributeRXPacket -- Send a packet to all appropriate destinations.
1818 *
1819 *   SYNOPSIS
1820 *       DistributeRXPacket(unit, frame)
1821 *
1822 *       VOID DistributeRXPacket(struct DevUnit *, UBYTE *);
1823 *
1824 ****************************************************************************
1825 *
1826 */
1827
1828 static VOID DistributeRXPacket(struct DevUnit *unit, UBYTE *frame,
1829    struct DevBase *base)
1830 {
1831    UWORD packet_size, ieee_length;
1832    BOOL is_orphan = TRUE, accepted, is_snap = FALSE;
1833    ULONG packet_type;
1834    UBYTE *buffer;
1835    const UBYTE *template = snap_template;
1836    struct IOSana2Req *request, *request_tail;
1837    struct Opener *opener, *opener_tail;
1838    struct TypeStats *tracker;
1839
1840    ieee_length = BEWord(*(UWORD *)(frame + ETH_PACKET_IEEELEN));
1841    packet_size = ETH_HEADERSIZE + ieee_length;
1842    if(ieee_length >= SNAP_HEADERSIZE)
1843       is_snap = *(const ULONG *)(frame + ETH_PACKET_DATA)
1844          == *(const ULONG *)template;
1845
1846    /* De-encapsulate SNAP packets and get packet type */
1847
1848    if(is_snap)
1849    {
1850       buffer = unit->rx_buffer;
1851       packet_size -= SNAP_HEADERSIZE;
1852       CopyMem(frame, buffer, ETH_PACKET_TYPE);
1853       CopyMem(frame + ETH_HEADERSIZE + SNAP_FRM_TYPE,
1854          buffer + ETH_PACKET_TYPE, packet_size - ETH_PACKET_TYPE);
1855    }
1856    else
1857       buffer = frame;
1858
1859    packet_type = BEWord(*((UWORD *)(buffer + ETH_PACKET_TYPE)));
1860
1861    if(packet_size <= ETH_MAXPACKETSIZE)
1862    {
1863       /* Offer packet to every opener */
1864
1865       opener = (APTR)unit->openers.mlh_Head;
1866       opener_tail = (APTR)&unit->openers.mlh_Tail;
1867
1868       while(opener != opener_tail)
1869       {
1870          request = (APTR)opener->read_port.mp_MsgList.lh_Head;
1871          request_tail = (APTR)&opener->read_port.mp_MsgList.lh_Tail;
1872          accepted = FALSE;
1873
1874          /* Offer packet to each request until it's accepted */
1875
1876          while(request != request_tail && !accepted)
1877          {
1878             if(request->ios2_PacketType == packet_type)
1879             {
1880                CopyPacket(unit, request, packet_size, packet_type,
1881                   buffer, base);
1882                accepted = TRUE;
1883             }
1884             request =
1885                (APTR)request->ios2_Req.io_Message.mn_Node.ln_Succ;
1886          }
1887
1888          if(accepted)
1889             is_orphan = FALSE;
1890          opener = (APTR)opener->node.mln_Succ;
1891       }
1892
1893       /* If packet was unwanted, give it to S2_READORPHAN request */
1894
1895       if(is_orphan)
1896       {
1897          unit->stats.UnknownTypesReceived++;
1898          if(!IsMsgPortEmpty(unit->request_ports[ADOPT_QUEUE]))
1899          {
1900             CopyPacket(unit,
1901                (APTR)unit->request_ports[ADOPT_QUEUE]->
1902                mp_MsgList.lh_Head, packet_size, packet_type, buffer,
1903                base);
1904          }
1905       }
1906
1907       /* Update remaining statistics */
1908
1909       if(packet_type <= ETH_MTU)
1910          packet_type = ETH_MTU;
1911       tracker =
1912          FindTypeStats(unit, &unit->type_trackers, packet_type, base);
1913       if(tracker != NULL)
1914       {
1915          tracker->stats.PacketsReceived++;
1916          tracker->stats.BytesReceived += packet_size;
1917       }
1918    }
1919    else
1920       unit->stats.BadData++;
1921
1922    return;
1923 }
1924
1925
1926
1927 /****i* atheros5000.device/CopyPacket **************************************
1928 *
1929 *   NAME
1930 *       CopyPacket -- Copy packet to client's buffer.
1931 *
1932 *   SYNOPSIS
1933 *       CopyPacket(unit, request, packet_size, packet_type,
1934 *           buffer)
1935 *
1936 *       VOID CopyPacket(struct DevUnit *, struct IOSana2Req *, UWORD, UWORD,
1937 *           UBYTE *);
1938 *
1939 ****************************************************************************
1940 *
1941 */
1942
1943 static VOID CopyPacket(struct DevUnit *unit, struct IOSana2Req *request,
1944    UWORD packet_size, UWORD packet_type, UBYTE *buffer,
1945    struct DevBase *base)
1946 {
1947    struct Opener *opener;
1948    BOOL filtered = FALSE;
1949
1950    /* Set multicast and broadcast flags */
1951
1952    request->ios2_Req.io_Flags &= ~(SANA2IOF_BCAST | SANA2IOF_MCAST);
1953    if((*((ULONG *)(buffer + ETH_PACKET_DEST)) == 0xffffffff) &&
1954       (*((UWORD *)(buffer + ETH_PACKET_DEST + 4)) == 0xffff))
1955       request->ios2_Req.io_Flags |= SANA2IOF_BCAST;
1956    else if((buffer[ETH_PACKET_DEST] & 0x1) != 0)
1957       request->ios2_Req.io_Flags |= SANA2IOF_MCAST;
1958
1959    /* Set source and destination addresses and packet type */
1960
1961    CopyMem(buffer + ETH_PACKET_SOURCE, request->ios2_SrcAddr,
1962       ETH_ADDRESSSIZE);
1963    CopyMem(buffer + ETH_PACKET_DEST, request->ios2_DstAddr,
1964       ETH_ADDRESSSIZE);
1965    request->ios2_PacketType = packet_type;
1966
1967    /* Adjust for cooked packet request */
1968
1969    if((request->ios2_Req.io_Flags & SANA2IOF_RAW) == 0)
1970    {
1971       packet_size -= ETH_PACKET_DATA;
1972       buffer += ETH_PACKET_DATA;
1973    }
1974 #ifdef USE_HACKS
1975    else
1976       packet_size += 4;   /* Needed for Shapeshifter & Fusion? */
1977 #endif
1978    request->ios2_DataLength = packet_size;
1979
1980    /* Filter packet */
1981
1982    opener = request->ios2_BufferManagement;
1983    if(request->ios2_Req.io_Command == CMD_READ &&
1984       opener->filter_hook != NULL)
1985       if(!CallHookPkt(opener->filter_hook, request, buffer))
1986          filtered = TRUE;
1987
1988    if(!filtered)
1989    {
1990       /* Copy packet into opener's buffer and reply packet */
1991
1992       if(!opener->rx_function(request->ios2_Data, buffer, packet_size))
1993       {
1994          request->ios2_Req.io_Error = S2ERR_NO_RESOURCES;
1995          request->ios2_WireError = S2WERR_BUFF_ERROR;
1996          ReportEvents(unit,
1997             S2EVENT_ERROR | S2EVENT_SOFTWARE | S2EVENT_BUFF | S2EVENT_RX,
1998             base);
1999       }
2000       Remove((APTR)request);
2001       ReplyMsg((APTR)request);
2002    }
2003
2004    return;
2005 }
2006
2007
2008
2009 /****i* atheros5000.device/AddressFilter ***********************************
2010 *
2011 *   NAME
2012 *       AddressFilter -- Determine if an RX packet should be accepted.
2013 *
2014 *   SYNOPSIS
2015 *       accept = AddressFilter(unit, address)
2016 *
2017 *       BOOL AddressFilter(struct DevUnit *, UBYTE *);
2018 *
2019 ****************************************************************************
2020 *
2021 */
2022
2023 static BOOL AddressFilter(struct DevUnit *unit, UBYTE *address,
2024    struct DevBase *base)
2025 {
2026    struct AddressRange *range, *tail;
2027    BOOL accept = TRUE;
2028    ULONG address_left;
2029    UWORD address_right;
2030
2031    /* Check whether address is unicast/broadcast or multicast */
2032
2033    address_left = BELong(*((ULONG *)address));
2034    address_right = BEWord(*((UWORD *)(address + 4)));
2035
2036    if(((address_left & 0x01000000) != 0) &&
2037       !((address_left == 0xffffffff) && (address_right == 0xffff)))
2038    {
2039       /* Check if this multicast address is wanted */
2040
2041       range = (APTR)unit->multicast_ranges.mlh_Head;
2042       tail = (APTR)&unit->multicast_ranges.mlh_Tail;
2043       accept = FALSE;
2044
2045       while((range != tail) && !accept)
2046       {
2047          if((address_left > range->lower_bound_left ||
2048             address_left == range->lower_bound_left &&
2049             address_right >= range->lower_bound_right) &&
2050             (address_left < range->upper_bound_left ||
2051             address_left == range->upper_bound_left &&
2052             address_right <= range->upper_bound_right))
2053             accept = TRUE;
2054          range = (APTR)range->node.mln_Succ;
2055       }
2056
2057       if(!accept)
2058          unit->special_stats[S2SS_ETHERNET_BADMULTICAST & 0xffff]++;
2059    }
2060
2061    return accept;
2062 }
2063
2064
2065
2066 /****i* atheros5000.device/DistributeMgmtFrame *****************************
2067 *
2068 *   NAME
2069 *       DistributeMgmtFrame -- Send a management frame to clients.
2070 *
2071 *   SYNOPSIS
2072 *       DistributeMgmtFrame(unit, frame, frame_size)
2073 *
2074 *       VOID DistributeMgmtFrame(struct DevUnit *, UBYTE *, UWORD);
2075 *
2076 ****************************************************************************
2077 *
2078 */
2079
2080 static VOID DistributeMgmtFrame(struct DevUnit *unit, UBYTE *frame,
2081    UWORD frame_size, struct DevBase *base)
2082 {
2083    struct IOSana2Req *request;
2084    struct Opener *opener, *opener_tail;
2085
2086    /* Send packet to every opener */
2087
2088    opener = (APTR)unit->openers.mlh_Head;
2089    opener_tail = (APTR)&unit->openers.mlh_Tail;
2090
2091    while(opener != opener_tail)
2092    {
2093       request = (APTR)RemHead(&opener->mgmt_port.mp_MsgList);
2094
2095       if(request != NULL)
2096       {
2097          /* Copy packet into opener's buffer and reply packet */
2098
2099          if(frame_size <= request->ios2_DataLength)
2100          {
2101             CopyMem(frame, request->ios2_Data, frame_size);
2102             request->ios2_DataLength = frame_size;
2103          }
2104          else
2105          {
2106             request->ios2_Req.io_Error = S2ERR_NO_RESOURCES;
2107             request->ios2_WireError = S2WERR_BUFF_ERROR;
2108             ReportEvents(unit,
2109                S2EVENT_ERROR | S2EVENT_SOFTWARE | S2EVENT_BUFF | S2EVENT_RX,
2110                base);
2111          }
2112          ReplyMsg((APTR)request);
2113          request =
2114             (APTR)request->ios2_Req.io_Message.mn_Node.ln_Succ;
2115       }
2116
2117       opener = (APTR)opener->node.mln_Succ;
2118    }
2119
2120    return;
2121 }
2122
2123
2124
2125 /****i* atheros5000.device/TXInt *******************************************
2126 *
2127 *   NAME
2128 *       TXInt -- Soft interrupt for packet transmission.
2129 *
2130 *   SYNOPSIS
2131 *       TXInt(unit)
2132 *
2133 *       VOID TXInt(struct DevUnit *);
2134 *
2135 *   FUNCTION
2136 *
2137 *   INPUTS
2138 *       unit - A unit of this device.
2139 *
2140 *   RESULT
2141 *       None.
2142 *
2143 ****************************************************************************
2144 *
2145 */
2146
2147 static VOID TXInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code))
2148 {
2149    struct DevBase *base;
2150    UWORD i, frame_size, data_size, packet_type, body_size, slot, new_slot,
2151       last_slot, encryption, subtype, duration;
2152    UBYTE *buffer, *q, *plaintext, *ciphertext, *frame,
2153       mic_header[ETH_ADDRESSSIZE * 2];
2154    const UBYTE *p, *dest, *source;
2155    struct IOSana2Req *request;
2156    BOOL proceed = TRUE, is_ieee;
2157    struct Opener *opener;
2158    ULONG wire_error, dma_size;
2159    struct ath_desc *tx_desc, *last_desc;
2160    UBYTE *(*dma_tx_function)(REG(a0, APTR));
2161    BYTE error;
2162    struct MsgPort *port;
2163    struct TypeStats *tracker;
2164    const HAL_RATE_TABLE *rate_table;
2165
2166    base = unit->device;
2167    port = unit->request_ports[WRITE_QUEUE];
2168    rate_table = unit->rate_table;
2169
2170    while(proceed && (!IsMsgPortEmpty(port)))
2171    {
2172       slot = unit->tx_in_slot;
2173       new_slot = (slot + 1) % TX_SLOT_COUNT;
2174
2175 //      if(new_slot != unit->tx_out_slot)
2176       if(slot == unit->tx_out_slot)   // one packet at a time
2177       {
2178          error = 0;
2179          body_size = 0;
2180
2181          /* Get request and DMA frame descriptor */
2182
2183          request = (APTR)port->mp_MsgList.lh_Head;
2184
2185          Remove((APTR)request);
2186          unit->tx_requests[slot] = request;
2187          tx_desc = unit->tx_descs + slot;
2188          frame = unit->tx_buffers[slot];
2189
2190          /* Get packet data */
2191
2192          opener = request->ios2_BufferManagement;
2193          dma_tx_function = opener->dma_tx_function;
2194          if(dma_tx_function != NULL)
2195             buffer = dma_tx_function(request->ios2_Data);
2196          else
2197             buffer = NULL;
2198
2199          if(buffer == NULL)
2200          {
2201             buffer = unit->tx_buffer;
2202             if(!opener->tx_function(buffer, request->ios2_Data,
2203                request->ios2_DataLength))
2204             {
2205                error = S2ERR_NO_RESOURCES;
2206                wire_error = S2WERR_BUFF_ERROR;
2207                ReportEvents(unit,
2208                   S2EVENT_ERROR | S2EVENT_SOFTWARE | S2EVENT_BUFF
2209                   | S2EVENT_TX, base);
2210             }
2211          }
2212
2213          if(error == 0)
2214          {
2215             /* Get packet type and/or length */
2216
2217             data_size = request->ios2_DataLength;
2218             if((request->ios2_Req.io_Flags & SANA2IOF_RAW) != 0)
2219             {
2220                data_size -= ETH_PACKET_DATA;
2221                packet_type = BEWord(*(UWORD *)(buffer + ETH_PACKET_TYPE));
2222             }
2223             else
2224                packet_type = request->ios2_PacketType;
2225             is_ieee = packet_type <= ETH_MTU;
2226
2227             /* Determine encryption type and frame subtype */
2228
2229             if(data_size > 0)
2230             {
2231                encryption = unit->keys[unit->tx_key_no].type;
2232                subtype = 0;
2233             }
2234             else
2235             {
2236                encryption = S2ENC_NONE;
2237                subtype = 4;
2238             }
2239
2240             /* Get source and destination addresses */
2241
2242             if((request->ios2_Req.io_Flags & SANA2IOF_RAW) != 0)
2243             {
2244                dest = buffer;
2245                source = buffer + ETH_ADDRESSSIZE;
2246                buffer += ETH_ADDRESSSIZE * 2 + 2;
2247             }
2248             else
2249             {
2250                dest = request->ios2_DstAddr;
2251                source = unit->address;
2252             }
2253
2254             /* Write 802.11 header */
2255
2256             q = frame;
2257             *(UWORD *)q = MakeLEWord(
2258                (encryption == S2ENC_NONE ? 0 : WIFI_FRM_CONTROLF_WEP)
2259                | (unit->mode == S2PORT_ADHOC ? 0 : WIFI_FRM_CONTROLF_TODS)
2260                | subtype << WIFI_FRM_CONTROLB_SUBTYPE
2261                | WIFI_FRMTYPE_DATA << WIFI_FRM_CONTROLB_TYPE);
2262             q += 2;
2263
2264             i = rate_table->rateCodeToIndex[unit->tx_rate_codes[0]];
2265             if((unit->flags & UNITF_SHORTPREAMBLE) != 0)
2266                duration = rate_table->info[i].spAckDuration;
2267             else
2268                duration = rate_table->info[i].lpAckDuration;
2269             *(UWORD *)q = MakeLEWord(duration);
2270             q += 2;
2271
2272             if(unit->mode == S2PORT_ADHOC)
2273                p = dest;
2274             else
2275                p = unit->bssid;
2276             for(i = 0; i < ETH_ADDRESSSIZE; i++)
2277                *q++ = *p++;
2278
2279             for(i = 0, p = source; i < ETH_ADDRESSSIZE; i++)
2280                *q++ = *p++;
2281
2282             if(unit->mode == S2PORT_ADHOC)
2283                p = unit->bssid;
2284             else
2285                p = dest;
2286             for(i = 0; i < ETH_ADDRESSSIZE; i++)
2287                *q++ = *p++;
2288             *(UWORD *)q = 0;
2289             q += 2;
2290
2291 // TO DO: need to pad header to 4-byte boundary?
2292
2293             /* Leave room for encryption overhead */
2294
2295             ciphertext = q;
2296             q += unit->iv_sizes[encryption];
2297             plaintext = q;
2298
2299             /* Write SNAP header */
2300
2301             if(!is_ieee)
2302             {
2303                for(i = 0, p = snap_template;
2304                   i < SNAP_FRM_TYPE; i++)
2305                   *q++ = *p++;
2306                *(UWORD *)q = MakeBEWord(packet_type);
2307                q += 2;
2308                body_size += SNAP_HEADERSIZE;
2309             }
2310
2311             /* Copy data into frame */
2312
2313             CopyMem(buffer, q, data_size);
2314             body_size += data_size;
2315
2316             /* Append MIC to frame for TKIP */
2317
2318             if(encryption == S2ENC_TKIP)
2319             {
2320 //               if((unit->flags & UNITF_HARDMIC) == 0)
2321                {
2322                   q = mic_header;
2323                   for(i = 0, p = dest; i < ETH_ADDRESSSIZE; i++)
2324                      *q++ = *p++;
2325                   for(i = 0, p = source; i < ETH_ADDRESSSIZE; i++)
2326                      *q++ = *p++;
2327                   TKIPEncryptFrame(unit, mic_header, plaintext, body_size,
2328                      plaintext, base);
2329                }
2330                body_size += MIC_SIZE;
2331             }
2332
2333             /* Encrypt fragment if applicable */
2334
2335             unit->fragment_encrypt_functions[encryption](unit, frame,
2336                plaintext, &body_size, ciphertext, base);
2337
2338             /* Fill in DMA descriptor for packet transmission */
2339
2340             frame_size = WIFI_FRM_DATA + body_size;
2341             tx_desc->ds_link = (ULONG)(UPINT)NULL;
2342             unit->hal->ah_setupTxDesc(unit->hal, tx_desc, frame_size + 4, // + CRC?
2343                WIFI_FRM_DATA, HAL_PKT_TYPE_NORMAL, TX_POWER,
2344                ((unit->flags & UNITF_SLOWRETRIES) != 0) ?
2345                   unit->tx_rate_codes[0] : unit->tx_rate_codes[1],
2346                ((unit->flags & UNITF_SLOWRETRIES) != 0) ? 1 : TX_TRIES,
2347                HAL_TXKEYIX_INVALID,
2348                HAL_ANTENNA_MIN_MODE,
2349                HAL_TXDESC_INTREQ | HAL_TXDESC_CLRDMASK,
2350                0, 0, 0, 0, 3);
2351             if((unit->flags & UNITF_SLOWRETRIES) != 0)
2352                unit->hal->ah_setupXTxDesc(unit->hal, tx_desc,
2353                   unit->tx_rate_codes[1], 1,
2354                   unit->tx_rate_codes[2], 1,
2355                   unit->tx_rate_codes[3], TX_TRIES - 3);
2356             unit->hal->ah_fillTxDesc(unit->hal, tx_desc, frame_size, TRUE, TRUE,
2357                tx_desc);
2358
2359             dma_size = frame_size;
2360             CachePreDMA(frame, &dma_size, DMA_ReadFromRAM);
2361
2362             /* Pass packet to adapter */
2363
2364             unit->hal->ah_stopTxDma(unit->hal, unit->tx_queue_no);
2365             last_slot = (slot + TX_SLOT_COUNT - 1) % TX_SLOT_COUNT;
2366             if(unit->tx_out_slot != slot)
2367             //if(unit->hal->ah_numTxPending(unit->hal, unit->tx_queue_no) > 0)
2368             {
2369                last_desc =
2370                   unit->tx_descs + last_slot;
2371                last_desc->ds_link = unit->tx_descs_p + slot * sizeof(struct ath_desc);
2372                dma_size = sizeof(struct ath_desc) * TX_SLOT_COUNT;
2373                CachePreDMA(unit->tx_descs, &dma_size, 0);
2374             }
2375             else
2376             {
2377                dma_size = sizeof(struct ath_desc) * TX_SLOT_COUNT;
2378                CachePreDMA(unit->tx_descs, &dma_size, 0);
2379                unit->hal->ah_setTxDP(unit->hal, unit->tx_queue_no,
2380                   unit->tx_descs_p + slot * sizeof(struct ath_desc));
2381             }
2382
2383             unit->hal->ah_startTxDma(unit->hal, unit->tx_queue_no);
2384             unit->tx_in_slot = new_slot;
2385          }
2386          else
2387          {
2388             /* Reply failed request */
2389
2390             request->ios2_Req.io_Error = error;
2391             request->ios2_WireError = wire_error;
2392             ReplyMsg((APTR)request);
2393          }
2394
2395          /* Update statistics */
2396
2397          if(error == 0)
2398          {
2399             unit->stats.PacketsSent++;
2400
2401             tracker = FindTypeStats(unit, &unit->type_trackers,
2402                request->ios2_PacketType, base);
2403             if(tracker != NULL)
2404             {
2405                tracker->stats.PacketsSent++;
2406                tracker->stats.BytesSent += ETH_HEADERSIZE + data_size;
2407             }
2408          }
2409       }
2410       else
2411          proceed = FALSE;
2412    }
2413
2414    /* Don't try to keep sending packets if there's no space left */
2415
2416    if(proceed)
2417       unit->request_ports[WRITE_QUEUE]->mp_Flags = PA_SOFTINT;
2418    else
2419       unit->request_ports[WRITE_QUEUE]->mp_Flags = PA_IGNORE;
2420
2421    return;
2422 }
2423
2424
2425
2426 /****i* atheros5000.device/TXEndInt ****************************************
2427 *
2428 *   NAME
2429 *       TXEndInt -- Clean up after a data frame has been sent.
2430 *
2431 *   SYNOPSIS
2432 *       TXEndInt(unit, int_code)
2433 *
2434 *       VOID TXEndInt(struct DevUnit *, APTR);
2435 *
2436 *   NOTES
2437 *       I think it's safe to assume that there will always be at least one
2438 *       completed packet whenever this interrupt is called.
2439 *
2440 ****************************************************************************
2441 *
2442 */
2443
2444 static VOID TXEndInt(REG(a1, struct DevUnit *unit),
2445    REG(a6, APTR int_code))
2446 {
2447    UWORD frame_size, new_out_slot, i;
2448    UBYTE *frame;
2449    struct DevBase *base;
2450    struct IOSana2Req *request;
2451    ULONG dma_size;
2452    struct TypeStats *tracker;
2453
2454    /* Find out which packets have completed */
2455
2456    base = unit->device;
2457    new_out_slot = (unit->tx_in_slot + TX_SLOT_COUNT
2458       - unit->hal->ah_numTxPending(unit->hal, unit->tx_queue_no))
2459       % TX_SLOT_COUNT;
2460
2461    dma_size = sizeof(struct ath_desc) * TX_SLOT_COUNT;
2462    CachePostDMA(unit->tx_descs, &dma_size, 0);
2463
2464    /* Retire sent packets */
2465
2466    for(i = unit->tx_out_slot; i != new_out_slot;
2467       i = (i + 1) % TX_SLOT_COUNT)
2468    {
2469       frame = unit->tx_buffers[i];
2470       dma_size = FRAME_BUFFER_SIZE;
2471       CachePostDMA(frame, &dma_size, DMA_ReadFromRAM);
2472
2473       /* Update statistics */
2474
2475       request = unit->tx_requests[i];
2476       frame_size = request->ios2_DataLength;
2477       if((request->ios2_Req.io_Flags & SANA2IOF_RAW) == 0)
2478          frame_size += ETH_HEADERSIZE;
2479
2480       tracker = FindTypeStats(unit, &unit->type_trackers,
2481          request->ios2_PacketType, base);
2482       if(tracker != NULL)
2483       {
2484          tracker->stats.PacketsSent++;
2485          tracker->stats.BytesSent += frame_size;
2486       }
2487
2488       /* Reply request */
2489
2490       request->ios2_Req.io_Error = 0;
2491       ReplyMsg((APTR)request);
2492    }
2493
2494    unit->tx_out_slot = i;
2495
2496    dma_size = sizeof(struct ath_desc) * TX_SLOT_COUNT;
2497    CachePreDMA(unit->tx_descs, &dma_size, 0);
2498
2499    /* Restart downloads if they had stopped */
2500
2501    if(unit->request_ports[WRITE_QUEUE]->mp_Flags == PA_IGNORE)
2502       Cause(&unit->tx_int);
2503
2504    return;
2505 }
2506
2507
2508
2509 /****i* atheros5000.device/MgmtTXInt ***************************************
2510 *
2511 *   NAME
2512 *       MgmtTXInt -- Soft interrupt for management frame transmission.
2513 *
2514 *   SYNOPSIS
2515 *       MgmtTXInt(unit)
2516 *
2517 *       VOID MgmtTXInt(struct DevUnit *);
2518 *
2519 *   FUNCTION
2520 *
2521 *   INPUTS
2522 *       unit - A unit of this device.
2523 *
2524 *   RESULT
2525 *       None.
2526 *
2527 ****************************************************************************
2528 *
2529 */
2530
2531 static VOID MgmtTXInt(REG(a1, struct DevUnit *unit), REG(a6, APTR int_code))
2532 {
2533    struct DevBase *base;
2534    UWORD frame_size, slot, new_slot, last_slot, i, duration;
2535    UBYTE *frame;
2536    struct IOSana2Req *request;
2537    BOOL proceed = TRUE, has_bssid;
2538    ULONG dma_size;
2539    struct ath_desc *desc, *last_desc;
2540    struct MsgPort *port;
2541    const HAL_RATE_TABLE *rate_table;
2542
2543    base = unit->device;
2544    port = unit->request_ports[MGMT_QUEUE];
2545    rate_table = unit->rate_table;
2546
2547    while(proceed && (!IsMsgPortEmpty(port)))
2548    {
2549       slot = unit->mgmt_in_slot;
2550       new_slot = (slot + 1) % MGMT_SLOT_COUNT;
2551
2552 //      if(new_slot != unit->mgmt_out_slot)
2553       if(slot == unit->mgmt_out_slot)   // one packet at a time
2554       {
2555          /* Get request and DMA frame descriptor */
2556
2557          request = (APTR)port->mp_MsgList.lh_Head;
2558
2559          Remove((APTR)request);
2560          unit->mgmt_requests[slot] = request;
2561          desc = unit->mgmt_descs + slot;
2562          frame = unit->mgmt_buffers[slot];
2563
2564          /* Get packet length */
2565
2566          frame_size = request->ios2_DataLength;
2567
2568          /* Copy frame into DMA buffer */
2569
2570          CopyMem(request->ios2_Data, frame, frame_size);
2571
2572          /* Set duration */
2573
2574          has_bssid = ((frame + WIFI_FRM_ADDRESS1)[0] & 0x1) == 0;
2575          i = rate_table->rateCodeToIndex[unit->mgmt_rate_code];
2576          if(has_bssid)
2577          {
2578             if((unit->flags & UNITF_SHORTPREAMBLE) != 0)
2579                duration = rate_table->info[i].spAckDuration;
2580             else
2581                duration = rate_table->info[i].lpAckDuration;
2582          }
2583          else
2584             duration = 0;
2585          *(UWORD *)(frame + WIFI_FRM_DURATION) = MakeLEWord(duration);
2586
2587          /* Fill in DMA descriptor for packet transmission */
2588
2589          desc->ds_link = (ULONG)(UPINT)NULL;
2590          unit->hal->ah_setupTxDesc(unit->hal, desc, frame_size + 4, // + CRC?
2591             WIFI_FRM_DATA, HAL_PKT_TYPE_NORMAL, TX_POWER,
2592             unit->mgmt_rate_code, TX_TRIES, HAL_TXKEYIX_INVALID,
2593             HAL_ANTENNA_MIN_MODE,
2594             HAL_TXDESC_INTREQ | HAL_TXDESC_CLRDMASK
2595             | (has_bssid ? 0 : HAL_TXDESC_NOACK),
2596             0, 0, 0, 0, 3);
2597          unit->hal->ah_fillTxDesc(unit->hal, desc, frame_size, TRUE, TRUE,
2598             desc);
2599
2600          dma_size = frame_size;
2601          CachePreDMA(frame, &dma_size, DMA_ReadFromRAM);
2602
2603          /* Pass packet to adapter */
2604
2605          unit->hal->ah_stopTxDma(unit->hal, unit->mgmt_queue_no);
2606          last_slot = (slot + MGMT_SLOT_COUNT - 1) % MGMT_SLOT_COUNT;
2607          if(unit->mgmt_out_slot != slot)
2608          //if(unit->hal->ah_numTxPending(unit->hal, unit->mgmt_queue_no) > 0)
2609          {
2610             last_desc = unit->mgmt_descs + last_slot;
2611             last_desc->ds_link =
2612                unit->mgmt_descs_p + slot * sizeof(struct ath_desc);
2613             dma_size = sizeof(struct ath_desc) * MGMT_SLOT_COUNT;
2614             CachePreDMA(unit->mgmt_descs, &dma_size, 0);
2615          }
2616          else
2617          {
2618             dma_size = sizeof(struct ath_desc) * MGMT_SLOT_COUNT;
2619             CachePreDMA(unit->mgmt_descs, &dma_size, 0);
2620             unit->hal->ah_setTxDP(unit->hal, unit->mgmt_queue_no,
2621                unit->mgmt_descs_p + slot * sizeof(struct ath_desc));
2622          }
2623
2624          unit->hal->ah_startTxDma(unit->hal, unit->mgmt_queue_no);
2625          unit->mgmt_in_slot = new_slot;
2626       }
2627       else
2628          proceed = FALSE;
2629    }
2630
2631    /* Don't try to keep sending packets if there's no space left */
2632
2633    if(proceed)
2634       unit->request_ports[MGMT_QUEUE]->mp_Flags = PA_SOFTINT;
2635    else
2636       unit->request_ports[MGMT_QUEUE]->mp_Flags = PA_IGNORE;
2637
2638    return;
2639 }
2640
2641
2642
2643 /****i* atheros5000.device/MgmtTXEndInt ************************************
2644 *
2645 *   NAME
2646 *       MgmtTXEndInt -- Clean up after a management frame has been sent.
2647 *
2648 *   SYNOPSIS
2649 *       MgmtTXEndInt(unit, int_code)
2650 *
2651 *       VOID MgmtTXEndInt(struct DevUnit *, APTR);
2652 *
2653 *   NOTES
2654 *       I think it's safe to assume that there will always be at least one
2655 *       completed packet whenever this interrupt is called.
2656 *
2657 ****************************************************************************
2658 *
2659 */
2660
2661 static VOID MgmtTXEndInt(REG(a1, struct DevUnit *unit),
2662    REG(a6, APTR int_code))
2663 {
2664    UWORD new_out_slot, i;
2665    UBYTE *frame;
2666    struct DevBase *base;
2667    struct IOSana2Req *request;
2668    ULONG dma_size;
2669
2670    /* Find out which packets have completed */
2671
2672    base = unit->device;
2673    new_out_slot = (unit->mgmt_in_slot + MGMT_SLOT_COUNT
2674       - unit->hal->ah_numTxPending(unit->hal, unit->mgmt_queue_no))
2675       % MGMT_SLOT_COUNT;
2676
2677    dma_size = sizeof(struct ath_desc) * MGMT_SLOT_COUNT;
2678    CachePostDMA(unit->mgmt_descs, &dma_size, 0);
2679
2680    /* Retire sent frames */
2681
2682    for(i = unit->mgmt_out_slot; i != new_out_slot;
2683       i = (i + 1) % MGMT_SLOT_COUNT)
2684    {
2685       frame = unit->mgmt_buffers[i];
2686       dma_size = FRAME_BUFFER_SIZE;
2687       CachePostDMA(frame, &dma_size, DMA_ReadFromRAM);
2688
2689       /* Reply request */
2690
2691       request = unit->mgmt_requests[i];
2692       request->ios2_Req.io_Error = 0;
2693       ReplyMsg((APTR)request);
2694    }
2695
2696    unit->mgmt_out_slot = i;
2697
2698    dma_size = sizeof(struct ath_desc) * MGMT_SLOT_COUNT;
2699    CachePreDMA(unit->mgmt_descs, &dma_size, 0);
2700
2701    /* Restart downloads if they had stopped */
2702
2703    if(unit->request_ports[MGMT_QUEUE]->mp_Flags == PA_IGNORE)
2704       Cause(&unit->mgmt_int);
2705
2706    return;
2707 }
2708
2709
2710
2711 /****i* atheros5000.device/ResetHandler ************************************
2712 *
2713 *   NAME
2714 *       ResetHandler -- Disable hardware before a reboot.
2715 *
2716 *   SYNOPSIS
2717 *       ResetHandler(unit, int_code)
2718 *
2719 *       VOID ResetHandler(struct DevUnit *, APTR);
2720 *
2721 ****************************************************************************
2722 *
2723 */
2724
2725 static VOID ResetHandler(REG(a1, struct DevUnit *unit),
2726    REG(a6, APTR int_code))
2727 {
2728    if((unit->flags & UNITF_HAVEADAPTER) != 0)
2729    {
2730       /* Disable frame transmission */
2731
2732       unit->hal->ah_stopTxDma(unit->hal, unit->tx_queue_no);
2733       unit->hal->ah_stopTxDma(unit->hal, unit->mgmt_queue_no);
2734
2735       /* Disable frame reception */
2736
2737       unit->hal->ah_stopPcuReceive(unit->hal);
2738       unit->hal->ah_stopDmaReceive(unit->hal);
2739
2740       /* Stop interrupts */
2741
2742       unit->hal->ah_setInterrupts(unit->hal, 0);
2743    }
2744
2745    return;
2746 }
2747
2748
2749
2750 /****i* atheros5000.device/UpdateStats *************************************
2751 *
2752 *   NAME
2753 *       UpdateStats
2754 *
2755 *   SYNOPSIS
2756 *       UpdateStats(unit)
2757 *
2758 *       VOID UpdateStats(struct DevUnit *);
2759 *
2760 *   FUNCTION
2761 *
2762 *   INPUTS
2763 *       unit - A unit of this device.
2764 *
2765 *   RESULT
2766 *       None.
2767 *
2768 ****************************************************************************
2769 *
2770 */
2771
2772 VOID UpdateStats(struct DevUnit *unit, struct DevBase *base)
2773 {
2774    /* Ask for and wait for stats */
2775
2776    return;
2777 }
2778
2779
2780
2781 /****i* atheros5000.device/ReportEvents ************************************
2782 *
2783 *   NAME
2784 *       ReportEvents
2785 *
2786 *   SYNOPSIS
2787 *       ReportEvents(unit, events)
2788 *
2789 *       VOID ReportEvents(struct DevUnit *, ULONG);
2790 *
2791 *   FUNCTION
2792 *
2793 *   INPUTS
2794 *       unit - A unit of this device.
2795 *       events - A mask of events to report.
2796 *
2797 *   RESULT
2798 *       None.
2799 *
2800 ****************************************************************************
2801 *
2802 */
2803
2804 static VOID ReportEvents(struct DevUnit *unit, ULONG events,
2805    struct DevBase *base)
2806 {
2807    struct IOSana2Req *request, *tail, *next_request;
2808    struct List *list;
2809
2810    list = &unit->request_ports[EVENT_QUEUE]->mp_MsgList;
2811    next_request = (APTR)list->lh_Head;
2812    tail = (APTR)&list->lh_Tail;
2813
2814    Disable();
2815    while(next_request != tail)
2816    {
2817       request = next_request;
2818       next_request = (APTR)request->ios2_Req.io_Message.mn_Node.ln_Succ;
2819
2820       if((request->ios2_WireError & events) != 0)
2821       {
2822          request->ios2_WireError = events;
2823          Remove((APTR)request);
2824          ReplyMsg((APTR)request);
2825       }
2826    }
2827    Enable();
2828
2829    return;
2830 }
2831
2832
2833
2834 /****i* atheros5000.device/GetRadioBands ***********************************
2835 *
2836 *   NAME
2837 *       GetRadioBands -- Get information on current network.
2838 *
2839 *   SYNOPSIS
2840 *       tag_list = GetRadioBands(unit, pool)
2841 *
2842 *       struct TagItem *GetRadioBands(struct DevUnit *, APTR);
2843 *
2844 *   FUNCTION
2845 *
2846 *   INPUTS
2847 *       unit - A unit of this device.
2848 *       pool - A memory pool.
2849 *
2850 *   RESULT
2851 *       None.
2852 *
2853 ****************************************************************************
2854 *
2855 */
2856
2857 #if 0
2858 struct TagItem *GetRadioBands(struct DevUnit *unit, APTR pool,
2859    struct DevBase *base)
2860 {
2861    BYTE error = 0;
2862    struct Sana2RadioBand *bands;
2863    UWORD i;
2864
2865    bands = AllocPooled(pool, sizeof(struct Sana2RadioBand) * 3);
2866    if(bands == NULL)
2867       error = S2ERR_NO_RESOURCES;
2868
2869    if(error == 0)
2870    {
2871       for(i = 0; i < 1; i++)
2872       {
2873          bands[i] = AllocPooled(pool, sizeof(UWORD) * unit->channel_counts[S2BAND_B]);
2874       }
2875    }
2876
2877 //   if(error != 0)
2878 //      bands = NULL;
2879
2880    return bands;
2881 }
2882 #endif
2883
2884
2885
2886 /****i* atheros5000.device/UnitTask ****************************************
2887 *
2888 *   NAME
2889 *       UnitTask
2890 *
2891 *   SYNOPSIS
2892 *       UnitTask()
2893 *
2894 *       VOID UnitTask();
2895 *
2896 *   FUNCTION
2897 *       Completes deferred requests, and handles card insertion and removal
2898 *       in conjunction with the relevant interrupts.
2899 *
2900 ****************************************************************************
2901 *
2902 */
2903
2904 #ifdef __MORPHOS__
2905 #undef UnitTask
2906 #endif
2907
2908 static VOID UnitTask(struct ExecBase *sys_base)
2909 {
2910    struct Task *task;
2911    struct IORequest *request;
2912    struct DevUnit *unit;
2913    struct DevBase *base;
2914    struct MsgPort *general_port;
2915    ULONG signals = 0, wait_signals, card_removed_signal,
2916       card_inserted_signal, general_port_signal;
2917
2918    /* Get parameters */
2919
2920    task = AbsExecBase->ThisTask;
2921    unit = task->tc_UserData;
2922    base = unit->device;
2923
2924    /* Activate general request port */
2925
2926    general_port = unit->request_ports[GENERAL_QUEUE];
2927    general_port->mp_SigTask = task;
2928    general_port->mp_SigBit = AllocSignal(-1);
2929    general_port_signal = 1 << general_port->mp_SigBit;
2930    general_port->mp_Flags = PA_SIGNAL;
2931
2932    /* Allocate signals for notification of card removal and insertion */
2933
2934    card_removed_signal = unit->card_removed_signal = 1 << AllocSignal(-1);
2935    card_inserted_signal = unit->card_inserted_signal = 1 << AllocSignal(-1);
2936    wait_signals = (1 << general_port->mp_SigBit) | card_removed_signal
2937       | card_inserted_signal | SIGBREAKF_CTRL_C;
2938
2939    /* Tell ourselves to check port for old messages */
2940
2941    Signal(task, general_port_signal);
2942
2943    /* Infinite loop to service requests and signals */
2944
2945    while((signals & SIGBREAKF_CTRL_C) == 0)
2946    {
2947       signals = Wait(wait_signals);
2948
2949       if((signals & card_inserted_signal) != 0)
2950       {
2951          if(unit->insertion_function(unit->card, base))
2952          {
2953             unit->flags |= UNITF_HAVEADAPTER;
2954             if((unit->flags & UNITF_CONFIGURED) != 0)
2955                ConfigureAdapter(unit, base);
2956             if((unit->flags & UNITF_WASONLINE) != 0)
2957             {
2958                GoOnline(unit, base);
2959                unit->flags &= ~UNITF_WASONLINE;
2960             }
2961          }
2962       }
2963
2964       if((signals & card_removed_signal) != 0)
2965       {
2966          unit->removal_function(unit->card, base);
2967          if((unit->flags & UNITF_WASONLINE) != 0)
2968             GoOffline(unit, base);
2969       }
2970
2971       if((signals & general_port_signal) != 0)
2972       {
2973          while((request = (APTR)GetMsg(general_port)) != NULL)
2974          {
2975             /* Service the request as soon as the unit is free */
2976
2977             ObtainSemaphore(&unit->access_lock);
2978             ServiceRequest((APTR)request, base);
2979          }
2980       }
2981    }
2982
2983    FreeMem(task->tc_SPLower, STACK_SIZE);
2984 }
2985
2986
2987