rom/devs/ata/ata.h

   1 #ifndef _ATA_H
   2 #define _ATA_H
   3
   4 /*
   5    Copyright © 2004-2011, The AROS Development Team. All rights reserved.
   6    $Id$
   7
   8 Desc: ata.device main private include file
   9 Lang: English
  10 */
  11 /*
  12  * PARTIAL CHANGELOG:
  13  * DATE        NAME                ENTRY
  14  * ----------  ------------------  -------------------------------------------------------------------
  15  * 2008-01-25  T. Wiszkowski       Rebuilt, rearranged and partially fixed 60% of the code here
  16  *                                 Enabled implementation to scan for other PCI IDE controllers
  17  *                                 Implemented ATAPI Packet Support for both read and write
  18  *                                 Corrected ATAPI DMA handling
  19  *                                 Fixed major IDE enumeration bugs severely handicapping transfers with more than one controller
  20  *                                 Compacted source and implemented major ATA support procedure
  21  *                                 Improved DMA and Interrupt management
  22  *                                 Removed obsolete code
  23  * 2008-03-23  T. Wiszkowski       Corrected DMA PRD issue (x86_64 systems)
  24  * 2008-03-30  T. Wiszkowski       Added workaround for interrupt collision handling; fixed SATA in LEGACY mode.
  25  *                                 nForce and Intel SATA chipsets should now be operational.
  26  * 2008-03-31  M. Schulz           We do have asm/io.h include for ages... No need to define io functions here anymore.
  27  *                                 Redefined ata_in and ata_out. On x86-like systems they use inb/outb directly. On other systems
  28  *                                 they use pci_inb and pci_outb.
  29  * 2008-04-05  T. Wiszkowski       Improved IRQ management
  30  * 2008-04-07  T. Wiszkowski       Changed bus timeout mechanism
  31  * 2008-05-11  T. Wiszkowski       Remade the ata trannsfers altogether, corrected the pio/irq handling
  32  *                                 medium removal, device detection, bus management and much more
  33  * 2008-06-24  P. Fedin            Added 'nomulti' flag to disable multisector operations
  34  * 2009-02-21  M. Schulz           ata_in/ata_out declared as functions, if no PCI-io operations are defined.
  35  * 2009-10-07  M. Weiss            Rely on definition of AROS_PCI_IO_FUNCS to check if PCI-io operations are defined.
  36  * 2011-04-05  P. Fedin            Store PCI HIDD attribute and method bases in ata.device base
  37  * 2011-05-19  P. Fedin            The Big rework. Separated bus-specific code. Made 64-bit-friendly.
  38  */
  39
  40 #include <exec/types.h>
  41 #include <exec/devices.h>
  42 #include <exec/semaphores.h>
  43 #include <exec/execbase.h>
  44 #include <exec/libraries.h>
  45 #include <exec/ports.h>
  46 #include <utility/utility.h>
  47 #include <exec/io.h>
  48 #include <exec/errors.h>
  49 #include <devices/trackdisk.h>
  50 #include <devices/scsidisk.h>
  51 #include <devices/newstyle.h>
  52 #include <devices/timer.h>
  53 #include <devices/cd.h>
  54
  55 #include "include/scsicmds.h"
  56 #include "ata_bus.h"
  57
  58 #define MAX_DEVICEBUSES         2
  59 #define MAX_BUSUNITS            2
  60 #define STACK_SIZE              16384
  61 #define TASK_PRI                10
  62 #define TIMEOUT                 30
  63
  64 /*
  65    Don't blame me for information redundance here!
  66
  67    Please note, that all structures here are more or less chained together.
  68    The aim is, every single function in ata.device, no matter whether it takes
  69    ata_Unit or ata_Bus or God knows what else, would have access to ata device
  70    base and through it, to all other device structures.
  71
  72    I just wanted to avoid passing ataBase everywhere. :-D
  73    */
  74
  75 /* structure forward declarations */
  76 struct ata_Unit;
  77 struct ata_Bus;
  78
  79 /*
  80  * this **might** cause problems with PPC64, which **might** expect both to be 64bit.
  81  */
  82 struct PRDEntry {
  83    ULONG   prde_Address;
  84    ULONG   prde_Length;
  85 };
  86
  87 #define PRDE_EOT    0x80000000
  88 #define PRD_MAX     514
  89
  90 /* ata.device base */
  91 struct ataBase
  92 {
  93    /*
  94     * Device structure - used to manage devices by exec guts^h^h^hoods
  95     */
  96    struct Device           ata_Device;
  97
  98    /*
  99     * master task pointer
 100     */
 101    struct Task            *ata_Daemon;
 102
 103    /*
 104     * list of all buses - we may have more than just 4
 105     */
 106    struct MinList          ata_Buses;
 107    int                     ata__buscount;
 108
 109    /*
 110     * Arguments and flags
 111     */
 112    UBYTE                   ata_32bit;
 113    UBYTE                   ata_NoMulti;
 114    UBYTE                   ata_NoDMA;
 115    UBYTE                   ata_Poll;
 116    STRPTR                  ata_CmdLine;
 117
 118    /*
 119     * memory pool
 120     */
 121    APTR                    ata_MemPool;
 122
 123    struct Device          *ata_TimerBase;
 124    ULONG                   ata_ItersPer100ns;
 125 };
 126
 127 /*
 128    The single IDE bus (channel)
 129    */
 130 struct ata_Bus
 131 {
 132    struct MinNode          ab_Node;    /* exec node */
 133    struct ataBase          *ab_Base;   /* device self */
 134    ULONG                   ab_Port;    /* IO port used */
 135    ULONG                   ab_Alt;     /* alternate io port */
 136    UBYTE                   ab_IRQ;     /* IRQ number used */
 137    UBYTE                   ab_Dev[2];  /* Master/Slave type, see below */
 138    UBYTE                   ab_Flags;   /* Bus flags similar to unit flags */
 139    BYTE                    ab_SleepySignal; /* Signal used to wake the task up, when it's waiting */
 140    /* for data requests/DMA */
 141    UBYTE                   ab_BusNum;  /* bus id - used to calculate device id */
 142    volatile LONG           ab_Timeout; /* in seconds; please note that resolution is low (1sec) */
 143
 144    struct ata_Unit         *ab_Units[MAX_BUSUNITS];    /* Units on the bus */
 145    struct ata_Unit         *ab_SelectedUnit;    /* Currently selected unit */
 146
 147    APTR                    ab_IntHandler;
 148    ULONG                   ab_IntCnt;
 149
 150    struct Task             *ab_Task;       /* Bus task handling all not-immediate transactions */
 151    struct MsgPort          *ab_MsgPort;    /* Task's message port */
 152    struct PRDEntry         *ab_PRD;
 153    struct IORequest        *ab_Timer;      /* timer stuff */
 154
 155    struct Interrupt        ab_ResetInt;
 156
 157    /* functions go here */
 158    void                   (*ab_HandleIRQ)(struct ata_Unit* unit, UBYTE status);
 159
 160    /* Bus driver stuff */
 161    const struct ata_BusDriver *ab_Driver;
 162    APTR                        ab_DriverData;
 163 };
 164
 165 /* Device types */
 166 #define DEV_NONE        0x00
 167 #define DEV_UNKNOWN     0x01
 168 #define DEV_ATA         0x02
 169 #define DEV_SATA        0x03
 170 #define DEV_ATAPI       0x80
 171 #define DEV_SATAPI      0x81
 172
 173 /*
 174    DriveIdent structure as returned by ATA_IDENTIFY_[DEVICE|ATAPI]
 175    */
 176 struct DriveIdent {
 177    UWORD       id_General;             // 0
 178    UWORD       id_OldCylinders;        // 1
 179    UWORD       id_SpecificConfig;      // 2
 180    UWORD       id_OldHeads;            // 3
 181    UWORD       pad1[2];                // 4-5
 182    UWORD       id_OldSectors;          // 6
 183    UWORD       pad2[3];                // 7-9
 184    UBYTE       id_SerialNumber[20];    // 10-19
 185    UWORD       pad3[3];                // 20-22
 186    UBYTE       id_FirmwareRev[8];      // 23-26
 187    UBYTE       id_Model[40];           // 27-46
 188    UWORD       id_RWMultipleSize;      // 47
 189    UWORD       pad4;                   // 48
 190    UWORD       id_Capabilities;        // 49
 191    UWORD       id_OldCaps;             // 50
 192    UWORD       id_OldPIO;              // 51
 193    UWORD       pad5;                   // 52
 194    UWORD       id_ConfigAvailable;     // 53
 195    UWORD       id_OldLCylinders;       // 54
 196    UWORD       id_OldLHeads;           // 55
 197    UWORD       id_OldLSectors;         // 56
 198    UWORD       pad6[2];                // 57-58
 199    UWORD       id_RWMultipleTrans;     // 59
 200    ULONG       id_LBASectors;          // 60-61
 201    UWORD       id_DMADir;              // 62
 202    UWORD       id_MWDMASupport;        // 63
 203    UWORD       id_PIOSupport;          // 64
 204    UWORD       id_MWDMA_MinCycleTime;  // 65
 205    UWORD       id_MWDMA_DefCycleTime;  // 66
 206    UWORD       id_PIO_MinCycleTime;    // 67
 207    UWORD       id_PIO_MinCycleTimeIORDY; // 68
 208    UWORD       pad8[6];                // 69-74
 209    UWORD       id_QueueDepth;          // 75
 210    UWORD       pad9[4];                // 76-79
 211    UWORD       id_ATAVersion;          // 80
 212    UWORD       id_ATARevision;         // 81
 213    UWORD       id_Commands1;           // 82
 214    UWORD       id_Commands2;           // 83
 215    UWORD       id_Commands3;           // 84
 216    UWORD       id_Commands4;           // 85
 217    UWORD       id_Commands5;           // 86
 218    UWORD       id_Commands6;           // 87
 219    UWORD       id_UDMASupport;         // 88
 220    UWORD       id_SecurityEraseTime;   // 89
 221    UWORD       id_ESecurityEraseTime;  // 90
 222    UWORD       id_CurrentAdvPowerMode; // 91
 223    UWORD       id_MasterPwdRevision;   // 92
 224    UWORD       id_HWResetResult;       // 93
 225    UWORD       id_AcousticManagement;  // 94
 226    UWORD       id_StreamMinimunReqSize; // 95
 227    UWORD       id_StreamingTimeDMA;    // 96
 228    UWORD       id_StreamingLatency;    // 97
 229    ULONG       id_StreamingGranularity; // 98-99
 230    UQUAD       id_LBA48Sectors;        // 100-103
 231    UWORD       id_StreamingTimePIO;    // 104
 232    UWORD       pad10;                  // 105
 233    UWORD       id_PhysSectorSize;      // 106
 234    UWORD       pad11;                  // 107
 235    UQUAD       id_UniqueIDi[2];        // 108-115
 236    UWORD       pad12;                  // 116
 237    ULONG       id_WordsPerLogicalSector; // 117-118
 238    UWORD       pad13[8];               // 119-126
 239    UWORD       id_RemMediaStatusNotificationFeatures; // 127
 240    UWORD       id_SecurityStatus;      // 128
 241    UWORD       pad14[127];
 242 } __attribute__((packed));
 243
 244 typedef struct
 245 {
 246    UBYTE command;       // current ATA command
 247    UBYTE feature;       // FF to indicate no feature
 248    UBYTE secmul;        // for read multiple - multiplier. default 1
 249    UBYTE pad;
 250    UQUAD blk;
 251    ULONG sectors;
 252    APTR  buffer;
 253    ULONG length;
 254    ULONG actual;
 255
 256    enum
 257    {
 258       CM_NoData,
 259       CM_PIORead,
 260       CM_PIOWrite,
 261       CM_DMARead,
 262       CM_DMAWrite
 263    } method;
 264    enum
 265    {
 266       CT_NoBlock,
 267       CT_LBA28,
 268       CT_LBA48,
 269    } type;
 270 } ata_CommandBlock;
 271
 272 /*
 273    Unit structure describing given device on the bus. It contains all the
 274    necessary information unit/device may need.
 275    */
 276 struct ata_Unit
 277 {
 278    struct Unit         au_Unit;   /* exec's unit */
 279    struct DriveIdent  *au_Drive;  /* Drive Ident after IDENTIFY command */
 280    struct ata_Bus     *au_Bus;    /* Bus on which this unit is */
 281
 282    ULONG               au_DMAPort;
 283    ULONG               au_XferModes;   /* available transfer modes */
 284
 285    ULONG               au_Capacity;    /* Highest sector accessible through LBA28 */
 286    UQUAD               au_Capacity48;  /* Highest sector accessible through LBA48 */
 287    ULONG               au_Cylinders;
 288    UBYTE               au_Heads;
 289    UBYTE               au_Sectors;
 290    UBYTE               au_Model[41];
 291    UBYTE               au_FirmwareRev[9];
 292    UBYTE               au_SerialNumber[21];
 293
 294    /*
 295       Here are stored pointers to functions responsible for handling this
 296       device. They are set during device initialization and point to most
 297       effective functions for this particular unit. Read/Write may be done
 298       in PIO mode reading single sectors, using multisector PIO, or
 299       multiword DMA.
 300       */
 301    BYTE        (*au_Read32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 302    BYTE        (*au_Write32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 303    BYTE        (*au_Read64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 304    BYTE        (*au_Write64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 305    BYTE        (*au_Eject)(struct ata_Unit *);
 306    BYTE        (*au_DirectSCSI)(struct ata_Unit *, struct SCSICmd*);
 307    BYTE        (*au_Identify)(struct ata_Unit *);
 308
 309    VOID                (*au_ins)(APTR, UWORD, ULONG, APTR);
 310    VOID                (*au_outs)(APTR, UWORD, ULONG, APTR);
 311
 312    ULONG               au_UnitNum;     /* Unit number as coded by device */
 313    ULONG               au_Flags;       /* Unit flags, see below */
 314    ULONG               au_ChangeNum;   /* Number of disc changes */
 315
 316    struct Interrupt   *au_RemoveInt;  /* Raise this interrupt on a disc change */
 317    struct List         au_SoftList;    /* Raise even more interrupts from this list on disc change */
 318
 319    UBYTE               au_SectorShift;         /* Sector shift. 9 here is 512 bytes sector */
 320    UBYTE               au_DevMask;             /* device mask used to simplify device number coding */
 321    UBYTE               au_SenseKey;            /* Sense key from ATAPI devices */
 322    UBYTE               au_DevType;
 323
 324    /******* PIO IO ********/
 325    APTR                au_cmd_data;
 326    ULONG               au_cmd_length;
 327    ULONG               au_cmd_total;
 328    ULONG               au_cmd_error;
 329 };
 330
 331 typedef enum
 332 {
 333    AB_XFER_PIO0 = 0,
 334    AB_XFER_PIO1,
 335    AB_XFER_PIO2,
 336    AB_XFER_PIO3,
 337    AB_XFER_PIO4,
 338
 339    AB_XFER_MDMA0,
 340    AB_XFER_MDMA1,
 341    AB_XFER_MDMA2,
 342
 343    AB_XFER_UDMA0,
 344    AB_XFER_UDMA1,
 345    AB_XFER_UDMA2,
 346    AB_XFER_UDMA3,
 347    AB_XFER_UDMA4,
 348    AB_XFER_UDMA5,
 349    AB_XFER_UDMA6,
 350
 351    AB_XFER_48BIT,
 352    AB_XFER_RWMULTI,
 353    AB_XFER_PACKET,
 354    AB_XFER_LBA,
 355    AB_XFER_DMA,
 356
 357 } ata_XferMode;
 358
 359 #define AF_XFER_PIO(x)  (1<<(AB_XFER_PIO0+(x)))
 360 #define AF_XFER_MDMA(x) (1<<(AB_XFER_MDMA0+(x)))
 361 #define AF_XFER_UDMA(x) (1<<(AB_XFER_UDMA0+(x)))
 362 #define AF_XFER_48BIT   (1<<(AB_XFER_48BIT))
 363 #define AF_XFER_RWMULTI (1<<(AB_XFER_RWMULTI))
 364 #define AF_XFER_PACKET  (1<<(AB_XFER_PACKET))
 365 #define AF_XFER_LBA     (1<<(AB_XFER_LBA))
 366 #define AF_XFER_DMA     (1<<(AB_XFER_DMA))
 367
 368 /* Unit internal flags */
 369 #define AB_DiscPresent          30     /* disc now in drive */
 370 #define AB_DiscChanged          29     /* disc changed */
 371 #define AB_Removable            28     /* media removable */
 372 #define AB_80Wire               27     /* has an 80-wire cable */
 373
 374 #define AF_DiscPresent          (1 << AB_DiscPresent)
 375 #define AF_DiscChanged          (1 << AB_DiscChanged)
 376 #define AF_Removable            (1 << AB_Removable)
 377 #define AF_80Wire               (1 << AB_80Wire)
 378
 379 /* RegisterBus flags */
 380 #define ARBB_80Wire              0
 381 #define ARBB_EarlyInterrupt      1
 382
 383 #define ARBF_80Wire              (1 << ARBB_80Wire)
 384 #define ARBF_EarlyInterrupt      (1 << ARBB_EarlyInterrupt)
 385
 386 /* ATA/ATAPI registers */
 387 #define ata_Error           1
 388 #define ata_Feature         1
 389 #define ata_Count           2
 390 #define ata_LBALow          3
 391 #define ata_LBAMid          4
 392 #define ata_LBAHigh         5
 393 #define ata_DevHead         6
 394 #define ata_Status          7
 395 #define ata_Command         7
 396 #define ata_AltStatus       0x2
 397 #define ata_AltControl      0x2
 398
 399 #define ATA_OUT(val, offset, port)  unit->au_Bus->ab_Driver->ata_out((val), (offset), (port), unit->au_Bus->ab_DriverData)
 400 #define ATA_IN(offset, port)        unit->au_Bus->ab_Driver->ata_in((offset), (port), unit->au_Bus->ab_DriverData)
 401 #define ATA_OUTL(val, offset, port) unit->au_Bus->ab_Driver->ata_outl((val), (offset), (port), unit->au_Bus->ab_DriverData)
 402
 403 #define BUS_OUT(val, offset, port)  bus->ab_Driver->ata_out((val), (offset), (port), bus->ab_DriverData)
 404 #define BUS_IN(offset, port)        bus->ab_Driver->ata_in((offset), (port), bus->ab_DriverData)
 405 #define BUS_OUTL(val, offset, port) bus->ab_Driver->ata_outl((val), (offset), (port), bus->ab_DriverData)
 406
 407 #define atapi_Error         1
 408 #define atapi_Features      1
 409 #define atapi_Reason        2
 410 #define atapi_ByteCntL      4
 411 #define atapi_ByteCntH      5
 412 #define atapi_DevSel        6
 413 #define atapi_Status        7
 414 #define atapi_Command       7
 415
 416 /* Atapi status bits */
 417 #define ATAB_SLAVE          4
 418 #define ATAB_LBA            6
 419 #define ATAB_ATAPI          7
 420 #define ATAB_DATAREQ        3
 421 #define ATAB_ERROR          0
 422 #define ATAB_BUSY           7
 423
 424 #define ATAF_SLAVE          0x10
 425 #define ATAF_LBA            0x40
 426 #define ATAF_ATAPI          0x80
 427 #define ATAF_DATAREQ        0x08
 428 #define ATAF_ERROR          0x01
 429 #define ATAF_BUSY           0x80
 430 #define ATAF_DRDY           0x40
 431
 432 #define ATAPIF_CHECK        0x01
 433
 434 /* ATA/ATAPI commands */
 435 #define ATA_SET_FEATURES    0xef
 436 #define ATA_SET_MULTIPLE    0xc6
 437 #define ATA_DEVICE_RESET    0x08
 438 #define ATA_IDENTIFY_DEVICE 0xec
 439 #define ATA_IDENTIFY_ATAPI  0xa1
 440 #define ATA_NOP             0x00
 441 #define ATA_EXECUTE_DIAG    0x90
 442 #define ATA_PACKET          0xa0
 443 #define ATA_READ_DMA        0xc8
 444 #define ATA_READ_DMA64      0x25
 445 #define ATA_READ            0x20
 446 #define ATA_READ64          0x24
 447 #define ATA_READ_MULTIPLE   0xc4
 448 #define ATA_READ_MULTIPLE64 0x29
 449 #define ATA_WRITE_DMA       0xca
 450 #define ATA_WRITE_DMA64     0x35
 451 #define ATA_WRITE           0x30
 452 #define ATA_WRITE64         0x34
 453 #define ATA_WRITE_MULTIPLE  0xc5
 454 #define ATA_WRITE_MULTIPLE64 0x39
 455 #define ATA_MEDIA_EJECT     0xed
 456
 457 #define ATAPIF_MASK         0x03
 458 #define ATAPIF_COMMAND      0x01
 459 #define ATAPIF_READ         0x02
 460 #define ATAPIF_WRITE        0x00
 461
 462 /* SFF-8038i DMA registers */
 463 #define dma_Command         0x00
 464 #define dma_Status          0x02
 465 #define dma_PRD             0x04
 466
 467 /* DMA command register */
 468 #define DMA_READ            0x00    /* PCI *READS* from memory to drive */
 469 #define DMA_WRITE           0x08    /* PCI *WRITES* to memory from drive */
 470 #define DMA_START           0x01    /* DMA Start/Stop */
 471
 472 #define DMAB_Active         0
 473 #define DMAB_Error          1
 474 #define DMAB_Interrupt      2
 475 #define DMAB_Simplex        7
 476
 477 #define DMAF_Active         (1 << DMAB_Active)
 478 #define DMAF_Error          (1 << DMAB_Error)
 479 #define DMAF_Interrupt      (1 << DMAB_Interrupt)
 480 #define DMAF_Simplex        (1 << DMAB_Simplex)
 481
 482 #define Unit(io) ((struct ata_Unit *)(io)->io_Unit)
 483 #define IOStdReq(io) ((struct IOStdReq *)io)
 484
 485 /* Function prototypes */
 486
 487 void ata_ResetBus(struct ata_Bus *);
 488 void ata_InitBus(struct ata_Bus *);
 489
 490 BYTE atapi_SendPacket(struct ata_Unit *, APTR, APTR, LONG, BOOL*, BOOL);
 491 int atapi_TestUnitOK(struct ata_Unit *);
 492
 493 BYTE atapi_Identify(struct ata_Unit*);
 494 BYTE ata_Identify(struct ata_Unit*);
 495
 496 BYTE atapi_DirectSCSI(struct ata_Unit*, struct SCSICmd *);
 497 ULONG atapi_RequestSense(struct ata_Unit* unit, UBYTE* sense, ULONG senselen);
 498
 499 BOOL ata_HandleIRQ(struct ata_Bus *bus);
 500
 501 BOOL dma_SetupPRD(struct ata_Unit *, APTR, ULONG, BOOL);
 502 BOOL dma_SetupPRDSize(struct ata_Unit *, APTR, ULONG, BOOL);
 503 VOID dma_StartDMA(struct ata_Unit *);
 504 VOID dma_StopDMA(struct ata_Unit *);
 505 VOID dma_Cleanup(APTR adr, ULONG len, BOOL read);
 506
 507 BOOL ata_setup_unit(struct ata_Bus *bus, UBYTE u);
 508 BOOL ata_init_unit(struct ata_Bus *bus, UBYTE u);
 509 BOOL ata_RegisterVolume(ULONG StartCyl, ULONG EndCyl, struct ata_Unit *unit);
 510
 511 void ata_RegisterBus(IPTR IOBase, IPTR IOAlt, IPTR INTLine, IPTR DMABase, ULONG Flags,
 512                      const struct ata_BusDriver *driver, APTR driverData, struct ataBase *ATABase);
 513
 514 void BusTaskCode(struct ata_Bus *bus, struct Task* parent, struct SignalSemaphore *ssem);
 515 void DaemonCode(struct ataBase *LIBBASE);
 516
 517 #define ATAPI_SS_EJECT  0x02
 518 #define ATAPI_SS_LOAD   0x03
 519
 520 struct atapi_StartStop
 521 {
 522     UBYTE   command;
 523     UBYTE   immediate;
 524     UBYTE   pad1[2];
 525     UBYTE   flags;
 526     UBYTE   pad2[7];
 527 };
 528
 529 UBYTE SCSIEmu(struct ata_Unit*, struct SCSICmd*);
 530
 531 #endif // _ATA_H
 532