?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Add kernel version check, for list_is_singular
[stkwebcam.git] / stk-sensor.c
blob746b546479b311ef0c864b3cc2f89e6c22f4fb97
1 /* stk-sensor.c: Driver for ov96xx sensor (used in some Syntek webcams)
2 *
3 * Copyright 2007 Jaime Velasco Juan <jsagarribay@gmail.com>
4 *
5 * Some parts derived from ov7670.c:
6 * Copyright 2006 One Laptop Per Child Association, Inc. Written
7 * by Jonathan Corbet with substantial inspiration from Mark
8 * McClelland's ovcamchip code.
9 *
10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
11 *
12 * This file may be distributed under the terms of the GNU General
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28 /* Controlling the sensor via the STK1125 vendor specific control interface:
29 * The camera uses an OmniVision sensor and the stk1125 provides an
30 * SCCB(i2c)-USB bridge which let us program the sensor.
31 * In my case the sensor id is 0x9652, it can be read from sensor's register
32 * 0x0A and 0x0B as follows:
33 * - read register #R:
34 * output #R to index 0x0208
35 * output 0x0070 to index 0x0200
36 * input 1 byte from index 0x0201 (some kind of status register)
37 * until its value is 0x01
38 * input 1 byte from index 0x0209. This is the value of #R
39 * - write value V to register #R
40 * output #R to index 0x0204
41 * output V to index 0x0205
42 * output 0x0005 to index 0x0200
43 * input 1 byte from index 0x0201 until its value becomes 0x04
44 */
45
46 /* It seems the i2c bus is controlled with these registers */
47
48 #include "stk-webcam.h"
49
50 #define STK_IIC_BASE (0x0200)
51 # define STK_IIC_OP (STK_IIC_BASE)
52 # define STK_IIC_OP_TX (0x05)
53 # define STK_IIC_OP_RX (0x70)
54 # define STK_IIC_STAT (STK_IIC_BASE+1)
55 # define STK_IIC_STAT_TX_OK (0x04)
56 # define STK_IIC_STAT_RX_OK (0x01)
57 /* I don't know what does this register.
58 * when it is 0x00 or 0x01, we cannot talk to the sensor,
59 * other values work */
60 # define STK_IIC_ENABLE (STK_IIC_BASE+2)
61 # define STK_IIC_ENABLE_NO (0x00)
62 /* This is what the driver writes in windows */
63 # define STK_IIC_ENABLE_YES (0x1e)
64 /*
65 * Address of the slave. Seems like the binary driver look for the
66 * sensor in multiple places, attempting a reset sequence.
67 * We only know about the ov9650
68 */
69 # define STK_IIC_ADDR (STK_IIC_BASE+3)
70 # define STK_IIC_TX_INDEX (STK_IIC_BASE+4)
71 # define STK_IIC_TX_VALUE (STK_IIC_BASE+5)
72 # define STK_IIC_RX_INDEX (STK_IIC_BASE+8)
73 # define STK_IIC_RX_VALUE (STK_IIC_BASE+9)
74
75 #define MAX_RETRIES (50)
76
77 #define SENSOR_ADDRESS (0x60)
78
79 /* From ov7670.c (These registers aren't fully accurate) */
80
81 /* Registers */
82 #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
83 #define REG_BLUE 0x01 /* blue gain */
84 #define REG_RED 0x02 /* red gain */
85 #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
86 #define REG_COM1 0x04 /* Control 1 */
87 #define COM1_CCIR656 0x40 /* CCIR656 enable */
88 #define COM1_QFMT 0x20 /* QVGA/QCIF format */
89 #define COM1_SKIP_0 0x00 /* Do not skip any row */
90 #define COM1_SKIP_2 0x04 /* Skip 2 rows of 4 */
91 #define COM1_SKIP_3 0x08 /* Skip 3 rows of 4 */
92 #define REG_BAVE 0x05 /* U/B Average level */
93 #define REG_GbAVE 0x06 /* Y/Gb Average level */
94 #define REG_AECHH 0x07 /* AEC MS 5 bits */
95 #define REG_RAVE 0x08 /* V/R Average level */
96 #define REG_COM2 0x09 /* Control 2 */
97 #define COM2_SSLEEP 0x10 /* Soft sleep mode */
98 #define REG_PID 0x0a /* Product ID MSB */
99 #define REG_VER 0x0b /* Product ID LSB */
100 #define REG_COM3 0x0c /* Control 3 */
101 #define COM3_SWAP 0x40 /* Byte swap */
102 #define COM3_SCALEEN 0x08 /* Enable scaling */
103 #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
104 #define REG_COM4 0x0d /* Control 4 */
105 #define REG_COM5 0x0e /* All "reserved" */
106 #define REG_COM6 0x0f /* Control 6 */
107 #define REG_AECH 0x10 /* More bits of AEC value */
108 #define REG_CLKRC 0x11 /* Clock control */
109 #define CLK_PLL 0x80 /* Enable internal PLL */
110 #define CLK_EXT 0x40 /* Use external clock directly */
111 #define CLK_SCALE 0x3f /* Mask for internal clock scale */
112 #define REG_COM7 0x12 /* Control 7 */
113 #define COM7_RESET 0x80 /* Register reset */
114 #define COM7_FMT_MASK 0x38
115 #define COM7_FMT_SXGA 0x00
116 #define COM7_FMT_VGA 0x40
117 /* FIXME: These formats are from another sensor */
118 #define COM7_FMT_CIF 0x20 /* CIF format */
119 #define COM7_FMT_QVGA 0x10 /* QVGA format */
120 #define COM7_FMT_QCIF 0x08 /* QCIF format */
121 #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
122 #define COM7_YUV 0x00 /* YUV */
123 #define COM7_BAYER 0x01 /* Bayer format */
124 #define COM7_PBAYER 0x05 /* "Processed bayer" */
125 #define REG_COM8 0x13 /* Control 8 */
126 #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
127 #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
128 #define COM8_BFILT 0x20 /* Band filter enable */
129 #define COM8_AGC 0x04 /* Auto gain enable */
130 #define COM8_AWB 0x02 /* White balance enable */
131 #define COM8_AEC 0x01 /* Auto exposure enable */
132 #define REG_COM9 0x14 /* Control 9 - gain ceiling */
133 #define REG_COM10 0x15 /* Control 10 */
134 #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
135 #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
136 #define COM10_HREF_REV 0x08 /* Reverse HREF */
137 #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
138 #define COM10_VS_NEG 0x02 /* VSYNC negative */
139 #define COM10_HS_NEG 0x01 /* HSYNC negative */
140 #define REG_HSTART 0x17 /* Horiz start high bits */
141 #define REG_HSTOP 0x18 /* Horiz stop high bits */
142 #define REG_VSTART 0x19 /* Vert start high bits */
143 #define REG_VSTOP 0x1a /* Vert stop high bits */
144 #define REG_PSHFT 0x1b /* Pixel delay after HREF */
145 #define REG_MIDH 0x1c /* Manuf. ID high */
146 #define REG_MIDL 0x1d /* Manuf. ID low */
147 #define REG_MVFP 0x1e /* Mirror / vflip */
148 #define MVFP_MIRROR 0x20 /* Mirror image */
149 #define MVFP_FLIP 0x10 /* Vertical flip */
150
151 #define REG_AEW 0x24 /* AGC upper limit */
152 #define REG_AEB 0x25 /* AGC lower limit */
153 #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
154 #define REG_ADVFL 0x2d /* Insert dummy lines (LSB) */
155 #define REG_ADVFH 0x2e /* Insert dummy lines (MSB) */
156 #define REG_HSYST 0x30 /* HSYNC rising edge delay */
157 #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
158 #define REG_HREF 0x32 /* HREF pieces */
159 #define REG_TSLB 0x3a /* lots of stuff */
160 #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
161 #define TSLB_BYTEORD 0x08 /* swap bytes in 16bit mode? */
162 #define REG_COM11 0x3b /* Control 11 */
163 #define COM11_NIGHT 0x80 /* NIght mode enable */
164 #define COM11_NMFR 0x60 /* Two bit NM frame rate */
165 #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
166 #define COM11_50HZ 0x08 /* Manual 50Hz select */
167 #define COM11_EXP 0x02
168 #define REG_COM12 0x3c /* Control 12 */
169 #define COM12_HREF 0x80 /* HREF always */
170 #define REG_COM13 0x3d /* Control 13 */
171 #define COM13_GAMMA 0x80 /* Gamma enable */
172 #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
173 #define COM13_CMATRIX 0x10 /* Enable color matrix for RGB or YUV */
174 #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
175 #define REG_COM14 0x3e /* Control 14 */
176 #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
177 #define REG_EDGE 0x3f /* Edge enhancement factor */
178 #define REG_COM15 0x40 /* Control 15 */
179 #define COM15_R10F0 0x00 /* Data range 10 to F0 */
180 #define COM15_R01FE 0x80 /* 01 to FE */
181 #define COM15_R00FF 0xc0 /* 00 to FF */
182 #define COM15_RGB565 0x10 /* RGB565 output */
183 #define COM15_RGBFIXME 0x20 /* FIXME */
184 #define COM15_RGB555 0x30 /* RGB555 output */
185 #define REG_COM16 0x41 /* Control 16 */
186 #define COM16_AWBGAIN 0x08 /* AWB gain enable */
187 #define REG_COM17 0x42 /* Control 17 */
188 #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
189 #define COM17_CBAR 0x08 /* DSP Color bar */
190
191 /*
192 * This matrix defines how the colors are generated, must be
193 * tweaked to adjust hue and saturation.
194 *
195 * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
196 *
197 * They are nine-bit signed quantities, with the sign bit
198 * stored in 0x58. Sign for v-red is bit 0, and up from there.
199 */
200 #define REG_CMATRIX_BASE 0x4f
201 #define CMATRIX_LEN 6
202 #define REG_CMATRIX_SIGN 0x58
203
204
205 #define REG_BRIGHT 0x55 /* Brightness */
206 #define REG_CONTRAS 0x56 /* Contrast control */
207
208 #define REG_GFIX 0x69 /* Fix gain control */
209
210 #define REG_RGB444 0x8c /* RGB 444 control */
211 #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
212 #define R444_RGBX 0x01 /* Empty nibble at end */
213
214 #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
215 #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
216
217 #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
218 #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
219 #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
220 #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
221 #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
222 #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
223 #define REG_BD60MAX 0xab /* 60hz banding step limit */
224
225
226
227
228 /* Returns 0 if OK */
229 int stk_sensor_outb(struct stk_camera *dev, u8 reg, u8 val)
230 {
231 int i = 0;
232 int tmpval = 0;
233
234 if (stk_camera_write_reg(dev, STK_IIC_TX_INDEX, reg))
235 return 1;
236 if (stk_camera_write_reg(dev, STK_IIC_TX_VALUE, val))
237 return 1;
238 if (stk_camera_write_reg(dev, STK_IIC_OP, STK_IIC_OP_TX))
239 return 1;
240 do {
241 if (stk_camera_read_reg(dev, STK_IIC_STAT, &tmpval))
242 return 1;
243 i++;
244 } while (tmpval == 0 && i < MAX_RETRIES);
245 if (tmpval != STK_IIC_STAT_TX_OK) {
246 if (tmpval)
247 STK_ERROR("stk_sensor_outb failed, status=0x%02x\n",
248 tmpval);
249 return 1;
250 }
251 else return 0;
252 }
253
254 int stk_sensor_inb(struct stk_camera *dev, u8 reg, u8 *val)
255 {
256 int i = 0;
257 int tmpval = 0;
258
259 if (stk_camera_write_reg(dev, STK_IIC_RX_INDEX, reg))
260 return 1;
261 if (stk_camera_write_reg(dev, STK_IIC_OP, STK_IIC_OP_RX))
262 return 1;
263 do {
264 if (stk_camera_read_reg(dev, STK_IIC_STAT, &tmpval))
265 return 1;
266 i++;
267 } while (tmpval == 0 && i < MAX_RETRIES);
268 if (tmpval != STK_IIC_STAT_RX_OK) {
269 if (tmpval)
270 STK_ERROR("stk_sensor_inb failed, status=0x%02x\n",
271 tmpval);
272 return 1;
273 }
274
275 if (stk_camera_read_reg(dev, STK_IIC_RX_VALUE, &tmpval))
276 return 1;
277
278 *val = (u8) tmpval;
279 return 0;
280 }
281
282 static int stk_sensor_write_regvals(struct stk_camera *dev,
283 struct regval *rv)
284 {
285 int ret;
286 if (rv == NULL)
287 return 0;
288 while (rv->reg != 0xff || rv->val != 0xff) {
289 ret = stk_sensor_outb(dev, rv->reg, rv->val);
290 if (ret != 0) {
291 return ret;
292 }
293 rv++;
294 }
295 return 0;
296 }
297
298 int stk_sensor_dump_registers(struct stk_camera *dev, u8 first, u8 last)
299 {
300 u8 idx = first;
301 u8 val;
302 while (idx <= last) {
303 printk("%02x ", (int) idx);
304 idx++;
305 }
306 printk("\n");
307 idx = first;
308 while (idx <= last) {
309 if (stk_sensor_inb(dev, idx, &val)) {
310 STK_ERROR("dump_registers failed!\n");
311 return 1;
312 }
313 printk("%02x ", (int) val);
314 idx++;
315 }
316 printk("\n");
317 return 0;
318 }
319
320 int stk_sensor_sleep(struct stk_camera *dev)
321 {
322 u8 tmp;
323 return stk_sensor_inb(dev, REG_COM2, &tmp)
324 || stk_sensor_outb(dev, REG_COM2, tmp|COM2_SSLEEP);
325 }
326
327 int stk_sensor_wakeup(struct stk_camera *dev)
328 {
329 u8 tmp;
330 return stk_sensor_inb(dev, REG_COM2, &tmp)
331 || stk_sensor_outb(dev, REG_COM2, tmp&~COM2_SSLEEP);
332 }
333
334 static struct regval ov_initvals[] = {
335 #if 1
336 // {REG_COM7, COM7_RESET},
337 {REG_CLKRC, CLK_PLL},
338 {REG_COM11, 0x01},
339 {0x6a, 0x7d},
340 {REG_AECH, 0x40},
341 {REG_GAIN, 0x00},
342 {REG_BLUE, 0x80},
343 {REG_RED, 0x80},
344 /* Do not enable fast AEC for now */
345 /*{REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC},*/
346 {REG_COM8, COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC},
347 {0x39, 0x50}, {0x38, 0x93},
348 {0x37, 0x00}, {0x35, 0x81},
349 {REG_COM5, 0x20},
350 {REG_COM1, 0x00},
351 {REG_COM3, 0x00},
352 {REG_COM4, 0x00},
353 {REG_PSHFT, 0x00},
354 {0x16, 0x07},
355 {0x33, 0xe2}, {0x34, 0xbf},
356 {REG_COM16, 0x00},
357 {0x96, 0x04},
358 /* Gamma curve values */
359 /* { 0x7a, 0x20 }, { 0x7b, 0x10 },
360 { 0x7c, 0x1e }, { 0x7d, 0x35 },
361 { 0x7e, 0x5a }, { 0x7f, 0x69 },
362 { 0x80, 0x76 }, { 0x81, 0x80 },
363 { 0x82, 0x88 }, { 0x83, 0x8f },
364 { 0x84, 0x96 }, { 0x85, 0xa3 },
365 { 0x86, 0xaf }, { 0x87, 0xc4 },
366 { 0x88, 0xd7 }, { 0x89, 0xe8 },
367 */
368 {REG_GFIX, 0x40},
369 {0x8e, 0x00},
370 {REG_COM12, 0x73},
371 {0x8f, 0xdf}, {0x8b, 0x06},
372 {0x8c, 0x20},
373 {0x94, 0x88}, {0x95, 0x88},
374 // {REG_COM15, 0xc1}, //TODO
375 {0x29, 0x3f},
376 {REG_COM6, 0x42},
377 {REG_BD50MAX, 0x80},
378 // {REG_MVFP, MVFP_MIRROR|MVFP_FLIP},
379 {REG_HAECC6, 0xb8}, {REG_HAECC7, 0x92},
380 {REG_BD60MAX, 0x0a},
381 {0x90, 0x00}, {0x91, 0x00},
382 {REG_HAECC1, 0x00}, {REG_HAECC2, 0x00},
383 {REG_AEW, 0x68}, {REG_AEB, 0x5c},
384 {REG_VPT, 0xc3},
385 {REG_COM9, 0x2e},
386 {0x2a, 0x00}, {0x2b, 0x00},
387
388 #else
389 { REG_COM7, COM7_RESET },
390 /*
391 * Clock scale: 3 = 15fps
392 * 2 = 20fps
393 * 1 = 30fps
394 */
395 { REG_CLKRC, CLK_PLL }, /* OV: clock scale (30 fps) */
396 { REG_TSLB, 0x04 }, /* OV */
397 { REG_COM7, 0x45 }, /* VGA */
398
399 { REG_COM3, 0 }, { REG_COM14, 0 },
400 /* Mystery scaling numbers */
401 { 0x70, 0x3a }, { 0x71, 0x35 },
402 { 0x72, 0x11 }, { 0x73, 0xf0 },
403 { 0xa2, 0x02 }, { REG_COM10, 0x0 },
404
405 /* Gamma curve values */
406 { 0x7a, 0x20 }, { 0x7b, 0x10 },
407 { 0x7c, 0x1e }, { 0x7d, 0x35 },
408 { 0x7e, 0x5a }, { 0x7f, 0x69 },
409 { 0x80, 0x76 }, { 0x81, 0x80 },
410 { 0x82, 0x88 }, { 0x83, 0x8f },
411 { 0x84, 0x96 }, { 0x85, 0xa3 },
412 { 0x86, 0xaf }, { 0x87, 0xc4 },
413 { 0x88, 0xd7 }, { 0x89, 0xe8 },
414
415 /* AGC and AEC parameters. Note we start by disabling those features,
416 then turn them only after tweaking the values. */
417 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
418 { REG_GAIN, 0 }, { REG_AECH, 0 },
419 { REG_COM4, 0x40 }, /* magic reserved bit */
420 { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
421 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
422 { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
423 { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
424 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
425 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
426 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
427 { REG_HAECC7, 0x94 },
428 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
429
430 /* Almost all of these are magic "reserved" values. */
431 { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
432 { 0x16, 0x02 }, { REG_MVFP, 0x07|MVFP_MIRROR },
433 { 0x21, 0x02 }, { 0x22, 0x91 },
434 { 0x29, 0x07 }, { 0x33, 0x0b },
435 { 0x35, 0x0b }, { 0x37, 0x1d },
436 { 0x38, 0x71 }, { 0x39, 0x2a },
437 { REG_COM12, 0x78 }, { 0x4d, 0x40 },
438 { 0x4e, 0x20 }, { REG_GFIX, 0 },
439 { 0x6b, 0x4a }, { 0x74, 0x10 },
440 { 0x8d, 0x4f }, { 0x8e, 0 },
441 { 0x8f, 0 }, { 0x90, 0 },
442 { 0x91, 0 }, { 0x96, 0 },
443 { 0x9a, 0 }, { 0xb0, 0x84 },
444 { 0xb1, 0x0c }, { 0xb2, 0x0e },
445 { 0xb3, 0x82 }, { 0xb8, 0x0a },
446
447 /* More reserved magic, some of which tweaks white balance */
448 { 0x43, 0x0a }, { 0x44, 0xf0 },
449 { 0x45, 0x34 }, { 0x46, 0x58 },
450 { 0x47, 0x28 }, { 0x48, 0x3a },
451 { 0x59, 0x88 }, { 0x5a, 0x88 },
452 { 0x5b, 0x44 }, { 0x5c, 0x67 },
453 { 0x5d, 0x49 }, { 0x5e, 0x0e },
454 { 0x6c, 0x0a }, { 0x6d, 0x55 },
455 { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
456 { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
457 { REG_RED, 0x60 },
458 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
459
460 /* Matrix coefficients */
461 { 0x4f, 0x80 }, { 0x50, 0x80 },
462 { 0x51, 0 }, { 0x52, 0x22 },
463 { 0x53, 0x5e }, { 0x54, 0x80 },
464 { 0x58, 0x9e },
465
466 { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
467 { 0x75, 0x05 }, { 0x76, 0xe1 },
468 { 0x4c, 0 }, { 0x77, 0x01 },
469 { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
470 { 0xc9, 0x60 }, { REG_COM16, 0x38 },
471 { 0x56, 0x40 },
472
473 { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO },
474 { 0xa4, 0x88 }, { 0x96, 0 },
475 { 0x97, 0x30 }, { 0x98, 0x20 },
476 { 0x99, 0x30 }, { 0x9a, 0x84 },
477 { 0x9b, 0x29 }, { 0x9c, 0x03 },
478 { 0x9d, 0x4c }, { 0x9e, 0x3f },
479 { 0x78, 0x04 },
480
481 #endif
482 #if 0
483 /* AGC and AEC parameters. Note we start by disabling those features,
484 then turn them only after tweaking the values. */
485 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
486 /* { REG_GAIN, 0 }, { REG_AECH, 0 },*/
487 // { REG_COM4, 0x40 }, /* magic reserved bit */
488 // { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
489 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
490 { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
491 { REG_VPT, 0xe3 },/* { REG_HAECC1, 0x78 },
492 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, *//* magic *//*
493 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
494 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
495 { REG_HAECC7, 0x94 },*/
496 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
497 #endif
498 {0xff, 0xff}, /* END MARKER */
499 };
500
501 /* Probe the I2C bus and initialise the sensor chip */
502 int stk_sensor_init(struct stk_camera *dev)
503 {
504 u8 idl = 0;
505 u8 idh = 0;
506
507 if (stk_camera_write_reg(dev, STK_IIC_ENABLE, STK_IIC_ENABLE_YES)
508 || stk_camera_write_reg(dev, STK_IIC_ADDR, SENSOR_ADDRESS)
509 || stk_sensor_outb(dev, REG_COM7, COM7_RESET)) {
510 STK_ERROR("Sensor resetting failed\n");
511 return -ENODEV;
512 }
513 msleep(10);
514 /* Read the manufacturer ID: ov = 0x7FA2 */
515 if (stk_sensor_inb(dev, REG_MIDH, &idh)
516 || stk_sensor_inb(dev, REG_MIDL, &idl)) {
517 STK_ERROR("Strange error reading sensor ID\n");
518 return -ENODEV;
519 }
520 if (idh != 0x7F || idl != 0xA2) {
521 STK_ERROR("Huh? you don't have a sensor from ovt\n");
522 return -ENODEV;
523 }
524 if (stk_sensor_inb(dev, REG_PID, &idh)
525 || stk_sensor_inb(dev, REG_VER, &idl)) {
526 STK_ERROR("Could not read sensor model\n");
527 return -ENODEV;
528 }
529 stk_sensor_write_regvals(dev, ov_initvals);
530 msleep(10);
531 STK_INFO("OmniVision sensor detected, id %02X%02X"
532 " at address %x\n", idh, idl, SENSOR_ADDRESS);
533 return 0;
534 }
535
536 /* V4L2_PIX_FMT_UYVY */
537 static struct regval ov_fmt_uyvy[] = {
538 {REG_TSLB, TSLB_YLAST|0x08 },
539 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
540 { 0x50, 0x80 }, /* "matrix coefficient 2" */
541 { 0x51, 0 }, /* vb */
542 { 0x52, 0x22 }, /* "matrix coefficient 4" */
543 { 0x53, 0x5e }, /* "matrix coefficient 5" */
544 { 0x54, 0x80 }, /* "matrix coefficient 6" */
545 {REG_COM13, COM13_UVSAT|COM13_CMATRIX},
546 {REG_COM15, COM15_R00FF },
547 {0xff, 0xff}, /* END MARKER */
548 };
549 /* V4L2_PIX_FMT_YUYV */
550 static struct regval ov_fmt_yuyv[] = {
551 {REG_TSLB, 0 },
552 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
553 { 0x50, 0x80 }, /* "matrix coefficient 2" */
554 { 0x51, 0 }, /* vb */
555 { 0x52, 0x22 }, /* "matrix coefficient 4" */
556 { 0x53, 0x5e }, /* "matrix coefficient 5" */
557 { 0x54, 0x80 }, /* "matrix coefficient 6" */
558 {REG_COM13, COM13_UVSAT|COM13_CMATRIX},
559 {REG_COM15, COM15_R00FF },
560 {0xff, 0xff}, /* END MARKER */
561 };
562
563 /* V4L2_PIX_FMT_RGB565X rrrrrggg gggbbbbb */
564 static struct regval ov_fmt_rgbr[] = {
565 { REG_RGB444, 0 }, /* No RGB444 please */
566 {REG_TSLB, 0x00},
567 { REG_COM1, 0x0 },
568 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
569 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
570 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
571 { 0x51, 0 }, /* vb */
572 { 0x52, 0x3d }, /* "matrix coefficient 4" */
573 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
574 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
575 { REG_COM13, COM13_GAMMA },
576 { REG_COM15, COM15_RGB565|COM15_R00FF },
577 { 0xff, 0xff },
578 };
579
580 /* V4L2_PIX_FMT_RGB565 gggbbbbb rrrrrggg */
581 static struct regval ov_fmt_rgbp[] = {
582 { REG_RGB444, 0 }, /* No RGB444 please */
583 {REG_TSLB, TSLB_BYTEORD },
584 { REG_COM1, 0x0 },
585 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
586 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
587 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
588 { 0x51, 0 }, /* vb */
589 { 0x52, 0x3d }, /* "matrix coefficient 4" */
590 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
591 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
592 { REG_COM13, COM13_GAMMA },
593 { REG_COM15, COM15_RGB565|COM15_R00FF },
594 { 0xff, 0xff },
595 };
596
597 /*FIXME BROKEN */
598 static struct regval ov_fmt_rgb444[] = {
599 { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
600 { REG_COM1, 0x00 }, /* Magic reserved bit */
601 // { REG_COM15, COM15_R01FE|COM15_RGB555 }, /* Data range needed? */
602 { REG_COM15, 0x00 }, /* Data range needed? */
603 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
604 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
605 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
606 { 0x51, 0 }, /* vb */
607 { 0x52, 0x3d }, /* "matrix coefficient 4" */
608 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
609 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
610 //{ REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
611 { REG_COM13, COM13_GAMMA|0x2 }, /* Magic rsvd bit */
612 { 0xff, 0xff },
613 };
614
615 /* V4L2_PIX_FMT_SRGGB8 */
616 static struct regval ov_fmt_bayer[] = {
617 /* This changes color order */
618 {REG_TSLB, 0x40}, /* BGGR */
619 /* {REG_TSLB, 0x08}, */ /* BGGR with vertical image flipping */
620 {REG_COM15, COM15_R00FF },
621 {0xff, 0xff}, /* END MARKER */
622 };
623 /*
624 * Store a set of start/stop values into the camera.
625 */
626 static int stk_sensor_set_hw(struct stk_camera *dev,
627 int hstart, int hstop, int vstart, int vstop)
628 {
629 int ret;
630 unsigned char v;
631 /*
632 * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
633 * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
634 * a mystery "edge offset" value in the top two bits of href.
635 */
636 ret = stk_sensor_outb(dev, REG_HSTART, (hstart >> 3) & 0xff);
637 STK_DEBUG("HSTART: 0x%02x <- 0x%02x\n", REG_HSTART, (hstart>>3)&0xff);
638 ret += stk_sensor_outb(dev, REG_HSTOP, (hstop >> 3) & 0xff);
639 STK_DEBUG("HSTOP: 0x%02x <- 0x%02x\n", REG_HSTOP, (hstop>>3)&0xff);
640 ret += stk_sensor_inb(dev, REG_HREF, &v);
641 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
642 msleep(10);
643 ret += stk_sensor_outb(dev, REG_HREF, v);
644 STK_DEBUG("HREF: 0x%02x <- 0x%02x\n", REG_HREF, v);
645 /*
646 * Vertical: similar arrangement (note: this is different from ov7670.c)
647 */
648 ret += stk_sensor_outb(dev, REG_VSTART, (vstart >> 3) & 0xff);
649 STK_DEBUG("VSTART: 0x%02x <- 0x%02x\n", REG_VSTART, (vstart>>3)&0xff);
650 ret += stk_sensor_outb(dev, REG_VSTOP, (vstop >> 3) & 0xff);
651 STK_DEBUG("VSTOP: 0x%02x <- 0x%02x\n", REG_VSTOP, (vstop>>3)&0xff);
652 ret += stk_sensor_inb(dev, REG_VREF, &v);
653 v = (v & 0xc0) | ((vstop & 0x7) << 3) | (vstart & 0x7);
654 msleep(10);
655 ret += stk_sensor_outb(dev, REG_VREF, v);
656 STK_DEBUG("VREF: 0x%02x <- 0x%02x\n", REG_VREF, v);
657 return ret;
658 }
659
660
661 int stk_sensor_configure(struct stk_camera *dev)
662 {
663 int com7;
664 /*
665 * We setup the sensor to output dummy lines in low-res modes,
666 * so we don't get absurdly hight framerates.
667 */
668 unsigned dummylines;
669 int flip;
670 struct regval *rv;
671
672 switch (dev->vsettings.mode) {
673 case MODE_QCIF: com7 = COM7_FMT_QCIF;
674 dummylines = 604;
675 STK_DEBUG("QCIF mode\n");
676 break;
677 case MODE_QVGA: com7 = COM7_FMT_QVGA;
678 dummylines = 267;
679 STK_DEBUG("QVGA mode\n");
680 break;
681 case MODE_CIF: com7 = COM7_FMT_CIF;
682 dummylines = 412;
683 STK_DEBUG("CIF mode\n");
684 break;
685 case MODE_VGA: com7 = COM7_FMT_VGA;
686 dummylines = 11;
687 STK_DEBUG("VGA mode\n");
688 break;
689 case MODE_SXGA: com7 = COM7_FMT_SXGA;
690 dummylines = 0;
691 STK_DEBUG("SXGA mode\n");
692 break;
693 default: STK_ERROR("Unsupported mode %d\n", dev->vsettings.mode);
694 return -EFAULT;
695 }
696 switch (dev->vsettings.palette) {
697 case V4L2_PIX_FMT_UYVY:
698 com7 |= COM7_YUV;
699 rv = ov_fmt_uyvy;
700 STK_DEBUG("YUV(UYVY) mode\n");
701 break;
702 case V4L2_PIX_FMT_YUYV:
703 com7 |= COM7_YUV;
704 rv = ov_fmt_yuyv;
705 STK_DEBUG("YUV(YUVY) mode\n");
706 break;
707 case V4L2_PIX_FMT_RGB565:
708 com7 |= COM7_RGB;
709 rv = ov_fmt_rgbp;
710 STK_DEBUG("RGBP mode\n");
711 break;
712 case V4L2_PIX_FMT_RGB565X:
713 com7 |= COM7_RGB;
714 rv = ov_fmt_rgbr;
715 STK_DEBUG("RGBR mode\n");
716 break;
717 case V4L2_PIX_FMT_SBGGR8:
718 com7 |= COM7_PBAYER;
719 rv = ov_fmt_bayer;
720 STK_DEBUG("Raw bayer mode\n");
721 break;
722 case V4L2_PIX_FMT_RGB444:
723 com7 |= COM7_RGB;
724 rv = ov_fmt_rgb444;
725 STK_DEBUG("RGB444 mode\n");
726 break;
727 default: STK_ERROR("Unsupported colorspace\n");
728 return -EFAULT;
729 }
730 //FIXME sometimes the sensor go to a bad state
731 //stk_sensor_write_regvals(dev, ov_initvals);
732 stk_sensor_outb(dev, REG_COM7, com7);
733 msleep(50);
734 stk_sensor_write_regvals(dev, rv);
735 flip = (dev->vsettings.vflip?MVFP_FLIP:0)
736 | (dev->vsettings.hflip?MVFP_MIRROR:0);
737 stk_sensor_outb(dev, REG_MVFP, flip);
738 if (dev->vsettings.palette == V4L2_PIX_FMT_SBGGR8
739 && !dev->vsettings.vflip)
740 stk_sensor_outb(dev, REG_TSLB, 0x08);
741 stk_sensor_outb(dev, REG_ADVFH, dummylines >> 8);
742 stk_sensor_outb(dev, REG_ADVFL, dummylines & 0xff);
743 msleep(50);
744 switch (dev->vsettings.mode) {
745 case MODE_VGA:
746 if (stk_sensor_set_hw(dev, 302, 1582, 6, 486))
747 STK_ERROR("stk_sensor_set_hw failed (VGA)\n");
748 break;
749 case MODE_SXGA:
750 case MODE_CIF:
751 case MODE_QVGA:
752 case MODE_QCIF:
753 /*FIXME These settings seem ignored by the sensor
754 if (stk_sensor_set_hw(dev, 220, 1500, 10, 1034))
755 STK_ERROR("stk_sensor_set_hw failed (SXGA)\n");
756 */
757 break;
758 }
759 msleep(10);
760 return 0;
761 }
762
763 int stk_sensor_set_brightness(struct stk_camera *dev, int br)
764 {
765 if (br < 0 || br > 0xff)
766 return -EINVAL;
767 STK_DEBUG("%s: %d\n", __FUNCTION__, br);
768 stk_sensor_outb(dev, REG_AEB, max(0x00, br - 6));
769 stk_sensor_outb(dev, REG_AEW, min(0xff, br + 6));
770 return 0;
771 }
772
Experimental and unofficial branch of driver for syntek webcams