regusage.h

   1 enum RegisterAccess {
   2         RA_NONE = 0,
   3         RA_READ = 1 << 0,
   4         RA_WRITE = 1 << 1,
   5         RA_READWRITE = 1 << 2,
   6 };
   7
   8 #pragma(pack(push, 1))
   9 struct regaccess_info {
  10         /* enum RegisterAccess */ unsigned char ra_reg1;
  11         /* enum RegisterAccess */ unsigned char ra_reg2;
  12         /* enum RegisterAccess */ unsigned char ra_mar;
  13         /* enum RegisterAccess */ unsigned char ra_sp;
  14 };
  15 #pragma(pack(pop))
  16
  17 static const struct regaccess_info regaccess_info[] = {
  18         [0] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  19         [SCMD_ADD] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
  20         [SCMD_SUB] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
  21         [SCMD_REGTOREG] = {RA_READ, RA_WRITE, RA_NONE, RA_NONE},
  22         [SCMD_WRITELIT] = {RA_NONE, RA_NONE, RA_READ, RA_NONE},
  23         [SCMD_RET] = {RA_NONE, RA_NONE, RA_NONE, RA_READWRITE},
  24         [SCMD_LITTOREG] = {RA_WRITE, RA_NONE, RA_NONE, RA_NONE},
  25         [SCMD_MEMREAD] = {RA_WRITE, RA_NONE, RA_READ, RA_NONE},
  26         [SCMD_MEMWRITE] = {RA_READ, RA_NONE, RA_READ, RA_NONE},
  27         [SCMD_MULREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  28         [SCMD_DIVREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  29         [SCMD_ADDREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  30         [SCMD_SUBREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  31         [SCMD_BITAND] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  32         [SCMD_BITOR] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  33         [SCMD_ISEQUAL] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  34         [SCMD_NOTEQUAL] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  35         [SCMD_GREATER] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  36         [SCMD_LESSTHAN] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  37         [SCMD_GTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  38         [SCMD_LTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  39         [SCMD_AND] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE}, /*logical*/
  40         [SCMD_OR] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  41         [SCMD_CALL] = {RA_READ, RA_NONE, RA_NONE, RA_READWRITE},
  42         [SCMD_MEMREADB] = {RA_WRITE, RA_NONE, RA_READ, RA_NONE},
  43         [SCMD_MEMREADW] = {RA_WRITE, RA_NONE, RA_READ, RA_NONE},
  44         [SCMD_MEMWRITEB] = {RA_READ, RA_NONE, RA_READ, RA_NONE},
  45         [SCMD_MEMWRITEW] = {RA_READ, RA_NONE, RA_READ, RA_NONE},
  46         [SCMD_JZ] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  47         [SCMD_PUSHREG] = {RA_READ, RA_NONE, RA_NONE, RA_READWRITE},
  48         [SCMD_POPREG] = {RA_WRITE, RA_NONE, RA_NONE, RA_READWRITE},
  49         [SCMD_JMP] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  50         [SCMD_MUL] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
  51         [SCMD_CALLEXT] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
  52         [SCMD_PUSHREAL] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
  53         [SCMD_SUBREALSTACK] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
  54         [SCMD_LINENUM] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  55         [SCMD_CALLAS] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
  56         [SCMD_THISBASE] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  57         [SCMD_NUMFUNCARGS] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  58         [SCMD_MODREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  59         [SCMD_XORREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  60         [SCMD_NOTREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  61         [SCMD_SHIFTLEFT] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  62         [SCMD_SHIFTRIGHT] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  63         [SCMD_CALLOBJ] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
  64         [SCMD_CHECKBOUNDS] = {RA_READ, RA_NONE, RA_NONE, RA_NONE},
  65         [SCMD_MEMWRITEPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
  66         [SCMD_MEMREADPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
  67         [SCMD_MEMZEROPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  68         [SCMD_MEMINITPTR] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
  69         [SCMD_LOADSPOFFS] = {RA_NONE, RA_NONE, RA_WRITE, RA_NONE},
  70         [SCMD_CHECKNULL] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  71         [SCMD_FADD] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
  72         [SCMD_FSUB] = {RA_READWRITE, RA_NONE, RA_NONE, RA_NONE},
  73         [SCMD_FMULREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  74         [SCMD_FDIVREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  75         [SCMD_FADDREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  76         [SCMD_FSUBREG] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  77         [SCMD_FGREATER] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  78         [SCMD_FLESSTHAN] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  79         [SCMD_FGTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  80         [SCMD_FLTE] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  81         [SCMD_ZEROMEMORY] = {RA_NONE, RA_NONE, RA_READ, RA_NONE},
  82         [SCMD_CREATESTRING] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
  83         [SCMD_STRINGSEQUAL] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  84         [SCMD_STRINGSNOTEQ] = {RA_READWRITE, RA_READ, RA_NONE, RA_NONE},
  85         [SCMD_CHECKNULLREG] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
  86         [SCMD_LOOPCHECKOFF] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  87         [SCMD_MEMZEROPTRND] = {RA_NONE, RA_NONE, RA_READ, RA_NONE},
  88         [SCMD_JNZ] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE},
  89         [SCMD_DYNAMICBOUNDS] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
  90         [SCMD_NEWARRAY] = {RA_NONE, RA_NONE, RA_NONE, RA_NONE}, //TODO
  91 };
  92
  93 enum RegisterUsage {
  94         RU_NONE = 0,
  95         RU_READ = 1 << 0,
  96         RU_WRITE = 1 << 1,
  97         RU_WRITE_AFTER_READ = 1 << 2,
  98 };
  99
 100 static enum RegisterUsage get_reg_usage(int regno, enum RegisterUsage old, enum RegisterAccess ra) {
 101         enum RegisterUsage ru = old;
 102         switch(ra) {
 103         case RA_READ:
 104                 if(ru == RU_NONE || ru == RU_READ) ru = RU_READ;
 105                 else if(ru == RU_WRITE);
 106                 else if(ru == RU_WRITE_AFTER_READ);
 107                 break;
 108         case RA_WRITE:
 109                 if(ru == RU_NONE || ru == RU_WRITE) ru = RU_WRITE;
 110                 else if(ru == RU_READ) ru = RU_WRITE_AFTER_READ;
 111                 else if(ru == RU_WRITE_AFTER_READ);
 112                 break;
 113         case RA_READWRITE:
 114                 if(ru == RU_NONE || ru == RU_READ) ru = RU_WRITE_AFTER_READ;
 115                 else if(ru == RU_WRITE);
 116                 else if(ru == RU_WRITE_AFTER_READ);
 117                 break;
 118         }
 119         return ru;
 120 }
 121