Have sign-extend-complex deal correctly with bytes of size 0.
[movitz-ia-x86.git] / instr-add.lisp
blob21626dd6d79e0e4882a6e62c035e19efe966fd74
1 ;;;;------------------------------------------------------------------
2 ;;;;
3 ;;;; Copyright (C) 2001-2004,
4 ;;;; Department of Computer Science, University of Tromso, Norway
5 ;;;;
6 ;;;; Filename: instr-add.lisp
7 ;;;; Description: Addition-related instructions.
8 ;;;; Author: Frode Vatvedt Fjeld <frodef@acm.org>
9 ;;;; Created at: Sat Jan 29 20:20:18 2000
10 ;;;; Distribution: See the accompanying file COPYING.
11 ;;;;
12 ;;;; $Id: instr-add.lisp,v 1.3 2004/06/21 07:32:56 ffjeld Exp $
13 ;;;;
14 ;;;;------------------------------------------------------------------
16 (in-package #:ia-x86-instr)
18 ;;; ----------------------------------------------------------------
19 ;;; ADD [IISR page 11-22]
20 ;;; ----------------------------------------------------------------
22 (def-instr add (instruction))
24 (def-instr addb (add)
25 (:plain #x04 (0 1) (imm8 al))
26 (:digit (#x80 0) 1 (imm8 r/m8))
27 (:r #x00 (r8 r/m8))
28 (:r #x02 (r/m8 r8)))
30 (def-instr addw (add)
31 (:plain #x05 (0 2) (imm16 ax) :operand-mode :16-bit)
32 (:digit (#x81 0) 2 (imm16 r/m16) :operand-mode :16-bit)
33 (:digit (#x83 0) 1 (imm8 r/m16) :operand-mode :16-bit) ; sign-extend
34 (:r #x01 (r16 r/m16) :operand-mode :16-bit)
35 (:r #x03 (r/m16 r16) :operand-mode :16-bit))
37 (def-instr addl (add)
38 (:plain #x05 (0 4) (simm32 eax) :operand-mode :32-bit)
39 (:digit (#x81 0) 4 (simm32 r/m32) :operand-mode :32-bit)
40 (:digit (#x83 0) 1 (simm8 r/m32) :operand-mode :32-bit)
41 (:r #x01 (r32 r/m32) :operand-mode :32-bit)
42 (:r #x03 (r/m32 r32) :operand-mode :32-bit))
44 ;;; ----------------------------------------------------------------
45 ;;; ADC - add with carry [IISR page 11-20]
46 ;;; ----------------------------------------------------------------
48 (def-instr adc (instruction))
49 (def-instr adcb (adc)
50 (:plain #x14 (0 1) (imm8 al))
51 (:digit (#x80 2) 1 (imm8 r/m8))
52 (:r #x10 (r8 r/m8))
53 (:r #x12 (r/m8 r8)))
55 (def-instr adcw (adc)
56 (:plain #x15 (0 2) (imm16 ax) :operand-mode :16-bit)
57 (:digit (#x81 2) 2 (imm16 r/m16) :operand-mode :16-bit)
58 (:digit (#x83 2) 1 (imm8 r/m16) :operand-mode :16-bit) ; sign-extend
59 (:r #x11 (r16 r/m16) :operand-mode :16-bit)
60 (:r #x13 (r/m16 r16) :operand-mode :16-bit))
62 (def-instr adcl (adc)
63 (:plain #x15 (0 4) (simm32 eax) :operand-mode :32-bit)
64 (:digit (#x81 2) 4 (simm32 r/m32) :operand-mode :32-bit)
65 (:digit (#x83 2) 1 (simm8 r/m32) :operand-mode :32-bit)
66 (:r #x11 (r32 r/m32) :operand-mode :32-bit)
67 (:r #x13 (r/m32 r32) :operand-mode :32-bit))
69 ;;; ----------------------------------------------------------------
70 ;;; INC [IISR page 11-211]
71 ;;; ----------------------------------------------------------------
73 (def-instr inc (instruction))
75 (def-instr incb (inc)
76 (:digit (#xfe 0) 0 (r/m8)))
78 (def-instr incw (inc)
79 (:+ #x40 0 (+r16) :operand-mode :16-bit)
80 (:digit (#xff 0) 0 (r/m16) :operand-mode :16-bit))
82 (def-instr incl (inc)
83 (:+ #x40 0 (+r32) :operand-mode :32-bit)
84 (:digit (#xff 0) 0 (r/m32) :operand-mode :32-bit))
86 ;;; Exchange and add
88 (def-instr xadd (add))
89 (def-instr xaddb (xadd) (:r #x0fc0 (r8 r/m8)))
90 (def-instr xaddw (xadd) (:r #x0fc1 (r16 r/m16) :operand-mode :16-bit))
91 (def-instr xaddl (xadd) (:r #x0fc1 (r32 r/m32) :operand-mode :32-bit))