marmot.h

   1 /*
   2  * marmot.h --
   3  *
   4  *      Marmot definitions.
   5  */
   6
   7 #ifndef _MARMOT_H
   8 #define _MARMOT_H
   9
  10 #include <types.h>
  11 #ifndef ASM
  12 #include <cpu.h>
  13 #endif
  14
  15 /*
  16  * Used for the scheduler.  Timekeeping is controlled by the RTC
  17  * (until high precision timing is needed).
  18  */
  19
  20 #define TICK_Hz 64
  21
  22
  23 /*
  24  * e820 memory map space is statically allocated in .bss.  64 entries
  25  * *should* be enough.
  26  */
  27
  28 #define MAX_E820 64
  29
  30 /* "SMAP" */
  31 #define SMAP     0x534d4150
  32
  33 /* "_MP_" */
  34 #define MP_MAGIC 0x5f504d5f
  35
  36
  37 /*
  38  * Memmap for init code:
  39  *
  40  *       0 - 0x0fff  BIOS data area
  41  *   0x1000 - 0x1f00  IDT (240 entries)
  42  *   0x1f00 - 0x2000  GDT (16 entries)
  43  *   0x2000 - 0x3000  Page map level 4
  44  *   0x3000 - 0x4000  Page directory pointer table
  45  *   0x4000 - 0x5000  Page directory
  46  *   0x5000 - 0x6000  Page table
  47  *   0x5800 - 0x6000  Stack (real mode)
  48  *   0x6000 - 0x7f00  bss
  49  *   0x7f00 - 0x8000  TSS (0x68 + 8 bytes == rounded up 0x100)
  50  *   0x7000 - 0x8000  Boot code
  51  *   0x8000 - 0x10000 Loader
  52  *  0x10000 - 0x18000 Stack (protected/long mode)
  53  *
  54  */
  55
  56 #define IDT      0x1000
  57 #define GDT      0x1f00
  58 #define TSS      0x7f00
  59
  60 #define PML4BASE 0x2000
  61 #define PDPTBASE 0x3000
  62 #define PDBASE   0x4000
  63 #define PTBASE   0x5000
  64 #define PAGETOP  0x6000
  65
  66 #define STACKTOP 0x18000
  67
  68 /*
  69  * Descriptors.
  70  */
  71
  72 #define CS32     0x0008
  73 #define CS64     0x0010
  74 #define DS       0x0018
  75 #define TS       0x0020
  76 #define CSPRIV   0x0032
  77 #define DSPRIV   0x003a
  78 #define CSUSER   0x0043
  79 #define DSUSER   0x004b
  80
  81
  82 /*
  83  * System virtual memory layout.
  84  */
  85
  86 /* Loader uses identity mapped pages. */
  87 #define MM_VA_LOADER_START 0
  88
  89 /* Kernel gets from 4GB to PRIV_START */
  90 #define MM_VA_KERNEL_START 0x0000000100000000
  91
  92 /* Privileged processes get from 64GB to USER_START */
  93 #define MM_VA_PRIV_START   0x0000001000000000
  94
  95 /* User gets the rest. */
  96 #define MM_VA_USER_START   0x0000100000000000
  97
  98 /* Top of canonical address space */
  99 #define MM_VA_CANONICAL_TOP 0x0000800000000000
 100
 101
 102 /*
 103  * Magic values for PageAlloc and GetFreePA.
 104  */
 105
 106 #define MM_VA_DONT_CARE (-1ULL)
 107 #define MM_VA_INVALID   (-2ULL)
 108 #define MM_VA_IDENT     (-3ULL)
 109 #define MM_PA_INVALID   (-4ULL)
 110 #define MM_VA_HEAP      (-5ULL)
 111
 112 #define MM_RW (1 << 1)
 113 #define MM_NX (1 << 63)
 114
 115 /*
 116  * Physmem pools used by GetFreePA.
 117  */
 118
 119 #define POOL_IDENT      0
 120 #define POOL_KERNEL     1
 121 #define POOL_PRIVILEGED 2
 122 #define POOL_USER       3
 123
 124
 125 #define NULL 0
 126
 127 #define PAGE_SIZE 4096
 128
 129
 130 /*
 131  * Various kernel-level stacks.  All are allocated just below the top
 132  * of kernel memory.
 133  *
 134  *      FAULT_STACK     - 2 page stack used by normal fault handlers
 135  *      CRITICAL_STACK  - 4 page stack for #MC, #DF and #NMI.
 136  *      IRQ_STACK       - 2 page stack for all IRQs
 137  *      KERNEL_STACK    - Regular kernel stack.  Grows as needed.
 138  */
 139
 140 #define FAULT_STACK_TOP       MM_VA_PRIV_START
 141 #define FAULT_STACK_BOTTOM    (FAULT_STACK_TOP - 2 * PAGE_SIZE)
 142
 143 #define CRITICAL_STACK_TOP    FAULT_STACK_BOTTOM
 144 #define CRITICAL_STACK_BOTTOM (CRITICAL_STACK_TOP - 4 * PAGE_SIZE)
 145
 146 #define IRQ_STACK_TOP         CRITICAL_STACK_BOTTOM
 147 #define IRQ_STACK_BOTTOM      (IRQ_STACK_TOP - 2 * PAGE_SIZE)
 148
 149 #define KERNEL_STACK_TOP      IRQ_STACK_BOTTOM
 150
 151
 152 /* #define KERNEL_TEXT_START     0x0000000100000000 */
 153 /* #define KERNEL_DATA_START     0x0000000100000000 */
 154 /* #define KERNEL_BSS_START      0x0000000100000000 */
 155 #define KERNEL_HEAP_START     0x0000000800000000
 156 #define MM_VA_KERNEL_HEAP     KERNEL_HEAP_START
 157 #define PRIV_HEAP_START       0x0000008000000000
 158 #define MM_VA_PRIV_HEAP       PRIV_HEAP_START
 159 #define USER_HEAP_START       0x0000800000000000
 160 #define MM_VA_USER_HEAP       USER_HEAP_START
 161
 162
 163 /* MSRs */
 164
 165 /* aka IA32_TIME_STAMP_COUNTER */
 166 #define TSC_MSR       0x10
 167
 168 /* aka IA32_APIC_BASE */
 169 #define APIC_BASE_MSR 0x1b
 170
 171 /* aka IA32_EFER */
 172 #define EFER          0xc0000080
 173
 174 /* syscall enable (r/w) */
 175 #define EFER_SCE      0
 176
 177 /* long mode enable (r/w) */
 178 #define EFER_LME      8
 179
 180 /* long mode active (r) */
 181 #define EFER_LMA      10
 182
 183 /* execute disable bit enable (r/w) */
 184 #define EFER_NXE      11
 185
 186
 187 /*
 188  * IRQ vectors.  These are the same in both PIC/APIC mode.
 189  */
 190
 191 #define IRQBASE     0x20
 192 #define PIT_IRQ     0x20
 193 #define KBD_IRQ     0x21
 194 #define SERIAL1_IRQ 0x23
 195 #define SERIAL0_IRQ 0x24
 196 #define FDD_IRQ     0x26
 197 #define PIO_IRQ     0x27
 198 #define RTC_IRQ     0x28
 199 #define MOUSE_IRQ   0x2c
 200
 201
 202 #define MOUSE_SAMPLE_RATE 100
 203
 204
 205 /*
 206  * RGBA color values.
 207  */
 208
 209 #define COLOR_INVALID         0x00ffffff
 210
 211 #define COLOR_BLACK           0xff000000
 212 #define COLOR_WHITE           0xffffffff
 213 #define COLOR_RED             0xffff0000
 214 #define COLOR_GREEN           0xff00ff00
 215 #define COLOR_BLUE            0xff0000ff
 216 #define COLOR_PLEASING_GREEN  0xff73dba2
 217 #define COLOR_PURPLE          0xffff00ff
 218 #define COLOR_ROBINs_PURPLE   0xff8800ff
 219
 220 #define BOOT_BACKGROUND_COLOR COLOR_PLEASING_GREEN
 221
 222
 223 #ifndef ASM
 224
 225 typedef struct {
 226    uint64 errorCode;
 227    uint64 rip;
 228    uint64 cs;
 229    uint64 rflags;
 230    uint64 rsp;
 231    uint64 ss;
 232 } __attribute__((packed)) ExcFrame;
 233
 234
 235 /* global vprobe point for GUEST:test */
 236 extern volatile uint64 tval, tval2;
 237 #define TEST_VPROBE(v1,v2) do { tval = (v1); tval2 = (v2); \
 238                                 asm("sfence\n.global test\ntest:\n");  \
 239                               } while (0)
 240
 241
 242 #define BUG_ASSERT        0
 243 #define BUG_UNIMPLEMENTED 1
 244 #define BUG_MISC          2
 245
 246 #define ASSERT(c) if (!(c)) { Bug(BUG_ASSERT, #c, __FILE__, __LINE__); }
 247 #define UNIMPLEMENTED(what) Bug(BUG_UNIMPLEMENTED, what, __FILE__, __LINE__)
 248 void Bug(uint64, char *, char *, uint64);
 249
 250 static inline void
 251 cli(void)
 252 {
 253    __asm__ __volatile__("cli");
 254 }
 255
 256 static inline void
 257 sti(void)
 258 {
 259    __asm__ __volatile__("sti");
 260 }
 261
 262 static inline void
 263 outb(uint8 val, uint16 port)
 264 {
 265    __asm__ __volatile__("outb %b0, %w1" : : "a" (val), "Nd" (port));
 266 }
 267
 268 static inline uint8
 269 inb(uint16 port)
 270 {
 271    uint8 val;
 272
 273    __asm__ __volatile__("inb %w1, %0" : "=a" (val) : "Nd" (port));
 274    return val;
 275 }
 276
 277 static inline void
 278 outl(uint32 val, uint16 port)
 279 {
 280    __asm__ __volatile__("outl %0, %w1" : : "a" (val), "Nd" (port));
 281 }
 282
 283 static inline uint32
 284 inl(uint16 port)
 285 {
 286    uint32 val;
 287
 288    __asm__ __volatile__("inl %w1, %0" : "=a" (val) : "Nd" (port));
 289    return val;
 290 }
 291
 292
 293
 294 #define invlpg(m) __asm__ __volatile__("invlpg (%0)":: "r" (m) : "memory");
 295 #define rdmsr(msr,val) do { uint32 _a, _d; \
 296                             __asm__ __volatile__("rdmsr" \
 297                                                  : "=a" (_a), "=d" (_d) \
 298                                                  : "c" (msr));  \
 299                             val = (uint64)_a | ((uint64)_d << 32);\
 300                           } while (0)
 301 #define wrmsr(msr,val) do { uint32 _a, _d; \
 302                             _a = (uint32)val; \
 303                             _d = (uint32)(val >> 32); \
 304                             __asm__ __volatile__("wrmsr" \
 305                                                  : \
 306                                                  : "c" (msr), "a" (_a), "d" (_d)); \
 307                           } while(0)
 308
 309
 310 #define __init __attribute__((section(".loader")))
 311
 312 extern uint16 xResolution;
 313 extern uint16 yResolution;
 314
 315 typedef uint64 CbID;
 316 typedef void (*MouseCBFun)(uint8 *, uint64);
 317
 318 struct MouseCB {
 319    struct MouseCB *next;
 320    CbID id;
 321    MouseCBFun cb;
 322 };
 323
 324 CbID InstallMouseCB(MouseCBFun cb);
 325 void RemoveMouseCB(CbID id);
 326
 327
 328 void bzero(void *s, uint64 n);
 329 void bcopy(void *s, void *d, uint64 n);
 330 void bfill(void *s, uint64 n, uint8 val);
 331
 332 uint64 strlen(char *s);
 333
 334 void *alloc(size_t amt);
 335 void free(void *mem);
 336
 337 VA RegionAlloc(VA desired, uint64 nPages, uint64 flags);
 338 VA PageAlloc(VA desired, uint64 flags);
 339 void MapIORegion(PA start, PA end, char *name);
 340
 341
 342 void TaskSchedule(uint64);
 343
 344
 345 void SetPixel(Color color, Point p);
 346 void PrintMessage(Color color, Point where, char *msg);
 347 void ColorRectangle(Color color, Point c0, Point c1);
 348 void ColorTriangle(Color color, Point c0, Point c1, Point c2);
 349 void ColorCircle(Color color, Point center, Length radius);
 350
 351
 352 void MaskPIC(uint8 irq);
 353 void UnmaskPIC(uint8 irq);
 354
 355
 356 /*
 357  * Stub routines in interrupt.S
 358  */
 359
 360 void _IRQStub_PIT(void);
 361 void _IRQStub_KBD(void);
 362 void _IRQStub_RTC(void);
 363 void _IRQStub_MOUSE(void);
 364
 365 #endif /* !ASM */
 366 #endif