From 75a1391aed30a941baa85a28ff2bae9562ac514a Mon Sep 17 00:00:00 2001
From: Oyvind Harboe <oyvind.harboe@zylin.com>
Date: Thu, 8 Jan 2009 15:21:21 +0100
Subject: [PATCH] Added -mno-memreg to use CALL for registers. -mmemreg now
 uses global variable _memreg + offset

---
 toolchain/gcc/gcc/config/zpu/zpu.c | 51 +++++++++++++++++++++++++++++---------
 toolchain/gcc/gcc/config/zpu/zpu.h |  4 +++
 toolchain/gcc/libgloss/zpu/crt0.S  |  2 ++
 3 files changed, 45 insertions(+), 12 deletions(-)

diff --git a/toolchain/gcc/gcc/config/zpu/zpu.c b/toolchain/gcc/gcc/config/zpu/zpu.c
index 389f5664..d7c81230 100755
--- a/toolchain/gcc/gcc/config/zpu/zpu.c
+++ b/toolchain/gcc/gcc/config/zpu/zpu.c
@@ -139,6 +139,23 @@ static int addSpRange(rtx operand, int *found)
 	return -1;
 }
 
+static void pushHardReg(rtx reg)
+{
+	rtx regAddr=GEN_INT(REGNO(reg)*4);
+
+	if (TARGET_MEMREG)
+	  {
+	zpu_asm("im _memreg+%0", &regAddr);
+	zpu_asm("load", NULL);
+	  } else
+	    {
+	zpu_asm("im %0", &regAddr);
+  zpu_asm("im _regpush", NULL);
+  zpu_asm("call", NULL);
+	    }
+
+}
+
 static void pushRegAddress(rtx operand)
 {
 	/* painful handling of compatiblity with obscure case
@@ -146,12 +163,9 @@ static void pushRegAddress(rtx operand)
 	 */
 	int num;
 	rtx offset;
-	rtx regAddr;
 	
 	num=stackSlotNum(REGNO(operand));
-	regAddr=GEN_INT(REGNO(hard_frame_pointer_rtx)*4);
-	zpu_asm("im %0", &regAddr);
-	zpu_asm("load", NULL);
+	pushHardReg(hard_frame_pointer_rtx);
 	offset=GEN_INT(-(get_frame_size()+calcStackRegSize())+num*4);
 	zpu_immediate(&offset);
 	stackOffset+=4;
@@ -165,10 +179,7 @@ static void pushreg(rtx operand)
 	{
 		if (REGNO(operand)<R_NUM)
 		{
-			rtx addr;
-			addr=GEN_INT(REGNO(operand)*4);
-			zpu_asm("im %0", &addr);
-			zpu_asm("load", &operand);
+		  pushHardReg(operand);
 		} else
 		{
 			missingOperand();
@@ -192,16 +203,32 @@ static void pushreg(rtx operand)
 	}
 }
 
+static void popHardReg(rtx reg)
+{
+  rtx addr;
+  addr=GEN_INT(REGNO(reg)*4);
+
+  if (TARGET_MEMREG)
+    {
+  zpu_asm("im _memreg+%0", &addr);
+  zpu_asm("store", NULL);
+    } else
+      {
+  zpu_asm("im %0", &addr);
+  zpu_asm("im _regpop", NULL);
+  zpu_asm("call", NULL);
+
+      }
+
+}
+
 static void popreg(rtx operand)
 {
 	if (REGNO(operand)<R_STACK_REG)
 	{
 		if (REGNO(operand)<R_NUM)
 		{
-			rtx addr;
-			addr=GEN_INT(REGNO(operand)*4);
-			zpu_asm("im %0", &addr);
-			zpu_asm("store", &operand);
+		  popHardReg(operand);
 		}
 	} else if (REGNO(operand)<R_NUM)
 	{
diff --git a/toolchain/gcc/gcc/config/zpu/zpu.h b/toolchain/gcc/gcc/config/zpu/zpu.h
index 398fb006..3855c6ff 100755
--- a/toolchain/gcc/gcc/config/zpu/zpu.h
+++ b/toolchain/gcc/gcc/config/zpu/zpu.h
@@ -90,6 +90,7 @@ extern int target_flags;
 #define ZPU_POPPCREL (1<<22)
 #define ZPU_BYTESBIG (1<<23)
 #define ZPU_BITSBIG (1<<24)
+#define ZPU_MEMREG (1<<25)
 
 
 
@@ -121,6 +122,7 @@ extern int target_flags;
 #define TARGET_POPPCREL ((target_flags & ZPU_POPPCREL)!=0)
 #define TARGET_BYTESBIG ((target_flags & ZPU_BYTESBIG)!=0)
 #define TARGET_BITSBIG ((target_flags & ZPU_BITSBIG)!=0)
+#define TARGET_MEMREG ((target_flags & ZPU_MEMREG)!=0)
 
 
 #define TARGET_SWITCHES \
@@ -167,6 +169,8 @@ extern int target_flags;
     { "no-bytesbig", -ZPU_BYTESBIG, "Bytes big endian" },\
     { "bitsbig", ZPU_BITSBIG, "Bits big endian" },\
     { "no-bitsbig", -ZPU_BITSBIG, "Bits big endian" },\
+    { "memreg", ZPU_MEMREG, "Store r0-r3 in memory location 0-15" },\
+    { "no-memreg", -ZPU_MEMREG, "CALL _regpush and _regpop for r0-r3" },\
     { "", TARGET_SWITCHES_DEFAULT, "" }\
 }
 
diff --git a/toolchain/gcc/libgloss/zpu/crt0.S b/toolchain/gcc/libgloss/zpu/crt0.S
index 00870c4b..478fe7ff 100755
--- a/toolchain/gcc/libgloss/zpu/crt0.S
+++ b/toolchain/gcc/libgloss/zpu/crt0.S
@@ -152,7 +152,9 @@ Boston, MA 02111-1307, USA.  */
         .balign 32,0
 # offset 0x0000 0000
 		.globl _start
+			.globl _memreg
 _start:
+_memreg:
 		; intSp must be 0 when we jump to _premain
 		
 		im ZPU_ID
-- 
2.11.4.GIT