2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/list.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/usb.h>
34 #include <linux/moduleparam.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/debugfs.h>
38 #include "../core/hcd.h"
40 #include <asm/byteorder.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
46 /*-------------------------------------------------------------------------*/
49 * EHCI hc_driver implementation ... experimental, incomplete.
50 * Based on the final 1.0 register interface specification.
52 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
53 * First was PCMCIA, like ISA; then CardBus, which is PCI.
54 * Next comes "CardBay", using USB 2.0 signals.
56 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
57 * Special thanks to Intel and VIA for providing host controllers to
58 * test this driver on, and Cypress (including In-System Design) for
59 * providing early devices for those host controllers to talk to!
63 * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db)
64 * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net)
65 * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
66 * <sojkam@centrum.cz>, updates by DB).
68 * 2002-11-29 Correct handling for hw async_next register.
69 * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
70 * only scheduling is different, no arbitrary limitations.
71 * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
72 * clean up HC run state handshaking.
73 * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
74 * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
75 * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
76 * 2002-05-07 Some error path cleanups to report better errors; wmb();
77 * use non-CVS version id; better iso bandwidth claim.
78 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
79 * errors in submit path. Bugfixes to interrupt scheduling/processing.
80 * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
81 * more checking to generic hcd framework (db). Make it work with
82 * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
83 * 2002-01-14 Minor cleanup; version synch.
84 * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
85 * 2002-01-04 Control/Bulk queuing behaves.
87 * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
88 * 2001-June Works with usb-storage and NEC EHCI on 2.4
91 #define DRIVER_VERSION "10 Dec 2004"
92 #define DRIVER_AUTHOR "David Brownell"
93 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
95 static const char hcd_name
[] = "ehci_hcd";
98 #undef EHCI_VERBOSE_DEBUG
105 /* magic numbers that can affect system performance */
106 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
107 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
108 #define EHCI_TUNE_RL_TT 0
109 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
110 #define EHCI_TUNE_MULT_TT 1
111 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
113 #define EHCI_IAA_MSECS 10 /* arbitrary */
114 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
115 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
116 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
118 /* Initial IRQ latency: faster than hw default */
119 static int log2_irq_thresh
= 0; // 0 to 6
120 module_param (log2_irq_thresh
, int, S_IRUGO
);
121 MODULE_PARM_DESC (log2_irq_thresh
, "log2 IRQ latency, 1-64 microframes");
123 /* initial park setting: slower than hw default */
124 static unsigned park
= 0;
125 module_param (park
, uint
, S_IRUGO
);
126 MODULE_PARM_DESC (park
, "park setting; 1-3 back-to-back async packets");
128 /* for flakey hardware, ignore overcurrent indicators */
129 static int ignore_oc
= 0;
130 module_param (ignore_oc
, bool, S_IRUGO
);
131 MODULE_PARM_DESC (ignore_oc
, "ignore bogus hardware overcurrent indications");
133 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
135 /*-------------------------------------------------------------------------*/
138 #include "ehci-dbg.c"
140 /*-------------------------------------------------------------------------*/
143 * handshake - spin reading hc until handshake completes or fails
144 * @ptr: address of hc register to be read
145 * @mask: bits to look at in result of read
146 * @done: value of those bits when handshake succeeds
147 * @usec: timeout in microseconds
149 * Returns negative errno, or zero on success
151 * Success happens when the "mask" bits have the specified value (hardware
152 * handshake done). There are two failure modes: "usec" have passed (major
153 * hardware flakeout), or the register reads as all-ones (hardware removed).
155 * That last failure should_only happen in cases like physical cardbus eject
156 * before driver shutdown. But it also seems to be caused by bugs in cardbus
157 * bridge shutdown: shutting down the bridge before the devices using it.
159 static int handshake (struct ehci_hcd
*ehci
, void __iomem
*ptr
,
160 u32 mask
, u32 done
, int usec
)
165 result
= ehci_readl(ehci
, ptr
);
166 if (result
== ~(u32
)0) /* card removed */
177 /* force HC to halt state from unknown (EHCI spec section 2.3) */
178 static int ehci_halt (struct ehci_hcd
*ehci
)
180 u32 temp
= ehci_readl(ehci
, &ehci
->regs
->status
);
182 /* disable any irqs left enabled by previous code */
183 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
185 if ((temp
& STS_HALT
) != 0)
188 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
190 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
191 return handshake (ehci
, &ehci
->regs
->status
,
192 STS_HALT
, STS_HALT
, 16 * 125);
195 /* put TDI/ARC silicon into EHCI mode */
196 static void tdi_reset (struct ehci_hcd
*ehci
)
198 u32 __iomem
*reg_ptr
;
201 reg_ptr
= (u32 __iomem
*)(((u8 __iomem
*)ehci
->regs
) + USBMODE
);
202 tmp
= ehci_readl(ehci
, reg_ptr
);
203 tmp
|= USBMODE_CM_HC
;
204 /* The default byte access to MMR space is LE after
205 * controller reset. Set the required endian mode
206 * for transfer buffers to match the host microprocessor
208 if (ehci_big_endian_mmio(ehci
))
210 ehci_writel(ehci
, tmp
, reg_ptr
);
213 /* reset a non-running (STS_HALT == 1) controller */
214 static int ehci_reset (struct ehci_hcd
*ehci
)
217 u32 command
= ehci_readl(ehci
, &ehci
->regs
->command
);
219 command
|= CMD_RESET
;
220 dbg_cmd (ehci
, "reset", command
);
221 ehci_writel(ehci
, command
, &ehci
->regs
->command
);
222 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
223 ehci
->next_statechange
= jiffies
;
224 retval
= handshake (ehci
, &ehci
->regs
->command
,
225 CMD_RESET
, 0, 250 * 1000);
230 if (ehci_is_TDI(ehci
))
236 /* idle the controller (from running) */
237 static void ehci_quiesce (struct ehci_hcd
*ehci
)
242 if (!HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))
246 /* wait for any schedule enables/disables to take effect */
247 temp
= ehci_readl(ehci
, &ehci
->regs
->command
) << 10;
248 temp
&= STS_ASS
| STS_PSS
;
249 if (handshake (ehci
, &ehci
->regs
->status
, STS_ASS
| STS_PSS
,
250 temp
, 16 * 125) != 0) {
251 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
255 /* then disable anything that's still active */
256 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
257 temp
&= ~(CMD_ASE
| CMD_IAAD
| CMD_PSE
);
258 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
260 /* hardware can take 16 microframes to turn off ... */
261 if (handshake (ehci
, &ehci
->regs
->status
, STS_ASS
| STS_PSS
,
263 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
268 /*-------------------------------------------------------------------------*/
270 static void end_unlink_async(struct ehci_hcd
*ehci
);
271 static void ehci_work(struct ehci_hcd
*ehci
);
273 #include "ehci-hub.c"
274 #include "ehci-mem.c"
276 #include "ehci-sched.c"
278 /*-------------------------------------------------------------------------*/
280 static void ehci_iaa_watchdog(unsigned long param
)
282 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
284 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
287 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
289 spin_lock_irqsave (&ehci
->lock
, flags
);
290 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
291 WARN_ON(!ehci
->reclaim
);
293 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
295 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
296 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
297 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
298 ehci_dbg(ehci
, "IAA watchdog: status %x cmd %x\n", status
, cmd
);
300 /* lost IAA irqs wedge things badly; seen first with a vt8235 */
302 if (status
& STS_IAA
) {
303 ehci_vdbg (ehci
, "lost IAA\n");
305 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
306 * So we need this watchdog, but must protect it against both
307 * (a) SMP races against real IAA firing and retriggering, and
308 * (b) clean HC shutdown, when IAA watchdog was pending.
311 && !timer_pending(&ehci
->iaa_watchdog
)
312 && HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
)) {
315 /* If we get here, IAA is *REALLY* late. It's barely
316 * conceivable that the system is so busy that CMD_IAAD
317 * is still legitimately set, so let's be sure it's
318 * clear before we read STS_IAA. (The HC should clear
319 * CMD_IAAD when it sets STS_IAA.)
321 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
323 ehci_writel(ehci
, cmd
& ~CMD_IAAD
,
324 &ehci
->regs
->command
);
326 /* If IAA is set here it either legitimately triggered
327 * before we cleared IAAD above (but _way_ late, so we'll
328 * still count it as lost) ... or a silicon erratum:
329 * - VIA seems to set IAA without triggering the IRQ;
330 * - IAAD potentially cleared without setting IAA.
332 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
333 if ((status
& STS_IAA
) || !(cmd
& CMD_IAAD
)) {
334 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
335 COUNT (ehci
->stats
.lost_iaa
);
336 ehci_writel(ehci
, STS_IAA
, &ehci
->regs
->status
);
338 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
339 ehci_writel(ehci
, cmd
& ~CMD_IAAD
, &ehci
->regs
->command
);
342 ehci_vdbg(ehci
, "IAA watchdog: status %x cmd %x\n",
344 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
345 end_unlink_async(ehci
);
348 spin_unlock_irqrestore(&ehci
->lock
, flags
);
351 static void ehci_watchdog(unsigned long param
)
353 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
356 spin_lock_irqsave(&ehci
->lock
, flags
);
358 /* stop async processing after it's idled a bit */
359 if (test_bit (TIMER_ASYNC_OFF
, &ehci
->actions
))
360 start_unlink_async (ehci
, ehci
->async
);
362 /* ehci could run by timer, without IRQs ... */
365 spin_unlock_irqrestore (&ehci
->lock
, flags
);
368 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
369 * The firmware seems to think that powering off is a wakeup event!
370 * This routine turns off remote wakeup and everything else, on all ports.
372 static void ehci_turn_off_all_ports(struct ehci_hcd
*ehci
)
374 int port
= HCS_N_PORTS(ehci
->hcs_params
);
377 ehci_writel(ehci
, PORT_RWC_BITS
,
378 &ehci
->regs
->port_status
[port
]);
381 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
382 * This forcibly disables dma and IRQs, helping kexec and other cases
383 * where the next system software may expect clean state.
386 ehci_shutdown (struct usb_hcd
*hcd
)
388 struct ehci_hcd
*ehci
;
390 ehci
= hcd_to_ehci (hcd
);
391 (void) ehci_halt (ehci
);
392 ehci_turn_off_all_ports(ehci
);
394 /* make BIOS/etc use companion controller during reboot */
395 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
397 /* unblock posted writes */
398 ehci_readl(ehci
, &ehci
->regs
->configured_flag
);
401 static void ehci_port_power (struct ehci_hcd
*ehci
, int is_on
)
405 if (!HCS_PPC (ehci
->hcs_params
))
408 ehci_dbg (ehci
, "...power%s ports...\n", is_on
? "up" : "down");
409 for (port
= HCS_N_PORTS (ehci
->hcs_params
); port
> 0; )
410 (void) ehci_hub_control(ehci_to_hcd(ehci
),
411 is_on
? SetPortFeature
: ClearPortFeature
,
414 /* Flush those writes */
415 ehci_readl(ehci
, &ehci
->regs
->command
);
419 /*-------------------------------------------------------------------------*/
422 * ehci_work is called from some interrupts, timers, and so on.
423 * it calls driver completion functions, after dropping ehci->lock.
425 static void ehci_work (struct ehci_hcd
*ehci
)
427 timer_action_done (ehci
, TIMER_IO_WATCHDOG
);
429 /* another CPU may drop ehci->lock during a schedule scan while
430 * it reports urb completions. this flag guards against bogus
431 * attempts at re-entrant schedule scanning.
437 if (ehci
->next_uframe
!= -1)
438 scan_periodic (ehci
);
441 /* the IO watchdog guards against hardware or driver bugs that
442 * misplace IRQs, and should let us run completely without IRQs.
443 * such lossage has been observed on both VT6202 and VT8235.
445 if (HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
) &&
446 (ehci
->async
->qh_next
.ptr
!= NULL
||
447 ehci
->periodic_sched
!= 0))
448 timer_action (ehci
, TIMER_IO_WATCHDOG
);
451 static void ehci_stop (struct usb_hcd
*hcd
)
453 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
455 ehci_dbg (ehci
, "stop\n");
457 /* Turn off port power on all root hub ports. */
458 ehci_port_power (ehci
, 0);
460 /* no more interrupts ... */
461 del_timer_sync (&ehci
->watchdog
);
462 del_timer_sync(&ehci
->iaa_watchdog
);
464 spin_lock_irq(&ehci
->lock
);
465 if (HC_IS_RUNNING (hcd
->state
))
469 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
470 spin_unlock_irq(&ehci
->lock
);
472 /* let companion controllers work when we aren't */
473 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
475 remove_companion_file(ehci
);
476 remove_debug_files (ehci
);
478 /* root hub is shut down separately (first, when possible) */
479 spin_lock_irq (&ehci
->lock
);
482 spin_unlock_irq (&ehci
->lock
);
483 ehci_mem_cleanup (ehci
);
486 ehci_dbg (ehci
, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
487 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.reclaim
,
488 ehci
->stats
.lost_iaa
);
489 ehci_dbg (ehci
, "complete %ld unlink %ld\n",
490 ehci
->stats
.complete
, ehci
->stats
.unlink
);
493 dbg_status (ehci
, "ehci_stop completed",
494 ehci_readl(ehci
, &ehci
->regs
->status
));
497 /* one-time init, only for memory state */
498 static int ehci_init(struct usb_hcd
*hcd
)
500 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
505 spin_lock_init(&ehci
->lock
);
507 init_timer(&ehci
->watchdog
);
508 ehci
->watchdog
.function
= ehci_watchdog
;
509 ehci
->watchdog
.data
= (unsigned long) ehci
;
511 init_timer(&ehci
->iaa_watchdog
);
512 ehci
->iaa_watchdog
.function
= ehci_iaa_watchdog
;
513 ehci
->iaa_watchdog
.data
= (unsigned long) ehci
;
516 * hw default: 1K periodic list heads, one per frame.
517 * periodic_size can shrink by USBCMD update if hcc_params allows.
519 ehci
->periodic_size
= DEFAULT_I_TDPS
;
520 if ((retval
= ehci_mem_init(ehci
, GFP_KERNEL
)) < 0)
523 /* controllers may cache some of the periodic schedule ... */
524 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
525 if (HCC_ISOC_CACHE(hcc_params
)) // full frame cache
527 else // N microframes cached
528 ehci
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
530 ehci
->reclaim
= NULL
;
531 ehci
->next_uframe
= -1;
534 * dedicate a qh for the async ring head, since we couldn't unlink
535 * a 'real' qh without stopping the async schedule [4.8]. use it
536 * as the 'reclamation list head' too.
537 * its dummy is used in hw_alt_next of many tds, to prevent the qh
538 * from automatically advancing to the next td after short reads.
540 ehci
->async
->qh_next
.qh
= NULL
;
541 ehci
->async
->hw_next
= QH_NEXT(ehci
, ehci
->async
->qh_dma
);
542 ehci
->async
->hw_info1
= cpu_to_hc32(ehci
, QH_HEAD
);
543 ehci
->async
->hw_token
= cpu_to_hc32(ehci
, QTD_STS_HALT
);
544 ehci
->async
->hw_qtd_next
= EHCI_LIST_END(ehci
);
545 ehci
->async
->qh_state
= QH_STATE_LINKED
;
546 ehci
->async
->hw_alt_next
= QTD_NEXT(ehci
, ehci
->async
->dummy
->qtd_dma
);
548 /* clear interrupt enables, set irq latency */
549 if (log2_irq_thresh
< 0 || log2_irq_thresh
> 6)
551 temp
= 1 << (16 + log2_irq_thresh
);
552 if (HCC_CANPARK(hcc_params
)) {
553 /* HW default park == 3, on hardware that supports it (like
554 * NVidia and ALI silicon), maximizes throughput on the async
555 * schedule by avoiding QH fetches between transfers.
557 * With fast usb storage devices and NForce2, "park" seems to
558 * make problems: throughput reduction (!), data errors...
561 park
= min(park
, (unsigned) 3);
565 ehci_dbg(ehci
, "park %d\n", park
);
567 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
568 /* periodic schedule size can be smaller than default */
570 temp
|= (EHCI_TUNE_FLS
<< 2);
571 switch (EHCI_TUNE_FLS
) {
572 case 0: ehci
->periodic_size
= 1024; break;
573 case 1: ehci
->periodic_size
= 512; break;
574 case 2: ehci
->periodic_size
= 256; break;
578 ehci
->command
= temp
;
583 /* start HC running; it's halted, ehci_init() has been run (once) */
584 static int ehci_run (struct usb_hcd
*hcd
)
586 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
591 hcd
->uses_new_polling
= 1;
594 /* EHCI spec section 4.1 */
595 if ((retval
= ehci_reset(ehci
)) != 0) {
596 ehci_mem_cleanup(ehci
);
599 ehci_writel(ehci
, ehci
->periodic_dma
, &ehci
->regs
->frame_list
);
600 ehci_writel(ehci
, (u32
)ehci
->async
->qh_dma
, &ehci
->regs
->async_next
);
603 * hcc_params controls whether ehci->regs->segment must (!!!)
604 * be used; it constrains QH/ITD/SITD and QTD locations.
605 * pci_pool consistent memory always uses segment zero.
606 * streaming mappings for I/O buffers, like pci_map_single(),
607 * can return segments above 4GB, if the device allows.
609 * NOTE: the dma mask is visible through dma_supported(), so
610 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
611 * Scsi_Host.highmem_io, and so forth. It's readonly to all
612 * host side drivers though.
614 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
615 if (HCC_64BIT_ADDR(hcc_params
)) {
616 ehci_writel(ehci
, 0, &ehci
->regs
->segment
);
618 // this is deeply broken on almost all architectures
619 if (!dma_set_mask(hcd
->self
.controller
, DMA_64BIT_MASK
))
620 ehci_info(ehci
, "enabled 64bit DMA\n");
625 // Philips, Intel, and maybe others need CMD_RUN before the
626 // root hub will detect new devices (why?); NEC doesn't
627 ehci
->command
&= ~(CMD_LRESET
|CMD_IAAD
|CMD_PSE
|CMD_ASE
|CMD_RESET
);
628 ehci
->command
|= CMD_RUN
;
629 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
630 dbg_cmd (ehci
, "init", ehci
->command
);
633 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
634 * are explicitly handed to companion controller(s), so no TT is
635 * involved with the root hub. (Except where one is integrated,
636 * and there's no companion controller unless maybe for USB OTG.)
638 * Turning on the CF flag will transfer ownership of all ports
639 * from the companions to the EHCI controller. If any of the
640 * companions are in the middle of a port reset at the time, it
641 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
642 * guarantees that no resets are in progress. After we set CF,
643 * a short delay lets the hardware catch up; new resets shouldn't
644 * be started before the port switching actions could complete.
646 down_write(&ehci_cf_port_reset_rwsem
);
647 hcd
->state
= HC_STATE_RUNNING
;
648 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
649 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
651 up_write(&ehci_cf_port_reset_rwsem
);
653 temp
= HC_VERSION(ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
655 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
656 ((ehci
->sbrn
& 0xf0)>>4), (ehci
->sbrn
& 0x0f),
657 temp
>> 8, temp
& 0xff, DRIVER_VERSION
,
658 ignore_oc
? ", overcurrent ignored" : "");
660 ehci_writel(ehci
, INTR_MASK
,
661 &ehci
->regs
->intr_enable
); /* Turn On Interrupts */
663 /* GRR this is run-once init(), being done every time the HC starts.
664 * So long as they're part of class devices, we can't do it init()
665 * since the class device isn't created that early.
667 create_debug_files(ehci
);
668 create_companion_file(ehci
);
673 /*-------------------------------------------------------------------------*/
675 static irqreturn_t
ehci_irq (struct usb_hcd
*hcd
)
677 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
678 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
679 u32 status
, pcd_status
= 0;
681 u32 status
, pcd_status
= 0, cmd
;
682 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
685 spin_lock (&ehci
->lock
);
687 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
689 /* e.g. cardbus physical eject */
690 if (status
== ~(u32
) 0) {
691 ehci_dbg (ehci
, "device removed\n");
696 if (!status
) { /* irq sharing? */
697 spin_unlock(&ehci
->lock
);
701 /* clear (just) interrupts */
702 ehci_writel(ehci
, status
, &ehci
->regs
->status
);
703 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
704 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted write */
706 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
707 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
710 #ifdef EHCI_VERBOSE_DEBUG
711 /* unrequested/ignored: Frame List Rollover */
712 dbg_status (ehci
, "irq", status
);
715 /* INT, ERR, and IAA interrupt rates can be throttled */
717 /* normal [4.15.1.2] or error [4.15.1.1] completion */
718 if (likely ((status
& (STS_INT
|STS_ERR
)) != 0)) {
719 if (likely ((status
& STS_ERR
) == 0))
720 COUNT (ehci
->stats
.normal
);
722 COUNT (ehci
->stats
.error
);
726 /* complete the unlinking of some qh [4.15.2.3] */
727 if (status
& STS_IAA
) {
728 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
729 COUNT (ehci
->stats
.reclaim
);
730 end_unlink_async(ehci
);
732 /* guard against (alleged) silicon errata */
733 if (cmd
& CMD_IAAD
) {
734 ehci_writel(ehci
, cmd
& ~CMD_IAAD
,
735 &ehci
->regs
->command
);
736 ehci_dbg(ehci
, "IAA with IAAD still set?\n");
739 COUNT(ehci
->stats
.reclaim
);
740 end_unlink_async(ehci
);
742 ehci_dbg(ehci
, "IAA with nothing to reclaim?\n");
743 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
746 /* remote wakeup [4.3.1] */
747 if (status
& STS_PCD
) {
748 unsigned i
= HCS_N_PORTS (ehci
->hcs_params
);
751 /* resume root hub? */
752 if (!(ehci_readl(ehci
, &ehci
->regs
->command
) & CMD_RUN
))
753 usb_hcd_resume_root_hub(hcd
);
756 int pstatus
= ehci_readl(ehci
,
757 &ehci
->regs
->port_status
[i
]);
759 if (pstatus
& PORT_OWNER
)
761 if (!(pstatus
& PORT_RESUME
)
762 || ehci
->reset_done
[i
] != 0)
765 /* start 20 msec resume signaling from this port,
766 * and make khubd collect PORT_STAT_C_SUSPEND to
767 * stop that signaling.
769 ehci
->reset_done
[i
] = jiffies
+ msecs_to_jiffies (20);
770 ehci_dbg (ehci
, "port %d remote wakeup\n", i
+ 1);
771 mod_timer(&hcd
->rh_timer
, ehci
->reset_done
[i
]);
775 /* PCI errors [4.15.2.4] */
776 if (unlikely ((status
& STS_FATAL
) != 0)) {
777 /* bogus "fatal" IRQs appear on some chips... why? */
778 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
779 dbg_cmd (ehci
, "fatal", ehci_readl(ehci
,
780 &ehci
->regs
->command
));
781 dbg_status (ehci
, "fatal", status
);
782 if (status
& STS_HALT
) {
783 ehci_err (ehci
, "fatal error\n");
786 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
787 /* generic layer kills/unlinks all urbs, then
788 * uses ehci_stop to clean up the rest
796 spin_unlock (&ehci
->lock
);
797 if (pcd_status
& STS_PCD
)
798 usb_hcd_poll_rh_status(hcd
);
802 /*-------------------------------------------------------------------------*/
805 * non-error returns are a promise to giveback() the urb later
806 * we drop ownership so next owner (or urb unlink) can get it
808 * urb + dev is in hcd.self.controller.urb_list
809 * we're queueing TDs onto software and hardware lists
811 * hcd-specific init for hcpriv hasn't been done yet
813 * NOTE: control, bulk, and interrupt share the same code to append TDs
814 * to a (possibly active) QH, and the same QH scanning code.
816 static int ehci_urb_enqueue (
821 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
822 struct list_head qtd_list
;
824 INIT_LIST_HEAD (&qtd_list
);
826 switch (usb_pipetype (urb
->pipe
)) {
827 // case PIPE_CONTROL:
830 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
832 return submit_async(ehci
, urb
, &qtd_list
, mem_flags
);
835 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
837 return intr_submit(ehci
, urb
, &qtd_list
, mem_flags
);
839 case PIPE_ISOCHRONOUS
:
840 if (urb
->dev
->speed
== USB_SPEED_HIGH
)
841 return itd_submit (ehci
, urb
, mem_flags
);
843 return sitd_submit (ehci
, urb
, mem_flags
);
847 static void unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
850 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
851 if (!HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
))
853 if (!HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
) && ehci
->reclaim
)
854 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
855 end_unlink_async(ehci
);
857 /* if it's not linked then there's nothing to do */
858 if (qh
->qh_state
!= QH_STATE_LINKED
)
861 /* defer till later if busy */
862 else if (ehci
->reclaim
) {
863 struct ehci_qh
*last
;
865 for (last
= ehci
->reclaim
;
867 last
= last
->reclaim
)
869 qh
->qh_state
= QH_STATE_UNLINK_WAIT
;
872 /* start IAA cycle */
874 start_unlink_async (ehci
, qh
);
877 /* remove from hardware lists
878 * completions normally happen asynchronously
881 static int ehci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
883 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
888 spin_lock_irqsave (&ehci
->lock
, flags
);
889 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
893 switch (usb_pipetype (urb
->pipe
)) {
894 // case PIPE_CONTROL:
897 qh
= (struct ehci_qh
*) urb
->hcpriv
;
900 switch (qh
->qh_state
) {
901 case QH_STATE_LINKED
:
902 case QH_STATE_COMPLETING
:
903 unlink_async(ehci
, qh
);
905 case QH_STATE_UNLINK
:
906 case QH_STATE_UNLINK_WAIT
:
907 /* already started */
916 qh
= (struct ehci_qh
*) urb
->hcpriv
;
919 switch (qh
->qh_state
) {
920 case QH_STATE_LINKED
:
921 intr_deschedule (ehci
, qh
);
924 qh_completions (ehci
, qh
);
927 ehci_dbg (ehci
, "bogus qh %p state %d\n",
932 /* reschedule QH iff another request is queued */
933 if (!list_empty (&qh
->qtd_list
)
934 && HC_IS_RUNNING (hcd
->state
)) {
935 <<<<<<< HEAD
:drivers
/usb
/host
/ehci
-hcd
.c
938 schedule_status
= qh_schedule (ehci
, qh
);
939 spin_unlock_irqrestore (&ehci
->lock
, flags
);
941 if (schedule_status
!= 0) {
942 // shouldn't happen often, but ...
943 // FIXME kill those tds' urbs
944 err ("can't reschedule qh %p, err %d",
945 qh
, schedule_status
);
949 rc
= qh_schedule(ehci
, qh
);
951 /* An error here likely indicates handshake failure
952 * or no space left in the schedule. Neither fault
953 * should happen often ...
955 * FIXME kill the now-dysfunctional queued urbs
959 "can't reschedule qh %p, err %d",
961 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
965 case PIPE_ISOCHRONOUS
:
968 // wait till next completion, do it then.
969 // completion irqs can wait up to 1024 msec,
973 spin_unlock_irqrestore (&ehci
->lock
, flags
);
977 /*-------------------------------------------------------------------------*/
979 // bulk qh holds the data toggle
982 ehci_endpoint_disable (struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
984 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
986 struct ehci_qh
*qh
, *tmp
;
988 /* ASSERT: any requests/urbs are being unlinked */
989 /* ASSERT: nobody can be submitting urbs for this any more */
992 spin_lock_irqsave (&ehci
->lock
, flags
);
997 /* endpoints can be iso streams. for now, we don't
998 * accelerate iso completions ... so spin a while.
1000 if (qh
->hw_info1
== 0) {
1001 ehci_vdbg (ehci
, "iso delay\n");
1005 if (!HC_IS_RUNNING (hcd
->state
))
1006 qh
->qh_state
= QH_STATE_IDLE
;
1007 switch (qh
->qh_state
) {
1008 case QH_STATE_LINKED
:
1009 for (tmp
= ehci
->async
->qh_next
.qh
;
1011 tmp
= tmp
->qh_next
.qh
)
1013 /* periodic qh self-unlinks on empty */
1016 unlink_async (ehci
, qh
);
1018 case QH_STATE_UNLINK
: /* wait for hw to finish? */
1019 case QH_STATE_UNLINK_WAIT
:
1021 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1022 schedule_timeout_uninterruptible(1);
1024 case QH_STATE_IDLE
: /* fully unlinked */
1025 if (list_empty (&qh
->qtd_list
)) {
1029 /* else FALL THROUGH */
1032 /* caller was supposed to have unlinked any requests;
1033 * that's not our job. just leak this memory.
1035 ehci_err (ehci
, "qh %p (#%02x) state %d%s\n",
1036 qh
, ep
->desc
.bEndpointAddress
, qh
->qh_state
,
1037 list_empty (&qh
->qtd_list
) ? "" : "(has tds)");
1042 spin_unlock_irqrestore (&ehci
->lock
, flags
);
1046 static int ehci_get_frame (struct usb_hcd
*hcd
)
1048 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
1049 return (ehci_readl(ehci
, &ehci
->regs
->frame_index
) >> 3) %
1050 ehci
->periodic_size
;
1053 /*-------------------------------------------------------------------------*/
1055 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1057 MODULE_DESCRIPTION (DRIVER_INFO
);
1058 MODULE_AUTHOR (DRIVER_AUTHOR
);
1059 MODULE_LICENSE ("GPL");
1062 #include "ehci-pci.c"
1063 #define PCI_DRIVER ehci_pci_driver
1066 #ifdef CONFIG_USB_EHCI_FSL
1067 #include "ehci-fsl.c"
1068 #define PLATFORM_DRIVER ehci_fsl_driver
1071 #ifdef CONFIG_SOC_AU1200
1072 #include "ehci-au1xxx.c"
1073 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
1076 #ifdef CONFIG_PPC_PS3
1077 #include "ehci-ps3.c"
1078 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1081 #if defined(CONFIG_440EPX) && !defined(CONFIG_PPC_MERGE)
1082 #include "ehci-ppc-soc.c"
1083 #define PLATFORM_DRIVER ehci_ppc_soc_driver
1086 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1087 #include "ehci-ppc-of.c"
1088 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1091 #ifdef CONFIG_ARCH_ORION
1092 #include "ehci-orion.c"
1093 #define PLATFORM_DRIVER ehci_orion_driver
1096 #ifdef CONFIG_ARCH_IXP4XX
1097 #include "ehci-ixp4xx.c"
1098 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1101 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1102 <<<<<<< HEAD:drivers/usb/host/ehci-hcd.c
1103 !defined(PS3_SYSTEM_BUS_DRIVER
)
1105 !defined(PS3_SYSTEM_BUS_DRIVER
) && !defined(OF_PLATFORM_DRIVER
)
1106 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/usb
/host
/ehci
-hcd
.c
1107 #error "missing bus glue for ehci-hcd"
1110 static int __init
ehci_hcd_init(void)
1114 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1116 sizeof(struct ehci_qh
), sizeof(struct ehci_qtd
),
1117 sizeof(struct ehci_itd
), sizeof(struct ehci_sitd
));
1120 ehci_debug_root
= debugfs_create_dir("ehci", NULL
);
1121 if (!ehci_debug_root
)
1125 #ifdef PLATFORM_DRIVER
1126 retval
= platform_driver_register(&PLATFORM_DRIVER
);
1132 retval
= pci_register_driver(&PCI_DRIVER
);
1137 #ifdef PS3_SYSTEM_BUS_DRIVER
1138 retval
= ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER
);
1143 #ifdef OF_PLATFORM_DRIVER
1144 retval
= of_register_platform_driver(&OF_PLATFORM_DRIVER
);
1150 #ifdef OF_PLATFORM_DRIVER
1151 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1154 #ifdef PS3_SYSTEM_BUS_DRIVER
1155 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1159 pci_unregister_driver(&PCI_DRIVER
);
1162 #ifdef PLATFORM_DRIVER
1163 platform_driver_unregister(&PLATFORM_DRIVER
);
1167 debugfs_remove(ehci_debug_root
);
1168 ehci_debug_root
= NULL
;
1172 module_init(ehci_hcd_init
);
1174 static void __exit
ehci_hcd_cleanup(void)
1176 #ifdef OF_PLATFORM_DRIVER
1177 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1179 #ifdef PLATFORM_DRIVER
1180 platform_driver_unregister(&PLATFORM_DRIVER
);
1183 pci_unregister_driver(&PCI_DRIVER
);
1185 #ifdef PS3_SYSTEM_BUS_DRIVER
1186 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1189 debugfs_remove(ehci_debug_root
);
1192 module_exit(ehci_hcd_cleanup
);