2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt73usb device specific routines.
24 Supported chipsets: rt2571W & rt2671.
27 #include <linux/delay.h>
28 #include <linux/etherdevice.h>
29 #include <linux/init.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/usb.h>
35 #include "rt2x00usb.h"
40 * All access to the CSR registers will go through the methods
41 * rt73usb_register_read and rt73usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
50 * The _lock versions must be used if you already hold the usb_cache_mutex
52 static inline void rt73usb_register_read(struct rt2x00_dev
*rt2x00dev
,
53 const unsigned int offset
, u32
*value
)
56 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_READ
,
57 USB_VENDOR_REQUEST_IN
, offset
,
58 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
59 *value
= le32_to_cpu(reg
);
62 static inline void rt73usb_register_read_lock(struct rt2x00_dev
*rt2x00dev
,
63 const unsigned int offset
, u32
*value
)
66 rt2x00usb_vendor_req_buff_lock(rt2x00dev
, USB_MULTI_READ
,
67 USB_VENDOR_REQUEST_IN
, offset
,
68 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
69 *value
= le32_to_cpu(reg
);
72 static inline void rt73usb_register_multiread(struct rt2x00_dev
*rt2x00dev
,
73 const unsigned int offset
,
74 void *value
, const u32 length
)
76 int timeout
= REGISTER_TIMEOUT
* (length
/ sizeof(u32
));
77 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_READ
,
78 USB_VENDOR_REQUEST_IN
, offset
,
79 value
, length
, timeout
);
82 static inline void rt73usb_register_write(struct rt2x00_dev
*rt2x00dev
,
83 const unsigned int offset
, u32 value
)
85 __le32 reg
= cpu_to_le32(value
);
86 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_WRITE
,
87 USB_VENDOR_REQUEST_OUT
, offset
,
88 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
91 static inline void rt73usb_register_write_lock(struct rt2x00_dev
*rt2x00dev
,
92 const unsigned int offset
, u32 value
)
94 __le32 reg
= cpu_to_le32(value
);
95 rt2x00usb_vendor_req_buff_lock(rt2x00dev
, USB_MULTI_WRITE
,
96 USB_VENDOR_REQUEST_OUT
, offset
,
97 ®
, sizeof(u32
), REGISTER_TIMEOUT
);
100 static inline void rt73usb_register_multiwrite(struct rt2x00_dev
*rt2x00dev
,
101 const unsigned int offset
,
102 void *value
, const u32 length
)
104 int timeout
= REGISTER_TIMEOUT
* (length
/ sizeof(u32
));
105 rt2x00usb_vendor_request_buff(rt2x00dev
, USB_MULTI_WRITE
,
106 USB_VENDOR_REQUEST_OUT
, offset
,
107 value
, length
, timeout
);
110 static u32
rt73usb_bbp_check(struct rt2x00_dev
*rt2x00dev
)
115 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
116 rt73usb_register_read_lock(rt2x00dev
, PHY_CSR3
, ®
);
117 if (!rt2x00_get_field32(reg
, PHY_CSR3_BUSY
))
119 udelay(REGISTER_BUSY_DELAY
);
125 static void rt73usb_bbp_write(struct rt2x00_dev
*rt2x00dev
,
126 const unsigned int word
, const u8 value
)
130 mutex_lock(&rt2x00dev
->usb_cache_mutex
);
133 * Wait until the BBP becomes ready.
135 reg
= rt73usb_bbp_check(rt2x00dev
);
136 if (rt2x00_get_field32(reg
, PHY_CSR3_BUSY
)) {
137 ERROR(rt2x00dev
, "PHY_CSR3 register busy. Write failed.\n");
138 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
143 * Write the data into the BBP.
146 rt2x00_set_field32(®
, PHY_CSR3_VALUE
, value
);
147 rt2x00_set_field32(®
, PHY_CSR3_REGNUM
, word
);
148 rt2x00_set_field32(®
, PHY_CSR3_BUSY
, 1);
149 rt2x00_set_field32(®
, PHY_CSR3_READ_CONTROL
, 0);
151 rt73usb_register_write_lock(rt2x00dev
, PHY_CSR3
, reg
);
152 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
155 static void rt73usb_bbp_read(struct rt2x00_dev
*rt2x00dev
,
156 const unsigned int word
, u8
*value
)
160 mutex_lock(&rt2x00dev
->usb_cache_mutex
);
163 * Wait until the BBP becomes ready.
165 reg
= rt73usb_bbp_check(rt2x00dev
);
166 if (rt2x00_get_field32(reg
, PHY_CSR3_BUSY
)) {
167 ERROR(rt2x00dev
, "PHY_CSR3 register busy. Read failed.\n");
168 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
173 * Write the request into the BBP.
176 rt2x00_set_field32(®
, PHY_CSR3_REGNUM
, word
);
177 rt2x00_set_field32(®
, PHY_CSR3_BUSY
, 1);
178 rt2x00_set_field32(®
, PHY_CSR3_READ_CONTROL
, 1);
180 rt73usb_register_write_lock(rt2x00dev
, PHY_CSR3
, reg
);
183 * Wait until the BBP becomes ready.
185 reg
= rt73usb_bbp_check(rt2x00dev
);
186 if (rt2x00_get_field32(reg
, PHY_CSR3_BUSY
)) {
187 ERROR(rt2x00dev
, "PHY_CSR3 register busy. Read failed.\n");
192 *value
= rt2x00_get_field32(reg
, PHY_CSR3_VALUE
);
193 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
196 static void rt73usb_rf_write(struct rt2x00_dev
*rt2x00dev
,
197 const unsigned int word
, const u32 value
)
205 mutex_lock(&rt2x00dev
->usb_cache_mutex
);
207 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
208 rt73usb_register_read_lock(rt2x00dev
, PHY_CSR4
, ®
);
209 if (!rt2x00_get_field32(reg
, PHY_CSR4_BUSY
))
211 udelay(REGISTER_BUSY_DELAY
);
214 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
215 ERROR(rt2x00dev
, "PHY_CSR4 register busy. Write failed.\n");
220 rt2x00_set_field32(®
, PHY_CSR4_VALUE
, value
);
223 * RF5225 and RF2527 contain 21 bits per RF register value,
224 * all others contain 20 bits.
226 rt2x00_set_field32(®
, PHY_CSR4_NUMBER_OF_BITS
,
227 20 + (rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
228 rt2x00_rf(&rt2x00dev
->chip
, RF2527
)));
229 rt2x00_set_field32(®
, PHY_CSR4_IF_SELECT
, 0);
230 rt2x00_set_field32(®
, PHY_CSR4_BUSY
, 1);
232 rt73usb_register_write_lock(rt2x00dev
, PHY_CSR4
, reg
);
233 rt2x00_rf_write(rt2x00dev
, word
, value
);
234 mutex_unlock(&rt2x00dev
->usb_cache_mutex
);
237 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
238 #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
240 static void rt73usb_read_csr(struct rt2x00_dev
*rt2x00dev
,
241 const unsigned int word
, u32
*data
)
243 rt73usb_register_read(rt2x00dev
, CSR_OFFSET(word
), data
);
246 static void rt73usb_write_csr(struct rt2x00_dev
*rt2x00dev
,
247 const unsigned int word
, u32 data
)
249 rt73usb_register_write(rt2x00dev
, CSR_OFFSET(word
), data
);
252 static const struct rt2x00debug rt73usb_rt2x00debug
= {
253 .owner
= THIS_MODULE
,
255 .read
= rt73usb_read_csr
,
256 .write
= rt73usb_write_csr
,
257 .word_size
= sizeof(u32
),
258 .word_count
= CSR_REG_SIZE
/ sizeof(u32
),
261 .read
= rt2x00_eeprom_read
,
262 .write
= rt2x00_eeprom_write
,
263 .word_size
= sizeof(u16
),
264 .word_count
= EEPROM_SIZE
/ sizeof(u16
),
267 .read
= rt73usb_bbp_read
,
268 .write
= rt73usb_bbp_write
,
269 .word_size
= sizeof(u8
),
270 .word_count
= BBP_SIZE
/ sizeof(u8
),
273 .read
= rt2x00_rf_read
,
274 .write
= rt73usb_rf_write
,
275 .word_size
= sizeof(u32
),
276 .word_count
= RF_SIZE
/ sizeof(u32
),
279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
282 * Configuration handlers.
284 static void rt73usb_config_mac_addr(struct rt2x00_dev
*rt2x00dev
, __le32
*mac
)
288 tmp
= le32_to_cpu(mac
[1]);
289 rt2x00_set_field32(&tmp
, MAC_CSR3_UNICAST_TO_ME_MASK
, 0xff);
290 mac
[1] = cpu_to_le32(tmp
);
292 rt73usb_register_multiwrite(rt2x00dev
, MAC_CSR2
, mac
,
293 (2 * sizeof(__le32
)));
296 static void rt73usb_config_bssid(struct rt2x00_dev
*rt2x00dev
, __le32
*bssid
)
300 tmp
= le32_to_cpu(bssid
[1]);
301 rt2x00_set_field32(&tmp
, MAC_CSR5_BSS_ID_MASK
, 3);
302 bssid
[1] = cpu_to_le32(tmp
);
304 rt73usb_register_multiwrite(rt2x00dev
, MAC_CSR4
, bssid
,
305 (2 * sizeof(__le32
)));
308 static void rt73usb_config_type(struct rt2x00_dev
*rt2x00dev
, const int type
,
314 * Clear current synchronisation setup.
315 * For the Beacon base registers we only need to clear
316 * the first byte since that byte contains the VALID and OWNER
317 * bits which (when set to 0) will invalidate the entire beacon.
319 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, 0);
320 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE0
, 0);
321 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE1
, 0);
322 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE2
, 0);
323 rt73usb_register_write(rt2x00dev
, HW_BEACON_BASE3
, 0);
326 * Enable synchronisation.
328 rt73usb_register_read(rt2x00dev
, TXRX_CSR9
, ®
);
329 rt2x00_set_field32(®
, TXRX_CSR9_TSF_TICKING
, 1);
330 rt2x00_set_field32(®
, TXRX_CSR9_TBTT_ENABLE
,
331 (tsf_sync
== TSF_SYNC_BEACON
));
332 rt2x00_set_field32(®
, TXRX_CSR9_BEACON_GEN
, 0);
333 rt2x00_set_field32(®
, TXRX_CSR9_TSF_SYNC
, tsf_sync
);
334 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, reg
);
337 static void rt73usb_config_preamble(struct rt2x00_dev
*rt2x00dev
,
338 const int short_preamble
,
339 const int ack_timeout
,
340 const int ack_consume_time
)
345 * When in atomic context, reschedule and let rt2x00lib
346 * call this function again.
349 queue_work(rt2x00dev
->hw
->workqueue
, &rt2x00dev
->config_work
);
353 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
354 rt2x00_set_field32(®
, TXRX_CSR0_RX_ACK_TIMEOUT
, ack_timeout
);
355 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
357 rt73usb_register_read(rt2x00dev
, TXRX_CSR4
, ®
);
358 rt2x00_set_field32(®
, TXRX_CSR4_AUTORESPOND_PREAMBLE
,
360 rt73usb_register_write(rt2x00dev
, TXRX_CSR4
, reg
);
363 static void rt73usb_config_phymode(struct rt2x00_dev
*rt2x00dev
,
364 const int basic_rate_mask
)
366 rt73usb_register_write(rt2x00dev
, TXRX_CSR5
, basic_rate_mask
);
369 static void rt73usb_config_channel(struct rt2x00_dev
*rt2x00dev
,
370 struct rf_channel
*rf
, const int txpower
)
376 rt2x00_set_field32(&rf
->rf3
, RF3_TXPOWER
, TXPOWER_TO_DEV(txpower
));
377 rt2x00_set_field32(&rf
->rf4
, RF4_FREQ_OFFSET
, rt2x00dev
->freq_offset
);
379 smart
= !(rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
380 rt2x00_rf(&rt2x00dev
->chip
, RF2527
));
382 rt73usb_bbp_read(rt2x00dev
, 3, &r3
);
383 rt2x00_set_field8(&r3
, BBP_R3_SMART_MODE
, smart
);
384 rt73usb_bbp_write(rt2x00dev
, 3, r3
);
387 if (txpower
> MAX_TXPOWER
&& txpower
<= (MAX_TXPOWER
+ r94
))
388 r94
+= txpower
- MAX_TXPOWER
;
389 else if (txpower
< MIN_TXPOWER
&& txpower
>= (MIN_TXPOWER
- r94
))
391 rt73usb_bbp_write(rt2x00dev
, 94, r94
);
393 rt73usb_rf_write(rt2x00dev
, 1, rf
->rf1
);
394 rt73usb_rf_write(rt2x00dev
, 2, rf
->rf2
);
395 rt73usb_rf_write(rt2x00dev
, 3, rf
->rf3
& ~0x00000004);
396 rt73usb_rf_write(rt2x00dev
, 4, rf
->rf4
);
398 rt73usb_rf_write(rt2x00dev
, 1, rf
->rf1
);
399 rt73usb_rf_write(rt2x00dev
, 2, rf
->rf2
);
400 rt73usb_rf_write(rt2x00dev
, 3, rf
->rf3
| 0x00000004);
401 rt73usb_rf_write(rt2x00dev
, 4, rf
->rf4
);
403 rt73usb_rf_write(rt2x00dev
, 1, rf
->rf1
);
404 rt73usb_rf_write(rt2x00dev
, 2, rf
->rf2
);
405 rt73usb_rf_write(rt2x00dev
, 3, rf
->rf3
& ~0x00000004);
406 rt73usb_rf_write(rt2x00dev
, 4, rf
->rf4
);
411 static void rt73usb_config_txpower(struct rt2x00_dev
*rt2x00dev
,
414 struct rf_channel rf
;
416 rt2x00_rf_read(rt2x00dev
, 1, &rf
.rf1
);
417 rt2x00_rf_read(rt2x00dev
, 2, &rf
.rf2
);
418 rt2x00_rf_read(rt2x00dev
, 3, &rf
.rf3
);
419 rt2x00_rf_read(rt2x00dev
, 4, &rf
.rf4
);
421 rt73usb_config_channel(rt2x00dev
, &rf
, txpower
);
424 static void rt73usb_config_antenna_5x(struct rt2x00_dev
*rt2x00dev
,
425 struct antenna_setup
*ant
)
432 rt73usb_bbp_read(rt2x00dev
, 3, &r3
);
433 rt73usb_bbp_read(rt2x00dev
, 4, &r4
);
434 rt73usb_bbp_read(rt2x00dev
, 77, &r77
);
436 rt2x00_set_field8(&r3
, BBP_R3_SMART_MODE
, 0);
439 * Configure the RX antenna.
442 case ANTENNA_HW_DIVERSITY
:
443 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 2);
444 temp
= !test_bit(CONFIG_FRAME_TYPE
, &rt2x00dev
->flags
)
445 && (rt2x00dev
->curr_hwmode
!= HWMODE_A
);
446 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
, temp
);
449 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
450 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
, 0);
451 if (rt2x00dev
->curr_hwmode
== HWMODE_A
)
452 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 0);
454 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 3);
456 case ANTENNA_SW_DIVERSITY
:
458 * NOTE: We should never come here because rt2x00lib is
459 * supposed to catch this and send us the correct antenna
460 * explicitely. However we are nog going to bug about this.
461 * Instead, just default to antenna B.
464 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
465 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
, 0);
466 if (rt2x00dev
->curr_hwmode
== HWMODE_A
)
467 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 3);
469 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 0);
473 rt73usb_bbp_write(rt2x00dev
, 77, r77
);
474 rt73usb_bbp_write(rt2x00dev
, 3, r3
);
475 rt73usb_bbp_write(rt2x00dev
, 4, r4
);
478 static void rt73usb_config_antenna_2x(struct rt2x00_dev
*rt2x00dev
,
479 struct antenna_setup
*ant
)
485 rt73usb_bbp_read(rt2x00dev
, 3, &r3
);
486 rt73usb_bbp_read(rt2x00dev
, 4, &r4
);
487 rt73usb_bbp_read(rt2x00dev
, 77, &r77
);
489 rt2x00_set_field8(&r3
, BBP_R3_SMART_MODE
, 0);
490 rt2x00_set_field8(&r4
, BBP_R4_RX_FRAME_END
,
491 !test_bit(CONFIG_FRAME_TYPE
, &rt2x00dev
->flags
));
494 * Configure the RX antenna.
497 case ANTENNA_HW_DIVERSITY
:
498 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 2);
501 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 3);
502 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
504 case ANTENNA_SW_DIVERSITY
:
506 * NOTE: We should never come here because rt2x00lib is
507 * supposed to catch this and send us the correct antenna
508 * explicitely. However we are nog going to bug about this.
509 * Instead, just default to antenna B.
512 rt2x00_set_field8(&r77
, BBP_R77_RX_ANTENNA
, 0);
513 rt2x00_set_field8(&r4
, BBP_R4_RX_ANTENNA_CONTROL
, 1);
517 rt73usb_bbp_write(rt2x00dev
, 77, r77
);
518 rt73usb_bbp_write(rt2x00dev
, 3, r3
);
519 rt73usb_bbp_write(rt2x00dev
, 4, r4
);
525 * value[0] -> non-LNA
531 static const struct antenna_sel antenna_sel_a
[] = {
532 { 96, { 0x58, 0x78 } },
533 { 104, { 0x38, 0x48 } },
534 { 75, { 0xfe, 0x80 } },
535 { 86, { 0xfe, 0x80 } },
536 { 88, { 0xfe, 0x80 } },
537 { 35, { 0x60, 0x60 } },
538 { 97, { 0x58, 0x58 } },
539 { 98, { 0x58, 0x58 } },
542 static const struct antenna_sel antenna_sel_bg
[] = {
543 { 96, { 0x48, 0x68 } },
544 { 104, { 0x2c, 0x3c } },
545 { 75, { 0xfe, 0x80 } },
546 { 86, { 0xfe, 0x80 } },
547 { 88, { 0xfe, 0x80 } },
548 { 35, { 0x50, 0x50 } },
549 { 97, { 0x48, 0x48 } },
550 { 98, { 0x48, 0x48 } },
553 static void rt73usb_config_antenna(struct rt2x00_dev
*rt2x00dev
,
554 struct antenna_setup
*ant
)
556 const struct antenna_sel
*sel
;
561 if (rt2x00dev
->curr_hwmode
== HWMODE_A
) {
563 lna
= test_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
);
565 sel
= antenna_sel_bg
;
566 lna
= test_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
);
569 for (i
= 0; i
< ARRAY_SIZE(antenna_sel_a
); i
++)
570 rt73usb_bbp_write(rt2x00dev
, sel
[i
].word
, sel
[i
].value
[lna
]);
572 rt73usb_register_read(rt2x00dev
, PHY_CSR0
, ®
);
574 rt2x00_set_field32(®
, PHY_CSR0_PA_PE_BG
,
575 (rt2x00dev
->curr_hwmode
== HWMODE_B
||
576 rt2x00dev
->curr_hwmode
== HWMODE_G
));
577 rt2x00_set_field32(®
, PHY_CSR0_PA_PE_A
,
578 (rt2x00dev
->curr_hwmode
== HWMODE_A
));
580 rt73usb_register_write(rt2x00dev
, PHY_CSR0
, reg
);
582 if (rt2x00_rf(&rt2x00dev
->chip
, RF5226
) ||
583 rt2x00_rf(&rt2x00dev
->chip
, RF5225
))
584 rt73usb_config_antenna_5x(rt2x00dev
, ant
);
585 else if (rt2x00_rf(&rt2x00dev
->chip
, RF2528
) ||
586 rt2x00_rf(&rt2x00dev
->chip
, RF2527
))
587 rt73usb_config_antenna_2x(rt2x00dev
, ant
);
590 static void rt73usb_config_duration(struct rt2x00_dev
*rt2x00dev
,
591 struct rt2x00lib_conf
*libconf
)
595 rt73usb_register_read(rt2x00dev
, MAC_CSR9
, ®
);
596 rt2x00_set_field32(®
, MAC_CSR9_SLOT_TIME
, libconf
->slot_time
);
597 rt73usb_register_write(rt2x00dev
, MAC_CSR9
, reg
);
599 rt73usb_register_read(rt2x00dev
, MAC_CSR8
, ®
);
600 rt2x00_set_field32(®
, MAC_CSR8_SIFS
, libconf
->sifs
);
601 rt2x00_set_field32(®
, MAC_CSR8_SIFS_AFTER_RX_OFDM
, 3);
602 rt2x00_set_field32(®
, MAC_CSR8_EIFS
, libconf
->eifs
);
603 rt73usb_register_write(rt2x00dev
, MAC_CSR8
, reg
);
605 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
606 rt2x00_set_field32(®
, TXRX_CSR0_TSF_OFFSET
, IEEE80211_HEADER
);
607 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
609 rt73usb_register_read(rt2x00dev
, TXRX_CSR4
, ®
);
610 rt2x00_set_field32(®
, TXRX_CSR4_AUTORESPOND_ENABLE
, 1);
611 rt73usb_register_write(rt2x00dev
, TXRX_CSR4
, reg
);
613 rt73usb_register_read(rt2x00dev
, TXRX_CSR9
, ®
);
614 rt2x00_set_field32(®
, TXRX_CSR9_BEACON_INTERVAL
,
615 libconf
->conf
->beacon_int
* 16);
616 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, reg
);
619 static void rt73usb_config(struct rt2x00_dev
*rt2x00dev
,
620 const unsigned int flags
,
621 struct rt2x00lib_conf
*libconf
)
623 if (flags
& CONFIG_UPDATE_PHYMODE
)
624 rt73usb_config_phymode(rt2x00dev
, libconf
->basic_rates
);
625 if (flags
& CONFIG_UPDATE_CHANNEL
)
626 rt73usb_config_channel(rt2x00dev
, &libconf
->rf
,
627 libconf
->conf
->power_level
);
628 if ((flags
& CONFIG_UPDATE_TXPOWER
) && !(flags
& CONFIG_UPDATE_CHANNEL
))
629 rt73usb_config_txpower(rt2x00dev
, libconf
->conf
->power_level
);
630 if (flags
& CONFIG_UPDATE_ANTENNA
)
631 rt73usb_config_antenna(rt2x00dev
, &libconf
->ant
);
632 if (flags
& (CONFIG_UPDATE_SLOT_TIME
| CONFIG_UPDATE_BEACON_INT
))
633 rt73usb_config_duration(rt2x00dev
, libconf
);
639 static void rt73usb_enable_led(struct rt2x00_dev
*rt2x00dev
)
643 rt73usb_register_read(rt2x00dev
, MAC_CSR14
, ®
);
644 rt2x00_set_field32(®
, MAC_CSR14_ON_PERIOD
, 70);
645 rt2x00_set_field32(®
, MAC_CSR14_OFF_PERIOD
, 30);
646 rt73usb_register_write(rt2x00dev
, MAC_CSR14
, reg
);
648 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_RADIO_STATUS
, 1);
649 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_LINK_A_STATUS
,
650 (rt2x00dev
->rx_status
.phymode
== MODE_IEEE80211A
));
651 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_LINK_BG_STATUS
,
652 (rt2x00dev
->rx_status
.phymode
!= MODE_IEEE80211A
));
654 rt2x00usb_vendor_request_sw(rt2x00dev
, USB_LED_CONTROL
, 0x0000,
655 rt2x00dev
->led_reg
, REGISTER_TIMEOUT
);
658 static void rt73usb_disable_led(struct rt2x00_dev
*rt2x00dev
)
660 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_RADIO_STATUS
, 0);
661 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_LINK_BG_STATUS
, 0);
662 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_LINK_A_STATUS
, 0);
664 rt2x00usb_vendor_request_sw(rt2x00dev
, USB_LED_CONTROL
, 0x0000,
665 rt2x00dev
->led_reg
, REGISTER_TIMEOUT
);
668 static void rt73usb_activity_led(struct rt2x00_dev
*rt2x00dev
, int rssi
)
672 if (rt2x00dev
->led_mode
!= LED_MODE_SIGNAL_STRENGTH
)
676 * Led handling requires a positive value for the rssi,
677 * to do that correctly we need to add the correction.
679 rssi
+= rt2x00dev
->rssi_offset
;
694 rt2x00usb_vendor_request_sw(rt2x00dev
, USB_LED_CONTROL
, led
,
695 rt2x00dev
->led_reg
, REGISTER_TIMEOUT
);
701 static void rt73usb_link_stats(struct rt2x00_dev
*rt2x00dev
,
702 struct link_qual
*qual
)
707 * Update FCS error count from register.
709 rt73usb_register_read(rt2x00dev
, STA_CSR0
, ®
);
710 qual
->rx_failed
= rt2x00_get_field32(reg
, STA_CSR0_FCS_ERROR
);
713 * Update False CCA count from register.
715 rt73usb_register_read(rt2x00dev
, STA_CSR1
, ®
);
716 qual
->false_cca
= rt2x00_get_field32(reg
, STA_CSR1_FALSE_CCA_ERROR
);
719 static void rt73usb_reset_tuner(struct rt2x00_dev
*rt2x00dev
)
721 rt73usb_bbp_write(rt2x00dev
, 17, 0x20);
722 rt2x00dev
->link
.vgc_level
= 0x20;
725 static void rt73usb_link_tuner(struct rt2x00_dev
*rt2x00dev
)
727 int rssi
= rt2x00_get_link_rssi(&rt2x00dev
->link
);
733 * Update Led strength
735 rt73usb_activity_led(rt2x00dev
, rssi
);
737 rt73usb_bbp_read(rt2x00dev
, 17, &r17
);
740 * Determine r17 bounds.
742 if (rt2x00dev
->rx_status
.phymode
== MODE_IEEE80211A
) {
746 if (test_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
)) {
754 } else if (rssi
> -84) {
762 if (test_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
)) {
769 * Special big-R17 for very short distance
773 rt73usb_bbp_write(rt2x00dev
, 17, 0x60);
778 * Special big-R17 for short distance
782 rt73usb_bbp_write(rt2x00dev
, 17, up_bound
);
787 * Special big-R17 for middle-short distance
791 if (r17
!= low_bound
)
792 rt73usb_bbp_write(rt2x00dev
, 17, low_bound
);
797 * Special mid-R17 for middle distance
800 if (r17
!= (low_bound
+ 0x10))
801 rt73usb_bbp_write(rt2x00dev
, 17, low_bound
+ 0x08);
806 * Special case: Change up_bound based on the rssi.
807 * Lower up_bound when rssi is weaker then -74 dBm.
809 up_bound
-= 2 * (-74 - rssi
);
810 if (low_bound
> up_bound
)
811 up_bound
= low_bound
;
813 if (r17
> up_bound
) {
814 rt73usb_bbp_write(rt2x00dev
, 17, up_bound
);
819 * r17 does not yet exceed upper limit, continue and base
820 * the r17 tuning on the false CCA count.
822 if (rt2x00dev
->link
.qual
.false_cca
> 512 && r17
< up_bound
) {
826 rt73usb_bbp_write(rt2x00dev
, 17, r17
);
827 } else if (rt2x00dev
->link
.qual
.false_cca
< 100 && r17
> low_bound
) {
831 rt73usb_bbp_write(rt2x00dev
, 17, r17
);
836 * Firmware name function.
838 static char *rt73usb_get_firmware_name(struct rt2x00_dev
*rt2x00dev
)
840 return FIRMWARE_RT2571
;
844 * Initialization functions.
846 static int rt73usb_load_firmware(struct rt2x00_dev
*rt2x00dev
, void *data
,
858 * Wait for stable hardware.
860 for (i
= 0; i
< 100; i
++) {
861 rt73usb_register_read(rt2x00dev
, MAC_CSR0
, ®
);
868 ERROR(rt2x00dev
, "Unstable hardware.\n");
873 * Write firmware to device.
874 * We setup a seperate cache for this action,
875 * since we are going to write larger chunks of data
876 * then normally used cache size.
878 cache
= kmalloc(CSR_CACHE_SIZE_FIRMWARE
, GFP_KERNEL
);
880 ERROR(rt2x00dev
, "Failed to allocate firmware cache.\n");
884 for (i
= 0; i
< len
; i
+= CSR_CACHE_SIZE_FIRMWARE
) {
885 buflen
= min_t(int, len
- i
, CSR_CACHE_SIZE_FIRMWARE
);
886 timeout
= REGISTER_TIMEOUT
* (buflen
/ sizeof(u32
));
888 memcpy(cache
, ptr
, buflen
);
890 rt2x00usb_vendor_request(rt2x00dev
, USB_MULTI_WRITE
,
891 USB_VENDOR_REQUEST_OUT
,
892 FIRMWARE_IMAGE_BASE
+ i
, 0x0000,
893 cache
, buflen
, timeout
);
901 * Send firmware request to device to load firmware,
902 * we need to specify a long timeout time.
904 status
= rt2x00usb_vendor_request_sw(rt2x00dev
, USB_DEVICE_MODE
,
905 0x0000, USB_MODE_FIRMWARE
,
906 REGISTER_TIMEOUT_FIRMWARE
);
908 ERROR(rt2x00dev
, "Failed to write Firmware to device.\n");
912 rt73usb_disable_led(rt2x00dev
);
917 static int rt73usb_init_registers(struct rt2x00_dev
*rt2x00dev
)
921 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
922 rt2x00_set_field32(®
, TXRX_CSR0_AUTO_TX_SEQ
, 1);
923 rt2x00_set_field32(®
, TXRX_CSR0_DISABLE_RX
, 0);
924 rt2x00_set_field32(®
, TXRX_CSR0_TX_WITHOUT_WAITING
, 0);
925 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
927 rt73usb_register_read(rt2x00dev
, TXRX_CSR1
, ®
);
928 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID0
, 47); /* CCK Signal */
929 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID0_VALID
, 1);
930 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID1
, 30); /* Rssi */
931 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID1_VALID
, 1);
932 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID2
, 42); /* OFDM Rate */
933 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID2_VALID
, 1);
934 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID3
, 30); /* Rssi */
935 rt2x00_set_field32(®
, TXRX_CSR1_BBP_ID3_VALID
, 1);
936 rt73usb_register_write(rt2x00dev
, TXRX_CSR1
, reg
);
939 * CCK TXD BBP registers
941 rt73usb_register_read(rt2x00dev
, TXRX_CSR2
, ®
);
942 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID0
, 13);
943 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID0_VALID
, 1);
944 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID1
, 12);
945 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID1_VALID
, 1);
946 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID2
, 11);
947 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID2_VALID
, 1);
948 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID3
, 10);
949 rt2x00_set_field32(®
, TXRX_CSR2_BBP_ID3_VALID
, 1);
950 rt73usb_register_write(rt2x00dev
, TXRX_CSR2
, reg
);
953 * OFDM TXD BBP registers
955 rt73usb_register_read(rt2x00dev
, TXRX_CSR3
, ®
);
956 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID0
, 7);
957 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID0_VALID
, 1);
958 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID1
, 6);
959 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID1_VALID
, 1);
960 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID2
, 5);
961 rt2x00_set_field32(®
, TXRX_CSR3_BBP_ID2_VALID
, 1);
962 rt73usb_register_write(rt2x00dev
, TXRX_CSR3
, reg
);
964 rt73usb_register_read(rt2x00dev
, TXRX_CSR7
, ®
);
965 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_6MBS
, 59);
966 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_9MBS
, 53);
967 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_12MBS
, 49);
968 rt2x00_set_field32(®
, TXRX_CSR7_ACK_CTS_18MBS
, 46);
969 rt73usb_register_write(rt2x00dev
, TXRX_CSR7
, reg
);
971 rt73usb_register_read(rt2x00dev
, TXRX_CSR8
, ®
);
972 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_24MBS
, 44);
973 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_36MBS
, 42);
974 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_48MBS
, 42);
975 rt2x00_set_field32(®
, TXRX_CSR8_ACK_CTS_54MBS
, 42);
976 rt73usb_register_write(rt2x00dev
, TXRX_CSR8
, reg
);
978 rt73usb_register_write(rt2x00dev
, TXRX_CSR15
, 0x0000000f);
980 rt73usb_register_read(rt2x00dev
, MAC_CSR6
, ®
);
981 rt2x00_set_field32(®
, MAC_CSR6_MAX_FRAME_UNIT
, 0xfff);
982 rt73usb_register_write(rt2x00dev
, MAC_CSR6
, reg
);
984 rt73usb_register_write(rt2x00dev
, MAC_CSR10
, 0x00000718);
986 if (rt2x00dev
->ops
->lib
->set_device_state(rt2x00dev
, STATE_AWAKE
))
989 rt73usb_register_write(rt2x00dev
, MAC_CSR13
, 0x00007f00);
992 * Invalidate all Shared Keys (SEC_CSR0),
993 * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
995 rt73usb_register_write(rt2x00dev
, SEC_CSR0
, 0x00000000);
996 rt73usb_register_write(rt2x00dev
, SEC_CSR1
, 0x00000000);
997 rt73usb_register_write(rt2x00dev
, SEC_CSR5
, 0x00000000);
1000 if (rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
1001 rt2x00_rf(&rt2x00dev
->chip
, RF2527
))
1002 rt2x00_set_field32(®
, PHY_CSR1_RF_RPI
, 1);
1003 rt73usb_register_write(rt2x00dev
, PHY_CSR1
, reg
);
1005 rt73usb_register_write(rt2x00dev
, PHY_CSR5
, 0x00040a06);
1006 rt73usb_register_write(rt2x00dev
, PHY_CSR6
, 0x00080606);
1007 rt73usb_register_write(rt2x00dev
, PHY_CSR7
, 0x00000408);
1009 rt73usb_register_read(rt2x00dev
, AC_TXOP_CSR0
, ®
);
1010 rt2x00_set_field32(®
, AC_TXOP_CSR0_AC0_TX_OP
, 0);
1011 rt2x00_set_field32(®
, AC_TXOP_CSR0_AC1_TX_OP
, 0);
1012 rt73usb_register_write(rt2x00dev
, AC_TXOP_CSR0
, reg
);
1014 rt73usb_register_read(rt2x00dev
, AC_TXOP_CSR1
, ®
);
1015 rt2x00_set_field32(®
, AC_TXOP_CSR1_AC2_TX_OP
, 192);
1016 rt2x00_set_field32(®
, AC_TXOP_CSR1_AC3_TX_OP
, 48);
1017 rt73usb_register_write(rt2x00dev
, AC_TXOP_CSR1
, reg
);
1019 rt73usb_register_read(rt2x00dev
, MAC_CSR9
, ®
);
1020 rt2x00_set_field32(®
, MAC_CSR9_CW_SELECT
, 0);
1021 rt73usb_register_write(rt2x00dev
, MAC_CSR9
, reg
);
1024 * We must clear the error counters.
1025 * These registers are cleared on read,
1026 * so we may pass a useless variable to store the value.
1028 rt73usb_register_read(rt2x00dev
, STA_CSR0
, ®
);
1029 rt73usb_register_read(rt2x00dev
, STA_CSR1
, ®
);
1030 rt73usb_register_read(rt2x00dev
, STA_CSR2
, ®
);
1033 * Reset MAC and BBP registers.
1035 rt73usb_register_read(rt2x00dev
, MAC_CSR1
, ®
);
1036 rt2x00_set_field32(®
, MAC_CSR1_SOFT_RESET
, 1);
1037 rt2x00_set_field32(®
, MAC_CSR1_BBP_RESET
, 1);
1038 rt73usb_register_write(rt2x00dev
, MAC_CSR1
, reg
);
1040 rt73usb_register_read(rt2x00dev
, MAC_CSR1
, ®
);
1041 rt2x00_set_field32(®
, MAC_CSR1_SOFT_RESET
, 0);
1042 rt2x00_set_field32(®
, MAC_CSR1_BBP_RESET
, 0);
1043 rt73usb_register_write(rt2x00dev
, MAC_CSR1
, reg
);
1045 rt73usb_register_read(rt2x00dev
, MAC_CSR1
, ®
);
1046 rt2x00_set_field32(®
, MAC_CSR1_HOST_READY
, 1);
1047 rt73usb_register_write(rt2x00dev
, MAC_CSR1
, reg
);
1052 static int rt73usb_init_bbp(struct rt2x00_dev
*rt2x00dev
)
1059 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
1060 rt73usb_bbp_read(rt2x00dev
, 0, &value
);
1061 if ((value
!= 0xff) && (value
!= 0x00))
1062 goto continue_csr_init
;
1063 NOTICE(rt2x00dev
, "Waiting for BBP register.\n");
1064 udelay(REGISTER_BUSY_DELAY
);
1067 ERROR(rt2x00dev
, "BBP register access failed, aborting.\n");
1071 rt73usb_bbp_write(rt2x00dev
, 3, 0x80);
1072 rt73usb_bbp_write(rt2x00dev
, 15, 0x30);
1073 rt73usb_bbp_write(rt2x00dev
, 21, 0xc8);
1074 rt73usb_bbp_write(rt2x00dev
, 22, 0x38);
1075 rt73usb_bbp_write(rt2x00dev
, 23, 0x06);
1076 rt73usb_bbp_write(rt2x00dev
, 24, 0xfe);
1077 rt73usb_bbp_write(rt2x00dev
, 25, 0x0a);
1078 rt73usb_bbp_write(rt2x00dev
, 26, 0x0d);
1079 rt73usb_bbp_write(rt2x00dev
, 32, 0x0b);
1080 rt73usb_bbp_write(rt2x00dev
, 34, 0x12);
1081 rt73usb_bbp_write(rt2x00dev
, 37, 0x07);
1082 rt73usb_bbp_write(rt2x00dev
, 39, 0xf8);
1083 rt73usb_bbp_write(rt2x00dev
, 41, 0x60);
1084 rt73usb_bbp_write(rt2x00dev
, 53, 0x10);
1085 rt73usb_bbp_write(rt2x00dev
, 54, 0x18);
1086 rt73usb_bbp_write(rt2x00dev
, 60, 0x10);
1087 rt73usb_bbp_write(rt2x00dev
, 61, 0x04);
1088 rt73usb_bbp_write(rt2x00dev
, 62, 0x04);
1089 rt73usb_bbp_write(rt2x00dev
, 75, 0xfe);
1090 rt73usb_bbp_write(rt2x00dev
, 86, 0xfe);
1091 rt73usb_bbp_write(rt2x00dev
, 88, 0xfe);
1092 rt73usb_bbp_write(rt2x00dev
, 90, 0x0f);
1093 rt73usb_bbp_write(rt2x00dev
, 99, 0x00);
1094 rt73usb_bbp_write(rt2x00dev
, 102, 0x16);
1095 rt73usb_bbp_write(rt2x00dev
, 107, 0x04);
1097 DEBUG(rt2x00dev
, "Start initialization from EEPROM...\n");
1098 for (i
= 0; i
< EEPROM_BBP_SIZE
; i
++) {
1099 rt2x00_eeprom_read(rt2x00dev
, EEPROM_BBP_START
+ i
, &eeprom
);
1101 if (eeprom
!= 0xffff && eeprom
!= 0x0000) {
1102 reg_id
= rt2x00_get_field16(eeprom
, EEPROM_BBP_REG_ID
);
1103 value
= rt2x00_get_field16(eeprom
, EEPROM_BBP_VALUE
);
1104 DEBUG(rt2x00dev
, "BBP: 0x%02x, value: 0x%02x.\n",
1106 rt73usb_bbp_write(rt2x00dev
, reg_id
, value
);
1109 DEBUG(rt2x00dev
, "...End initialization from EEPROM.\n");
1115 * Device state switch handlers.
1117 static void rt73usb_toggle_rx(struct rt2x00_dev
*rt2x00dev
,
1118 enum dev_state state
)
1122 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
1123 rt2x00_set_field32(®
, TXRX_CSR0_DISABLE_RX
,
1124 state
== STATE_RADIO_RX_OFF
);
1125 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
1128 static int rt73usb_enable_radio(struct rt2x00_dev
*rt2x00dev
)
1131 * Initialize all registers.
1133 if (rt73usb_init_registers(rt2x00dev
) ||
1134 rt73usb_init_bbp(rt2x00dev
)) {
1135 ERROR(rt2x00dev
, "Register initialization failed.\n");
1142 rt73usb_enable_led(rt2x00dev
);
1147 static void rt73usb_disable_radio(struct rt2x00_dev
*rt2x00dev
)
1152 rt73usb_disable_led(rt2x00dev
);
1154 rt73usb_register_write(rt2x00dev
, MAC_CSR10
, 0x00001818);
1157 * Disable synchronisation.
1159 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, 0);
1161 rt2x00usb_disable_radio(rt2x00dev
);
1164 static int rt73usb_set_state(struct rt2x00_dev
*rt2x00dev
, enum dev_state state
)
1171 put_to_sleep
= (state
!= STATE_AWAKE
);
1173 rt73usb_register_read(rt2x00dev
, MAC_CSR12
, ®
);
1174 rt2x00_set_field32(®
, MAC_CSR12_FORCE_WAKEUP
, !put_to_sleep
);
1175 rt2x00_set_field32(®
, MAC_CSR12_PUT_TO_SLEEP
, put_to_sleep
);
1176 rt73usb_register_write(rt2x00dev
, MAC_CSR12
, reg
);
1179 * Device is not guaranteed to be in the requested state yet.
1180 * We must wait until the register indicates that the
1181 * device has entered the correct state.
1183 for (i
= 0; i
< REGISTER_BUSY_COUNT
; i
++) {
1184 rt73usb_register_read(rt2x00dev
, MAC_CSR12
, ®
);
1186 rt2x00_get_field32(reg
, MAC_CSR12_BBP_CURRENT_STATE
);
1187 if (current_state
== !put_to_sleep
)
1192 NOTICE(rt2x00dev
, "Device failed to enter state %d, "
1193 "current device state %d.\n", !put_to_sleep
, current_state
);
1198 static int rt73usb_set_device_state(struct rt2x00_dev
*rt2x00dev
,
1199 enum dev_state state
)
1204 case STATE_RADIO_ON
:
1205 retval
= rt73usb_enable_radio(rt2x00dev
);
1207 case STATE_RADIO_OFF
:
1208 rt73usb_disable_radio(rt2x00dev
);
1210 case STATE_RADIO_RX_ON
:
1211 <<<<<<< HEAD
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
1213 case STATE_RADIO_RX_ON_LINK
:
1214 rt73usb_toggle_rx(rt2x00dev
, STATE_RADIO_RX_ON
);
1216 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
1217 case STATE_RADIO_RX_OFF
:
1218 <<<<<<< HEAD
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
1219 rt73usb_toggle_rx(rt2x00dev
, state
);
1221 case STATE_RADIO_RX_OFF_LINK
:
1222 rt73usb_toggle_rx(rt2x00dev
, STATE_RADIO_RX_OFF
);
1223 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
1225 case STATE_DEEP_SLEEP
:
1229 retval
= rt73usb_set_state(rt2x00dev
, state
);
1240 * TX descriptor initialization
1242 static void rt73usb_write_tx_desc(struct rt2x00_dev
*rt2x00dev
,
1243 struct sk_buff
*skb
,
1244 struct txdata_entry_desc
*desc
,
1245 struct ieee80211_tx_control
*control
)
1247 struct skb_desc
*skbdesc
= get_skb_desc(skb
);
1248 __le32
*txd
= skbdesc
->desc
;
1252 * Start writing the descriptor words.
1254 rt2x00_desc_read(txd
, 1, &word
);
1255 rt2x00_set_field32(&word
, TXD_W1_HOST_Q_ID
, desc
->queue
);
1256 rt2x00_set_field32(&word
, TXD_W1_AIFSN
, desc
->aifs
);
1257 rt2x00_set_field32(&word
, TXD_W1_CWMIN
, desc
->cw_min
);
1258 rt2x00_set_field32(&word
, TXD_W1_CWMAX
, desc
->cw_max
);
1259 rt2x00_set_field32(&word
, TXD_W1_IV_OFFSET
, IEEE80211_HEADER
);
1260 rt2x00_set_field32(&word
, TXD_W1_HW_SEQUENCE
, 1);
1261 rt2x00_desc_write(txd
, 1, word
);
1263 rt2x00_desc_read(txd
, 2, &word
);
1264 rt2x00_set_field32(&word
, TXD_W2_PLCP_SIGNAL
, desc
->signal
);
1265 rt2x00_set_field32(&word
, TXD_W2_PLCP_SERVICE
, desc
->service
);
1266 rt2x00_set_field32(&word
, TXD_W2_PLCP_LENGTH_LOW
, desc
->length_low
);
1267 rt2x00_set_field32(&word
, TXD_W2_PLCP_LENGTH_HIGH
, desc
->length_high
);
1268 rt2x00_desc_write(txd
, 2, word
);
1270 rt2x00_desc_read(txd
, 5, &word
);
1271 rt2x00_set_field32(&word
, TXD_W5_TX_POWER
,
1272 TXPOWER_TO_DEV(control
->power_level
));
1273 rt2x00_set_field32(&word
, TXD_W5_WAITING_DMA_DONE_INT
, 1);
1274 rt2x00_desc_write(txd
, 5, word
);
1276 rt2x00_desc_read(txd
, 0, &word
);
1277 rt2x00_set_field32(&word
, TXD_W0_BURST
,
1278 test_bit(ENTRY_TXD_BURST
, &desc
->flags
));
1279 rt2x00_set_field32(&word
, TXD_W0_VALID
, 1);
1280 rt2x00_set_field32(&word
, TXD_W0_MORE_FRAG
,
1281 test_bit(ENTRY_TXD_MORE_FRAG
, &desc
->flags
));
1282 rt2x00_set_field32(&word
, TXD_W0_ACK
,
1283 test_bit(ENTRY_TXD_ACK
, &desc
->flags
));
1284 rt2x00_set_field32(&word
, TXD_W0_TIMESTAMP
,
1285 test_bit(ENTRY_TXD_REQ_TIMESTAMP
, &desc
->flags
));
1286 rt2x00_set_field32(&word
, TXD_W0_OFDM
,
1287 test_bit(ENTRY_TXD_OFDM_RATE
, &desc
->flags
));
1288 rt2x00_set_field32(&word
, TXD_W0_IFS
, desc
->ifs
);
1289 rt2x00_set_field32(&word
, TXD_W0_RETRY_MODE
,
1291 IEEE80211_TXCTL_LONG_RETRY_LIMIT
));
1292 rt2x00_set_field32(&word
, TXD_W0_TKIP_MIC
, 0);
1293 rt2x00_set_field32(&word
, TXD_W0_DATABYTE_COUNT
, skbdesc
->data_len
);
1294 rt2x00_set_field32(&word
, TXD_W0_BURST2
,
1295 test_bit(ENTRY_TXD_BURST
, &desc
->flags
));
1296 rt2x00_set_field32(&word
, TXD_W0_CIPHER_ALG
, CIPHER_NONE
);
1297 rt2x00_desc_write(txd
, 0, word
);
1300 static int rt73usb_get_tx_data_len(struct rt2x00_dev
*rt2x00dev
,
1301 struct sk_buff
*skb
)
1306 * The length _must_ be a multiple of 4,
1307 * but it must _not_ be a multiple of the USB packet size.
1309 length
= roundup(skb
->len
, 4);
1310 length
+= (4 * !(length
% rt2x00dev
->usb_maxpacket
));
1316 * TX data initialization
1318 static void rt73usb_kick_tx_queue(struct rt2x00_dev
*rt2x00dev
,
1323 if (queue
!= IEEE80211_TX_QUEUE_BEACON
)
1327 * For Wi-Fi faily generated beacons between participating stations.
1328 * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1330 rt73usb_register_write(rt2x00dev
, TXRX_CSR10
, 0x00001008);
1332 rt73usb_register_read(rt2x00dev
, TXRX_CSR9
, ®
);
1333 if (!rt2x00_get_field32(reg
, TXRX_CSR9_BEACON_GEN
)) {
1334 rt2x00_set_field32(®
, TXRX_CSR9_BEACON_GEN
, 1);
1335 rt73usb_register_write(rt2x00dev
, TXRX_CSR9
, reg
);
1340 * RX control handlers
1342 static int rt73usb_agc_to_rssi(struct rt2x00_dev
*rt2x00dev
, int rxd_w1
)
1348 lna
= rt2x00_get_field32(rxd_w1
, RXD_W1_RSSI_LNA
);
1363 if (rt2x00dev
->rx_status
.phymode
== MODE_IEEE80211A
) {
1364 if (test_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
)) {
1365 if (lna
== 3 || lna
== 2)
1374 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, &eeprom
);
1375 offset
-= rt2x00_get_field16(eeprom
, EEPROM_RSSI_OFFSET_A_1
);
1377 if (test_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
))
1380 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, &eeprom
);
1381 offset
-= rt2x00_get_field16(eeprom
, EEPROM_RSSI_OFFSET_BG_1
);
1384 return rt2x00_get_field32(rxd_w1
, RXD_W1_RSSI_AGC
) * 2 - offset
;
1387 static void rt73usb_fill_rxdone(struct data_entry
*entry
,
1388 struct rxdata_entry_desc
*desc
)
1390 struct skb_desc
*skbdesc
= get_skb_desc(entry
->skb
);
1391 __le32
*rxd
= (__le32
*)entry
->skb
->data
;
1395 rt2x00_desc_read(rxd
, 0, &word0
);
1396 rt2x00_desc_read(rxd
, 1, &word1
);
1399 if (rt2x00_get_field32(word0
, RXD_W0_CRC_ERROR
))
1400 desc
->flags
|= RX_FLAG_FAILED_FCS_CRC
;
1403 * Obtain the status about this packet.
1405 desc
->signal
= rt2x00_get_field32(word1
, RXD_W1_SIGNAL
);
1406 desc
->rssi
= rt73usb_agc_to_rssi(entry
->ring
->rt2x00dev
, word1
);
1407 desc
->ofdm
= rt2x00_get_field32(word0
, RXD_W0_OFDM
);
1408 desc
->size
= rt2x00_get_field32(word0
, RXD_W0_DATABYTE_COUNT
);
1409 desc
->my_bss
= !!rt2x00_get_field32(word0
, RXD_W0_MY_BSS
);
1412 * Set descriptor and data pointer.
1414 skbdesc
->desc
= entry
->skb
->data
;
1415 skbdesc
->desc_len
= entry
->ring
->desc_size
;
1416 skbdesc
->data
= entry
->skb
->data
+ entry
->ring
->desc_size
;
1417 skbdesc
->data_len
= desc
->size
;
1421 * Device probe functions.
1423 static int rt73usb_validate_eeprom(struct rt2x00_dev
*rt2x00dev
)
1429 rt2x00usb_eeprom_read(rt2x00dev
, rt2x00dev
->eeprom
, EEPROM_SIZE
);
1432 * Start validation of the data that has been read.
1434 mac
= rt2x00_eeprom_addr(rt2x00dev
, EEPROM_MAC_ADDR_0
);
1435 if (!is_valid_ether_addr(mac
)) {
1436 DECLARE_MAC_BUF(macbuf
);
1438 random_ether_addr(mac
);
1439 EEPROM(rt2x00dev
, "MAC: %s\n", print_mac(macbuf
, mac
));
1442 rt2x00_eeprom_read(rt2x00dev
, EEPROM_ANTENNA
, &word
);
1443 if (word
== 0xffff) {
1444 rt2x00_set_field16(&word
, EEPROM_ANTENNA_NUM
, 2);
1445 rt2x00_set_field16(&word
, EEPROM_ANTENNA_TX_DEFAULT
,
1447 rt2x00_set_field16(&word
, EEPROM_ANTENNA_RX_DEFAULT
,
1449 rt2x00_set_field16(&word
, EEPROM_ANTENNA_FRAME_TYPE
, 0);
1450 rt2x00_set_field16(&word
, EEPROM_ANTENNA_DYN_TXAGC
, 0);
1451 rt2x00_set_field16(&word
, EEPROM_ANTENNA_HARDWARE_RADIO
, 0);
1452 rt2x00_set_field16(&word
, EEPROM_ANTENNA_RF_TYPE
, RF5226
);
1453 rt2x00_eeprom_write(rt2x00dev
, EEPROM_ANTENNA
, word
);
1454 EEPROM(rt2x00dev
, "Antenna: 0x%04x\n", word
);
1457 rt2x00_eeprom_read(rt2x00dev
, EEPROM_NIC
, &word
);
1458 if (word
== 0xffff) {
1459 rt2x00_set_field16(&word
, EEPROM_NIC_EXTERNAL_LNA
, 0);
1460 rt2x00_eeprom_write(rt2x00dev
, EEPROM_NIC
, word
);
1461 EEPROM(rt2x00dev
, "NIC: 0x%04x\n", word
);
1464 rt2x00_eeprom_read(rt2x00dev
, EEPROM_LED
, &word
);
1465 if (word
== 0xffff) {
1466 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_RDY_G
, 0);
1467 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_RDY_A
, 0);
1468 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_ACT
, 0);
1469 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_0
, 0);
1470 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_1
, 0);
1471 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_2
, 0);
1472 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_3
, 0);
1473 rt2x00_set_field16(&word
, EEPROM_LED_POLARITY_GPIO_4
, 0);
1474 rt2x00_set_field16(&word
, EEPROM_LED_LED_MODE
,
1476 rt2x00_eeprom_write(rt2x00dev
, EEPROM_LED
, word
);
1477 EEPROM(rt2x00dev
, "Led: 0x%04x\n", word
);
1480 rt2x00_eeprom_read(rt2x00dev
, EEPROM_FREQ
, &word
);
1481 if (word
== 0xffff) {
1482 rt2x00_set_field16(&word
, EEPROM_FREQ_OFFSET
, 0);
1483 rt2x00_set_field16(&word
, EEPROM_FREQ_SEQ
, 0);
1484 rt2x00_eeprom_write(rt2x00dev
, EEPROM_FREQ
, word
);
1485 EEPROM(rt2x00dev
, "Freq: 0x%04x\n", word
);
1488 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, &word
);
1489 if (word
== 0xffff) {
1490 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_1
, 0);
1491 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_2
, 0);
1492 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, word
);
1493 EEPROM(rt2x00dev
, "RSSI OFFSET BG: 0x%04x\n", word
);
1495 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_BG_1
);
1496 if (value
< -10 || value
> 10)
1497 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_1
, 0);
1498 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_BG_2
);
1499 if (value
< -10 || value
> 10)
1500 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_BG_2
, 0);
1501 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_BG
, word
);
1504 rt2x00_eeprom_read(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, &word
);
1505 if (word
== 0xffff) {
1506 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_1
, 0);
1507 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_2
, 0);
1508 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, word
);
1509 EEPROM(rt2x00dev
, "RSSI OFFSET BG: 0x%04x\n", word
);
1511 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_A_1
);
1512 if (value
< -10 || value
> 10)
1513 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_1
, 0);
1514 value
= rt2x00_get_field16(word
, EEPROM_RSSI_OFFSET_A_2
);
1515 if (value
< -10 || value
> 10)
1516 rt2x00_set_field16(&word
, EEPROM_RSSI_OFFSET_A_2
, 0);
1517 rt2x00_eeprom_write(rt2x00dev
, EEPROM_RSSI_OFFSET_A
, word
);
1523 static int rt73usb_init_eeprom(struct rt2x00_dev
*rt2x00dev
)
1530 * Read EEPROM word for configuration.
1532 rt2x00_eeprom_read(rt2x00dev
, EEPROM_ANTENNA
, &eeprom
);
1535 * Identify RF chipset.
1537 value
= rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_RF_TYPE
);
1538 rt73usb_register_read(rt2x00dev
, MAC_CSR0
, ®
);
1539 rt2x00_set_chip(rt2x00dev
, RT2571
, value
, reg
);
1541 if (!rt2x00_check_rev(&rt2x00dev
->chip
, 0x25730)) {
1542 ERROR(rt2x00dev
, "Invalid RT chipset detected.\n");
1546 if (!rt2x00_rf(&rt2x00dev
->chip
, RF5226
) &&
1547 !rt2x00_rf(&rt2x00dev
->chip
, RF2528
) &&
1548 !rt2x00_rf(&rt2x00dev
->chip
, RF5225
) &&
1549 !rt2x00_rf(&rt2x00dev
->chip
, RF2527
)) {
1550 ERROR(rt2x00dev
, "Invalid RF chipset detected.\n");
1555 * Identify default antenna configuration.
1557 rt2x00dev
->default_ant
.tx
=
1558 rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_TX_DEFAULT
);
1559 rt2x00dev
->default_ant
.rx
=
1560 rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_RX_DEFAULT
);
1563 * Read the Frame type.
1565 if (rt2x00_get_field16(eeprom
, EEPROM_ANTENNA_FRAME_TYPE
))
1566 __set_bit(CONFIG_FRAME_TYPE
, &rt2x00dev
->flags
);
1569 * Read frequency offset.
1571 rt2x00_eeprom_read(rt2x00dev
, EEPROM_FREQ
, &eeprom
);
1572 rt2x00dev
->freq_offset
= rt2x00_get_field16(eeprom
, EEPROM_FREQ_OFFSET
);
1575 * Read external LNA informations.
1577 rt2x00_eeprom_read(rt2x00dev
, EEPROM_NIC
, &eeprom
);
1579 if (rt2x00_get_field16(eeprom
, EEPROM_NIC_EXTERNAL_LNA
)) {
1580 __set_bit(CONFIG_EXTERNAL_LNA_A
, &rt2x00dev
->flags
);
1581 __set_bit(CONFIG_EXTERNAL_LNA_BG
, &rt2x00dev
->flags
);
1585 * Store led settings, for correct led behaviour.
1587 rt2x00_eeprom_read(rt2x00dev
, EEPROM_LED
, &eeprom
);
1589 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_LED_MODE
,
1590 rt2x00dev
->led_mode
);
1591 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_GPIO_0
,
1592 rt2x00_get_field16(eeprom
,
1593 EEPROM_LED_POLARITY_GPIO_0
));
1594 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_GPIO_1
,
1595 rt2x00_get_field16(eeprom
,
1596 EEPROM_LED_POLARITY_GPIO_1
));
1597 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_GPIO_2
,
1598 rt2x00_get_field16(eeprom
,
1599 EEPROM_LED_POLARITY_GPIO_2
));
1600 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_GPIO_3
,
1601 rt2x00_get_field16(eeprom
,
1602 EEPROM_LED_POLARITY_GPIO_3
));
1603 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_GPIO_4
,
1604 rt2x00_get_field16(eeprom
,
1605 EEPROM_LED_POLARITY_GPIO_4
));
1606 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_ACT
,
1607 rt2x00_get_field16(eeprom
, EEPROM_LED_POLARITY_ACT
));
1608 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_READY_BG
,
1609 rt2x00_get_field16(eeprom
,
1610 EEPROM_LED_POLARITY_RDY_G
));
1611 rt2x00_set_field16(&rt2x00dev
->led_reg
, MCU_LEDCS_POLARITY_READY_A
,
1612 rt2x00_get_field16(eeprom
,
1613 EEPROM_LED_POLARITY_RDY_A
));
1619 * RF value list for RF2528
1622 static const struct rf_channel rf_vals_bg_2528
[] = {
1623 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1624 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1625 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1626 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1627 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1628 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1629 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1630 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1631 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1632 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1633 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1634 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1635 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1636 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1640 * RF value list for RF5226
1641 * Supports: 2.4 GHz & 5.2 GHz
1643 static const struct rf_channel rf_vals_5226
[] = {
1644 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1645 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1646 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1647 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1648 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1649 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1650 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1651 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1652 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1653 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1654 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1655 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1656 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1657 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1659 /* 802.11 UNI / HyperLan 2 */
1660 { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1661 { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1662 { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1663 { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1664 { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1665 { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1666 { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1667 { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1669 /* 802.11 HyperLan 2 */
1670 { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1671 { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1672 { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1673 { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1674 { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1675 { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1676 { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1677 { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1678 { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1679 { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1682 { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1683 { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1684 { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1685 { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1686 { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1687 { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1689 /* MMAC(Japan)J52 ch 34,38,42,46 */
1690 { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1691 { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1692 { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1693 { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1697 * RF value list for RF5225 & RF2527
1698 * Supports: 2.4 GHz & 5.2 GHz
1700 static const struct rf_channel rf_vals_5225_2527
[] = {
1701 { 1, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1702 { 2, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1703 { 3, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1704 { 4, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1705 { 5, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1706 { 6, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1707 { 7, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1708 { 8, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1709 { 9, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1710 { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1711 { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1712 { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1713 { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1714 { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1716 /* 802.11 UNI / HyperLan 2 */
1717 { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1718 { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1719 { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1720 { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1721 { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1722 { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1723 { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1724 { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1726 /* 802.11 HyperLan 2 */
1727 { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1728 { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1729 { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1730 { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1731 { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1732 { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1733 { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1734 { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1735 { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1736 { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1739 { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1740 { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1741 { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1742 { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1743 { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1744 { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1746 /* MMAC(Japan)J52 ch 34,38,42,46 */
1747 { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1748 { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1749 { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1750 { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1754 static void rt73usb_probe_hw_mode(struct rt2x00_dev
*rt2x00dev
)
1756 struct hw_mode_spec
*spec
= &rt2x00dev
->spec
;
1761 * Initialize all hw fields.
1763 rt2x00dev
->hw
->flags
=
1764 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE
|
1765 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING
;
1766 rt2x00dev
->hw
->extra_tx_headroom
= TXD_DESC_SIZE
;
1767 rt2x00dev
->hw
->max_signal
= MAX_SIGNAL
;
1768 rt2x00dev
->hw
->max_rssi
= MAX_RX_SSI
;
1769 rt2x00dev
->hw
->queues
= 5;
1771 SET_IEEE80211_DEV(rt2x00dev
->hw
, &rt2x00dev_usb(rt2x00dev
)->dev
);
1772 SET_IEEE80211_PERM_ADDR(rt2x00dev
->hw
,
1773 rt2x00_eeprom_addr(rt2x00dev
,
1774 EEPROM_MAC_ADDR_0
));
1777 * Convert tx_power array in eeprom.
1779 txpower
= rt2x00_eeprom_addr(rt2x00dev
, EEPROM_TXPOWER_G_START
);
1780 for (i
= 0; i
< 14; i
++)
1781 txpower
[i
] = TXPOWER_FROM_DEV(txpower
[i
]);
1784 * Initialize hw_mode information.
1786 spec
->num_modes
= 2;
1787 spec
->num_rates
= 12;
1788 spec
->tx_power_a
= NULL
;
1789 spec
->tx_power_bg
= txpower
;
1790 spec
->tx_power_default
= DEFAULT_TXPOWER
;
1792 if (rt2x00_rf(&rt2x00dev
->chip
, RF2528
)) {
1793 spec
->num_channels
= ARRAY_SIZE(rf_vals_bg_2528
);
1794 spec
->channels
= rf_vals_bg_2528
;
1795 } else if (rt2x00_rf(&rt2x00dev
->chip
, RF5226
)) {
1796 spec
->num_channels
= ARRAY_SIZE(rf_vals_5226
);
1797 spec
->channels
= rf_vals_5226
;
1798 } else if (rt2x00_rf(&rt2x00dev
->chip
, RF2527
)) {
1799 spec
->num_channels
= 14;
1800 spec
->channels
= rf_vals_5225_2527
;
1801 } else if (rt2x00_rf(&rt2x00dev
->chip
, RF5225
)) {
1802 spec
->num_channels
= ARRAY_SIZE(rf_vals_5225_2527
);
1803 spec
->channels
= rf_vals_5225_2527
;
1806 if (rt2x00_rf(&rt2x00dev
->chip
, RF5225
) ||
1807 rt2x00_rf(&rt2x00dev
->chip
, RF5226
)) {
1808 spec
->num_modes
= 3;
1810 txpower
= rt2x00_eeprom_addr(rt2x00dev
, EEPROM_TXPOWER_A_START
);
1811 for (i
= 0; i
< 14; i
++)
1812 txpower
[i
] = TXPOWER_FROM_DEV(txpower
[i
]);
1814 spec
->tx_power_a
= txpower
;
1818 static int rt73usb_probe_hw(struct rt2x00_dev
*rt2x00dev
)
1823 * Allocate eeprom data.
1825 retval
= rt73usb_validate_eeprom(rt2x00dev
);
1829 retval
= rt73usb_init_eeprom(rt2x00dev
);
1834 * Initialize hw specifications.
1836 rt73usb_probe_hw_mode(rt2x00dev
);
1839 * This device requires firmware
1841 __set_bit(DRIVER_REQUIRE_FIRMWARE
, &rt2x00dev
->flags
);
1844 * Set the rssi offset.
1846 rt2x00dev
->rssi_offset
= DEFAULT_RSSI_OFFSET
;
1852 * IEEE80211 stack callback functions.
1854 static void rt73usb_configure_filter(struct ieee80211_hw
*hw
,
1855 unsigned int changed_flags
,
1856 unsigned int *total_flags
,
1858 struct dev_addr_list
*mc_list
)
1860 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1864 * Mask off any flags we are going to ignore from
1865 * the total_flags field.
1876 * Apply some rules to the filters:
1877 * - Some filters imply different filters to be set.
1878 * - Some things we can't filter out at all.
1879 <<<<<<< HEAD:drivers/net/wireless/rt2x00/rt73usb.c
1881 * - Multicast filter seems to kill broadcast traffic so never use it.
1882 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/rt2x00/rt73usb.c
1884 <<<<<<< HEAD
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
1886 *total_flags
|= FIF_ALLMULTI
;
1888 *total_flags
|= FIF_ALLMULTI
;
1889 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
1890 if (*total_flags
& FIF_OTHER_BSS
||
1891 *total_flags
& FIF_PROMISC_IN_BSS
)
1892 *total_flags
|= FIF_PROMISC_IN_BSS
| FIF_OTHER_BSS
;
1895 * Check if there is any work left for us.
1897 if (rt2x00dev
->packet_filter
== *total_flags
)
1899 rt2x00dev
->packet_filter
= *total_flags
;
1902 * When in atomic context, reschedule and let rt2x00lib
1903 * call this function again.
1906 queue_work(rt2x00dev
->hw
->workqueue
, &rt2x00dev
->filter_work
);
1911 * Start configuration steps.
1912 * Note that the version error will always be dropped
1913 * and broadcast frames will always be accepted since
1914 * there is no filter for it at this time.
1916 rt73usb_register_read(rt2x00dev
, TXRX_CSR0
, ®
);
1917 rt2x00_set_field32(®
, TXRX_CSR0_DROP_CRC
,
1918 !(*total_flags
& FIF_FCSFAIL
));
1919 rt2x00_set_field32(®
, TXRX_CSR0_DROP_PHYSICAL
,
1920 !(*total_flags
& FIF_PLCPFAIL
));
1921 rt2x00_set_field32(®
, TXRX_CSR0_DROP_CONTROL
,
1922 !(*total_flags
& FIF_CONTROL
));
1923 rt2x00_set_field32(®
, TXRX_CSR0_DROP_NOT_TO_ME
,
1924 !(*total_flags
& FIF_PROMISC_IN_BSS
));
1925 rt2x00_set_field32(®
, TXRX_CSR0_DROP_TO_DS
,
1926 !(*total_flags
& FIF_PROMISC_IN_BSS
));
1927 rt2x00_set_field32(®
, TXRX_CSR0_DROP_VERSION_ERROR
, 1);
1928 rt2x00_set_field32(®
, TXRX_CSR0_DROP_MULTICAST
,
1929 !(*total_flags
& FIF_ALLMULTI
));
1930 rt2x00_set_field32(®
, TXRX_CSR0_DROP_BROADCAST
, 0);
1931 rt2x00_set_field32(®
, TXRX_CSR0_DROP_ACK_CTS
, 1);
1932 rt73usb_register_write(rt2x00dev
, TXRX_CSR0
, reg
);
1935 static int rt73usb_set_retry_limit(struct ieee80211_hw
*hw
,
1936 u32 short_retry
, u32 long_retry
)
1938 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1941 rt73usb_register_read(rt2x00dev
, TXRX_CSR4
, ®
);
1942 rt2x00_set_field32(®
, TXRX_CSR4_LONG_RETRY_LIMIT
, long_retry
);
1943 rt2x00_set_field32(®
, TXRX_CSR4_SHORT_RETRY_LIMIT
, short_retry
);
1944 rt73usb_register_write(rt2x00dev
, TXRX_CSR4
, reg
);
1951 * Mac80211 demands get_tsf must be atomic.
1952 * This is not possible for rt73usb since all register access
1953 * functions require sleeping. Untill mac80211 no longer needs
1954 * get_tsf to be atomic, this function should be disabled.
1956 static u64
rt73usb_get_tsf(struct ieee80211_hw
*hw
)
1958 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1962 rt73usb_register_read(rt2x00dev
, TXRX_CSR13
, ®
);
1963 tsf
= (u64
) rt2x00_get_field32(reg
, TXRX_CSR13_HIGH_TSFTIMER
) << 32;
1964 rt73usb_register_read(rt2x00dev
, TXRX_CSR12
, ®
);
1965 tsf
|= rt2x00_get_field32(reg
, TXRX_CSR12_LOW_TSFTIMER
);
1970 #define rt73usb_get_tsf NULL
1973 static void rt73usb_reset_tsf(struct ieee80211_hw
*hw
)
1975 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1977 rt73usb_register_write(rt2x00dev
, TXRX_CSR12
, 0);
1978 rt73usb_register_write(rt2x00dev
, TXRX_CSR13
, 0);
1981 static int rt73usb_beacon_update(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
1982 struct ieee80211_tx_control
*control
)
1984 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
1985 struct skb_desc
*desc
;
1986 struct data_ring
*ring
;
1987 struct data_entry
*entry
;
1991 * Just in case the ieee80211 doesn't set this,
1992 * but we need this queue set for the descriptor
1995 control
->queue
= IEEE80211_TX_QUEUE_BEACON
;
1996 ring
= rt2x00lib_get_ring(rt2x00dev
, control
->queue
);
1997 entry
= rt2x00_get_data_entry(ring
);
2000 * Add the descriptor in front of the skb.
2002 skb_push(skb
, ring
->desc_size
);
2003 memset(skb
->data
, 0, ring
->desc_size
);
2006 * Fill in skb descriptor
2008 desc
= get_skb_desc(skb
);
2009 desc
->desc_len
= ring
->desc_size
;
2010 desc
->data_len
= skb
->len
- ring
->desc_size
;
2011 desc
->desc
= skb
->data
;
2012 desc
->data
= skb
->data
+ ring
->desc_size
;
2014 desc
->entry
= entry
;
2016 rt2x00lib_write_tx_desc(rt2x00dev
, skb
, control
);
2019 * Write entire beacon with descriptor to register,
2020 * and kick the beacon generator.
2022 timeout
= REGISTER_TIMEOUT
* (skb
->len
/ sizeof(u32
));
2023 rt2x00usb_vendor_request(rt2x00dev
, USB_MULTI_WRITE
,
2024 USB_VENDOR_REQUEST_OUT
,
2025 HW_BEACON_BASE0
, 0x0000,
2026 skb
->data
, skb
->len
, timeout
);
2027 rt73usb_kick_tx_queue(rt2x00dev
, IEEE80211_TX_QUEUE_BEACON
);
2032 static const struct ieee80211_ops rt73usb_mac80211_ops
= {
2034 .start
= rt2x00mac_start
,
2035 .stop
= rt2x00mac_stop
,
2036 .add_interface
= rt2x00mac_add_interface
,
2037 .remove_interface
= rt2x00mac_remove_interface
,
2038 .config
= rt2x00mac_config
,
2039 .config_interface
= rt2x00mac_config_interface
,
2040 .configure_filter
= rt73usb_configure_filter
,
2041 .get_stats
= rt2x00mac_get_stats
,
2042 .set_retry_limit
= rt73usb_set_retry_limit
,
2043 .bss_info_changed
= rt2x00mac_bss_info_changed
,
2044 .conf_tx
= rt2x00mac_conf_tx
,
2045 .get_tx_stats
= rt2x00mac_get_tx_stats
,
2046 .get_tsf
= rt73usb_get_tsf
,
2047 .reset_tsf
= rt73usb_reset_tsf
,
2048 .beacon_update
= rt73usb_beacon_update
,
2051 static const struct rt2x00lib_ops rt73usb_rt2x00_ops
= {
2052 .probe_hw
= rt73usb_probe_hw
,
2053 .get_firmware_name
= rt73usb_get_firmware_name
,
2054 .load_firmware
= rt73usb_load_firmware
,
2055 .initialize
= rt2x00usb_initialize
,
2056 .uninitialize
= rt2x00usb_uninitialize
,
2057 .init_rxentry
= rt2x00usb_init_rxentry
,
2058 .init_txentry
= rt2x00usb_init_txentry
,
2059 .set_device_state
= rt73usb_set_device_state
,
2060 .link_stats
= rt73usb_link_stats
,
2061 .reset_tuner
= rt73usb_reset_tuner
,
2062 .link_tuner
= rt73usb_link_tuner
,
2063 .write_tx_desc
= rt73usb_write_tx_desc
,
2064 .write_tx_data
= rt2x00usb_write_tx_data
,
2065 .get_tx_data_len
= rt73usb_get_tx_data_len
,
2066 .kick_tx_queue
= rt73usb_kick_tx_queue
,
2067 .fill_rxdone
= rt73usb_fill_rxdone
,
2068 .config_mac_addr
= rt73usb_config_mac_addr
,
2069 .config_bssid
= rt73usb_config_bssid
,
2070 .config_type
= rt73usb_config_type
,
2071 .config_preamble
= rt73usb_config_preamble
,
2072 .config
= rt73usb_config
,
2075 static const struct rt2x00_ops rt73usb_ops
= {
2076 .name
= KBUILD_MODNAME
,
2077 .rxd_size
= RXD_DESC_SIZE
,
2078 .txd_size
= TXD_DESC_SIZE
,
2079 .eeprom_size
= EEPROM_SIZE
,
2081 .lib
= &rt73usb_rt2x00_ops
,
2082 .hw
= &rt73usb_mac80211_ops
,
2083 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2084 .debugfs
= &rt73usb_rt2x00debug
,
2085 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2089 * rt73usb module information.
2091 static struct usb_device_id rt73usb_device_table
[] = {
2093 { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops
) },
2095 { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops
) },
2097 { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops
) },
2098 { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops
) },
2100 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops
) },
2101 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops
) },
2102 { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops
) },
2103 { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops
) },
2105 { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops
) },
2107 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops
) },
2109 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops
) },
2110 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops
) },
2112 { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops
) },
2114 { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops
) },
2115 { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops
) },
2116 <<<<<<< HEAD
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
2118 { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops
) },
2119 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/wireless
/rt2x00
/rt73usb
.c
2121 { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops
) },
2123 { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops
) },
2124 { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops
) },
2126 { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops
) },
2128 { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops
) },
2129 { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops
) },
2131 { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops
) },
2132 { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops
) },
2134 { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops
) },
2135 { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops
) },
2136 { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops
) },
2137 { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops
) },
2139 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops
) },
2140 { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops
) },
2142 { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops
) },
2143 { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops
) },
2144 { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops
) },
2146 { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops
) },
2148 { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops
) },
2149 { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops
) },
2151 { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops
) },
2153 { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops
) },
2154 { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops
) },
2158 MODULE_AUTHOR(DRV_PROJECT
);
2159 MODULE_VERSION(DRV_VERSION
);
2160 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2161 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2162 MODULE_DEVICE_TABLE(usb
, rt73usb_device_table
);
2163 MODULE_FIRMWARE(FIRMWARE_RT2571
);
2164 MODULE_LICENSE("GPL");
2166 static struct usb_driver rt73usb_driver
= {
2167 .name
= KBUILD_MODNAME
,
2168 .id_table
= rt73usb_device_table
,
2169 .probe
= rt2x00usb_probe
,
2170 .disconnect
= rt2x00usb_disconnect
,
2171 .suspend
= rt2x00usb_suspend
,
2172 .resume
= rt2x00usb_resume
,
2175 static int __init
rt73usb_init(void)
2177 return usb_register(&rt73usb_driver
);
2180 static void __exit
rt73usb_exit(void)
2182 usb_deregister(&rt73usb_driver
);
2185 module_init(rt73usb_init
);
2186 module_exit(rt73usb_exit
);