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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / mmc / host / tifm_sd.c
blobb1b2c9cd25360362d9d77424506b8b500c6ad5b4
1 /*
2 * tifm_sd.c - TI FlashMedia driver
3 *
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Special thanks to Brad Campbell for extensive testing of this driver.
11 *
12 */
13
14
15 #include <linux/tifm.h>
16 #include <linux/mmc/host.h>
17 #include <linux/highmem.h>
18 #include <linux/scatterlist.h>
19 #include <asm/io.h>
20
21 #define DRIVER_NAME "tifm_sd"
22 #define DRIVER_VERSION "0.8"
23
24 static int no_dma = 0;
25 static int fixed_timeout = 0;
26 module_param(no_dma, bool, 0644);
27 module_param(fixed_timeout, bool, 0644);
28
29 /* Constants here are mostly from OMAP5912 datasheet */
30 #define TIFM_MMCSD_RESET 0x0002
31 #define TIFM_MMCSD_CLKMASK 0x03ff
32 #define TIFM_MMCSD_POWER 0x0800
33 #define TIFM_MMCSD_4BBUS 0x8000
34 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
35 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
36 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
37 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
38 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
39 #define TIFM_MMCSD_READ 0x8000
40
41 #define TIFM_MMCSD_ERRMASK 0x01e0 /* set bits: CCRC, CTO, DCRC, DTO */
42 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
43 #define TIFM_MMCSD_CD 0x0002 /* card detect */
44 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
45 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
46 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
47 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */
48 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
49 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */
50 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
51 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
52 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
53 #define TIFM_MMCSD_OCRB 0x1000 /* OCR busy */
54 #define TIFM_MMCSD_CIRQ 0x2000 /* card irq (cmd40/sdio) */
55 #define TIFM_MMCSD_CERR 0x4000 /* card status error */
56
57 #define TIFM_MMCSD_ODTO 0x0040 /* open drain / extended timeout */
58 #define TIFM_MMCSD_CARD_RO 0x0200 /* card is read-only */
59
60 #define TIFM_MMCSD_FIFO_SIZE 0x0020
61
62 #define TIFM_MMCSD_RSP_R0 0x0000
63 #define TIFM_MMCSD_RSP_R1 0x0100
64 #define TIFM_MMCSD_RSP_R2 0x0200
65 #define TIFM_MMCSD_RSP_R3 0x0300
66 #define TIFM_MMCSD_RSP_R4 0x0400
67 #define TIFM_MMCSD_RSP_R5 0x0500
68 #define TIFM_MMCSD_RSP_R6 0x0600
69
70 #define TIFM_MMCSD_RSP_BUSY 0x0800
71
72 #define TIFM_MMCSD_CMD_BC 0x0000
73 #define TIFM_MMCSD_CMD_BCR 0x1000
74 #define TIFM_MMCSD_CMD_AC 0x2000
75 #define TIFM_MMCSD_CMD_ADTC 0x3000
76
77 #define TIFM_MMCSD_MAX_BLOCK_SIZE 0x0800UL
78
79 enum {
80 CMD_READY = 0x0001,
81 FIFO_READY = 0x0002,
82 BRS_READY = 0x0004,
83 SCMD_ACTIVE = 0x0008,
84 SCMD_READY = 0x0010,
85 CARD_BUSY = 0x0020,
86 DATA_CARRY = 0x0040
87 };
88
89 struct tifm_sd {
90 struct tifm_dev *dev;
91
92 unsigned short eject:1,
93 open_drain:1,
94 no_dma:1;
95 unsigned short cmd_flags;
96
97 unsigned int clk_freq;
98 unsigned int clk_div;
99 unsigned long timeout_jiffies;
100
101 struct tasklet_struct finish_tasklet;
102 struct timer_list timer;
103 struct mmc_request *req;
104
105 int sg_len;
106 int sg_pos;
107 unsigned int block_pos;
108 struct scatterlist bounce_buf;
109 unsigned char bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE];
110 };
111
112 /* for some reason, host won't respond correctly to readw/writew */
113 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg,
114 unsigned int off, unsigned int cnt)
115 {
116 struct tifm_dev *sock = host->dev;
117 unsigned char *buf;
118 unsigned int pos = 0, val;
119
120 buf = kmap_atomic(pg, KM_BIO_DST_IRQ) + off;
121 if (host->cmd_flags & DATA_CARRY) {
122 buf[pos++] = host->bounce_buf_data[0];
123 host->cmd_flags &= ~DATA_CARRY;
124 }
125
126 while (pos < cnt) {
127 val = readl(sock->addr + SOCK_MMCSD_DATA);
128 buf[pos++] = val & 0xff;
129 if (pos == cnt) {
130 host->bounce_buf_data[0] = (val >> 8) & 0xff;
131 host->cmd_flags |= DATA_CARRY;
132 break;
133 }
134 buf[pos++] = (val >> 8) & 0xff;
135 }
136 kunmap_atomic(buf - off, KM_BIO_DST_IRQ);
137 }
138
139 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg,
140 unsigned int off, unsigned int cnt)
141 {
142 struct tifm_dev *sock = host->dev;
143 unsigned char *buf;
144 unsigned int pos = 0, val;
145
146 buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + off;
147 if (host->cmd_flags & DATA_CARRY) {
148 val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00);
149 writel(val, sock->addr + SOCK_MMCSD_DATA);
150 host->cmd_flags &= ~DATA_CARRY;
151 }
152
153 while (pos < cnt) {
154 val = buf[pos++];
155 if (pos == cnt) {
156 host->bounce_buf_data[0] = val & 0xff;
157 host->cmd_flags |= DATA_CARRY;
158 break;
159 }
160 val |= (buf[pos++] << 8) & 0xff00;
161 writel(val, sock->addr + SOCK_MMCSD_DATA);
162 }
163 kunmap_atomic(buf - off, KM_BIO_SRC_IRQ);
164 }
165
166 static void tifm_sd_transfer_data(struct tifm_sd *host)
167 {
168 struct mmc_data *r_data = host->req->cmd->data;
169 struct scatterlist *sg = r_data->sg;
170 unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2;
171 unsigned int p_off, p_cnt;
172 struct page *pg;
173
174 if (host->sg_pos == host->sg_len)
175 return;
176 while (t_size) {
177 cnt = sg[host->sg_pos].length - host->block_pos;
178 if (!cnt) {
179 host->block_pos = 0;
180 host->sg_pos++;
181 if (host->sg_pos == host->sg_len) {
182 if ((r_data->flags & MMC_DATA_WRITE)
183 <<<<<<< HEAD:drivers/mmc/host/tifm_sd.c
184 && DATA_CARRY)
185 =======
186 && (host->cmd_flags & DATA_CARRY))
187 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/mmc/host/tifm_sd.c
188 writel(host->bounce_buf_data[0],
189 host->dev->addr
190 + SOCK_MMCSD_DATA);
191
192 return;
193 }
194 cnt = sg[host->sg_pos].length;
195 }
196 off = sg[host->sg_pos].offset + host->block_pos;
197
198 pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
199 p_off = offset_in_page(off);
200 p_cnt = PAGE_SIZE - p_off;
201 p_cnt = min(p_cnt, cnt);
202 p_cnt = min(p_cnt, t_size);
203
204 if (r_data->flags & MMC_DATA_READ)
205 tifm_sd_read_fifo(host, pg, p_off, p_cnt);
206 else if (r_data->flags & MMC_DATA_WRITE)
207 tifm_sd_write_fifo(host, pg, p_off, p_cnt);
208
209 t_size -= p_cnt;
210 host->block_pos += p_cnt;
211 }
212 }
213
214 static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off,
215 struct page *src, unsigned int src_off,
216 unsigned int count)
217 {
218 unsigned char *src_buf = kmap_atomic(src, KM_BIO_SRC_IRQ) + src_off;
219 unsigned char *dst_buf = kmap_atomic(dst, KM_BIO_DST_IRQ) + dst_off;
220
221 memcpy(dst_buf, src_buf, count);
222
223 kunmap_atomic(dst_buf - dst_off, KM_BIO_DST_IRQ);
224 kunmap_atomic(src_buf - src_off, KM_BIO_SRC_IRQ);
225 }
226
227 static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data)
228 {
229 struct scatterlist *sg = r_data->sg;
230 unsigned int t_size = r_data->blksz;
231 unsigned int off, cnt;
232 unsigned int p_off, p_cnt;
233 struct page *pg;
234
235 dev_dbg(&host->dev->dev, "bouncing block\n");
236 while (t_size) {
237 cnt = sg[host->sg_pos].length - host->block_pos;
238 if (!cnt) {
239 host->block_pos = 0;
240 host->sg_pos++;
241 if (host->sg_pos == host->sg_len)
242 return;
243 cnt = sg[host->sg_pos].length;
244 }
245 off = sg[host->sg_pos].offset + host->block_pos;
246
247 pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
248 p_off = offset_in_page(off);
249 p_cnt = PAGE_SIZE - p_off;
250 p_cnt = min(p_cnt, cnt);
251 p_cnt = min(p_cnt, t_size);
252
253 if (r_data->flags & MMC_DATA_WRITE)
254 tifm_sd_copy_page(sg_page(&host->bounce_buf),
255 r_data->blksz - t_size,
256 pg, p_off, p_cnt);
257 else if (r_data->flags & MMC_DATA_READ)
258 tifm_sd_copy_page(pg, p_off, sg_page(&host->bounce_buf),
259 r_data->blksz - t_size, p_cnt);
260
261 t_size -= p_cnt;
262 host->block_pos += p_cnt;
263 }
264 }
265
266 static int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data)
267 {
268 struct tifm_dev *sock = host->dev;
269 unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz;
270 unsigned int dma_len, dma_blk_cnt, dma_off;
271 struct scatterlist *sg = NULL;
272 unsigned long flags;
273
274 if (host->sg_pos == host->sg_len)
275 return 1;
276
277 if (host->cmd_flags & DATA_CARRY) {
278 host->cmd_flags &= ~DATA_CARRY;
279 local_irq_save(flags);
280 tifm_sd_bounce_block(host, r_data);
281 local_irq_restore(flags);
282 if (host->sg_pos == host->sg_len)
283 return 1;
284 }
285
286 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos;
287 if (!dma_len) {
288 host->block_pos = 0;
289 host->sg_pos++;
290 if (host->sg_pos == host->sg_len)
291 return 1;
292 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]);
293 }
294
295 if (dma_len < t_size) {
296 dma_blk_cnt = dma_len / r_data->blksz;
297 dma_off = host->block_pos;
298 host->block_pos += dma_blk_cnt * r_data->blksz;
299 } else {
300 dma_blk_cnt = TIFM_DMA_TSIZE;
301 dma_off = host->block_pos;
302 host->block_pos += t_size;
303 }
304
305 if (dma_blk_cnt)
306 sg = &r_data->sg[host->sg_pos];
307 else if (dma_len) {
308 if (r_data->flags & MMC_DATA_WRITE) {
309 local_irq_save(flags);
310 tifm_sd_bounce_block(host, r_data);
311 local_irq_restore(flags);
312 } else
313 host->cmd_flags |= DATA_CARRY;
314
315 sg = &host->bounce_buf;
316 dma_off = 0;
317 dma_blk_cnt = 1;
318 } else
319 return 1;
320
321 dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt);
322 writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS);
323 if (r_data->flags & MMC_DATA_WRITE)
324 writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
325 sock->addr + SOCK_DMA_CONTROL);
326 else
327 writel((dma_blk_cnt << 8) | TIFM_DMA_EN,
328 sock->addr + SOCK_DMA_CONTROL);
329
330 return 0;
331 }
332
333 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
334 {
335 unsigned int rc = 0;
336
337 switch (mmc_resp_type(cmd)) {
338 case MMC_RSP_NONE:
339 rc |= TIFM_MMCSD_RSP_R0;
340 break;
341 case MMC_RSP_R1B:
342 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
343 case MMC_RSP_R1:
344 rc |= TIFM_MMCSD_RSP_R1;
345 break;
346 case MMC_RSP_R2:
347 rc |= TIFM_MMCSD_RSP_R2;
348 break;
349 case MMC_RSP_R3:
350 rc |= TIFM_MMCSD_RSP_R3;
351 break;
352 default:
353 BUG();
354 }
355
356 switch (mmc_cmd_type(cmd)) {
357 case MMC_CMD_BC:
358 rc |= TIFM_MMCSD_CMD_BC;
359 break;
360 case MMC_CMD_BCR:
361 rc |= TIFM_MMCSD_CMD_BCR;
362 break;
363 case MMC_CMD_AC:
364 rc |= TIFM_MMCSD_CMD_AC;
365 break;
366 case MMC_CMD_ADTC:
367 rc |= TIFM_MMCSD_CMD_ADTC;
368 break;
369 default:
370 BUG();
371 }
372 return rc;
373 }
374
375 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
376 {
377 struct tifm_dev *sock = host->dev;
378 unsigned int cmd_mask = tifm_sd_op_flags(cmd);
379
380 if (host->open_drain)
381 cmd_mask |= TIFM_MMCSD_ODTO;
382
383 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
384 cmd_mask |= TIFM_MMCSD_READ;
385
386 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
387 cmd->opcode, cmd->arg, cmd_mask);
388
389 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
390 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
391 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
392 }
393
394 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
395 {
396 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
397 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
398 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
399 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
400 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
401 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
402 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
403 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
404 }
405
406 static void tifm_sd_check_status(struct tifm_sd *host)
407 {
408 struct tifm_dev *sock = host->dev;
409 struct mmc_command *cmd = host->req->cmd;
410
411 if (cmd->error)
412 goto finish_request;
413
414 if (!(host->cmd_flags & CMD_READY))
415 return;
416
417 if (cmd->data) {
418 if (cmd->data->error) {
419 if ((host->cmd_flags & SCMD_ACTIVE)
420 && !(host->cmd_flags & SCMD_READY))
421 return;
422
423 goto finish_request;
424 }
425
426 if (!(host->cmd_flags & BRS_READY))
427 return;
428
429 if (!(host->no_dma || (host->cmd_flags & FIFO_READY)))
430 return;
431
432 if (cmd->data->flags & MMC_DATA_WRITE) {
433 if (host->req->stop) {
434 if (!(host->cmd_flags & SCMD_ACTIVE)) {
435 host->cmd_flags |= SCMD_ACTIVE;
436 writel(TIFM_MMCSD_EOFB
437 | readl(sock->addr
438 + SOCK_MMCSD_INT_ENABLE),
439 sock->addr
440 + SOCK_MMCSD_INT_ENABLE);
441 tifm_sd_exec(host, host->req->stop);
442 return;
443 } else {
444 if (!(host->cmd_flags & SCMD_READY)
445 || (host->cmd_flags & CARD_BUSY))
446 return;
447 writel((~TIFM_MMCSD_EOFB)
448 & readl(sock->addr
449 + SOCK_MMCSD_INT_ENABLE),
450 sock->addr
451 + SOCK_MMCSD_INT_ENABLE);
452 }
453 } else {
454 if (host->cmd_flags & CARD_BUSY)
455 return;
456 writel((~TIFM_MMCSD_EOFB)
457 & readl(sock->addr
458 + SOCK_MMCSD_INT_ENABLE),
459 sock->addr + SOCK_MMCSD_INT_ENABLE);
460 }
461 } else {
462 if (host->req->stop) {
463 if (!(host->cmd_flags & SCMD_ACTIVE)) {
464 host->cmd_flags |= SCMD_ACTIVE;
465 tifm_sd_exec(host, host->req->stop);
466 return;
467 } else {
468 if (!(host->cmd_flags & SCMD_READY))
469 return;
470 }
471 }
472 }
473 }
474 finish_request:
475 tasklet_schedule(&host->finish_tasklet);
476 }
477
478 /* Called from interrupt handler */
479 static void tifm_sd_data_event(struct tifm_dev *sock)
480 {
481 struct tifm_sd *host;
482 unsigned int fifo_status = 0;
483 struct mmc_data *r_data = NULL;
484
485 spin_lock(&sock->lock);
486 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
487 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
488 dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n",
489 fifo_status, host->cmd_flags);
490
491 if (host->req) {
492 r_data = host->req->cmd->data;
493
494 if (r_data && (fifo_status & TIFM_FIFO_READY)) {
495 if (tifm_sd_set_dma_data(host, r_data)) {
496 host->cmd_flags |= FIFO_READY;
497 tifm_sd_check_status(host);
498 }
499 }
500 }
501
502 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
503 spin_unlock(&sock->lock);
504 }
505
506 /* Called from interrupt handler */
507 static void tifm_sd_card_event(struct tifm_dev *sock)
508 {
509 struct tifm_sd *host;
510 unsigned int host_status = 0;
511 int cmd_error = 0;
512 struct mmc_command *cmd = NULL;
513 unsigned long flags;
514
515 spin_lock(&sock->lock);
516 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
517 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
518 dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
519 host_status, host->cmd_flags);
520
521 if (host->req) {
522 cmd = host->req->cmd;
523
524 if (host_status & TIFM_MMCSD_ERRMASK) {
525 writel(host_status & TIFM_MMCSD_ERRMASK,
526 sock->addr + SOCK_MMCSD_STATUS);
527 if (host_status & TIFM_MMCSD_CTO)
528 cmd_error = -ETIMEDOUT;
529 else if (host_status & TIFM_MMCSD_CCRC)
530 cmd_error = -EILSEQ;
531
532 if (cmd->data) {
533 if (host_status & TIFM_MMCSD_DTO)
534 cmd->data->error = -ETIMEDOUT;
535 else if (host_status & TIFM_MMCSD_DCRC)
536 cmd->data->error = -EILSEQ;
537 }
538
539 writel(TIFM_FIFO_INT_SETALL,
540 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
541 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
542
543 if (host->req->stop) {
544 if (host->cmd_flags & SCMD_ACTIVE) {
545 host->req->stop->error = cmd_error;
546 host->cmd_flags |= SCMD_READY;
547 } else {
548 cmd->error = cmd_error;
549 host->cmd_flags |= SCMD_ACTIVE;
550 tifm_sd_exec(host, host->req->stop);
551 goto done;
552 }
553 } else
554 cmd->error = cmd_error;
555 } else {
556 if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) {
557 if (!(host->cmd_flags & CMD_READY)) {
558 host->cmd_flags |= CMD_READY;
559 tifm_sd_fetch_resp(cmd, sock);
560 } else if (host->cmd_flags & SCMD_ACTIVE) {
561 host->cmd_flags |= SCMD_READY;
562 tifm_sd_fetch_resp(host->req->stop,
563 sock);
564 }
565 }
566 if (host_status & TIFM_MMCSD_BRS)
567 host->cmd_flags |= BRS_READY;
568 }
569
570 if (host->no_dma && cmd->data) {
571 if (host_status & TIFM_MMCSD_AE)
572 writel(host_status & TIFM_MMCSD_AE,
573 sock->addr + SOCK_MMCSD_STATUS);
574
575 if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF
576 | TIFM_MMCSD_BRS)) {
577 local_irq_save(flags);
578 tifm_sd_transfer_data(host);
579 local_irq_restore(flags);
580 host_status &= ~TIFM_MMCSD_AE;
581 }
582 }
583
584 if (host_status & TIFM_MMCSD_EOFB)
585 host->cmd_flags &= ~CARD_BUSY;
586 else if (host_status & TIFM_MMCSD_CB)
587 host->cmd_flags |= CARD_BUSY;
588
589 tifm_sd_check_status(host);
590 }
591 done:
592 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
593 spin_unlock(&sock->lock);
594 }
595
596 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
597 struct mmc_data *data)
598 {
599 struct tifm_dev *sock = host->dev;
600 unsigned int data_timeout = data->timeout_clks;
601
602 if (fixed_timeout)
603 return;
604
605 data_timeout += data->timeout_ns /
606 ((1000000000UL / host->clk_freq) * host->clk_div);
607
608 if (data_timeout < 0xffff) {
609 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
610 writel((~TIFM_MMCSD_DPE)
611 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
612 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
613 } else {
614 data_timeout = (data_timeout >> 10) + 1;
615 if (data_timeout > 0xffff)
616 data_timeout = 0; /* set to unlimited */
617 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
618 writel(TIFM_MMCSD_DPE
619 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
620 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
621 }
622 }
623
624 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
625 {
626 struct tifm_sd *host = mmc_priv(mmc);
627 struct tifm_dev *sock = host->dev;
628 unsigned long flags;
629 struct mmc_data *r_data = mrq->cmd->data;
630
631 spin_lock_irqsave(&sock->lock, flags);
632 if (host->eject) {
633 mrq->cmd->error = -ENOMEDIUM;
634 goto err_out;
635 }
636
637 if (host->req) {
638 printk(KERN_ERR "%s : unfinished request detected\n",
639 sock->dev.bus_id);
640 mrq->cmd->error = -ETIMEDOUT;
641 goto err_out;
642 }
643
644 host->cmd_flags = 0;
645 host->block_pos = 0;
646 host->sg_pos = 0;
647
648 if (mrq->data && !is_power_of_2(mrq->data->blksz))
649 host->no_dma = 1;
650 else
651 host->no_dma = no_dma ? 1 : 0;
652
653 if (r_data) {
654 tifm_sd_set_data_timeout(host, r_data);
655
656 if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop)
657 writel(TIFM_MMCSD_EOFB
658 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
659 sock->addr + SOCK_MMCSD_INT_ENABLE);
660
661 if (host->no_dma) {
662 writel(TIFM_MMCSD_BUFINT
663 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
664 sock->addr + SOCK_MMCSD_INT_ENABLE);
665 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
666 | (TIFM_MMCSD_FIFO_SIZE - 1),
667 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
668
669 host->sg_len = r_data->sg_len;
670 } else {
671 sg_init_one(&host->bounce_buf, host->bounce_buf_data,
672 r_data->blksz);
673
674 if(1 != tifm_map_sg(sock, &host->bounce_buf, 1,
675 r_data->flags & MMC_DATA_WRITE
676 ? PCI_DMA_TODEVICE
677 : PCI_DMA_FROMDEVICE)) {
678 printk(KERN_ERR "%s : scatterlist map failed\n",
679 sock->dev.bus_id);
680 mrq->cmd->error = -ENOMEM;
681 goto err_out;
682 }
683 host->sg_len = tifm_map_sg(sock, r_data->sg,
684 r_data->sg_len,
685 r_data->flags
686 & MMC_DATA_WRITE
687 ? PCI_DMA_TODEVICE
688 : PCI_DMA_FROMDEVICE);
689 if (host->sg_len < 1) {
690 printk(KERN_ERR "%s : scatterlist map failed\n",
691 sock->dev.bus_id);
692 tifm_unmap_sg(sock, &host->bounce_buf, 1,
693 r_data->flags & MMC_DATA_WRITE
694 ? PCI_DMA_TODEVICE
695 : PCI_DMA_FROMDEVICE);
696 mrq->cmd->error = -ENOMEM;
697 goto err_out;
698 }
699
700 writel(TIFM_FIFO_INT_SETALL,
701 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
702 writel(ilog2(r_data->blksz) - 2,
703 sock->addr + SOCK_FIFO_PAGE_SIZE);
704 writel(TIFM_FIFO_ENABLE,
705 sock->addr + SOCK_FIFO_CONTROL);
706 writel(TIFM_FIFO_INTMASK,
707 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
708
709 if (r_data->flags & MMC_DATA_WRITE)
710 writel(TIFM_MMCSD_TXDE,
711 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
712 else
713 writel(TIFM_MMCSD_RXDE,
714 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
715
716 tifm_sd_set_dma_data(host, r_data);
717 }
718
719 writel(r_data->blocks - 1,
720 sock->addr + SOCK_MMCSD_NUM_BLOCKS);
721 writel(r_data->blksz - 1,
722 sock->addr + SOCK_MMCSD_BLOCK_LEN);
723 }
724
725 host->req = mrq;
726 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
727 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
728 sock->addr + SOCK_CONTROL);
729 tifm_sd_exec(host, mrq->cmd);
730 spin_unlock_irqrestore(&sock->lock, flags);
731 return;
732
733 err_out:
734 spin_unlock_irqrestore(&sock->lock, flags);
735 mmc_request_done(mmc, mrq);
736 }
737
738 static void tifm_sd_end_cmd(unsigned long data)
739 {
740 struct tifm_sd *host = (struct tifm_sd*)data;
741 struct tifm_dev *sock = host->dev;
742 struct mmc_host *mmc = tifm_get_drvdata(sock);
743 struct mmc_request *mrq;
744 struct mmc_data *r_data = NULL;
745 unsigned long flags;
746
747 spin_lock_irqsave(&sock->lock, flags);
748
749 del_timer(&host->timer);
750 mrq = host->req;
751 host->req = NULL;
752
753 if (!mrq) {
754 printk(KERN_ERR " %s : no request to complete?\n",
755 sock->dev.bus_id);
756 spin_unlock_irqrestore(&sock->lock, flags);
757 return;
758 }
759
760 r_data = mrq->cmd->data;
761 if (r_data) {
762 if (host->no_dma) {
763 writel((~TIFM_MMCSD_BUFINT)
764 & readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
765 sock->addr + SOCK_MMCSD_INT_ENABLE);
766 } else {
767 tifm_unmap_sg(sock, &host->bounce_buf, 1,
768 (r_data->flags & MMC_DATA_WRITE)
769 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
770 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
771 (r_data->flags & MMC_DATA_WRITE)
772 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
773 }
774
775 r_data->bytes_xfered = r_data->blocks
776 - readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
777 r_data->bytes_xfered *= r_data->blksz;
778 r_data->bytes_xfered += r_data->blksz
779 - readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
780 }
781
782 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
783 sock->addr + SOCK_CONTROL);
784
785 spin_unlock_irqrestore(&sock->lock, flags);
786 mmc_request_done(mmc, mrq);
787 }
788
789 static void tifm_sd_abort(unsigned long data)
790 {
791 struct tifm_sd *host = (struct tifm_sd*)data;
792
793 printk(KERN_ERR
794 "%s : card failed to respond for a long period of time "
795 "(%x, %x)\n",
796 host->dev->dev.bus_id, host->req->cmd->opcode, host->cmd_flags);
797
798 tifm_eject(host->dev);
799 }
800
801 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
802 {
803 struct tifm_sd *host = mmc_priv(mmc);
804 struct tifm_dev *sock = host->dev;
805 unsigned int clk_div1, clk_div2;
806 unsigned long flags;
807
808 spin_lock_irqsave(&sock->lock, flags);
809
810 dev_dbg(&sock->dev, "ios: clock = %u, vdd = %x, bus_mode = %x, "
811 "chip_select = %x, power_mode = %x, bus_width = %x\n",
812 ios->clock, ios->vdd, ios->bus_mode, ios->chip_select,
813 ios->power_mode, ios->bus_width);
814
815 if (ios->bus_width == MMC_BUS_WIDTH_4) {
816 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
817 sock->addr + SOCK_MMCSD_CONFIG);
818 } else {
819 writel((~TIFM_MMCSD_4BBUS)
820 & readl(sock->addr + SOCK_MMCSD_CONFIG),
821 sock->addr + SOCK_MMCSD_CONFIG);
822 }
823
824 if (ios->clock) {
825 clk_div1 = 20000000 / ios->clock;
826 if (!clk_div1)
827 clk_div1 = 1;
828
829 clk_div2 = 24000000 / ios->clock;
830 if (!clk_div2)
831 clk_div2 = 1;
832
833 if ((20000000 / clk_div1) > ios->clock)
834 clk_div1++;
835 if ((24000000 / clk_div2) > ios->clock)
836 clk_div2++;
837 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
838 host->clk_freq = 20000000;
839 host->clk_div = clk_div1;
840 writel((~TIFM_CTRL_FAST_CLK)
841 & readl(sock->addr + SOCK_CONTROL),
842 sock->addr + SOCK_CONTROL);
843 } else {
844 host->clk_freq = 24000000;
845 host->clk_div = clk_div2;
846 writel(TIFM_CTRL_FAST_CLK
847 | readl(sock->addr + SOCK_CONTROL),
848 sock->addr + SOCK_CONTROL);
849 }
850 } else {
851 host->clk_div = 0;
852 }
853 host->clk_div &= TIFM_MMCSD_CLKMASK;
854 writel(host->clk_div
855 | ((~TIFM_MMCSD_CLKMASK)
856 & readl(sock->addr + SOCK_MMCSD_CONFIG)),
857 sock->addr + SOCK_MMCSD_CONFIG);
858
859 host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN);
860
861 /* chip_select : maybe later */
862 //vdd
863 //power is set before probe / after remove
864
865 spin_unlock_irqrestore(&sock->lock, flags);
866 }
867
868 static int tifm_sd_ro(struct mmc_host *mmc)
869 {
870 int rc = 0;
871 struct tifm_sd *host = mmc_priv(mmc);
872 struct tifm_dev *sock = host->dev;
873 unsigned long flags;
874
875 spin_lock_irqsave(&sock->lock, flags);
876 if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE))
877 rc = 1;
878 spin_unlock_irqrestore(&sock->lock, flags);
879 return rc;
880 }
881
882 static const struct mmc_host_ops tifm_sd_ops = {
883 .request = tifm_sd_request,
884 .set_ios = tifm_sd_ios,
885 .get_ro = tifm_sd_ro
886 };
887
888 static int tifm_sd_initialize_host(struct tifm_sd *host)
889 {
890 int rc;
891 unsigned int host_status = 0;
892 struct tifm_dev *sock = host->dev;
893
894 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
895 mmiowb();
896 host->clk_div = 61;
897 host->clk_freq = 20000000;
898 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
899 writel(host->clk_div | TIFM_MMCSD_POWER,
900 sock->addr + SOCK_MMCSD_CONFIG);
901
902 /* wait up to 0.51 sec for reset */
903 for (rc = 32; rc <= 256; rc <<= 1) {
904 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
905 rc = 0;
906 break;
907 }
908 msleep(rc);
909 }
910
911 if (rc) {
912 printk(KERN_ERR "%s : controller failed to reset\n",
913 sock->dev.bus_id);
914 return -ENODEV;
915 }
916
917 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
918 writel(host->clk_div | TIFM_MMCSD_POWER,
919 sock->addr + SOCK_MMCSD_CONFIG);
920 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
921
922 // command timeout fixed to 64 clocks for now
923 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
924 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
925
926 for (rc = 16; rc <= 64; rc <<= 1) {
927 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
928 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
929 if (!(host_status & TIFM_MMCSD_ERRMASK)
930 && (host_status & TIFM_MMCSD_EOC)) {
931 rc = 0;
932 break;
933 }
934 msleep(rc);
935 }
936
937 if (rc) {
938 printk(KERN_ERR
939 "%s : card not ready - probe failed on initialization\n",
940 sock->dev.bus_id);
941 return -ENODEV;
942 }
943
944 writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC
945 | TIFM_MMCSD_ERRMASK,
946 sock->addr + SOCK_MMCSD_INT_ENABLE);
947 mmiowb();
948
949 return 0;
950 }
951
952 static int tifm_sd_probe(struct tifm_dev *sock)
953 {
954 struct mmc_host *mmc;
955 struct tifm_sd *host;
956 int rc = -EIO;
957
958 if (!(TIFM_SOCK_STATE_OCCUPIED
959 & readl(sock->addr + SOCK_PRESENT_STATE))) {
960 printk(KERN_WARNING "%s : card gone, unexpectedly\n",
961 sock->dev.bus_id);
962 return rc;
963 }
964
965 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
966 if (!mmc)
967 return -ENOMEM;
968
969 host = mmc_priv(mmc);
970 tifm_set_drvdata(sock, mmc);
971 host->dev = sock;
972 host->timeout_jiffies = msecs_to_jiffies(1000);
973
974 tasklet_init(&host->finish_tasklet, tifm_sd_end_cmd,
975 (unsigned long)host);
976 setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host);
977
978 mmc->ops = &tifm_sd_ops;
979 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
980 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE;
981 mmc->f_min = 20000000 / 60;
982 mmc->f_max = 24000000;
983
984 mmc->max_blk_count = 2048;
985 mmc->max_hw_segs = mmc->max_blk_count;
986 mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE);
987 mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size;
988 mmc->max_req_size = mmc->max_seg_size;
989 mmc->max_phys_segs = mmc->max_hw_segs;
990
991 sock->card_event = tifm_sd_card_event;
992 sock->data_event = tifm_sd_data_event;
993 rc = tifm_sd_initialize_host(host);
994
995 if (!rc)
996 rc = mmc_add_host(mmc);
997 if (!rc)
998 return 0;
999
1000 mmc_free_host(mmc);
1001 return rc;
1002 }
1003
1004 static void tifm_sd_remove(struct tifm_dev *sock)
1005 {
1006 struct mmc_host *mmc = tifm_get_drvdata(sock);
1007 struct tifm_sd *host = mmc_priv(mmc);
1008 unsigned long flags;
1009
1010 spin_lock_irqsave(&sock->lock, flags);
1011 host->eject = 1;
1012 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
1013 mmiowb();
1014 spin_unlock_irqrestore(&sock->lock, flags);
1015
1016 tasklet_kill(&host->finish_tasklet);
1017
1018 spin_lock_irqsave(&sock->lock, flags);
1019 if (host->req) {
1020 writel(TIFM_FIFO_INT_SETALL,
1021 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
1022 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
1023 host->req->cmd->error = -ENOMEDIUM;
1024 if (host->req->stop)
1025 host->req->stop->error = -ENOMEDIUM;
1026 tasklet_schedule(&host->finish_tasklet);
1027 }
1028 spin_unlock_irqrestore(&sock->lock, flags);
1029 mmc_remove_host(mmc);
1030 dev_dbg(&sock->dev, "after remove\n");
1031
1032 mmc_free_host(mmc);
1033 }
1034
1035 #ifdef CONFIG_PM
1036
1037 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
1038 {
1039 return mmc_suspend_host(tifm_get_drvdata(sock), state);
1040 }
1041
1042 static int tifm_sd_resume(struct tifm_dev *sock)
1043 {
1044 struct mmc_host *mmc = tifm_get_drvdata(sock);
1045 struct tifm_sd *host = mmc_priv(mmc);
1046 int rc;
1047
1048 rc = tifm_sd_initialize_host(host);
1049 dev_dbg(&sock->dev, "resume initialize %d\n", rc);
1050
1051 if (rc)
1052 host->eject = 1;
1053 else
1054 rc = mmc_resume_host(mmc);
1055
1056 return rc;
1057 }
1058
1059 #else
1060
1061 #define tifm_sd_suspend NULL
1062 #define tifm_sd_resume NULL
1063
1064 #endif /* CONFIG_PM */
1065
1066 static struct tifm_device_id tifm_sd_id_tbl[] = {
1067 { TIFM_TYPE_SD }, { }
1068 };
1069
1070 static struct tifm_driver tifm_sd_driver = {
1071 .driver = {
1072 .name = DRIVER_NAME,
1073 .owner = THIS_MODULE
1074 },
1075 .id_table = tifm_sd_id_tbl,
1076 .probe = tifm_sd_probe,
1077 .remove = tifm_sd_remove,
1078 .suspend = tifm_sd_suspend,
1079 .resume = tifm_sd_resume
1080 };
1081
1082 static int __init tifm_sd_init(void)
1083 {
1084 return tifm_register_driver(&tifm_sd_driver);
1085 }
1086
1087 static void __exit tifm_sd_exit(void)
1088 {
1089 tifm_unregister_driver(&tifm_sd_driver);
1090 }
1091
1092 MODULE_AUTHOR("Alex Dubov");
1093 MODULE_DESCRIPTION("TI FlashMedia SD driver");
1094 MODULE_LICENSE("GPL");
1095 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
1096 MODULE_VERSION(DRIVER_VERSION);
1097
1098 module_init(tifm_sd_init);
1099 module_exit(tifm_sd_exit);
WRT350N Kernel Patches