arch/sh/kernel/cpu/sh3/setup-sh770x.c

   1 /*
   2  * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
   3  *
   4  *  Copyright (C) 2007  Magnus Damm
   5  *
   6  * Based on setup-sh7709.c
   7  *
   8  *  Copyright (C) 2006  Paul Mundt
   9  *
  10  * This file is subject to the terms and conditions of the GNU General Public
  11  * License.  See the file "COPYING" in the main directory of this archive
  12  * for more details.
  13  */
  14 #include <linux/init.h>
  15 #include <linux/io.h>
  16 #include <linux/irq.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/serial.h>
  19 <<<<<<< HEAD:arch/sh/kernel/cpu/sh3/setup-sh770x.c
  20 #include <asm/sci.h>
  21 =======
  22 #include <linux/serial_sci.h>
  23 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/sh/kernel/cpu/sh3/setup-sh770x.c
  24
  25 enum {
  26         UNUSED = 0,
  27
  28         /* interrupt sources */
  29         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
  30         PINT07, PINT815,
  31         DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
  32         SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
  33         SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
  34         SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
  35         ADC_ADI,
  36         LCDC, PCC0, PCC1,
  37         TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
  38         RTC_ATI, RTC_PRI, RTC_CUI,
  39         WDT,
  40         REF_RCMI, REF_ROVI,
  41
  42         /* interrupt groups */
  43         RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
  44 };
  45
  46 static struct intc_vect vectors[] __initdata = {
  47         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
  48         INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
  49         INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
  50         INTC_VECT(RTC_CUI, 0x4c0),
  51         INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
  52         INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
  53         INTC_VECT(WDT, 0x560),
  54         INTC_VECT(REF_RCMI, 0x580),
  55         INTC_VECT(REF_ROVI, 0x5a0),
  56 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
  57     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  58     defined(CONFIG_CPU_SUBTYPE_SH7709)
  59         INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
  60         INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
  61         INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
  62         INTC_VECT(ADC_ADI, 0x980),
  63         INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
  64         INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
  65 #endif
  66 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  67     defined(CONFIG_CPU_SUBTYPE_SH7709)
  68         INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
  69         INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
  70         INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
  71 #endif
  72 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
  73         INTC_VECT(LCDC, 0x9a0),
  74         INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
  75 #endif
  76 };
  77
  78 static struct intc_group groups[] __initdata = {
  79         INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
  80         INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
  81         INTC_GROUP(REF, REF_RCMI, REF_ROVI),
  82         INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
  83         INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
  84         INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
  85         INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
  86 };
  87
  88 static struct intc_prio_reg prio_registers[] __initdata = {
  89         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
  90         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
  91 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
  92     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  93     defined(CONFIG_CPU_SUBTYPE_SH7709)
  94         { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
  95         { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
  96         { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
  97 #endif
  98 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  99     defined(CONFIG_CPU_SUBTYPE_SH7709)
 100         { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, } },
 101         { 0xa400001a, 0, 16, 4, /* IPRE */ { 0, SCIF0 } },
 102 #endif
 103 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
 104         { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
 105 #endif
 106 };
 107
 108 static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
 109                          NULL, prio_registers, NULL);
 110
 111 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 112     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 113     defined(CONFIG_CPU_SUBTYPE_SH7709)
 114 static struct intc_vect vectors_irq[] __initdata = {
 115         INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
 116         INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
 117 };
 118
 119 static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
 120                          NULL, prio_registers, NULL);
 121 #endif
 122
 123 static struct resource rtc_resources[] = {
 124         [0] =   {
 125                 .start  = 0xfffffec0,
 126                 .end    = 0xfffffec0 + 0x1e,
 127                 .flags  = IORESOURCE_IO,
 128         },
 129         [1] =   {
 130 <<<<<<< HEAD:arch/sh/kernel/cpu/sh3/setup-sh770x.c
 131                 .start  = 20,
 132 =======
 133                 .start  = 21,
 134 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/sh/kernel/cpu/sh3/setup-sh770x.c
 135                 .flags  = IORESOURCE_IRQ,
 136         },
 137         [2] =   {
 138 <<<<<<< HEAD:arch/sh/kernel/cpu/sh3/setup-sh770x.c
 139                 .start  = 21,
 140 =======
 141                 .start  = 22,
 142 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/sh/kernel/cpu/sh3/setup-sh770x.c
 143                 .flags  = IORESOURCE_IRQ,
 144         },
 145         [3] =   {
 146 <<<<<<< HEAD:arch/sh/kernel/cpu/sh3/setup-sh770x.c
 147                 .start  = 22,
 148 =======
 149                 .start  = 20,
 150 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/sh/kernel/cpu/sh3/setup-sh770x.c
 151                 .flags  = IORESOURCE_IRQ,
 152         },
 153 };
 154
 155 static struct platform_device rtc_device = {
 156         .name           = "sh-rtc",
 157         .id             = -1,
 158         .num_resources  = ARRAY_SIZE(rtc_resources),
 159         .resource       = rtc_resources,
 160 };
 161
 162 static struct plat_sci_port sci_platform_data[] = {
 163         {
 164                 .mapbase        = 0xfffffe80,
 165                 .flags          = UPF_BOOT_AUTOCONF,
 166                 .type           = PORT_SCI,
 167                 .irqs           = { 23, 24, 25, 0 },
 168         },
 169 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 170     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 171     defined(CONFIG_CPU_SUBTYPE_SH7709)
 172         {
 173                 .mapbase        = 0xa4000150,
 174                 .flags          = UPF_BOOT_AUTOCONF,
 175                 .type           = PORT_SCIF,
 176                 .irqs           = { 56, 57, 59, 58 },
 177         },
 178 #endif
 179 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 180     defined(CONFIG_CPU_SUBTYPE_SH7709)
 181         {
 182                 .mapbase        = 0xa4000140,
 183                 .flags          = UPF_BOOT_AUTOCONF,
 184                 .type           = PORT_IRDA,
 185                 .irqs           = { 52, 53, 55, 54 },
 186         },
 187 #endif
 188         {
 189                 .flags = 0,
 190         }
 191 };
 192
 193 static struct platform_device sci_device = {
 194         .name           = "sh-sci",
 195         .id             = -1,
 196         .dev            = {
 197                 .platform_data  = sci_platform_data,
 198         },
 199 };
 200
 201 static struct platform_device *sh770x_devices[] __initdata = {
 202         &sci_device,
 203         &rtc_device,
 204 };
 205
 206 static int __init sh770x_devices_setup(void)
 207 {
 208         return platform_add_devices(sh770x_devices,
 209                 ARRAY_SIZE(sh770x_devices));
 210 }
 211 __initcall(sh770x_devices_setup);
 212
 213 #define INTC_ICR1               0xa4000010UL
 214 #define INTC_ICR1_IRQLVL        (1<<14)
 215
 216 void __init plat_irq_setup_pins(int mode)
 217 {
 218         if (mode == IRQ_MODE_IRQ) {
 219 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 220     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 221     defined(CONFIG_CPU_SUBTYPE_SH7709)
 222                 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
 223                 register_intc_controller(&intc_desc_irq);
 224                 return;
 225 #endif
 226         }
 227         BUG();
 228 }
 229
 230 void __init plat_irq_setup(void)
 231 {
 232         register_intc_controller(&intc_desc);
 233 }