| 2014-11-07 |
Julian Seward | Fix incorrect decoding of AVX2 insns:
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commit | commitdiff | tree |
| 2014-10-31 |
Julian Seward | Handle all DSB/DMB/ISB variants. Fixes #340033.
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commit | commitdiff | tree |
| 2014-10-30 |
Julian Seward | Implement PRFM (immediate). Fixes #335713.
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commit | commitdiff | tree |
| 2014-10-30 |
Julian Seward | Implement FCVTAS W_S and FCVTAU W_S. Fixes #340509.
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commit | commitdiff | tree |
| 2014-10-30 |
Julian Seward | Implement
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commit | commitdiff | tree |
| 2014-10-30 |
Julian Seward | Implement fcvtmu x_d. Fixes #339927.
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commit | commitdiff | tree |
| 2014-10-30 |
Julian Seward | Implement frintx d_d and s_s. Fixes #339926.
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commit | commitdiff | tree |
| 2014-10-27 |
Julian Seward | * add a missing extra m-reg check for some LD/ST vector...
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commit | commitdiff | tree |
| 2014-10-22 |
Julian Seward | Implement SIMD (de)interleaving loads/stores:
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| 2014-10-02 |
Julian Seward | guest_amd64_spechelper: fill in a number of missing...
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commit | commitdiff | tree |
| 2014-10-02 |
Julian Seward | Add folding rules for: Sar64(x,0) and Sar32(x,0). ...
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commit | commitdiff | tree |
| 2014-10-02 |
Julian Seward | guest_amd64_spechelper: number (in comments) and reorder...
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commit | commitdiff | tree |
| 2014-09-07 |
Julian Seward | Change how FXSAVE and FXRSTOR are done, so as to avoid...
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commit | commitdiff | tree |
| 2014-09-06 |
Julian Seward | Handle fcvtpu Xd,Sn. Fixes #335564.
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commit | commitdiff | tree |
| 2014-09-05 |
Julian Seward | iselStmt, case Ist_Dirty: remove pointless conditional...
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| 2014-09-04 |
Julian Seward | arm64: enable support for: str bN, [reg, reg etc]
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commit | commitdiff | tree |
| 2014-09-01 |
Julian Seward | arm64: route all whole-vector shift/rotate/slice operations
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commit | commitdiff | tree |
| 2014-09-01 |
Julian Seward | Rename Iop_Extract{64,V128} to Iop_Slice{64,V128},...
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commit | commitdiff | tree |
| 2014-08-29 |
Julian Seward | Add support for generating ProfInc sequences on ARM64...
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commit | commitdiff | tree |
| 2014-08-26 |
Julian Seward | Add support for four IROps that Memcheck generates...
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commit | commitdiff | tree |
| 2014-08-26 |
Julian Seward | Comment-only change.
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commit | commitdiff | tree |
| 2014-08-24 |
Julian Seward | arm64: implement:
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commit | commitdiff | tree |
| 2014-08-24 |
Julian Seward | Rename IROps for reciprocal estimate, reciprocal step...
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commit | commitdiff | tree |
| 2014-08-20 |
Julian Seward | putGST_masked: correctly handle the case where the...
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commit | commitdiff | tree |
| 2014-08-18 |
Julian Seward | arm64: implement:
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commit | commitdiff | tree |
| 2014-08-17 |
Julian Seward | arm64: implement srhadd, urhadd (vector)
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commit | commitdiff | tree |
| 2014-08-17 |
Julian Seward | arm64: implement
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commit | commitdiff | tree |
| 2014-08-15 |
Julian Seward | No functional change. Remove commented out code copied...
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commit | commitdiff | tree |
| 2014-08-15 |
Julian Seward | Rename Iop_QSalN*, Iop_QShlN* and Iop_QShlN*S so as...
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commit | commitdiff | tree |
| 2014-08-15 |
Julian Seward | arm64: implement: {uqshl, sqshl, sqshlu} (scalar, imm...
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| 2014-08-14 |
Julian Seward | arm64: implement: {uqshl, sqshl, sqshlu} (vector, imm).
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| 2014-08-14 |
Julian Seward | Add a simple folding rule for Iop_ZeroHI64ofV128.
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commit | commitdiff | tree |
| 2014-08-13 |
Julian Seward | arm64: implement: uqshrn{2}, sqrshrun{2}, sqshrun{2...
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commit | commitdiff | tree |
| 2014-08-11 |
Julian Seward | arm64: implement:
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commit | commitdiff | tree |
| 2014-08-11 |
Julian Seward | Add a new folding rule:
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commit | commitdiff | tree |
| 2014-08-04 |
Julian Seward | arm64: add support for: sqshl, uqshl, sqrshl, uqrshl...
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| 2014-08-04 |
Julian Seward | Add a folding rule: XorV128(t,0) ==> t.
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| 2014-08-03 |
Julian Seward | arm64: implement remaining SQDMULH and SQRDMULH cases.
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commit | commitdiff | tree |
| 2014-07-24 |
Julian Seward | Improve infrastructure for dealing with endianness...
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commit | commitdiff | tree |
| 2014-07-22 |
Julian Seward | arm64: implement:
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commit | commitdiff | tree |
| 2014-07-22 |
Julian Seward | Comment-only change.
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commit | commitdiff | tree |
| 2014-07-21 |
Julian Seward | arm64: implement: sqneg, {u,s}q{add,sub} (scalar),
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commit | commitdiff | tree |
| 2014-07-21 |
Julian Seward | Initialise a couple of scalars that gcc -Og thinks...
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commit | commitdiff | tree |
| 2014-07-16 |
Julian Seward | Remove fields from VexAbiInfo that only had relevance...
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| 2014-07-15 |
Julian Seward | arm64: implement: LD1/ST1 (multi 1-elem structs, 2...
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| 2014-07-14 |
Julian Seward | arm64: implement "mrs Xt, cntvct_el0" by pass-through...
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| 2014-07-11 |
Julian Seward | arm64: implement: {sli,sri} (vector & scalar), sqabs...
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commit | commitdiff | tree |
| 2014-07-10 |
Julian Seward | arm64: implement: shll #imm, shrn #imm, rshrn #imm,
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commit | commitdiff | tree |
| 2014-07-03 |
Julian Seward | arm32: support (ARM) PLDW [reg, reg]. The non-W variant...
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| 2014-07-03 |
Julian Seward | arm32: support (ARM) PLDW [reg, #imm]. The non-W variant...
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| 2014-06-30 |
Julian Seward | arm64: implement: sadalp uadalp saddlp uaddlp saddlv...
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| 2014-06-28 |
Julian Seward | arm64: change the representation of FPSR.QC so that...
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| 2014-06-28 |
Julian Seward | arm64: implement: sabal uabal sabdl uabdl saddl uaddl...
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commit | commitdiff | tree |
| 2014-06-27 |
Julian Seward | arm64:
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| 2014-06-26 |
Julian Seward | arm64: implement: rbit 16b,8b, rev16 16b,8b
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commit | commitdiff | tree |
| 2014-06-26 |
Julian Seward | Rename the vector subparts-of-lanes-reversal IROps...
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commit | commitdiff | tree |
| 2014-06-26 |
Julian Seward | The vector versions of the count leading zeros/sign...
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commit | commitdiff | tree |
| 2014-06-26 |
Julian Seward | arm64: implement pmull{2}.
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commit | commitdiff | tree |
| 2014-06-25 |
Julian Seward | arm64: implement:
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commit | commitdiff | tree |
| 2014-06-25 |
Julian Seward | Remove commented out junk which is never going to get...
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commit | commitdiff | tree |
| 2014-06-25 |
Julian Seward | Fix bogus-looking assertion.
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commit | commitdiff | tree |
| 2014-06-24 |
Julian Seward | Implement LD1/ST1 {3 regs . 16b}, [ea] (no offset)
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commit | commitdiff | tree |
| 2014-06-23 |
Julian Seward | arm64: more SIMD instructions:
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commit | commitdiff | tree |
| 2014-06-20 |
Julian Seward | Fix an enum type confusion, PPCAvFpOp vs PPCAvOp, as...
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commit | commitdiff | tree |
| 2014-06-20 |
Julian Seward | Increase the number of vector registers available for...
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commit | commitdiff | tree |
| 2014-06-19 |
Julian Seward | Implement: dup_{d_d[], s_s[], h_h[], b_b[]}, ext
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commit | commitdiff | tree |
| 2014-06-19 |
Julian Seward | Implement: orr_{8h,4h}_imm8_shifted, orr_{4s,2s}_imm8_shifted,
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commit | commitdiff | tree |
| 2014-06-15 |
Julian Seward | arm64: implement: addp std7_std7_std7, addv vector...
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commit | commitdiff | tree |
| 2014-06-15 |
Julian Seward | arm64: implement: abs d_d, neg d_d, abs std7_std7,...
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commit | commitdiff | tree |
| 2014-06-15 |
Julian Seward | Remove temporary front end scaffolding for Cat{Even...
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commit | commitdiff | tree |
| 2014-06-14 |
Julian Seward | Implement LD1R (single structure, replicate).
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commit | commitdiff | tree |
| 2014-06-12 |
Julian Seward | Implement FMUL 2d_2d_d[], 4s_4s_s[], 2s_2s_s[].
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commit | commitdiff | tree |
| 2014-06-12 |
Julian Seward | Remove the old SIMD decoder entirely.
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commit | commitdiff | tree |
| 2014-06-11 |
Julian Seward | Move remaining implemented SIMD instructions into the...
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commit | commitdiff | tree |
| 2014-06-10 |
Julian Seward | Reimplement the SIMD and FP instruction decoder, so...
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commit | commitdiff | tree |
| 2014-06-04 |
Julian Seward | Support ADC/ADCS/SBC/SBCS. Fixes #335496. (dimitry...
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commit | commitdiff | tree |
| 2014-06-04 |
Julian Seward | Support the "ishst" variant of "dmb". Fixes #335263...
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commit | commitdiff | tree |
| 2014-06-04 |
Julian Seward | Support movi_{16b,8b}_#imm8. Fixes #335262. (dimitry...
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commit | commitdiff | tree |
| 2014-05-21 |
Julian Seward | Implement PCMPxSTRx cases 0x0E, 0x34, 0x14, and reformat...
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commit | commitdiff | tree |
| 2014-05-16 |
Julian Seward | Implement SHL_d_d_#imm.
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commit | commitdiff | tree |
| 2014-05-15 |
Julian Seward | Initial front-end fixings needed to handle code generated...
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commit | commitdiff | tree |
| 2014-05-14 |
Julian Seward | Implement VFPv4 VFMA and VFMS (F32 and F64 versions...
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commit | commitdiff | tree |
| 2014-05-13 |
Julian Seward | Thumb encoding: fix assertion failure caused by
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commit | commitdiff | tree |
| 2014-05-13 |
Julian Seward | Thumb encoding: correctly deal with misaligned loads...
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commit | commitdiff | tree |
| 2014-05-07 |
Julian Seward | Handle "blr lr" correctly -- read the destination register
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commit | commitdiff | tree |
| 2014-05-07 |
Julian Seward | Enable 'smulh'.
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commit | commitdiff | tree |
| 2014-05-07 |
Julian Seward | Handle IRStmt::STle of type F32.
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commit | commitdiff | tree |
| 2014-05-07 |
Julian Seward | Allow early-writeback for the cases
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commit | commitdiff | tree |
| 2014-05-05 |
Julian Seward | Fix assertion failures resulting from change of arity of
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commit | commitdiff | tree |
| 2014-05-04 |
Julian Seward | Renaming only (no functional change): rename IR artefacts...
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commit | commitdiff | tree |
| 2014-05-03 |
Julian Seward | ARM64: add support for cache management instructions...
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commit | commitdiff | tree |
| 2014-04-30 |
Julian Seward | x87 instructions FSIN, FCOS, FSINCOS and FPTAN: handle...
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commit | commitdiff | tree |
| 2014-04-27 |
Julian Seward | Finish off vector integer comparison instructions, and
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commit | commitdiff | tree |
| 2014-04-08 |
Julian Seward | Handle Iop_Max32U, so as to make origin tracking in...
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commit | commitdiff | tree |
| 2014-04-08 |
Julian Seward | {FMOV,MOVI} (vector, immediate): fix incorrect DIP...
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commit | commitdiff | tree |
| 2014-04-03 |
Julian Seward | Implement
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commit | commitdiff | tree |
| 2014-04-03 |
Julian Seward | Implement TBL and TBX instructions.
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commit | commitdiff | tree |
| 2014-04-03 |
Julian Seward | Add a couple more constant folding rules for vectors.
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commit | commitdiff | tree |
| 2014-04-01 |
Julian Seward | Bug 332658 - ldrd.w r1, r2, [PC, #imm] does not adjust...
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commit | commitdiff | tree |
| 2014-03-27 |
Julian Seward | Implement FCM{EQ,GE,GT}, FAC{GE,GT} (vector).
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